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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE23; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSSE34; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE415; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX16; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX27; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=AVX512,AVX512F8; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512vl,+avx512bw --show-mc-encoding | FileCheck %s --check-prefixes=AVX512,AVX512BW9 10define <4 x i32> @test_abs_gt_v4i32(<4 x i32> %a) nounwind {11; SSE2-LABEL: test_abs_gt_v4i32:12; SSE2: # %bb.0:13; SSE2-NEXT: movdqa %xmm0, %xmm114; SSE2-NEXT: psrad $31, %xmm115; SSE2-NEXT: pxor %xmm1, %xmm016; SSE2-NEXT: psubd %xmm1, %xmm017; SSE2-NEXT: retq18;19; SSSE3-LABEL: test_abs_gt_v4i32:20; SSSE3: # %bb.0:21; SSSE3-NEXT: pabsd %xmm0, %xmm022; SSSE3-NEXT: retq23;24; SSE41-LABEL: test_abs_gt_v4i32:25; SSE41: # %bb.0:26; SSE41-NEXT: pabsd %xmm0, %xmm027; SSE41-NEXT: retq28;29; AVX1-LABEL: test_abs_gt_v4i32:30; AVX1: # %bb.0:31; AVX1-NEXT: vpabsd %xmm0, %xmm032; AVX1-NEXT: retq33;34; AVX2-LABEL: test_abs_gt_v4i32:35; AVX2: # %bb.0:36; AVX2-NEXT: vpabsd %xmm0, %xmm037; AVX2-NEXT: retq38;39; AVX512-LABEL: test_abs_gt_v4i32:40; AVX512: # %bb.0:41; AVX512-NEXT: vpabsd %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0x1e,0xc0]42; AVX512-NEXT: retq # encoding: [0xc3]43 %tmp1neg = sub <4 x i32> zeroinitializer, %a44 %b = icmp sgt <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1>45 %abs = select <4 x i1> %b, <4 x i32> %a, <4 x i32> %tmp1neg46 ret <4 x i32> %abs47}48 49define <4 x i32> @test_abs_ge_v4i32(<4 x i32> %a) nounwind {50; SSE2-LABEL: test_abs_ge_v4i32:51; SSE2: # %bb.0:52; SSE2-NEXT: movdqa %xmm0, %xmm153; SSE2-NEXT: psrad $31, %xmm154; SSE2-NEXT: pxor %xmm1, %xmm055; SSE2-NEXT: psubd %xmm1, %xmm056; SSE2-NEXT: retq57;58; SSSE3-LABEL: test_abs_ge_v4i32:59; SSSE3: # %bb.0:60; SSSE3-NEXT: pabsd %xmm0, %xmm061; SSSE3-NEXT: retq62;63; SSE41-LABEL: test_abs_ge_v4i32:64; SSE41: # %bb.0:65; SSE41-NEXT: pabsd %xmm0, %xmm066; SSE41-NEXT: retq67;68; AVX1-LABEL: test_abs_ge_v4i32:69; AVX1: # %bb.0:70; AVX1-NEXT: vpabsd %xmm0, %xmm071; AVX1-NEXT: retq72;73; AVX2-LABEL: test_abs_ge_v4i32:74; AVX2: # %bb.0:75; AVX2-NEXT: vpabsd %xmm0, %xmm076; AVX2-NEXT: retq77;78; AVX512-LABEL: test_abs_ge_v4i32:79; AVX512: # %bb.0:80; AVX512-NEXT: vpabsd %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0x1e,0xc0]81; AVX512-NEXT: retq # encoding: [0xc3]82 %tmp1neg = sub <4 x i32> zeroinitializer, %a83 %b = icmp sge <4 x i32> %a, zeroinitializer84 %abs = select <4 x i1> %b, <4 x i32> %a, <4 x i32> %tmp1neg85 ret <4 x i32> %abs86}87 88define <8 x i16> @test_abs_gt_v8i16(<8 x i16> %a) nounwind {89; SSE2-LABEL: test_abs_gt_v8i16:90; SSE2: # %bb.0:91; SSE2-NEXT: pxor %xmm1, %xmm192; SSE2-NEXT: psubw %xmm0, %xmm193; SSE2-NEXT: pmaxsw %xmm1, %xmm094; SSE2-NEXT: retq95;96; SSSE3-LABEL: test_abs_gt_v8i16:97; SSSE3: # %bb.0:98; SSSE3-NEXT: pabsw %xmm0, %xmm099; SSSE3-NEXT: retq100;101; SSE41-LABEL: test_abs_gt_v8i16:102; SSE41: # %bb.0:103; SSE41-NEXT: pabsw %xmm0, %xmm0104; SSE41-NEXT: retq105;106; AVX1-LABEL: test_abs_gt_v8i16:107; AVX1: # %bb.0:108; AVX1-NEXT: vpabsw %xmm0, %xmm0109; AVX1-NEXT: retq110;111; AVX2-LABEL: test_abs_gt_v8i16:112; AVX2: # %bb.0:113; AVX2-NEXT: vpabsw %xmm0, %xmm0114; AVX2-NEXT: retq115;116; AVX512F-LABEL: test_abs_gt_v8i16:117; AVX512F: # %bb.0:118; AVX512F-NEXT: vpabsw %xmm0, %xmm0 # encoding: [0xc4,0xe2,0x79,0x1d,0xc0]119; AVX512F-NEXT: retq # encoding: [0xc3]120;121; AVX512BW-LABEL: test_abs_gt_v8i16:122; AVX512BW: # %bb.0:123; AVX512BW-NEXT: vpabsw %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0x1d,0xc0]124; AVX512BW-NEXT: retq # encoding: [0xc3]125 %tmp1neg = sub <8 x i16> zeroinitializer, %a126 %b = icmp sgt <8 x i16> %a, zeroinitializer127 %abs = select <8 x i1> %b, <8 x i16> %a, <8 x i16> %tmp1neg128 ret <8 x i16> %abs129}130 131define <16 x i8> @test_abs_lt_v16i8(<16 x i8> %a) nounwind {132; SSE2-LABEL: test_abs_lt_v16i8:133; SSE2: # %bb.0:134; SSE2-NEXT: pxor %xmm1, %xmm1135; SSE2-NEXT: psubb %xmm0, %xmm1136; SSE2-NEXT: pminub %xmm1, %xmm0137; SSE2-NEXT: retq138;139; SSSE3-LABEL: test_abs_lt_v16i8:140; SSSE3: # %bb.0:141; SSSE3-NEXT: pabsb %xmm0, %xmm0142; SSSE3-NEXT: retq143;144; SSE41-LABEL: test_abs_lt_v16i8:145; SSE41: # %bb.0:146; SSE41-NEXT: pabsb %xmm0, %xmm0147; SSE41-NEXT: retq148;149; AVX1-LABEL: test_abs_lt_v16i8:150; AVX1: # %bb.0:151; AVX1-NEXT: vpabsb %xmm0, %xmm0152; AVX1-NEXT: retq153;154; AVX2-LABEL: test_abs_lt_v16i8:155; AVX2: # %bb.0:156; AVX2-NEXT: vpabsb %xmm0, %xmm0157; AVX2-NEXT: retq158;159; AVX512F-LABEL: test_abs_lt_v16i8:160; AVX512F: # %bb.0:161; AVX512F-NEXT: vpabsb %xmm0, %xmm0 # encoding: [0xc4,0xe2,0x79,0x1c,0xc0]162; AVX512F-NEXT: retq # encoding: [0xc3]163;164; AVX512BW-LABEL: test_abs_lt_v16i8:165; AVX512BW: # %bb.0:166; AVX512BW-NEXT: vpabsb %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0x1c,0xc0]167; AVX512BW-NEXT: retq # encoding: [0xc3]168 %tmp1neg = sub <16 x i8> zeroinitializer, %a169 %b = icmp slt <16 x i8> %a, zeroinitializer170 %abs = select <16 x i1> %b, <16 x i8> %tmp1neg, <16 x i8> %a171 ret <16 x i8> %abs172}173 174define <4 x i32> @test_abs_le_v4i32(<4 x i32> %a) nounwind {175; SSE2-LABEL: test_abs_le_v4i32:176; SSE2: # %bb.0:177; SSE2-NEXT: movdqa %xmm0, %xmm1178; SSE2-NEXT: psrad $31, %xmm1179; SSE2-NEXT: pxor %xmm1, %xmm0180; SSE2-NEXT: psubd %xmm1, %xmm0181; SSE2-NEXT: retq182;183; SSSE3-LABEL: test_abs_le_v4i32:184; SSSE3: # %bb.0:185; SSSE3-NEXT: pabsd %xmm0, %xmm0186; SSSE3-NEXT: retq187;188; SSE41-LABEL: test_abs_le_v4i32:189; SSE41: # %bb.0:190; SSE41-NEXT: pabsd %xmm0, %xmm0191; SSE41-NEXT: retq192;193; AVX1-LABEL: test_abs_le_v4i32:194; AVX1: # %bb.0:195; AVX1-NEXT: vpabsd %xmm0, %xmm0196; AVX1-NEXT: retq197;198; AVX2-LABEL: test_abs_le_v4i32:199; AVX2: # %bb.0:200; AVX2-NEXT: vpabsd %xmm0, %xmm0201; AVX2-NEXT: retq202;203; AVX512-LABEL: test_abs_le_v4i32:204; AVX512: # %bb.0:205; AVX512-NEXT: vpabsd %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0x1e,0xc0]206; AVX512-NEXT: retq # encoding: [0xc3]207 %tmp1neg = sub <4 x i32> zeroinitializer, %a208 %b = icmp sle <4 x i32> %a, zeroinitializer209 %abs = select <4 x i1> %b, <4 x i32> %tmp1neg, <4 x i32> %a210 ret <4 x i32> %abs211}212 213define <8 x i32> @test_abs_gt_v8i32(<8 x i32> %a) nounwind {214; SSE2-LABEL: test_abs_gt_v8i32:215; SSE2: # %bb.0:216; SSE2-NEXT: movdqa %xmm0, %xmm2217; SSE2-NEXT: psrad $31, %xmm2218; SSE2-NEXT: pxor %xmm2, %xmm0219; SSE2-NEXT: psubd %xmm2, %xmm0220; SSE2-NEXT: movdqa %xmm1, %xmm2221; SSE2-NEXT: psrad $31, %xmm2222; SSE2-NEXT: pxor %xmm2, %xmm1223; SSE2-NEXT: psubd %xmm2, %xmm1224; SSE2-NEXT: retq225;226; SSSE3-LABEL: test_abs_gt_v8i32:227; SSSE3: # %bb.0:228; SSSE3-NEXT: pabsd %xmm0, %xmm0229; SSSE3-NEXT: pabsd %xmm1, %xmm1230; SSSE3-NEXT: retq231;232; SSE41-LABEL: test_abs_gt_v8i32:233; SSE41: # %bb.0:234; SSE41-NEXT: pabsd %xmm0, %xmm0235; SSE41-NEXT: pabsd %xmm1, %xmm1236; SSE41-NEXT: retq237;238; AVX1-LABEL: test_abs_gt_v8i32:239; AVX1: # %bb.0:240; AVX1-NEXT: vpabsd %xmm0, %xmm1241; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0242; AVX1-NEXT: vpabsd %xmm0, %xmm0243; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0244; AVX1-NEXT: retq245;246; AVX2-LABEL: test_abs_gt_v8i32:247; AVX2: # %bb.0:248; AVX2-NEXT: vpabsd %ymm0, %ymm0249; AVX2-NEXT: retq250;251; AVX512-LABEL: test_abs_gt_v8i32:252; AVX512: # %bb.0:253; AVX512-NEXT: vpabsd %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x7d,0x1e,0xc0]254; AVX512-NEXT: retq # encoding: [0xc3]255 %tmp1neg = sub <8 x i32> zeroinitializer, %a256 %b = icmp sgt <8 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>257 %abs = select <8 x i1> %b, <8 x i32> %a, <8 x i32> %tmp1neg258 ret <8 x i32> %abs259}260 261define <8 x i32> @test_abs_ge_v8i32(<8 x i32> %a) nounwind {262; SSE2-LABEL: test_abs_ge_v8i32:263; SSE2: # %bb.0:264; SSE2-NEXT: movdqa %xmm0, %xmm2265; SSE2-NEXT: psrad $31, %xmm2266; SSE2-NEXT: pxor %xmm2, %xmm0267; SSE2-NEXT: psubd %xmm2, %xmm0268; SSE2-NEXT: movdqa %xmm1, %xmm2269; SSE2-NEXT: psrad $31, %xmm2270; SSE2-NEXT: pxor %xmm2, %xmm1271; SSE2-NEXT: psubd %xmm2, %xmm1272; SSE2-NEXT: retq273;274; SSSE3-LABEL: test_abs_ge_v8i32:275; SSSE3: # %bb.0:276; SSSE3-NEXT: pabsd %xmm0, %xmm0277; SSSE3-NEXT: pabsd %xmm1, %xmm1278; SSSE3-NEXT: retq279;280; SSE41-LABEL: test_abs_ge_v8i32:281; SSE41: # %bb.0:282; SSE41-NEXT: pabsd %xmm0, %xmm0283; SSE41-NEXT: pabsd %xmm1, %xmm1284; SSE41-NEXT: retq285;286; AVX1-LABEL: test_abs_ge_v8i32:287; AVX1: # %bb.0:288; AVX1-NEXT: vpabsd %xmm0, %xmm1289; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0290; AVX1-NEXT: vpabsd %xmm0, %xmm0291; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0292; AVX1-NEXT: retq293;294; AVX2-LABEL: test_abs_ge_v8i32:295; AVX2: # %bb.0:296; AVX2-NEXT: vpabsd %ymm0, %ymm0297; AVX2-NEXT: retq298;299; AVX512-LABEL: test_abs_ge_v8i32:300; AVX512: # %bb.0:301; AVX512-NEXT: vpabsd %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x7d,0x1e,0xc0]302; AVX512-NEXT: retq # encoding: [0xc3]303 %tmp1neg = sub <8 x i32> zeroinitializer, %a304 %b = icmp sge <8 x i32> %a, zeroinitializer305 %abs = select <8 x i1> %b, <8 x i32> %a, <8 x i32> %tmp1neg306 ret <8 x i32> %abs307}308 309define <16 x i16> @test_abs_gt_v16i16(<16 x i16> %a) nounwind {310; SSE2-LABEL: test_abs_gt_v16i16:311; SSE2: # %bb.0:312; SSE2-NEXT: pxor %xmm2, %xmm2313; SSE2-NEXT: pxor %xmm3, %xmm3314; SSE2-NEXT: psubw %xmm0, %xmm3315; SSE2-NEXT: pmaxsw %xmm3, %xmm0316; SSE2-NEXT: psubw %xmm1, %xmm2317; SSE2-NEXT: pmaxsw %xmm2, %xmm1318; SSE2-NEXT: retq319;320; SSSE3-LABEL: test_abs_gt_v16i16:321; SSSE3: # %bb.0:322; SSSE3-NEXT: pabsw %xmm0, %xmm0323; SSSE3-NEXT: pabsw %xmm1, %xmm1324; SSSE3-NEXT: retq325;326; SSE41-LABEL: test_abs_gt_v16i16:327; SSE41: # %bb.0:328; SSE41-NEXT: pabsw %xmm0, %xmm0329; SSE41-NEXT: pabsw %xmm1, %xmm1330; SSE41-NEXT: retq331;332; AVX1-LABEL: test_abs_gt_v16i16:333; AVX1: # %bb.0:334; AVX1-NEXT: vpabsw %xmm0, %xmm1335; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0336; AVX1-NEXT: vpabsw %xmm0, %xmm0337; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0338; AVX1-NEXT: retq339;340; AVX2-LABEL: test_abs_gt_v16i16:341; AVX2: # %bb.0:342; AVX2-NEXT: vpabsw %ymm0, %ymm0343; AVX2-NEXT: retq344;345; AVX512F-LABEL: test_abs_gt_v16i16:346; AVX512F: # %bb.0:347; AVX512F-NEXT: vpabsw %ymm0, %ymm0 # encoding: [0xc4,0xe2,0x7d,0x1d,0xc0]348; AVX512F-NEXT: retq # encoding: [0xc3]349;350; AVX512BW-LABEL: test_abs_gt_v16i16:351; AVX512BW: # %bb.0:352; AVX512BW-NEXT: vpabsw %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x7d,0x1d,0xc0]353; AVX512BW-NEXT: retq # encoding: [0xc3]354 %tmp1neg = sub <16 x i16> zeroinitializer, %a355 %b = icmp sgt <16 x i16> %a, zeroinitializer356 %abs = select <16 x i1> %b, <16 x i16> %a, <16 x i16> %tmp1neg357 ret <16 x i16> %abs358}359 360define <32 x i8> @test_abs_lt_v32i8(<32 x i8> %a) nounwind {361; SSE2-LABEL: test_abs_lt_v32i8:362; SSE2: # %bb.0:363; SSE2-NEXT: pxor %xmm2, %xmm2364; SSE2-NEXT: pxor %xmm3, %xmm3365; SSE2-NEXT: psubb %xmm0, %xmm3366; SSE2-NEXT: pminub %xmm3, %xmm0367; SSE2-NEXT: psubb %xmm1, %xmm2368; SSE2-NEXT: pminub %xmm2, %xmm1369; SSE2-NEXT: retq370;371; SSSE3-LABEL: test_abs_lt_v32i8:372; SSSE3: # %bb.0:373; SSSE3-NEXT: pabsb %xmm0, %xmm0374; SSSE3-NEXT: pabsb %xmm1, %xmm1375; SSSE3-NEXT: retq376;377; SSE41-LABEL: test_abs_lt_v32i8:378; SSE41: # %bb.0:379; SSE41-NEXT: pabsb %xmm0, %xmm0380; SSE41-NEXT: pabsb %xmm1, %xmm1381; SSE41-NEXT: retq382;383; AVX1-LABEL: test_abs_lt_v32i8:384; AVX1: # %bb.0:385; AVX1-NEXT: vpabsb %xmm0, %xmm1386; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0387; AVX1-NEXT: vpabsb %xmm0, %xmm0388; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0389; AVX1-NEXT: retq390;391; AVX2-LABEL: test_abs_lt_v32i8:392; AVX2: # %bb.0:393; AVX2-NEXT: vpabsb %ymm0, %ymm0394; AVX2-NEXT: retq395;396; AVX512F-LABEL: test_abs_lt_v32i8:397; AVX512F: # %bb.0:398; AVX512F-NEXT: vpabsb %ymm0, %ymm0 # encoding: [0xc4,0xe2,0x7d,0x1c,0xc0]399; AVX512F-NEXT: retq # encoding: [0xc3]400;401; AVX512BW-LABEL: test_abs_lt_v32i8:402; AVX512BW: # %bb.0:403; AVX512BW-NEXT: vpabsb %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x7d,0x1c,0xc0]404; AVX512BW-NEXT: retq # encoding: [0xc3]405 %tmp1neg = sub <32 x i8> zeroinitializer, %a406 %b = icmp slt <32 x i8> %a, zeroinitializer407 %abs = select <32 x i1> %b, <32 x i8> %tmp1neg, <32 x i8> %a408 ret <32 x i8> %abs409}410 411define <8 x i32> @test_abs_le_v8i32(<8 x i32> %a) nounwind {412; SSE2-LABEL: test_abs_le_v8i32:413; SSE2: # %bb.0:414; SSE2-NEXT: movdqa %xmm0, %xmm2415; SSE2-NEXT: psrad $31, %xmm2416; SSE2-NEXT: pxor %xmm2, %xmm0417; SSE2-NEXT: psubd %xmm2, %xmm0418; SSE2-NEXT: movdqa %xmm1, %xmm2419; SSE2-NEXT: psrad $31, %xmm2420; SSE2-NEXT: pxor %xmm2, %xmm1421; SSE2-NEXT: psubd %xmm2, %xmm1422; SSE2-NEXT: retq423;424; SSSE3-LABEL: test_abs_le_v8i32:425; SSSE3: # %bb.0:426; SSSE3-NEXT: pabsd %xmm0, %xmm0427; SSSE3-NEXT: pabsd %xmm1, %xmm1428; SSSE3-NEXT: retq429;430; SSE41-LABEL: test_abs_le_v8i32:431; SSE41: # %bb.0:432; SSE41-NEXT: pabsd %xmm0, %xmm0433; SSE41-NEXT: pabsd %xmm1, %xmm1434; SSE41-NEXT: retq435;436; AVX1-LABEL: test_abs_le_v8i32:437; AVX1: # %bb.0:438; AVX1-NEXT: vpabsd %xmm0, %xmm1439; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0440; AVX1-NEXT: vpabsd %xmm0, %xmm0441; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0442; AVX1-NEXT: retq443;444; AVX2-LABEL: test_abs_le_v8i32:445; AVX2: # %bb.0:446; AVX2-NEXT: vpabsd %ymm0, %ymm0447; AVX2-NEXT: retq448;449; AVX512-LABEL: test_abs_le_v8i32:450; AVX512: # %bb.0:451; AVX512-NEXT: vpabsd %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x7d,0x1e,0xc0]452; AVX512-NEXT: retq # encoding: [0xc3]453 %tmp1neg = sub <8 x i32> zeroinitializer, %a454 %b = icmp sle <8 x i32> %a, zeroinitializer455 %abs = select <8 x i1> %b, <8 x i32> %tmp1neg, <8 x i32> %a456 ret <8 x i32> %abs457}458 459define <16 x i32> @test_abs_le_16i32(<16 x i32> %a) nounwind {460; SSE2-LABEL: test_abs_le_16i32:461; SSE2: # %bb.0:462; SSE2-NEXT: movdqa %xmm0, %xmm4463; SSE2-NEXT: psrad $31, %xmm4464; SSE2-NEXT: pxor %xmm4, %xmm0465; SSE2-NEXT: psubd %xmm4, %xmm0466; SSE2-NEXT: movdqa %xmm1, %xmm4467; SSE2-NEXT: psrad $31, %xmm4468; SSE2-NEXT: pxor %xmm4, %xmm1469; SSE2-NEXT: psubd %xmm4, %xmm1470; SSE2-NEXT: movdqa %xmm2, %xmm4471; SSE2-NEXT: psrad $31, %xmm4472; SSE2-NEXT: pxor %xmm4, %xmm2473; SSE2-NEXT: psubd %xmm4, %xmm2474; SSE2-NEXT: movdqa %xmm3, %xmm4475; SSE2-NEXT: psrad $31, %xmm4476; SSE2-NEXT: pxor %xmm4, %xmm3477; SSE2-NEXT: psubd %xmm4, %xmm3478; SSE2-NEXT: retq479;480; SSSE3-LABEL: test_abs_le_16i32:481; SSSE3: # %bb.0:482; SSSE3-NEXT: pabsd %xmm0, %xmm0483; SSSE3-NEXT: pabsd %xmm1, %xmm1484; SSSE3-NEXT: pabsd %xmm2, %xmm2485; SSSE3-NEXT: pabsd %xmm3, %xmm3486; SSSE3-NEXT: retq487;488; SSE41-LABEL: test_abs_le_16i32:489; SSE41: # %bb.0:490; SSE41-NEXT: pabsd %xmm0, %xmm0491; SSE41-NEXT: pabsd %xmm1, %xmm1492; SSE41-NEXT: pabsd %xmm2, %xmm2493; SSE41-NEXT: pabsd %xmm3, %xmm3494; SSE41-NEXT: retq495;496; AVX1-LABEL: test_abs_le_16i32:497; AVX1: # %bb.0:498; AVX1-NEXT: vpabsd %xmm0, %xmm2499; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0500; AVX1-NEXT: vpabsd %xmm0, %xmm0501; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0502; AVX1-NEXT: vpabsd %xmm1, %xmm2503; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1504; AVX1-NEXT: vpabsd %xmm1, %xmm1505; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1506; AVX1-NEXT: retq507;508; AVX2-LABEL: test_abs_le_16i32:509; AVX2: # %bb.0:510; AVX2-NEXT: vpabsd %ymm0, %ymm0511; AVX2-NEXT: vpabsd %ymm1, %ymm1512; AVX2-NEXT: retq513;514; AVX512-LABEL: test_abs_le_16i32:515; AVX512: # %bb.0:516; AVX512-NEXT: vpabsd %zmm0, %zmm0 # encoding: [0x62,0xf2,0x7d,0x48,0x1e,0xc0]517; AVX512-NEXT: retq # encoding: [0xc3]518 %tmp1neg = sub <16 x i32> zeroinitializer, %a519 %b = icmp sle <16 x i32> %a, zeroinitializer520 %abs = select <16 x i1> %b, <16 x i32> %tmp1neg, <16 x i32> %a521 ret <16 x i32> %abs522}523 524define <2 x i64> @test_abs_ge_v2i64(<2 x i64> %a) nounwind {525; SSE2-LABEL: test_abs_ge_v2i64:526; SSE2: # %bb.0:527; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]528; SSE2-NEXT: psrad $31, %xmm1529; SSE2-NEXT: pxor %xmm1, %xmm0530; SSE2-NEXT: psubq %xmm1, %xmm0531; SSE2-NEXT: retq532;533; SSSE3-LABEL: test_abs_ge_v2i64:534; SSSE3: # %bb.0:535; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]536; SSSE3-NEXT: psrad $31, %xmm1537; SSSE3-NEXT: pxor %xmm1, %xmm0538; SSSE3-NEXT: psubq %xmm1, %xmm0539; SSSE3-NEXT: retq540;541; SSE41-LABEL: test_abs_ge_v2i64:542; SSE41: # %bb.0:543; SSE41-NEXT: pxor %xmm1, %xmm1544; SSE41-NEXT: psubq %xmm0, %xmm1545; SSE41-NEXT: blendvpd %xmm0, %xmm1, %xmm0546; SSE41-NEXT: retq547;548; AVX1-LABEL: test_abs_ge_v2i64:549; AVX1: # %bb.0:550; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1551; AVX1-NEXT: vpsubq %xmm0, %xmm1, %xmm1552; AVX1-NEXT: vblendvpd %xmm0, %xmm1, %xmm0, %xmm0553; AVX1-NEXT: retq554;555; AVX2-LABEL: test_abs_ge_v2i64:556; AVX2: # %bb.0:557; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1558; AVX2-NEXT: vpsubq %xmm0, %xmm1, %xmm1559; AVX2-NEXT: vblendvpd %xmm0, %xmm1, %xmm0, %xmm0560; AVX2-NEXT: retq561;562; AVX512-LABEL: test_abs_ge_v2i64:563; AVX512: # %bb.0:564; AVX512-NEXT: vpabsq %xmm0, %xmm0 # encoding: [0x62,0xf2,0xfd,0x08,0x1f,0xc0]565; AVX512-NEXT: retq # encoding: [0xc3]566 %tmp1neg = sub <2 x i64> zeroinitializer, %a567 %b = icmp sge <2 x i64> %a, zeroinitializer568 %abs = select <2 x i1> %b, <2 x i64> %a, <2 x i64> %tmp1neg569 ret <2 x i64> %abs570}571 572define <4 x i64> @test_abs_gt_v4i64(<4 x i64> %a) nounwind {573; SSE2-LABEL: test_abs_gt_v4i64:574; SSE2: # %bb.0:575; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]576; SSE2-NEXT: psrad $31, %xmm2577; SSE2-NEXT: pxor %xmm2, %xmm0578; SSE2-NEXT: psubq %xmm2, %xmm0579; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]580; SSE2-NEXT: psrad $31, %xmm2581; SSE2-NEXT: pxor %xmm2, %xmm1582; SSE2-NEXT: psubq %xmm2, %xmm1583; SSE2-NEXT: retq584;585; SSSE3-LABEL: test_abs_gt_v4i64:586; SSSE3: # %bb.0:587; SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]588; SSSE3-NEXT: psrad $31, %xmm2589; SSSE3-NEXT: pxor %xmm2, %xmm0590; SSSE3-NEXT: psubq %xmm2, %xmm0591; SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]592; SSSE3-NEXT: psrad $31, %xmm2593; SSSE3-NEXT: pxor %xmm2, %xmm1594; SSSE3-NEXT: psubq %xmm2, %xmm1595; SSSE3-NEXT: retq596;597; SSE41-LABEL: test_abs_gt_v4i64:598; SSE41: # %bb.0:599; SSE41-NEXT: movdqa %xmm0, %xmm2600; SSE41-NEXT: pxor %xmm3, %xmm3601; SSE41-NEXT: pxor %xmm4, %xmm4602; SSE41-NEXT: psubq %xmm0, %xmm4603; SSE41-NEXT: blendvpd %xmm0, %xmm4, %xmm2604; SSE41-NEXT: psubq %xmm1, %xmm3605; SSE41-NEXT: movdqa %xmm1, %xmm0606; SSE41-NEXT: blendvpd %xmm0, %xmm3, %xmm1607; SSE41-NEXT: movapd %xmm2, %xmm0608; SSE41-NEXT: retq609;610; AVX1-LABEL: test_abs_gt_v4i64:611; AVX1: # %bb.0:612; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1613; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2614; AVX1-NEXT: vpsubq %xmm1, %xmm2, %xmm1615; AVX1-NEXT: vpsubq %xmm0, %xmm2, %xmm2616; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1617; AVX1-NEXT: vblendvpd %ymm0, %ymm1, %ymm0, %ymm0618; AVX1-NEXT: retq619;620; AVX2-LABEL: test_abs_gt_v4i64:621; AVX2: # %bb.0:622; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1623; AVX2-NEXT: vpsubq %ymm0, %ymm1, %ymm1624; AVX2-NEXT: vblendvpd %ymm0, %ymm1, %ymm0, %ymm0625; AVX2-NEXT: retq626;627; AVX512-LABEL: test_abs_gt_v4i64:628; AVX512: # %bb.0:629; AVX512-NEXT: vpabsq %ymm0, %ymm0 # encoding: [0x62,0xf2,0xfd,0x28,0x1f,0xc0]630; AVX512-NEXT: retq # encoding: [0xc3]631 %tmp1neg = sub <4 x i64> zeroinitializer, %a632 %b = icmp sgt <4 x i64> %a, <i64 -1, i64 -1, i64 -1, i64 -1>633 %abs = select <4 x i1> %b, <4 x i64> %a, <4 x i64> %tmp1neg634 ret <4 x i64> %abs635}636 637define <8 x i64> @test_abs_le_v8i64(<8 x i64> %a) nounwind {638; SSE2-LABEL: test_abs_le_v8i64:639; SSE2: # %bb.0:640; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3]641; SSE2-NEXT: psrad $31, %xmm4642; SSE2-NEXT: pxor %xmm4, %xmm0643; SSE2-NEXT: psubq %xmm4, %xmm0644; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3]645; SSE2-NEXT: psrad $31, %xmm4646; SSE2-NEXT: pxor %xmm4, %xmm1647; SSE2-NEXT: psubq %xmm4, %xmm1648; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]649; SSE2-NEXT: psrad $31, %xmm4650; SSE2-NEXT: pxor %xmm4, %xmm2651; SSE2-NEXT: psubq %xmm4, %xmm2652; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]653; SSE2-NEXT: psrad $31, %xmm4654; SSE2-NEXT: pxor %xmm4, %xmm3655; SSE2-NEXT: psubq %xmm4, %xmm3656; SSE2-NEXT: retq657;658; SSSE3-LABEL: test_abs_le_v8i64:659; SSSE3: # %bb.0:660; SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3]661; SSSE3-NEXT: psrad $31, %xmm4662; SSSE3-NEXT: pxor %xmm4, %xmm0663; SSSE3-NEXT: psubq %xmm4, %xmm0664; SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3]665; SSSE3-NEXT: psrad $31, %xmm4666; SSSE3-NEXT: pxor %xmm4, %xmm1667; SSSE3-NEXT: psubq %xmm4, %xmm1668; SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]669; SSSE3-NEXT: psrad $31, %xmm4670; SSSE3-NEXT: pxor %xmm4, %xmm2671; SSSE3-NEXT: psubq %xmm4, %xmm2672; SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]673; SSSE3-NEXT: psrad $31, %xmm4674; SSSE3-NEXT: pxor %xmm4, %xmm3675; SSSE3-NEXT: psubq %xmm4, %xmm3676; SSSE3-NEXT: retq677;678; SSE41-LABEL: test_abs_le_v8i64:679; SSE41: # %bb.0:680; SSE41-NEXT: movdqa %xmm0, %xmm4681; SSE41-NEXT: pxor %xmm5, %xmm5682; SSE41-NEXT: pxor %xmm6, %xmm6683; SSE41-NEXT: psubq %xmm0, %xmm6684; SSE41-NEXT: blendvpd %xmm0, %xmm6, %xmm4685; SSE41-NEXT: pxor %xmm6, %xmm6686; SSE41-NEXT: psubq %xmm1, %xmm6687; SSE41-NEXT: movdqa %xmm1, %xmm0688; SSE41-NEXT: blendvpd %xmm0, %xmm6, %xmm1689; SSE41-NEXT: pxor %xmm6, %xmm6690; SSE41-NEXT: psubq %xmm2, %xmm6691; SSE41-NEXT: movdqa %xmm2, %xmm0692; SSE41-NEXT: blendvpd %xmm0, %xmm6, %xmm2693; SSE41-NEXT: psubq %xmm3, %xmm5694; SSE41-NEXT: movdqa %xmm3, %xmm0695; SSE41-NEXT: blendvpd %xmm0, %xmm5, %xmm3696; SSE41-NEXT: movapd %xmm4, %xmm0697; SSE41-NEXT: retq698;699; AVX1-LABEL: test_abs_le_v8i64:700; AVX1: # %bb.0:701; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2702; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3703; AVX1-NEXT: vpsubq %xmm2, %xmm3, %xmm2704; AVX1-NEXT: vpsubq %xmm0, %xmm3, %xmm4705; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm4, %ymm2706; AVX1-NEXT: vblendvpd %ymm0, %ymm2, %ymm0, %ymm0707; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2708; AVX1-NEXT: vpsubq %xmm2, %xmm3, %xmm2709; AVX1-NEXT: vpsubq %xmm1, %xmm3, %xmm3710; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm2711; AVX1-NEXT: vblendvpd %ymm1, %ymm2, %ymm1, %ymm1712; AVX1-NEXT: retq713;714; AVX2-LABEL: test_abs_le_v8i64:715; AVX2: # %bb.0:716; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2717; AVX2-NEXT: vpsubq %ymm0, %ymm2, %ymm3718; AVX2-NEXT: vblendvpd %ymm0, %ymm3, %ymm0, %ymm0719; AVX2-NEXT: vpsubq %ymm1, %ymm2, %ymm2720; AVX2-NEXT: vblendvpd %ymm1, %ymm2, %ymm1, %ymm1721; AVX2-NEXT: retq722;723; AVX512-LABEL: test_abs_le_v8i64:724; AVX512: # %bb.0:725; AVX512-NEXT: vpabsq %zmm0, %zmm0 # encoding: [0x62,0xf2,0xfd,0x48,0x1f,0xc0]726; AVX512-NEXT: retq # encoding: [0xc3]727 %tmp1neg = sub <8 x i64> zeroinitializer, %a728 %b = icmp sle <8 x i64> %a, zeroinitializer729 %abs = select <8 x i1> %b, <8 x i64> %tmp1neg, <8 x i64> %a730 ret <8 x i64> %abs731}732 733define <8 x i64> @test_abs_le_v8i64_fold(ptr %a.ptr) nounwind {734; SSE2-LABEL: test_abs_le_v8i64_fold:735; SSE2: # %bb.0:736; SSE2-NEXT: movdqu (%rdi), %xmm0737; SSE2-NEXT: movdqu 16(%rdi), %xmm1738; SSE2-NEXT: movdqu 32(%rdi), %xmm2739; SSE2-NEXT: movdqu 48(%rdi), %xmm3740; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3]741; SSE2-NEXT: psrad $31, %xmm4742; SSE2-NEXT: pxor %xmm4, %xmm0743; SSE2-NEXT: psubq %xmm4, %xmm0744; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3]745; SSE2-NEXT: psrad $31, %xmm4746; SSE2-NEXT: pxor %xmm4, %xmm1747; SSE2-NEXT: psubq %xmm4, %xmm1748; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]749; SSE2-NEXT: psrad $31, %xmm4750; SSE2-NEXT: pxor %xmm4, %xmm2751; SSE2-NEXT: psubq %xmm4, %xmm2752; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]753; SSE2-NEXT: psrad $31, %xmm4754; SSE2-NEXT: pxor %xmm4, %xmm3755; SSE2-NEXT: psubq %xmm4, %xmm3756; SSE2-NEXT: retq757;758; SSSE3-LABEL: test_abs_le_v8i64_fold:759; SSSE3: # %bb.0:760; SSSE3-NEXT: movdqu (%rdi), %xmm0761; SSSE3-NEXT: movdqu 16(%rdi), %xmm1762; SSSE3-NEXT: movdqu 32(%rdi), %xmm2763; SSSE3-NEXT: movdqu 48(%rdi), %xmm3764; SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3]765; SSSE3-NEXT: psrad $31, %xmm4766; SSSE3-NEXT: pxor %xmm4, %xmm0767; SSSE3-NEXT: psubq %xmm4, %xmm0768; SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3]769; SSSE3-NEXT: psrad $31, %xmm4770; SSSE3-NEXT: pxor %xmm4, %xmm1771; SSSE3-NEXT: psubq %xmm4, %xmm1772; SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]773; SSSE3-NEXT: psrad $31, %xmm4774; SSSE3-NEXT: pxor %xmm4, %xmm2775; SSSE3-NEXT: psubq %xmm4, %xmm2776; SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]777; SSSE3-NEXT: psrad $31, %xmm4778; SSSE3-NEXT: pxor %xmm4, %xmm3779; SSSE3-NEXT: psubq %xmm4, %xmm3780; SSSE3-NEXT: retq781;782; SSE41-LABEL: test_abs_le_v8i64_fold:783; SSE41: # %bb.0:784; SSE41-NEXT: movdqu (%rdi), %xmm1785; SSE41-NEXT: movdqu 16(%rdi), %xmm2786; SSE41-NEXT: movdqu 32(%rdi), %xmm3787; SSE41-NEXT: movdqu 48(%rdi), %xmm4788; SSE41-NEXT: pxor %xmm5, %xmm5789; SSE41-NEXT: pxor %xmm6, %xmm6790; SSE41-NEXT: psubq %xmm1, %xmm6791; SSE41-NEXT: movdqa %xmm1, %xmm0792; SSE41-NEXT: blendvpd %xmm0, %xmm6, %xmm1793; SSE41-NEXT: pxor %xmm6, %xmm6794; SSE41-NEXT: psubq %xmm2, %xmm6795; SSE41-NEXT: movdqa %xmm2, %xmm0796; SSE41-NEXT: blendvpd %xmm0, %xmm6, %xmm2797; SSE41-NEXT: pxor %xmm6, %xmm6798; SSE41-NEXT: psubq %xmm3, %xmm6799; SSE41-NEXT: movdqa %xmm3, %xmm0800; SSE41-NEXT: blendvpd %xmm0, %xmm6, %xmm3801; SSE41-NEXT: psubq %xmm4, %xmm5802; SSE41-NEXT: movdqa %xmm4, %xmm0803; SSE41-NEXT: blendvpd %xmm0, %xmm5, %xmm4804; SSE41-NEXT: movapd %xmm1, %xmm0805; SSE41-NEXT: movapd %xmm2, %xmm1806; SSE41-NEXT: movapd %xmm3, %xmm2807; SSE41-NEXT: movapd %xmm4, %xmm3808; SSE41-NEXT: retq809;810; AVX1-LABEL: test_abs_le_v8i64_fold:811; AVX1: # %bb.0:812; AVX1-NEXT: vmovdqu (%rdi), %ymm0813; AVX1-NEXT: vmovdqu 32(%rdi), %ymm1814; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2815; AVX1-NEXT: vpsubq 16(%rdi), %xmm2, %xmm3816; AVX1-NEXT: vpsubq %xmm0, %xmm2, %xmm4817; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm4, %ymm3818; AVX1-NEXT: vblendvpd %ymm0, %ymm3, %ymm0, %ymm0819; AVX1-NEXT: vpsubq 48(%rdi), %xmm2, %xmm3820; AVX1-NEXT: vpsubq %xmm1, %xmm2, %xmm2821; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2822; AVX1-NEXT: vblendvpd %ymm1, %ymm2, %ymm1, %ymm1823; AVX1-NEXT: retq824;825; AVX2-LABEL: test_abs_le_v8i64_fold:826; AVX2: # %bb.0:827; AVX2-NEXT: vmovdqu (%rdi), %ymm0828; AVX2-NEXT: vmovdqu 32(%rdi), %ymm1829; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2830; AVX2-NEXT: vpsubq %ymm0, %ymm2, %ymm3831; AVX2-NEXT: vblendvpd %ymm0, %ymm3, %ymm0, %ymm0832; AVX2-NEXT: vpsubq %ymm1, %ymm2, %ymm2833; AVX2-NEXT: vblendvpd %ymm1, %ymm2, %ymm1, %ymm1834; AVX2-NEXT: retq835;836; AVX512-LABEL: test_abs_le_v8i64_fold:837; AVX512: # %bb.0:838; AVX512-NEXT: vpabsq (%rdi), %zmm0 # encoding: [0x62,0xf2,0xfd,0x48,0x1f,0x07]839; AVX512-NEXT: retq # encoding: [0xc3]840 %a = load <8 x i64>, ptr %a.ptr, align 8841 %tmp1neg = sub <8 x i64> zeroinitializer, %a842 %b = icmp sle <8 x i64> %a, zeroinitializer843 %abs = select <8 x i1> %b, <8 x i64> %tmp1neg, <8 x i64> %a844 ret <8 x i64> %abs845}846 847define <64 x i8> @test_abs_lt_v64i8(<64 x i8> %a) nounwind {848; SSE2-LABEL: test_abs_lt_v64i8:849; SSE2: # %bb.0:850; SSE2-NEXT: pxor %xmm4, %xmm4851; SSE2-NEXT: pxor %xmm5, %xmm5852; SSE2-NEXT: psubb %xmm0, %xmm5853; SSE2-NEXT: pminub %xmm5, %xmm0854; SSE2-NEXT: pxor %xmm5, %xmm5855; SSE2-NEXT: psubb %xmm1, %xmm5856; SSE2-NEXT: pminub %xmm5, %xmm1857; SSE2-NEXT: pxor %xmm5, %xmm5858; SSE2-NEXT: psubb %xmm2, %xmm5859; SSE2-NEXT: pminub %xmm5, %xmm2860; SSE2-NEXT: psubb %xmm3, %xmm4861; SSE2-NEXT: pminub %xmm4, %xmm3862; SSE2-NEXT: retq863;864; SSSE3-LABEL: test_abs_lt_v64i8:865; SSSE3: # %bb.0:866; SSSE3-NEXT: pabsb %xmm0, %xmm0867; SSSE3-NEXT: pabsb %xmm1, %xmm1868; SSSE3-NEXT: pabsb %xmm2, %xmm2869; SSSE3-NEXT: pabsb %xmm3, %xmm3870; SSSE3-NEXT: retq871;872; SSE41-LABEL: test_abs_lt_v64i8:873; SSE41: # %bb.0:874; SSE41-NEXT: pabsb %xmm0, %xmm0875; SSE41-NEXT: pabsb %xmm1, %xmm1876; SSE41-NEXT: pabsb %xmm2, %xmm2877; SSE41-NEXT: pabsb %xmm3, %xmm3878; SSE41-NEXT: retq879;880; AVX1-LABEL: test_abs_lt_v64i8:881; AVX1: # %bb.0:882; AVX1-NEXT: vpabsb %xmm0, %xmm2883; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0884; AVX1-NEXT: vpabsb %xmm0, %xmm0885; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0886; AVX1-NEXT: vpabsb %xmm1, %xmm2887; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1888; AVX1-NEXT: vpabsb %xmm1, %xmm1889; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1890; AVX1-NEXT: retq891;892; AVX2-LABEL: test_abs_lt_v64i8:893; AVX2: # %bb.0:894; AVX2-NEXT: vpabsb %ymm0, %ymm0895; AVX2-NEXT: vpabsb %ymm1, %ymm1896; AVX2-NEXT: retq897;898; AVX512F-LABEL: test_abs_lt_v64i8:899; AVX512F: # %bb.0:900; AVX512F-NEXT: vpabsb %ymm0, %ymm1 # encoding: [0xc4,0xe2,0x7d,0x1c,0xc8]901; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm0 # encoding: [0x62,0xf3,0xfd,0x48,0x3b,0xc0,0x01]902; AVX512F-NEXT: vpabsb %ymm0, %ymm0 # encoding: [0xc4,0xe2,0x7d,0x1c,0xc0]903; AVX512F-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0 # encoding: [0x62,0xf3,0xf5,0x48,0x3a,0xc0,0x01]904; AVX512F-NEXT: retq # encoding: [0xc3]905;906; AVX512BW-LABEL: test_abs_lt_v64i8:907; AVX512BW: # %bb.0:908; AVX512BW-NEXT: vpabsb %zmm0, %zmm0 # encoding: [0x62,0xf2,0x7d,0x48,0x1c,0xc0]909; AVX512BW-NEXT: retq # encoding: [0xc3]910 %tmp1neg = sub <64 x i8> zeroinitializer, %a911 %b = icmp slt <64 x i8> %a, zeroinitializer912 %abs = select <64 x i1> %b, <64 x i8> %tmp1neg, <64 x i8> %a913 ret <64 x i8> %abs914}915 916define <32 x i16> @test_abs_gt_v32i16(<32 x i16> %a) nounwind {917; SSE2-LABEL: test_abs_gt_v32i16:918; SSE2: # %bb.0:919; SSE2-NEXT: pxor %xmm4, %xmm4920; SSE2-NEXT: pxor %xmm5, %xmm5921; SSE2-NEXT: psubw %xmm0, %xmm5922; SSE2-NEXT: pmaxsw %xmm5, %xmm0923; SSE2-NEXT: pxor %xmm5, %xmm5924; SSE2-NEXT: psubw %xmm1, %xmm5925; SSE2-NEXT: pmaxsw %xmm5, %xmm1926; SSE2-NEXT: pxor %xmm5, %xmm5927; SSE2-NEXT: psubw %xmm2, %xmm5928; SSE2-NEXT: pmaxsw %xmm5, %xmm2929; SSE2-NEXT: psubw %xmm3, %xmm4930; SSE2-NEXT: pmaxsw %xmm4, %xmm3931; SSE2-NEXT: retq932;933; SSSE3-LABEL: test_abs_gt_v32i16:934; SSSE3: # %bb.0:935; SSSE3-NEXT: pabsw %xmm0, %xmm0936; SSSE3-NEXT: pabsw %xmm1, %xmm1937; SSSE3-NEXT: pabsw %xmm2, %xmm2938; SSSE3-NEXT: pabsw %xmm3, %xmm3939; SSSE3-NEXT: retq940;941; SSE41-LABEL: test_abs_gt_v32i16:942; SSE41: # %bb.0:943; SSE41-NEXT: pabsw %xmm0, %xmm0944; SSE41-NEXT: pabsw %xmm1, %xmm1945; SSE41-NEXT: pabsw %xmm2, %xmm2946; SSE41-NEXT: pabsw %xmm3, %xmm3947; SSE41-NEXT: retq948;949; AVX1-LABEL: test_abs_gt_v32i16:950; AVX1: # %bb.0:951; AVX1-NEXT: vpabsw %xmm0, %xmm2952; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0953; AVX1-NEXT: vpabsw %xmm0, %xmm0954; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0955; AVX1-NEXT: vpabsw %xmm1, %xmm2956; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1957; AVX1-NEXT: vpabsw %xmm1, %xmm1958; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1959; AVX1-NEXT: retq960;961; AVX2-LABEL: test_abs_gt_v32i16:962; AVX2: # %bb.0:963; AVX2-NEXT: vpabsw %ymm0, %ymm0964; AVX2-NEXT: vpabsw %ymm1, %ymm1965; AVX2-NEXT: retq966;967; AVX512F-LABEL: test_abs_gt_v32i16:968; AVX512F: # %bb.0:969; AVX512F-NEXT: vpabsw %ymm0, %ymm1 # encoding: [0xc4,0xe2,0x7d,0x1d,0xc8]970; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm0 # encoding: [0x62,0xf3,0xfd,0x48,0x3b,0xc0,0x01]971; AVX512F-NEXT: vpabsw %ymm0, %ymm0 # encoding: [0xc4,0xe2,0x7d,0x1d,0xc0]972; AVX512F-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0 # encoding: [0x62,0xf3,0xf5,0x48,0x3a,0xc0,0x01]973; AVX512F-NEXT: retq # encoding: [0xc3]974;975; AVX512BW-LABEL: test_abs_gt_v32i16:976; AVX512BW: # %bb.0:977; AVX512BW-NEXT: vpabsw %zmm0, %zmm0 # encoding: [0x62,0xf2,0x7d,0x48,0x1d,0xc0]978; AVX512BW-NEXT: retq # encoding: [0xc3]979 %tmp1neg = sub <32 x i16> zeroinitializer, %a980 %b = icmp sgt <32 x i16> %a, zeroinitializer981 %abs = select <32 x i1> %b, <32 x i16> %a, <32 x i16> %tmp1neg982 ret <32 x i16> %abs983}984