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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE23; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE414; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX6 7define <4 x i32> @test1(<4 x i32> %A, <4 x i32> %B) {8; SSE2-LABEL: test1:9; SSE2: # %bb.0:10; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]11; SSE2-NEXT: retq12;13; SSE41-LABEL: test1:14; SSE41: # %bb.0:15; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]16; SSE41-NEXT: retq17;18; AVX-LABEL: test1:19; AVX: # %bb.0:20; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]21; AVX-NEXT: retq22 %select = select <4 x i1><i1 true, i1 true, i1 false, i1 false>, <4 x i32> %A, <4 x i32> %B23 ret <4 x i32> %select24}25 26define <4 x i32> @test2(<4 x i32> %A, <4 x i32> %B) {27; SSE-LABEL: test2:28; SSE: # %bb.0:29; SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]30; SSE-NEXT: retq31;32; AVX-LABEL: test2:33; AVX: # %bb.0:34; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]35; AVX-NEXT: retq36 %select = select <4 x i1><i1 false, i1 false, i1 true, i1 true>, <4 x i32> %A, <4 x i32> %B37 ret <4 x i32> %select38}39 40define <4 x float> @test3(<4 x float> %A, <4 x float> %B) {41; SSE2-LABEL: test3:42; SSE2: # %bb.0:43; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]44; SSE2-NEXT: retq45;46; SSE41-LABEL: test3:47; SSE41: # %bb.0:48; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]49; SSE41-NEXT: retq50;51; AVX-LABEL: test3:52; AVX: # %bb.0:53; AVX-NEXT: vmovsd {{.*#+}} xmm0 = xmm0[0],xmm1[1]54; AVX-NEXT: retq55 %select = select <4 x i1><i1 true, i1 true, i1 false, i1 false>, <4 x float> %A, <4 x float> %B56 ret <4 x float> %select57}58 59define <4 x float> @test4(<4 x float> %A, <4 x float> %B) {60; SSE-LABEL: test4:61; SSE: # %bb.0:62; SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]63; SSE-NEXT: retq64;65; AVX-LABEL: test4:66; AVX: # %bb.0:67; AVX-NEXT: vmovsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]68; AVX-NEXT: retq69 %select = select <4 x i1><i1 false, i1 false, i1 true, i1 true>, <4 x float> %A, <4 x float> %B70 ret <4 x float> %select71}72