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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-apple-macosx -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX13; RUN: llc < %s -mtriple=x86_64-apple-macosx -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX24; RUN: llc < %s -mtriple=x86_64-apple-macosx -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX,AVX5125 6target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"7 8; For this test we used to optimize the <i1 true, i1 false, i1 false, i1 true>9; mask into <i32 2147483648, i32 0, i32 0, i32 2147483648> because we thought10; we would lower that into a blend where only the high bit is relevant.11; However, since the whole mask is constant, this is simplified incorrectly12; by the generic code, because it was expecting -1 in place of 2147483648.13;14; The problem does not occur without AVX, because vselect of v4i32 is not legal15; nor custom.16;17; <rdar://problem/18675020>18 19define void @test(ptr %a, ptr %b) {20; AVX-LABEL: test:21; AVX: ## %bb.0: ## %body22; AVX-NEXT: movabsq $4167800517033787389, %rax ## imm = 0x39D7007D007CFFFD23; AVX-NEXT: movq %rax, (%rdi)24; AVX-NEXT: movabsq $-281474976645121, %rax ## imm = 0xFFFF00000000FFFF25; AVX-NEXT: movq %rax, (%rsi)26; AVX-NEXT: retq27body:28 %predphi = select <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i16> <i16 -3, i16 545, i16 4385, i16 14807>, <4 x i16> <i16 123, i16 124, i16 125, i16 127>29 %predphi42 = select <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i16> <i16 -1, i16 -1, i16 -1, i16 -1>, <4 x i16> zeroinitializer30 store <4 x i16> %predphi, ptr %a, align 831 store <4 x i16> %predphi42, ptr %b, align 832 ret void33}34 35; Improve code coverage.36;37; When shrinking the condition used into the select to match a blend, this38; test case exercises the path where the modified node is not the root39; of the condition.40 41define void @test2(ptr %call1559, i64 %indvars.iv4198, <4 x i1> %tmp1895) {42; AVX1-LABEL: test2:43; AVX1: ## %bb.0: ## %bb44; AVX1-NEXT: vpslld $31, %xmm0, %xmm045; AVX1-NEXT: vpmovsxdq %xmm0, %xmm146; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]47; AVX1-NEXT: vpmovsxdq %xmm0, %xmm048; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm049; AVX1-NEXT: movq (%rdi,%rsi,8), %rax50; AVX1-NEXT: vbroadcastsd {{.*#+}} ymm1 = [5.0E-1,5.0E-1,5.0E-1,5.0E-1]51; AVX1-NEXT: vblendvpd %ymm0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm052; AVX1-NEXT: vmovupd %ymm0, (%rax)53; AVX1-NEXT: vzeroupper54; AVX1-NEXT: retq55;56; AVX2-LABEL: test2:57; AVX2: ## %bb.0: ## %bb58; AVX2-NEXT: vpslld $31, %xmm0, %xmm059; AVX2-NEXT: vpmovsxdq %xmm0, %ymm060; AVX2-NEXT: movq (%rdi,%rsi,8), %rax61; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]62; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm2 = [5.0E-1,5.0E-1,5.0E-1,5.0E-1]63; AVX2-NEXT: vblendvpd %ymm0, %ymm1, %ymm2, %ymm064; AVX2-NEXT: vmovupd %ymm0, (%rax)65; AVX2-NEXT: vzeroupper66; AVX2-NEXT: retq67;68; AVX512-LABEL: test2:69; AVX512: ## %bb.0: ## %bb70; AVX512-NEXT: vpslld $31, %xmm0, %xmm071; AVX512-NEXT: vptestmd %xmm0, %xmm0, %k172; AVX512-NEXT: movq (%rdi,%rsi,8), %rax73; AVX512-NEXT: vbroadcastsd {{.*#+}} ymm0 = [5.0E-1,5.0E-1,5.0E-1,5.0E-1]74; AVX512-NEXT: vbroadcastsd {{.*#+}} ymm0 {%k1} = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]75; AVX512-NEXT: vmovupd %ymm0, (%rax)76; AVX512-NEXT: vzeroupper77; AVX512-NEXT: retq78bb:79 %arrayidx1928 = getelementptr inbounds ptr, ptr %call1559, i64 %indvars.iv419880 %tmp1888 = load ptr, ptr %arrayidx1928, align 881 %predphi.v.v = select <4 x i1> %tmp1895, <4 x double> <double -5.000000e-01, double -5.000000e-01, double -5.000000e-01, double -5.000000e-01>, <4 x double> <double 5.000000e-01, double 5.000000e-01, double 5.000000e-01, double 5.000000e-01>82 store <4 x double> %predphi.v.v, ptr %tmp1888, align 883 ret void84}85 86; For this test, we used to optimized the conditional mask for the blend, i.e.,87; we shrunk some of its bits.88; However, this same mask was used in another select (%predphi31) that turned out89; to be optimized into a and. In that case, the conditional mask was wrong.90;91; Make sure that the and is fed by the original mask.92;93; <rdar://problem/18819506>94 95define void @test3(<4 x i32> %induction30, ptr %tmp16, ptr %tmp17, <4 x i16> %tmp3, <4 x i16> %tmp12) {96; AVX1-LABEL: test3:97; AVX1: ## %bb.0:98; AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 ## [2863311531,2863311531,2863311531,2863311531]99; AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0100; AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm3101; AVX1-NEXT: vpcmpeqd %xmm3, %xmm0, %xmm0102; AVX1-NEXT: vpackssdw %xmm0, %xmm0, %xmm0103; AVX1-NEXT: vpblendvb %xmm0, %xmm1, %xmm2, %xmm1104; AVX1-NEXT: vmovq %xmm0, (%rdi)105; AVX1-NEXT: vmovq %xmm1, (%rsi)106; AVX1-NEXT: retq107;108; AVX2-LABEL: test3:109; AVX2: ## %bb.0:110; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [2863311531,2863311531,2863311531,2863311531]111; AVX2-NEXT: vpmulld %xmm3, %xmm0, %xmm0112; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [715827882,715827882,715827882,715827882]113; AVX2-NEXT: vpaddd %xmm3, %xmm0, %xmm0114; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [1431655764,1431655764,1431655764,1431655764]115; AVX2-NEXT: vpminud %xmm3, %xmm0, %xmm3116; AVX2-NEXT: vpcmpeqd %xmm3, %xmm0, %xmm0117; AVX2-NEXT: vpackssdw %xmm0, %xmm0, %xmm0118; AVX2-NEXT: vpblendvb %xmm0, %xmm1, %xmm2, %xmm1119; AVX2-NEXT: vmovq %xmm0, (%rdi)120; AVX2-NEXT: vmovq %xmm1, (%rsi)121; AVX2-NEXT: retq122;123; AVX512-LABEL: test3:124; AVX512: ## %bb.0:125; AVX512-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0126; AVX512-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0127; AVX512-NEXT: vpcmpleud {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %k1128; AVX512-NEXT: vpcmpeqd %ymm0, %ymm0, %ymm0129; AVX512-NEXT: vmovdqa32 %ymm0, %ymm0 {%k1} {z}130; AVX512-NEXT: vpmovdw %ymm0, %xmm0131; AVX512-NEXT: vpternlogq {{.*#+}} xmm1 = xmm2 ^ (xmm0 & (xmm1 ^ xmm2))132; AVX512-NEXT: vmovq %xmm0, (%rdi)133; AVX512-NEXT: vmovq %xmm1, (%rsi)134; AVX512-NEXT: vzeroupper135; AVX512-NEXT: retq136 %tmp6 = srem <4 x i32> %induction30, <i32 3, i32 3, i32 3, i32 3>137 %tmp7 = icmp eq <4 x i32> %tmp6, zeroinitializer138 %predphi = select <4 x i1> %tmp7, <4 x i16> %tmp3, <4 x i16> %tmp12139 %predphi31 = select <4 x i1> %tmp7, <4 x i16> <i16 -1, i16 -1, i16 -1, i16 -1>, <4 x i16> zeroinitializer140 141 store <4 x i16> %predphi31, ptr %tmp16, align 8142 store <4 x i16> %predphi, ptr %tmp17, align 8143 ret void144}145 146; We shouldn't try to lower this directly using VSELECT because we don't have147; vpblendvb in AVX1, only in AVX2. Instead, it should be expanded.148 149define <32 x i8> @PR22706(<32 x i1> %x) {150; AVX1-LABEL: PR22706:151; AVX1: ## %bb.0:152; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1153; AVX1-NEXT: vpsllw $7, %xmm1, %xmm1154; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2155; AVX1-NEXT: vpcmpgtb %xmm1, %xmm2, %xmm1156; AVX1-NEXT: vbroadcastss {{.*#+}} xmm3 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]157; AVX1-NEXT: vpaddb %xmm3, %xmm1, %xmm1158; AVX1-NEXT: vpsllw $7, %xmm0, %xmm0159; AVX1-NEXT: vpcmpgtb %xmm0, %xmm2, %xmm0160; AVX1-NEXT: vpaddb %xmm3, %xmm0, %xmm0161; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0162; AVX1-NEXT: retq163;164; AVX2-LABEL: PR22706:165; AVX2: ## %bb.0:166; AVX2-NEXT: vpsllw $7, %ymm0, %ymm0167; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1168; AVX2-NEXT: vpcmpgtb %ymm0, %ymm1, %ymm0169; AVX2-NEXT: vpaddb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0170; AVX2-NEXT: retq171;172; AVX512-LABEL: PR22706:173; AVX512: ## %bb.0:174; AVX512-NEXT: vpsllw $7, %ymm0, %ymm0175; AVX512-NEXT: vpbroadcastd {{.*#+}} ymm1 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]176; AVX512-NEXT: vpblendvb %ymm0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm0177; AVX512-NEXT: retq178 %tmp = select <32 x i1> %x, <32 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>, <32 x i8> <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>179 ret <32 x i8> %tmp180}181 182; Don't concat select/blendv ops if the concatenated mask isn't legal.183define void @PR59003(<2 x float> %0, <2 x float> %1, <8 x i1> %shuffle108) {184; AVX-LABEL: PR59003:185; AVX: ## %bb.0: ## %entry186; AVX-NEXT: .p2align 4187; AVX-NEXT: LBB4_1: ## %for.body.i188; AVX-NEXT: ## =>This Inner Loop Header: Depth=1189; AVX-NEXT: jmp LBB4_1190entry:191 br label %for.body.i192 193for.body.i: ; preds = %for.body.i, %entry194 %2 = phi <8 x float> [ zeroinitializer, %entry ], [ %3, %for.body.i ]195 %shuffle111 = shufflevector <2 x float> %0, <2 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>196 %shuffle112 = shufflevector <2 x float> %1, <2 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>197 %3 = select <8 x i1> %shuffle108, <8 x float> %shuffle111, <8 x float> %shuffle112198 %4 = shufflevector <8 x float> zeroinitializer, <8 x float> %2, <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>199 %5 = select <8 x i1> zeroinitializer, <8 x float> zeroinitializer, <8 x float> %2200 br label %for.body.i201}202 203 204; Split a 256-bit select into two 128-bit selects when the operands are concatenated.205 206define void @blendv_split(ptr %p, <8 x i32> %cond, <8 x i32> %a, <8 x i32> %x, <8 x i32> %y, <8 x i32> %z, <8 x i32> %w) {207; AVX1-LABEL: blendv_split:208; AVX1: ## %bb.0:209; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4210; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm2[0],zero,xmm2[1],zero211; AVX1-NEXT: vpslld %xmm2, %xmm4, %xmm5212; AVX1-NEXT: vpslld %xmm2, %xmm1, %xmm2213; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm3 = xmm3[0],zero,xmm3[1],zero214; AVX1-NEXT: vpslld %xmm3, %xmm4, %xmm4215; AVX1-NEXT: vpslld %xmm3, %xmm1, %xmm1216; AVX1-NEXT: vblendvps %xmm0, %xmm2, %xmm1, %xmm1217; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0218; AVX1-NEXT: vblendvps %xmm0, %xmm5, %xmm4, %xmm0219; AVX1-NEXT: vmovups %xmm0, 16(%rdi)220; AVX1-NEXT: vmovups %xmm1, (%rdi)221; AVX1-NEXT: vzeroupper222; AVX1-NEXT: retq223;224; AVX2-LABEL: blendv_split:225; AVX2: ## %bb.0:226; AVX2-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm2[0],zero,xmm2[1],zero227; AVX2-NEXT: vpslld %xmm2, %ymm1, %ymm2228; AVX2-NEXT: vpmovzxdq {{.*#+}} xmm3 = xmm3[0],zero,xmm3[1],zero229; AVX2-NEXT: vpslld %xmm3, %ymm1, %ymm1230; AVX2-NEXT: vblendvps %ymm0, %ymm2, %ymm1, %ymm0231; AVX2-NEXT: vmovups %ymm0, (%rdi)232; AVX2-NEXT: vzeroupper233; AVX2-NEXT: retq234;235; AVX512-LABEL: blendv_split:236; AVX512: ## %bb.0:237; AVX512-NEXT: vpsrld $31, %ymm0, %ymm0238; AVX512-NEXT: vpslld $31, %ymm0, %ymm0239; AVX512-NEXT: vptestmd %ymm0, %ymm0, %k1240; AVX512-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm2[0],zero,xmm2[1],zero241; AVX512-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm3[0],zero,xmm3[1],zero242; AVX512-NEXT: vpslld %xmm2, %ymm1, %ymm2243; AVX512-NEXT: vpslld %xmm0, %ymm1, %ymm2 {%k1}244; AVX512-NEXT: vmovdqu %ymm2, (%rdi)245; AVX512-NEXT: vzeroupper246; AVX512-NEXT: retq247 %signbits = ashr <8 x i32> %cond, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>248 %bool = trunc <8 x i32> %signbits to <8 x i1>249 %shamt1 = shufflevector <8 x i32> %x, <8 x i32> undef, <8 x i32> zeroinitializer250 %shamt2 = shufflevector <8 x i32> %y, <8 x i32> undef, <8 x i32> zeroinitializer251 %sh1 = shl <8 x i32> %a, %shamt1252 %sh2 = shl <8 x i32> %a, %shamt2253 %sel = select <8 x i1> %bool, <8 x i32> %sh1, <8 x i32> %sh2254 store <8 x i32> %sel, ptr %p, align 4255 ret void256}257 258; Concatenate 128-bit pblendvb back together on AVX2+ targets (hidden by SSE __m128i bitcasts)259define <4 x i64> @vselect_concat_split_v16i8(<4 x i64> %a, <4 x i64> %b, <4 x i64> %c, <4 x i64> %d) {260; AVX1-LABEL: vselect_concat_split_v16i8:261; AVX1: ## %bb.0:262; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4263; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm5264; AVX1-NEXT: vpcmpgtb %xmm4, %xmm5, %xmm4265; AVX1-NEXT: vpcmpgtb %xmm2, %xmm3, %xmm2266; AVX1-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm2267; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0268; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1269; AVX1-NEXT: vpblendvb %xmm4, %xmm1, %xmm0, %xmm0270; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0271; AVX1-NEXT: retq272;273; AVX2-LABEL: vselect_concat_split_v16i8:274; AVX2: ## %bb.0:275; AVX2-NEXT: vpcmpgtb %ymm2, %ymm3, %ymm2276; AVX2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0277; AVX2-NEXT: retq278;279; AVX512-LABEL: vselect_concat_split_v16i8:280; AVX512: ## %bb.0:281; AVX512-NEXT: vpcmpgtb %ymm2, %ymm3, %ymm2282; AVX512-NEXT: vpternlogq {{.*#+}} ymm0 = ymm0 ^ (ymm2 & (ymm0 ^ ymm1))283; AVX512-NEXT: retq284 %a.bc = bitcast <4 x i64> %a to <32 x i8>285 %b.bc = bitcast <4 x i64> %b to <32 x i8>286 %c.bc = bitcast <4 x i64> %c to <32 x i8>287 %d.bc = bitcast <4 x i64> %d to <32 x i8>288 %cmp = icmp slt <32 x i8> %c.bc, %d.bc289 %a.lo = shufflevector <32 x i8> %a.bc, <32 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>290 %b.lo = shufflevector <32 x i8> %b.bc, <32 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>291 %cmp.lo = shufflevector <32 x i1> %cmp, <32 x i1> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>292 %lo = select <16 x i1> %cmp.lo, <16 x i8> %b.lo, <16 x i8> %a.lo293 %a.hi = shufflevector <32 x i8> %a.bc, <32 x i8> poison, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>294 %b.hi = shufflevector <32 x i8> %b.bc, <32 x i8> poison, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>295 %cmp.hi = shufflevector <32 x i1> %cmp, <32 x i1> poison, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>296 %hi = select <16 x i1> %cmp.hi, <16 x i8> %b.hi, <16 x i8> %a.hi297 %concat = shufflevector <16 x i8> %lo, <16 x i8> %hi, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>298 %result = bitcast <32 x i8> %concat to <4 x i64>299 ret <4 x i64> %result300}301 302; Regression test for rGea8fb3b60196303define void @vselect_concat() {304; AVX-LABEL: vselect_concat:305; AVX: ## %bb.0: ## %entry306; AVX-NEXT: retq307entry:308 %0 = load <8 x i32>, ptr undef309 %1 = shufflevector <8 x i32> zeroinitializer, <8 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>310 %2 = shufflevector <8 x i32> %0, <8 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>311 %3 = select <4 x i1> zeroinitializer, <4 x i32> %1, <4 x i32> %2312 %4 = shufflevector <8 x i32> zeroinitializer, <8 x i32> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>313 %5 = shufflevector <8 x i32> %0, <8 x i32> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>314 %6 = select <4 x i1> zeroinitializer, <4 x i32> %4, <4 x i32> %5315 %7 = shufflevector <4 x i32> %3, <4 x i32> %6, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>316 store <8 x i32> %7, ptr undef317 ret void318}319 320; Regression test for rGb5d7beeb9792321define void @vselect_concat_splat() {322; AVX1-LABEL: vselect_concat_splat:323; AVX1: ## %bb.0: ## %entry324; AVX1-NEXT: vmovups (%rax), %xmm0325; AVX1-NEXT: vshufps {{.*#+}} xmm1 = xmm0[0,3,2,1]326; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[1,0,3,2]327; AVX1-NEXT: vmovups 16, %xmm2328; AVX1-NEXT: vmovups 32, %xmm3329; AVX1-NEXT: vblendps {{.*#+}} xmm4 = mem[0],xmm3[1],mem[2,3]330; AVX1-NEXT: vblendps {{.*#+}} xmm4 = xmm4[0,1],xmm2[2],xmm4[3]331; AVX1-NEXT: vshufps {{.*#+}} xmm4 = xmm4[0,3,2,1]332; AVX1-NEXT: vblendps {{.*#+}} xmm3 = mem[0,1],xmm3[2,3]333; AVX1-NEXT: vblendps {{.*#+}} xmm2 = xmm2[0],xmm3[1,2],xmm2[3]334; AVX1-NEXT: vshufps {{.*#+}} xmm2 = xmm2[1,0,3,2]335; AVX1-NEXT: vxorps %xmm3, %xmm3, %xmm3336; AVX1-NEXT: vcmpneqps %xmm3, %xmm1, %xmm3337; AVX1-NEXT: vblendvps %xmm3, %xmm4, %xmm1, %xmm1338; AVX1-NEXT: vblendvps %xmm3, %xmm2, %xmm0, %xmm0339; AVX1-NEXT: vmovups %xmm0, (%rax)340; AVX1-NEXT: vmovups %xmm1, (%rax)341; AVX1-NEXT: retq342;343; AVX2-LABEL: vselect_concat_splat:344; AVX2: ## %bb.0: ## %entry345; AVX2-NEXT: vmovups (%rax), %ymm0346; AVX2-NEXT: vmovups (%rax), %xmm1347; AVX2-NEXT: vmovaps {{.*#+}} xmm2 = [0,3,6,1]348; AVX2-NEXT: vblendps {{.*#+}} ymm3 = ymm0[0],ymm1[1],ymm0[2,3,4,5,6,7]349; AVX2-NEXT: vpermps %ymm3, %ymm2, %ymm3350; AVX2-NEXT: vmovaps {{.*#+}} xmm4 = [1,4,7,2]351; AVX2-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5,6,7]352; AVX2-NEXT: vpermps %ymm0, %ymm4, %ymm0353; AVX2-NEXT: vmovups 0, %ymm1354; AVX2-NEXT: vmovups 32, %xmm5355; AVX2-NEXT: vblendps {{.*#+}} ymm6 = ymm1[0],ymm5[1],ymm1[2,3,4,5,6,7]356; AVX2-NEXT: vpermps %ymm6, %ymm2, %ymm2357; AVX2-NEXT: vblendps {{.*#+}} ymm1 = ymm1[0,1],ymm5[2,3],ymm1[4,5,6,7]358; AVX2-NEXT: vpermps %ymm1, %ymm4, %ymm1359; AVX2-NEXT: vxorps %xmm4, %xmm4, %xmm4360; AVX2-NEXT: vcmpneqps %xmm4, %xmm3, %xmm4361; AVX2-NEXT: vblendvps %xmm4, %xmm2, %xmm3, %xmm2362; AVX2-NEXT: vblendvps %xmm4, %xmm1, %xmm0, %xmm0363; AVX2-NEXT: vmovups %xmm0, (%rax)364; AVX2-NEXT: vmovups %xmm2, (%rax)365; AVX2-NEXT: vzeroupper366; AVX2-NEXT: retq367;368; AVX512-LABEL: vselect_concat_splat:369; AVX512: ## %bb.0: ## %entry370; AVX512-NEXT: vmovups (%rax), %ymm0371; AVX512-NEXT: vmovups (%rax), %xmm1372; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm2 = [0,3,6,9,1,4,7,10]373; AVX512-NEXT: vmovaps %ymm2, %ymm3374; AVX512-NEXT: vpermi2ps %ymm1, %ymm0, %ymm3375; AVX512-NEXT: vmovups 32, %xmm4376; AVX512-NEXT: vxorps %xmm5, %xmm5, %xmm5377; AVX512-NEXT: vcmpneqps %xmm5, %xmm3, %k0378; AVX512-NEXT: kshiftlw $4, %k0, %k1379; AVX512-NEXT: korw %k1, %k0, %k1380; AVX512-NEXT: vpermt2ps %ymm1, %ymm2, %ymm0381; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm1 = [8,11,14,1,9,12,15,2]382; AVX512-NEXT: vpermi2ps 0, %ymm4, %ymm1383; AVX512-NEXT: vmovaps %ymm1, %ymm0 {%k1}384; AVX512-NEXT: vmovups %ymm0, (%rax)385; AVX512-NEXT: vzeroupper386; AVX512-NEXT: retq387entry:388 %wide.vec = load <12 x float>, ptr undef, align 1389 %strided.vec = shufflevector <12 x float> %wide.vec, <12 x float> poison, <4 x i32> <i32 0, i32 3, i32 6, i32 9>390 %strided.vec29 = shufflevector <12 x float> %wide.vec, <12 x float> poison, <4 x i32> <i32 1, i32 4, i32 7, i32 10>391 %wide.vec31 = load <12 x float>, ptr null, align 1392 %strided.vec32 = shufflevector <12 x float> %wide.vec31, <12 x float> poison, <4 x i32> <i32 0, i32 3, i32 6, i32 9>393 %strided.vec33 = shufflevector <12 x float> %wide.vec31, <12 x float> poison, <4 x i32> <i32 1, i32 4, i32 7, i32 10>394 %i = select i1 false, <4 x float> zeroinitializer, <4 x float> %strided.vec395 %i1 = fcmp une <4 x float> %i, zeroinitializer396 %i2 = select <4 x i1> %i1, <4 x float> %strided.vec32, <4 x float> %strided.vec397 %.v = select <4 x i1> %i1, <4 x float> %strided.vec33, <4 x float> %strided.vec29398 %.uncasted = shufflevector <4 x float> %i2, <4 x float> %.v, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>399 store <8 x float> %.uncasted, ptr undef, align 1400 ret void401}402