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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X863; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X644 5; test vector shifts converted to proper SSE2 vector shifts when the shift6; amounts are the same.7 8define void @shift1a(<2 x i64> %val, ptr %dst) nounwind {9; X86-LABEL: shift1a:10; X86: # %bb.0: # %entry11; X86-NEXT: movl {{[0-9]+}}(%esp), %eax12; X86-NEXT: psllq $32, %xmm013; X86-NEXT: movdqa %xmm0, (%eax)14; X86-NEXT: retl15;16; X64-LABEL: shift1a:17; X64: # %bb.0: # %entry18; X64-NEXT: psllq $32, %xmm019; X64-NEXT: movdqa %xmm0, (%rdi)20; X64-NEXT: retq21entry:22 %shl = shl <2 x i64> %val, < i64 32, i64 32 >23 store <2 x i64> %shl, ptr %dst24 ret void25}26 27define void @shift1b(<2 x i64> %val, ptr %dst, i64 %amt) nounwind {28; X86-LABEL: shift1b:29; X86: # %bb.0: # %entry30; X86-NEXT: movl {{[0-9]+}}(%esp), %eax31; X86-NEXT: movq {{.*#+}} xmm1 = mem[0],zero32; X86-NEXT: psllq %xmm1, %xmm033; X86-NEXT: movdqa %xmm0, (%eax)34; X86-NEXT: retl35;36; X64-LABEL: shift1b:37; X64: # %bb.0: # %entry38; X64-NEXT: movq %rsi, %xmm139; X64-NEXT: psllq %xmm1, %xmm040; X64-NEXT: movdqa %xmm0, (%rdi)41; X64-NEXT: retq42entry:43 %0 = insertelement <2 x i64> undef, i64 %amt, i32 044 %1 = insertelement <2 x i64> %0, i64 %amt, i32 145 %shl = shl <2 x i64> %val, %146 store <2 x i64> %shl, ptr %dst47 ret void48}49 50 51define void @shift2a(<4 x i32> %val, ptr %dst) nounwind {52; X86-LABEL: shift2a:53; X86: # %bb.0: # %entry54; X86-NEXT: movl {{[0-9]+}}(%esp), %eax55; X86-NEXT: pslld $5, %xmm056; X86-NEXT: movdqa %xmm0, (%eax)57; X86-NEXT: retl58;59; X64-LABEL: shift2a:60; X64: # %bb.0: # %entry61; X64-NEXT: pslld $5, %xmm062; X64-NEXT: movdqa %xmm0, (%rdi)63; X64-NEXT: retq64entry:65 %shl = shl <4 x i32> %val, < i32 5, i32 5, i32 5, i32 5 >66 store <4 x i32> %shl, ptr %dst67 ret void68}69 70define void @shift2b(<4 x i32> %val, ptr %dst, i32 %amt) nounwind {71; X86-LABEL: shift2b:72; X86: # %bb.0: # %entry73; X86-NEXT: movl {{[0-9]+}}(%esp), %eax74; X86-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero75; X86-NEXT: pslld %xmm1, %xmm076; X86-NEXT: movdqa %xmm0, (%eax)77; X86-NEXT: retl78;79; X64-LABEL: shift2b:80; X64: # %bb.0: # %entry81; X64-NEXT: movd %esi, %xmm182; X64-NEXT: pslld %xmm1, %xmm083; X64-NEXT: movdqa %xmm0, (%rdi)84; X64-NEXT: retq85entry:86 %0 = insertelement <4 x i32> undef, i32 %amt, i32 087 %1 = insertelement <4 x i32> %0, i32 %amt, i32 188 %2 = insertelement <4 x i32> %1, i32 %amt, i32 289 %3 = insertelement <4 x i32> %2, i32 %amt, i32 390 %shl = shl <4 x i32> %val, %391 store <4 x i32> %shl, ptr %dst92 ret void93}94 95define void @shift3a(<8 x i16> %val, ptr %dst) nounwind {96; X86-LABEL: shift3a:97; X86: # %bb.0: # %entry98; X86-NEXT: movl {{[0-9]+}}(%esp), %eax99; X86-NEXT: psllw $5, %xmm0100; X86-NEXT: movdqa %xmm0, (%eax)101; X86-NEXT: retl102;103; X64-LABEL: shift3a:104; X64: # %bb.0: # %entry105; X64-NEXT: psllw $5, %xmm0106; X64-NEXT: movdqa %xmm0, (%rdi)107; X64-NEXT: retq108entry:109 %shl = shl <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5 >110 store <8 x i16> %shl, ptr %dst111 ret void112}113 114; Make sure the shift amount is properly zero extended.115define void @shift3b(<8 x i16> %val, ptr %dst, i16 %amt) nounwind {116; X86-LABEL: shift3b:117; X86: # %bb.0: # %entry118; X86-NEXT: movl {{[0-9]+}}(%esp), %eax119; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx120; X86-NEXT: movd %ecx, %xmm1121; X86-NEXT: psllw %xmm1, %xmm0122; X86-NEXT: movdqa %xmm0, (%eax)123; X86-NEXT: retl124;125; X64-LABEL: shift3b:126; X64: # %bb.0: # %entry127; X64-NEXT: movzwl %si, %eax128; X64-NEXT: movd %eax, %xmm1129; X64-NEXT: psllw %xmm1, %xmm0130; X64-NEXT: movdqa %xmm0, (%rdi)131; X64-NEXT: retq132entry:133 %0 = insertelement <8 x i16> undef, i16 %amt, i32 0134 %1 = insertelement <8 x i16> %0, i16 %amt, i32 1135 %2 = insertelement <8 x i16> %1, i16 %amt, i32 2136 %3 = insertelement <8 x i16> %2, i16 %amt, i32 3137 %4 = insertelement <8 x i16> %3, i16 %amt, i32 4138 %5 = insertelement <8 x i16> %4, i16 %amt, i32 5139 %6 = insertelement <8 x i16> %5, i16 %amt, i32 6140 %7 = insertelement <8 x i16> %6, i16 %amt, i32 7141 %shl = shl <8 x i16> %val, %7142 store <8 x i16> %shl, ptr %dst143 ret void144}145 146