brintos

brintos / llvm-project-archived public Read only

0
0
Text · 5.8 KiB · 9af761c Raw
178 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X863; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X644 5; test vector shifts converted to proper SSE2 vector shifts when the shift6; amounts are the same when using a shuffle splat.7 8define void @shift1a(<2 x i64> %val, ptr %dst, <2 x i64> %sh) nounwind {9; X86-LABEL: shift1a:10; X86:       # %bb.0: # %entry11; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax12; X86-NEXT:    psllq %xmm1, %xmm013; X86-NEXT:    movdqa %xmm0, (%eax)14; X86-NEXT:    retl15;16; X64-LABEL: shift1a:17; X64:       # %bb.0: # %entry18; X64-NEXT:    psllq %xmm1, %xmm019; X64-NEXT:    movdqa %xmm0, (%rdi)20; X64-NEXT:    retq21entry:22  %shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32> <i32 0, i32 0>23  %shl = shl <2 x i64> %val, %shamt24  store <2 x i64> %shl, ptr %dst25  ret void26}27 28; shift1b can't use a packed shift but can shift lanes separately and shuffle back together29define void @shift1b(<2 x i64> %val, ptr %dst, <2 x i64> %sh) nounwind {30; X86-LABEL: shift1b:31; X86:       # %bb.0: # %entry32; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax33; X86-NEXT:    movdqa %xmm0, %xmm234; X86-NEXT:    psllq %xmm1, %xmm235; X86-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]36; X86-NEXT:    psllq %xmm1, %xmm037; X86-NEXT:    movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1]38; X86-NEXT:    movapd %xmm0, (%eax)39; X86-NEXT:    retl40;41; X64-LABEL: shift1b:42; X64:       # %bb.0: # %entry43; X64-NEXT:    movdqa %xmm0, %xmm244; X64-NEXT:    psllq %xmm1, %xmm245; X64-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]46; X64-NEXT:    psllq %xmm1, %xmm047; X64-NEXT:    movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1]48; X64-NEXT:    movapd %xmm0, (%rdi)49; X64-NEXT:    retq50entry:51  %shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32> <i32 0, i32 1>52  %shl = shl <2 x i64> %val, %shamt53  store <2 x i64> %shl, ptr %dst54  ret void55}56 57define void @shift2a(<4 x i32> %val, ptr %dst, <2 x i32> %amt) nounwind {58; X86-LABEL: shift2a:59; X86:       # %bb.0: # %entry60; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax61; X86-NEXT:    psrlq $32, %xmm162; X86-NEXT:    pslld %xmm1, %xmm063; X86-NEXT:    movdqa %xmm0, (%eax)64; X86-NEXT:    retl65;66; X64-LABEL: shift2a:67; X64:       # %bb.0: # %entry68; X64-NEXT:    psrlq $32, %xmm169; X64-NEXT:    pslld %xmm1, %xmm070; X64-NEXT:    movdqa %xmm0, (%rdi)71; X64-NEXT:    retq72entry:73  %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>74  %shl = shl <4 x i32> %val, %shamt75  store <4 x i32> %shl, ptr %dst76  ret void77}78 79define void @shift2b(<4 x i32> %val, ptr %dst, <2 x i32> %amt) nounwind {80; X86-LABEL: shift2b:81; X86:       # %bb.0: # %entry82; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax83; X86-NEXT:    psrlq $32, %xmm184; X86-NEXT:    pslld %xmm1, %xmm085; X86-NEXT:    movdqa %xmm0, (%eax)86; X86-NEXT:    retl87;88; X64-LABEL: shift2b:89; X64:       # %bb.0: # %entry90; X64-NEXT:    psrlq $32, %xmm191; X64-NEXT:    pslld %xmm1, %xmm092; X64-NEXT:    movdqa %xmm0, (%rdi)93; X64-NEXT:    retq94entry:95  %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 1, i32 1>96  %shl = shl <4 x i32> %val, %shamt97  store <4 x i32> %shl, ptr %dst98  ret void99}100 101define void @shift2c(<4 x i32> %val, ptr %dst, <2 x i32> %amt) nounwind {102; X86-LABEL: shift2c:103; X86:       # %bb.0: # %entry104; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax105; X86-NEXT:    psrlq $32, %xmm1106; X86-NEXT:    pslld %xmm1, %xmm0107; X86-NEXT:    movdqa %xmm0, (%eax)108; X86-NEXT:    retl109;110; X64-LABEL: shift2c:111; X64:       # %bb.0: # %entry112; X64-NEXT:    psrlq $32, %xmm1113; X64-NEXT:    pslld %xmm1, %xmm0114; X64-NEXT:    movdqa %xmm0, (%rdi)115; X64-NEXT:    retq116entry:117  %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>118  %shl = shl <4 x i32> %val, %shamt119  store <4 x i32> %shl, ptr %dst120  ret void121}122 123define void @shift3a(<8 x i16> %val, ptr %dst, <8 x i16> %amt) nounwind {124; X86-LABEL: shift3a:125; X86:       # %bb.0: # %entry126; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax127; X86-NEXT:    pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,6,6,6,6]128; X86-NEXT:    psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero129; X86-NEXT:    psllw %xmm1, %xmm0130; X86-NEXT:    movdqa %xmm0, (%eax)131; X86-NEXT:    retl132;133; X64-LABEL: shift3a:134; X64:       # %bb.0: # %entry135; X64-NEXT:    pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,6,6,6,6]136; X64-NEXT:    psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero137; X64-NEXT:    psllw %xmm1, %xmm0138; X64-NEXT:    movdqa %xmm0, (%rdi)139; X64-NEXT:    retq140entry:141  %shamt = shufflevector <8 x i16> %amt, <8 x i16> undef, <8 x i32> <i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6>142  %shl = shl <8 x i16> %val, %shamt143  store <8 x i16> %shl, ptr %dst144  ret void145}146 147define void @shift3b(<8 x i16> %val, ptr %dst, i16 %amt) nounwind {148; X86-LABEL: shift3b:149; X86:       # %bb.0: # %entry150; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax151; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %ecx152; X86-NEXT:    movd %ecx, %xmm1153; X86-NEXT:    psllw %xmm1, %xmm0154; X86-NEXT:    movdqa %xmm0, (%eax)155; X86-NEXT:    retl156;157; X64-LABEL: shift3b:158; X64:       # %bb.0: # %entry159; X64-NEXT:    movzwl %si, %eax160; X64-NEXT:    movd %eax, %xmm1161; X64-NEXT:    psllw %xmm1, %xmm0162; X64-NEXT:    movdqa %xmm0, (%rdi)163; X64-NEXT:    retq164entry:165  %0 = insertelement <8 x i16> undef, i16 %amt, i32 0166  %1 = insertelement <8 x i16> %0, i16 %amt, i32 1167  %2 = insertelement <8 x i16> %1, i16 %amt, i32 2168  %3 = insertelement <8 x i16> %2, i16 %amt, i32 3169  %4 = insertelement <8 x i16> %3, i16 %amt, i32 4170  %5 = insertelement <8 x i16> %4, i16 %amt, i32 5171  %6 = insertelement <8 x i16> %5, i16 %amt, i32 6172  %7 = insertelement <8 x i16> %6, i16 %amt, i32 7173  %shl = shl <8 x i16> %val, %7174  store <8 x i16> %shl, ptr %dst175  ret void176}177 178