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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE23; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86-SSE424; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64-SSE25; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64-SSE426 7; sign to float v2i16 to v2f328 9define void @convert_v2i16_to_v2f32(ptr %dst.addr, <2 x i16> %src) nounwind {10; X86-SSE2-LABEL: convert_v2i16_to_v2f32:11; X86-SSE2: # %bb.0: # %entry12; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax13; X86-SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,2,1,4,5,6,7]14; X86-SSE2-NEXT: psrad $16, %xmm015; X86-SSE2-NEXT: cvtdq2ps %xmm0, %xmm016; X86-SSE2-NEXT: movlps %xmm0, (%eax)17; X86-SSE2-NEXT: retl18;19; X86-SSE42-LABEL: convert_v2i16_to_v2f32:20; X86-SSE42: # %bb.0: # %entry21; X86-SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax22; X86-SSE42-NEXT: pmovsxwd %xmm0, %xmm023; X86-SSE42-NEXT: cvtdq2ps %xmm0, %xmm024; X86-SSE42-NEXT: movlps %xmm0, (%eax)25; X86-SSE42-NEXT: retl26;27; X64-SSE2-LABEL: convert_v2i16_to_v2f32:28; X64-SSE2: # %bb.0: # %entry29; X64-SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,2,1,4,5,6,7]30; X64-SSE2-NEXT: psrad $16, %xmm031; X64-SSE2-NEXT: cvtdq2ps %xmm0, %xmm032; X64-SSE2-NEXT: movlps %xmm0, (%rdi)33; X64-SSE2-NEXT: retq34;35; X64-SSE42-LABEL: convert_v2i16_to_v2f32:36; X64-SSE42: # %bb.0: # %entry37; X64-SSE42-NEXT: pmovsxwd %xmm0, %xmm038; X64-SSE42-NEXT: cvtdq2ps %xmm0, %xmm039; X64-SSE42-NEXT: movlps %xmm0, (%rdi)40; X64-SSE42-NEXT: retq41entry:42 %val = sitofp <2 x i16> %src to <2 x float>43 store <2 x float> %val, ptr %dst.addr, align 444 ret void45}46 47; sign to float v3i8 to v3f3248 49define void @convert_v3i8_to_v3f32(ptr %dst.addr, ptr %src.addr) nounwind {50; X86-SSE2-LABEL: convert_v3i8_to_v3f32:51; X86-SSE2: # %bb.0: # %entry52; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax53; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx54; X86-SSE2-NEXT: movzwl (%ecx), %edx55; X86-SSE2-NEXT: movd %edx, %xmm056; X86-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [255,255,0,255,255,255,255,255,255,255,255,255,255,255,255,255]57; X86-SSE2-NEXT: pand %xmm1, %xmm058; X86-SSE2-NEXT: movzbl 2(%ecx), %ecx59; X86-SSE2-NEXT: movd %ecx, %xmm260; X86-SSE2-NEXT: pslld $16, %xmm261; X86-SSE2-NEXT: pandn %xmm2, %xmm162; X86-SSE2-NEXT: por %xmm0, %xmm163; X86-SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]64; X86-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]65; X86-SSE2-NEXT: psrad $24, %xmm066; X86-SSE2-NEXT: cvtdq2ps %xmm0, %xmm067; X86-SSE2-NEXT: movss %xmm0, (%eax)68; X86-SSE2-NEXT: movaps %xmm0, %xmm169; X86-SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]70; X86-SSE2-NEXT: movss %xmm1, 8(%eax)71; X86-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,1,1]72; X86-SSE2-NEXT: movss %xmm0, 4(%eax)73; X86-SSE2-NEXT: retl74;75; X86-SSE42-LABEL: convert_v3i8_to_v3f32:76; X86-SSE42: # %bb.0: # %entry77; X86-SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax78; X86-SSE42-NEXT: movl {{[0-9]+}}(%esp), %ecx79; X86-SSE42-NEXT: movzwl (%ecx), %edx80; X86-SSE42-NEXT: movd %edx, %xmm081; X86-SSE42-NEXT: pinsrb $2, 2(%ecx), %xmm082; X86-SSE42-NEXT: pmovsxbd %xmm0, %xmm083; X86-SSE42-NEXT: cvtdq2ps %xmm0, %xmm084; X86-SSE42-NEXT: extractps $2, %xmm0, 8(%eax)85; X86-SSE42-NEXT: extractps $1, %xmm0, 4(%eax)86; X86-SSE42-NEXT: movss %xmm0, (%eax)87; X86-SSE42-NEXT: retl88;89; X64-SSE2-LABEL: convert_v3i8_to_v3f32:90; X64-SSE2: # %bb.0: # %entry91; X64-SSE2-NEXT: movzwl (%rsi), %eax92; X64-SSE2-NEXT: movd %eax, %xmm093; X64-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [255,255,0,255,255,255,255,255,255,255,255,255,255,255,255,255]94; X64-SSE2-NEXT: pand %xmm1, %xmm095; X64-SSE2-NEXT: movzbl 2(%rsi), %eax96; X64-SSE2-NEXT: movd %eax, %xmm297; X64-SSE2-NEXT: pslld $16, %xmm298; X64-SSE2-NEXT: pandn %xmm2, %xmm199; X64-SSE2-NEXT: por %xmm0, %xmm1100; X64-SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]101; X64-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]102; X64-SSE2-NEXT: psrad $24, %xmm0103; X64-SSE2-NEXT: cvtdq2ps %xmm0, %xmm0104; X64-SSE2-NEXT: movlps %xmm0, (%rdi)105; X64-SSE2-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]106; X64-SSE2-NEXT: movss %xmm0, 8(%rdi)107; X64-SSE2-NEXT: retq108;109; X64-SSE42-LABEL: convert_v3i8_to_v3f32:110; X64-SSE42: # %bb.0: # %entry111; X64-SSE42-NEXT: movzwl (%rsi), %eax112; X64-SSE42-NEXT: movd %eax, %xmm0113; X64-SSE42-NEXT: pinsrb $2, 2(%rsi), %xmm0114; X64-SSE42-NEXT: pmovsxbd %xmm0, %xmm0115; X64-SSE42-NEXT: cvtdq2ps %xmm0, %xmm0116; X64-SSE42-NEXT: extractps $2, %xmm0, 8(%rdi)117; X64-SSE42-NEXT: movlps %xmm0, (%rdi)118; X64-SSE42-NEXT: retq119entry:120 %load = load <3 x i8>, ptr %src.addr, align 1121 %cvt = sitofp <3 x i8> %load to <3 x float>122 store <3 x float> %cvt, ptr %dst.addr, align 4123 ret void124}125