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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=SSE3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX15; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX26; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512VL8 9define void @widen_fadd_v2f32_v4f32(ptr %a0, ptr %b0, ptr %c0) {10; SSE-LABEL: widen_fadd_v2f32_v4f32:11; SSE: # %bb.0:12; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero13; SSE-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero14; SSE-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero15; SSE-NEXT: addps %xmm0, %xmm216; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero17; SSE-NEXT: addps %xmm1, %xmm018; SSE-NEXT: movlps %xmm2, (%rdx)19; SSE-NEXT: movlps %xmm0, 8(%rdx)20; SSE-NEXT: retq21;22; AVX-LABEL: widen_fadd_v2f32_v4f32:23; AVX: # %bb.0:24; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero25; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero26; AVX-NEXT: vmovsd {{.*#+}} xmm2 = mem[0],zero27; AVX-NEXT: vaddps %xmm2, %xmm0, %xmm028; AVX-NEXT: vmovsd {{.*#+}} xmm2 = mem[0],zero29; AVX-NEXT: vaddps %xmm2, %xmm1, %xmm130; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]31; AVX-NEXT: vmovups %xmm0, (%rdx)32; AVX-NEXT: retq33 %a2 = getelementptr inbounds i8, ptr %a0, i64 834 %b2 = getelementptr inbounds i8, ptr %b0, i64 835 %c2 = getelementptr inbounds i8, ptr %c0, i64 836 %va0 = load <2 x float>, ptr %a0, align 437 %vb0 = load <2 x float>, ptr %b0, align 438 %va2 = load <2 x float>, ptr %a2, align 439 %vb2 = load <2 x float>, ptr %b2, align 440 %vc0 = fadd <2 x float> %va0, %vb041 %vc2 = fadd <2 x float> %va2, %vb242 store <2 x float> %vc0, ptr %c0, align 443 store <2 x float> %vc2, ptr %c2, align 444 ret void45}46 47define void @widen_fadd_v2f32_v8f32(ptr %a0, ptr %b0, ptr %c0) {48; SSE-LABEL: widen_fadd_v2f32_v8f32:49; SSE: # %bb.0:50; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero51; SSE-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero52; SSE-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero53; SSE-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero54; SSE-NEXT: movsd {{.*#+}} xmm4 = mem[0],zero55; SSE-NEXT: addps %xmm0, %xmm456; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero57; SSE-NEXT: addps %xmm1, %xmm058; SSE-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero59; SSE-NEXT: addps %xmm2, %xmm160; SSE-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero61; SSE-NEXT: addps %xmm3, %xmm262; SSE-NEXT: movlps %xmm4, (%rdx)63; SSE-NEXT: movlps %xmm0, 8(%rdx)64; SSE-NEXT: movlps %xmm1, 16(%rdx)65; SSE-NEXT: movlps %xmm2, 24(%rdx)66; SSE-NEXT: retq67;68; AVX-LABEL: widen_fadd_v2f32_v8f32:69; AVX: # %bb.0:70; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero71; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero72; AVX-NEXT: vmovsd {{.*#+}} xmm2 = mem[0],zero73; AVX-NEXT: vmovsd {{.*#+}} xmm3 = mem[0],zero74; AVX-NEXT: vmovsd {{.*#+}} xmm4 = mem[0],zero75; AVX-NEXT: vaddps %xmm4, %xmm0, %xmm076; AVX-NEXT: vmovsd {{.*#+}} xmm4 = mem[0],zero77; AVX-NEXT: vaddps %xmm4, %xmm1, %xmm178; AVX-NEXT: vmovsd {{.*#+}} xmm4 = mem[0],zero79; AVX-NEXT: vaddps %xmm4, %xmm2, %xmm280; AVX-NEXT: vmovsd {{.*#+}} xmm4 = mem[0],zero81; AVX-NEXT: vaddps %xmm4, %xmm3, %xmm382; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm183; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm084; AVX-NEXT: vunpcklpd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[2],ymm1[2]85; AVX-NEXT: vmovups %ymm0, (%rdx)86; AVX-NEXT: vzeroupper87; AVX-NEXT: retq88 %a2 = getelementptr inbounds i8, ptr %a0, i64 889 %b2 = getelementptr inbounds i8, ptr %b0, i64 890 %c2 = getelementptr inbounds i8, ptr %c0, i64 891 %a4 = getelementptr inbounds i8, ptr %a0, i64 1692 %b4 = getelementptr inbounds i8, ptr %b0, i64 1693 %c4 = getelementptr inbounds i8, ptr %c0, i64 1694 %a6 = getelementptr inbounds i8, ptr %a0, i64 2495 %b6 = getelementptr inbounds i8, ptr %b0, i64 2496 %c6 = getelementptr inbounds i8, ptr %c0, i64 2497 %va0 = load <2 x float>, ptr %a0, align 498 %vb0 = load <2 x float>, ptr %b0, align 499 %va2 = load <2 x float>, ptr %a2, align 4100 %vb2 = load <2 x float>, ptr %b2, align 4101 %va4 = load <2 x float>, ptr %a4, align 4102 %vb4 = load <2 x float>, ptr %b4, align 4103 %va6 = load <2 x float>, ptr %a6, align 4104 %vb6 = load <2 x float>, ptr %b6, align 4105 %vc0 = fadd <2 x float> %va0, %vb0106 %vc2 = fadd <2 x float> %va2, %vb2107 %vc4 = fadd <2 x float> %va4, %vb4108 %vc6 = fadd <2 x float> %va6, %vb6109 store <2 x float> %vc0, ptr %c0, align 4110 store <2 x float> %vc2, ptr %c2, align 4111 store <2 x float> %vc4, ptr %c4, align 4112 store <2 x float> %vc6, ptr %c6, align 4113 ret void114}115 116define void @widen_fadd_v2f32_v16f32(ptr %a0, ptr %b0, ptr %c0) {117; SSE-LABEL: widen_fadd_v2f32_v16f32:118; SSE: # %bb.0:119; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero120; SSE-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero121; SSE-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero122; SSE-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero123; SSE-NEXT: movsd {{.*#+}} xmm4 = mem[0],zero124; SSE-NEXT: addps %xmm0, %xmm4125; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero126; SSE-NEXT: addps %xmm1, %xmm0127; SSE-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero128; SSE-NEXT: addps %xmm2, %xmm1129; SSE-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero130; SSE-NEXT: addps %xmm3, %xmm2131; SSE-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero132; SSE-NEXT: movsd {{.*#+}} xmm5 = mem[0],zero133; SSE-NEXT: addps %xmm3, %xmm5134; SSE-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero135; SSE-NEXT: movsd {{.*#+}} xmm6 = mem[0],zero136; SSE-NEXT: addps %xmm3, %xmm6137; SSE-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero138; SSE-NEXT: movsd {{.*#+}} xmm7 = mem[0],zero139; SSE-NEXT: addps %xmm3, %xmm7140; SSE-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero141; SSE-NEXT: movsd {{.*#+}} xmm8 = mem[0],zero142; SSE-NEXT: addps %xmm3, %xmm8143; SSE-NEXT: movlps %xmm4, (%rdx)144; SSE-NEXT: movlps %xmm0, 8(%rdx)145; SSE-NEXT: movlps %xmm1, 16(%rdx)146; SSE-NEXT: movlps %xmm2, 24(%rdx)147; SSE-NEXT: movlps %xmm5, 32(%rdx)148; SSE-NEXT: movlps %xmm6, 40(%rdx)149; SSE-NEXT: movlps %xmm7, 48(%rdx)150; SSE-NEXT: movlps %xmm8, 56(%rdx)151; SSE-NEXT: retq152;153; AVX1OR2-LABEL: widen_fadd_v2f32_v16f32:154; AVX1OR2: # %bb.0:155; AVX1OR2-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero156; AVX1OR2-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero157; AVX1OR2-NEXT: vmovsd {{.*#+}} xmm2 = mem[0],zero158; AVX1OR2-NEXT: vmovsd {{.*#+}} xmm3 = mem[0],zero159; AVX1OR2-NEXT: vmovsd {{.*#+}} xmm4 = mem[0],zero160; AVX1OR2-NEXT: vaddps %xmm4, %xmm0, %xmm0161; AVX1OR2-NEXT: vmovsd {{.*#+}} xmm4 = mem[0],zero162; AVX1OR2-NEXT: vaddps %xmm4, %xmm1, %xmm1163; AVX1OR2-NEXT: vmovsd {{.*#+}} xmm4 = mem[0],zero164; AVX1OR2-NEXT: vaddps %xmm4, %xmm2, %xmm2165; AVX1OR2-NEXT: vmovsd {{.*#+}} xmm4 = mem[0],zero166; AVX1OR2-NEXT: vaddps %xmm4, %xmm3, %xmm3167; AVX1OR2-NEXT: vmovsd {{.*#+}} xmm4 = mem[0],zero168; AVX1OR2-NEXT: vmovsd {{.*#+}} xmm5 = mem[0],zero169; AVX1OR2-NEXT: vaddps %xmm5, %xmm4, %xmm4170; AVX1OR2-NEXT: vmovsd {{.*#+}} xmm5 = mem[0],zero171; AVX1OR2-NEXT: vmovsd {{.*#+}} xmm6 = mem[0],zero172; AVX1OR2-NEXT: vaddps %xmm6, %xmm5, %xmm5173; AVX1OR2-NEXT: vmovsd {{.*#+}} xmm6 = mem[0],zero174; AVX1OR2-NEXT: vmovsd {{.*#+}} xmm7 = mem[0],zero175; AVX1OR2-NEXT: vaddps %xmm7, %xmm6, %xmm6176; AVX1OR2-NEXT: vmovsd {{.*#+}} xmm7 = mem[0],zero177; AVX1OR2-NEXT: vmovsd {{.*#+}} xmm8 = mem[0],zero178; AVX1OR2-NEXT: vaddps %xmm7, %xmm8, %xmm7179; AVX1OR2-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1180; AVX1OR2-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0181; AVX1OR2-NEXT: vunpcklpd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[2],ymm1[2]182; AVX1OR2-NEXT: vmovups %ymm0, (%rdx)183; AVX1OR2-NEXT: vinsertf128 $1, %xmm7, %ymm5, %ymm0184; AVX1OR2-NEXT: vinsertf128 $1, %xmm6, %ymm4, %ymm1185; AVX1OR2-NEXT: vunpcklpd {{.*#+}} ymm0 = ymm1[0],ymm0[0],ymm1[2],ymm0[2]186; AVX1OR2-NEXT: vmovups %ymm0, 32(%rdx)187; AVX1OR2-NEXT: vzeroupper188; AVX1OR2-NEXT: retq189;190; AVX512F-LABEL: widen_fadd_v2f32_v16f32:191; AVX512F: # %bb.0:192; AVX512F-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero193; AVX512F-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero194; AVX512F-NEXT: vmovsd {{.*#+}} xmm2 = mem[0],zero195; AVX512F-NEXT: vmovsd {{.*#+}} xmm3 = mem[0],zero196; AVX512F-NEXT: vmovsd {{.*#+}} xmm4 = mem[0],zero197; AVX512F-NEXT: vaddps %xmm4, %xmm0, %xmm0198; AVX512F-NEXT: vmovsd {{.*#+}} xmm4 = mem[0],zero199; AVX512F-NEXT: vaddps %xmm4, %xmm1, %xmm1200; AVX512F-NEXT: vmovsd {{.*#+}} xmm4 = mem[0],zero201; AVX512F-NEXT: vaddps %xmm4, %xmm2, %xmm2202; AVX512F-NEXT: vmovsd {{.*#+}} xmm4 = mem[0],zero203; AVX512F-NEXT: vaddps %xmm4, %xmm3, %xmm3204; AVX512F-NEXT: vmovsd {{.*#+}} xmm4 = mem[0],zero205; AVX512F-NEXT: vmovsd {{.*#+}} xmm5 = mem[0],zero206; AVX512F-NEXT: vaddps %xmm5, %xmm4, %xmm4207; AVX512F-NEXT: vmovsd {{.*#+}} xmm5 = mem[0],zero208; AVX512F-NEXT: vmovsd {{.*#+}} xmm6 = mem[0],zero209; AVX512F-NEXT: vaddps %xmm6, %xmm5, %xmm5210; AVX512F-NEXT: vmovsd {{.*#+}} xmm6 = mem[0],zero211; AVX512F-NEXT: vmovsd {{.*#+}} xmm7 = mem[0],zero212; AVX512F-NEXT: vaddps %xmm7, %xmm6, %xmm6213; AVX512F-NEXT: vmovsd {{.*#+}} xmm7 = mem[0],zero214; AVX512F-NEXT: vmovsd {{.*#+}} xmm8 = mem[0],zero215; AVX512F-NEXT: vaddps %xmm7, %xmm8, %xmm7216; AVX512F-NEXT: vinsertf32x4 $1, %xmm7, %zmm6, %zmm6217; AVX512F-NEXT: vinsertf32x4 $1, %xmm5, %zmm4, %zmm4218; AVX512F-NEXT: vbroadcasti64x4 {{.*#+}} zmm5 = [0,2,8,10,0,2,8,10]219; AVX512F-NEXT: # zmm5 = mem[0,1,2,3,0,1,2,3]220; AVX512F-NEXT: vpermt2pd %zmm6, %zmm5, %zmm4221; AVX512F-NEXT: vinsertf32x4 $1, %xmm3, %zmm2, %zmm2222; AVX512F-NEXT: vinsertf32x4 $1, %xmm1, %zmm0, %zmm0223; AVX512F-NEXT: vpermt2pd %zmm2, %zmm5, %zmm0224; AVX512F-NEXT: vshuff64x2 {{.*#+}} zmm0 = zmm0[0,1,2,3],zmm4[4,5,6,7]225; AVX512F-NEXT: vmovupd %zmm0, (%rdx)226; AVX512F-NEXT: vzeroupper227; AVX512F-NEXT: retq228;229; AVX512VL-LABEL: widen_fadd_v2f32_v16f32:230; AVX512VL: # %bb.0:231; AVX512VL-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero232; AVX512VL-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero233; AVX512VL-NEXT: vmovsd {{.*#+}} xmm2 = mem[0],zero234; AVX512VL-NEXT: vmovsd {{.*#+}} xmm3 = mem[0],zero235; AVX512VL-NEXT: vmovsd {{.*#+}} xmm4 = mem[0],zero236; AVX512VL-NEXT: vaddps %xmm4, %xmm0, %xmm0237; AVX512VL-NEXT: vmovsd {{.*#+}} xmm4 = mem[0],zero238; AVX512VL-NEXT: vaddps %xmm4, %xmm1, %xmm1239; AVX512VL-NEXT: vmovsd {{.*#+}} xmm4 = mem[0],zero240; AVX512VL-NEXT: vaddps %xmm4, %xmm2, %xmm2241; AVX512VL-NEXT: vmovsd {{.*#+}} xmm4 = mem[0],zero242; AVX512VL-NEXT: vaddps %xmm4, %xmm3, %xmm3243; AVX512VL-NEXT: vmovsd {{.*#+}} xmm4 = mem[0],zero244; AVX512VL-NEXT: vmovsd {{.*#+}} xmm5 = mem[0],zero245; AVX512VL-NEXT: vaddps %xmm5, %xmm4, %xmm4246; AVX512VL-NEXT: vmovsd {{.*#+}} xmm5 = mem[0],zero247; AVX512VL-NEXT: vmovsd {{.*#+}} xmm6 = mem[0],zero248; AVX512VL-NEXT: vaddps %xmm6, %xmm5, %xmm5249; AVX512VL-NEXT: vmovsd {{.*#+}} xmm6 = mem[0],zero250; AVX512VL-NEXT: vmovsd {{.*#+}} xmm7 = mem[0],zero251; AVX512VL-NEXT: vaddps %xmm7, %xmm6, %xmm6252; AVX512VL-NEXT: vmovsd {{.*#+}} xmm7 = mem[0],zero253; AVX512VL-NEXT: vmovsd {{.*#+}} xmm8 = mem[0],zero254; AVX512VL-NEXT: vaddps %xmm7, %xmm8, %xmm7255; AVX512VL-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2256; AVX512VL-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0257; AVX512VL-NEXT: vpmovsxbq {{.*#+}} ymm1 = [0,2,4,6]258; AVX512VL-NEXT: vpermi2pd %ymm2, %ymm0, %ymm1259; AVX512VL-NEXT: vinsertf32x4 $1, %xmm7, %zmm6, %zmm0260; AVX512VL-NEXT: vinsertf32x4 $1, %xmm5, %zmm4, %zmm2261; AVX512VL-NEXT: vbroadcasti64x4 {{.*#+}} zmm3 = [0,2,8,10,0,2,8,10]262; AVX512VL-NEXT: # zmm3 = mem[0,1,2,3,0,1,2,3]263; AVX512VL-NEXT: vpermi2pd %zmm0, %zmm2, %zmm3264; AVX512VL-NEXT: vinsertf64x4 $0, %ymm1, %zmm3, %zmm0265; AVX512VL-NEXT: vmovupd %zmm0, (%rdx)266; AVX512VL-NEXT: vzeroupper267; AVX512VL-NEXT: retq268 %a2 = getelementptr inbounds i8, ptr %a0, i64 8269 %b2 = getelementptr inbounds i8, ptr %b0, i64 8270 %c2 = getelementptr inbounds i8, ptr %c0, i64 8271 %a4 = getelementptr inbounds i8, ptr %a0, i64 16272 %b4 = getelementptr inbounds i8, ptr %b0, i64 16273 %c4 = getelementptr inbounds i8, ptr %c0, i64 16274 %a6 = getelementptr inbounds i8, ptr %a0, i64 24275 %b6 = getelementptr inbounds i8, ptr %b0, i64 24276 %c6 = getelementptr inbounds i8, ptr %c0, i64 24277 %a8 = getelementptr inbounds i8, ptr %a0, i64 32278 %b8 = getelementptr inbounds i8, ptr %b0, i64 32279 %c8 = getelementptr inbounds i8, ptr %c0, i64 32280 %a10 = getelementptr inbounds i8, ptr %a0, i64 40281 %b10 = getelementptr inbounds i8, ptr %b0, i64 40282 %c10 = getelementptr inbounds i8, ptr %c0, i64 40283 %a12 = getelementptr inbounds i8, ptr %a0, i64 48284 %b12 = getelementptr inbounds i8, ptr %b0, i64 48285 %c12 = getelementptr inbounds i8, ptr %c0, i64 48286 %a14 = getelementptr inbounds i8, ptr %a0, i64 56287 %b14 = getelementptr inbounds i8, ptr %b0, i64 56288 %c14 = getelementptr inbounds i8, ptr %c0, i64 56289 %va0 = load <2 x float>, ptr %a0, align 4290 %vb0 = load <2 x float>, ptr %b0, align 4291 %va2 = load <2 x float>, ptr %a2, align 4292 %vb2 = load <2 x float>, ptr %b2, align 4293 %va4 = load <2 x float>, ptr %a4, align 4294 %vb4 = load <2 x float>, ptr %b4, align 4295 %va6 = load <2 x float>, ptr %a6, align 4296 %vb6 = load <2 x float>, ptr %b6, align 4297 %va8 = load <2 x float>, ptr %a8, align 4298 %vb8 = load <2 x float>, ptr %b8, align 4299 %va10 = load <2 x float>, ptr %a10, align 4300 %vb10 = load <2 x float>, ptr %b10, align 4301 %va12 = load <2 x float>, ptr %a12, align 4302 %vb12 = load <2 x float>, ptr %b12, align 4303 %va14 = load <2 x float>, ptr %a14, align 4304 %vb14 = load <2 x float>, ptr %b14, align 4305 %vc0 = fadd <2 x float> %va0, %vb0306 %vc2 = fadd <2 x float> %va2, %vb2307 %vc4 = fadd <2 x float> %va4, %vb4308 %vc6 = fadd <2 x float> %va6, %vb6309 %vc8 = fadd <2 x float> %va8, %vb8310 %vc10 = fadd <2 x float> %va10, %vb10311 %vc12 = fadd <2 x float> %va12, %vb12312 %vc14 = fadd <2 x float> %va14, %vb14313 store <2 x float> %vc0, ptr %c0, align 4314 store <2 x float> %vc2, ptr %c2, align 4315 store <2 x float> %vc4, ptr %c4, align 4316 store <2 x float> %vc6, ptr %c6, align 4317 store <2 x float> %vc8, ptr %c8, align 4318 store <2 x float> %vc10, ptr %c10, align 4319 store <2 x float> %vc12, ptr %c12, align 4320 store <2 x float> %vc14, ptr %c14, align 4321 ret void322}323 324define <8 x float> @widen_fadd_v4f32_v8f32_const(<4 x float> %x, <4 x float> %y) {325; SSE-LABEL: widen_fadd_v4f32_v8f32_const:326; SSE: # %bb.0:327; SSE-NEXT: movaps {{.*#+}} xmm2 = [2.0E+0,2.0E+0,2.0E+0,2.0E+0]328; SSE-NEXT: addps %xmm2, %xmm0329; SSE-NEXT: addps %xmm2, %xmm1330; SSE-NEXT: retq331;332; AVX1-LABEL: widen_fadd_v4f32_v8f32_const:333; AVX1: # %bb.0:334; AVX1-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0335; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0336; AVX1-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0337; AVX1-NEXT: retq338;339; AVX2-LABEL: widen_fadd_v4f32_v8f32_const:340; AVX2: # %bb.0:341; AVX2-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0342; AVX2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0343; AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [2.0E+0,2.0E+0,2.0E+0,2.0E+0,2.0E+0,2.0E+0,2.0E+0,2.0E+0]344; AVX2-NEXT: vaddps %ymm1, %ymm0, %ymm0345; AVX2-NEXT: retq346;347; AVX512F-LABEL: widen_fadd_v4f32_v8f32_const:348; AVX512F: # %bb.0:349; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0350; AVX512F-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0351; AVX512F-NEXT: vbroadcastss {{.*#+}} ymm1 = [2.0E+0,2.0E+0,2.0E+0,2.0E+0,2.0E+0,2.0E+0,2.0E+0,2.0E+0]352; AVX512F-NEXT: vaddps %ymm1, %ymm0, %ymm0353; AVX512F-NEXT: retq354;355; AVX512VL-LABEL: widen_fadd_v4f32_v8f32_const:356; AVX512VL: # %bb.0:357; AVX512VL-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0358; AVX512VL-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0359; AVX512VL-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm0, %ymm0360; AVX512VL-NEXT: retq361 %x2 = fadd <4 x float> %x, <float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00>362 %y2 = fadd <4 x float> %y, <float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00>363 %r = shufflevector <4 x float> %x2, <4 x float> %y2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>364 ret <8 x float> %r365}366 367define <16 x float> @widen_fadd_v4f32_v16f32_const(<4 x float> %x, <4 x float> %y, <4 x float> %z, <4 x float> %w) {368; SSE-LABEL: widen_fadd_v4f32_v16f32_const:369; SSE: # %bb.0:370; SSE-NEXT: movaps {{.*#+}} xmm4 = [2.0E+0,2.0E+0,2.0E+0,2.0E+0]371; SSE-NEXT: addps %xmm4, %xmm0372; SSE-NEXT: addps %xmm4, %xmm1373; SSE-NEXT: addps %xmm4, %xmm2374; SSE-NEXT: addps %xmm4, %xmm3375; SSE-NEXT: retq376;377; AVX1OR2-LABEL: widen_fadd_v4f32_v16f32_const:378; AVX1OR2: # %bb.0:379; AVX1OR2-NEXT: # kill: def $xmm2 killed $xmm2 def $ymm2380; AVX1OR2-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0381; AVX1OR2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0382; AVX1OR2-NEXT: vbroadcastss {{.*#+}} ymm1 = [2.0E+0,2.0E+0,2.0E+0,2.0E+0,2.0E+0,2.0E+0,2.0E+0,2.0E+0]383; AVX1OR2-NEXT: vaddps %ymm1, %ymm0, %ymm0384; AVX1OR2-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2385; AVX1OR2-NEXT: vaddps %ymm1, %ymm2, %ymm1386; AVX1OR2-NEXT: retq387;388; AVX512-LABEL: widen_fadd_v4f32_v16f32_const:389; AVX512: # %bb.0:390; AVX512-NEXT: # kill: def $xmm2 killed $xmm2 def $ymm2391; AVX512-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0392; AVX512-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2393; AVX512-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0394; AVX512-NEXT: vinsertf64x4 $1, %ymm2, %zmm0, %zmm0395; AVX512-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm0, %zmm0396; AVX512-NEXT: retq397 %x2 = fadd <4 x float> %x, <float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00>398 %y2 = fadd <4 x float> %y, <float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00>399 %z2 = fadd <4 x float> %z, <float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00>400 %w2 = fadd <4 x float> %w, <float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00>401 %r0 = shufflevector <4 x float> %x2, <4 x float> %y2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>402 %r1 = shufflevector <4 x float> %z2, <4 x float> %w2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>403 %r = shufflevector <8 x float> %r0, <8 x float> %r1, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>404 ret <16 x float> %r405}406