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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X863; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X644 5; Test based on pr5626 to load/store6;7 8%i32vec3 = type <3 x i32>9define void @add3i32(ptr sret(%i32vec3) %ret, ptr %ap, ptr %bp)  {10; X86-LABEL: add3i32:11; X86:       # %bb.0:12; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax13; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx14; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx15; X86-NEXT:    movdqa (%edx), %xmm016; X86-NEXT:    paddd (%ecx), %xmm017; X86-NEXT:    pextrd $2, %xmm0, 8(%eax)18; X86-NEXT:    pextrd $1, %xmm0, 4(%eax)19; X86-NEXT:    movd %xmm0, (%eax)20; X86-NEXT:    retl $421;22; X64-LABEL: add3i32:23; X64:       # %bb.0:24; X64-NEXT:    movq %rdi, %rax25; X64-NEXT:    movdqa (%rsi), %xmm026; X64-NEXT:    paddd (%rdx), %xmm027; X64-NEXT:    pextrd $2, %xmm0, 8(%rdi)28; X64-NEXT:    movq %xmm0, (%rdi)29; X64-NEXT:    retq30	%a = load %i32vec3, ptr %ap, align 1631	%b = load %i32vec3, ptr %bp, align 1632	%x = add %i32vec3 %a, %b33	store %i32vec3 %x, ptr %ret, align 1634	ret void35}36 37define void @add3i32_2(ptr sret(%i32vec3) %ret, ptr %ap, ptr %bp)  {38; X86-LABEL: add3i32_2:39; X86:       # %bb.0:40; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax41; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx42; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx43; X86-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero44; X86-NEXT:    pinsrd $1, 4(%edx), %xmm045; X86-NEXT:    pinsrd $2, 8(%edx), %xmm046; X86-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero47; X86-NEXT:    pinsrd $1, 4(%ecx), %xmm148; X86-NEXT:    pinsrd $2, 8(%ecx), %xmm149; X86-NEXT:    paddd %xmm0, %xmm150; X86-NEXT:    movd %xmm1, (%eax)51; X86-NEXT:    pextrd $1, %xmm1, 4(%eax)52; X86-NEXT:    pextrd $2, %xmm1, 8(%eax)53; X86-NEXT:    retl $454;55; X64-LABEL: add3i32_2:56; X64:       # %bb.0:57; X64-NEXT:    movq %rdi, %rax58; X64-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero59; X64-NEXT:    pinsrd $2, 8(%rsi), %xmm060; X64-NEXT:    movq {{.*#+}} xmm1 = mem[0],zero61; X64-NEXT:    pinsrd $2, 8(%rdx), %xmm162; X64-NEXT:    paddd %xmm0, %xmm163; X64-NEXT:    pextrd $2, %xmm1, 8(%rdi)64; X64-NEXT:    movq %xmm1, (%rdi)65; X64-NEXT:    retq66	%a = load %i32vec3, ptr %ap, align 867	%b = load %i32vec3, ptr %bp, align 868	%x = add %i32vec3 %a, %b69	store %i32vec3 %x, ptr %ret, align 870	ret void71}72 73%i32vec7 = type <7 x i32>74define void @add7i32(ptr sret(%i32vec7) %ret, ptr %ap, ptr %bp)  {75; X86-LABEL: add7i32:76; X86:       # %bb.0:77; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax78; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx79; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx80; X86-NEXT:    movdqa (%edx), %xmm081; X86-NEXT:    movdqa 16(%edx), %xmm182; X86-NEXT:    paddd (%ecx), %xmm083; X86-NEXT:    paddd 16(%ecx), %xmm184; X86-NEXT:    movd %xmm1, 16(%eax)85; X86-NEXT:    pextrd $1, %xmm1, 20(%eax)86; X86-NEXT:    pextrd $2, %xmm1, 24(%eax)87; X86-NEXT:    movdqa %xmm0, (%eax)88; X86-NEXT:    retl $489;90; X64-LABEL: add7i32:91; X64:       # %bb.0:92; X64-NEXT:    movq %rdi, %rax93; X64-NEXT:    movdqa (%rsi), %xmm094; X64-NEXT:    movdqa 16(%rsi), %xmm195; X64-NEXT:    paddd (%rdx), %xmm096; X64-NEXT:    paddd 16(%rdx), %xmm197; X64-NEXT:    movq %xmm1, 16(%rdi)98; X64-NEXT:    pextrd $2, %xmm1, 24(%rdi)99; X64-NEXT:    movdqa %xmm0, (%rdi)100; X64-NEXT:    retq101	%a = load %i32vec7, ptr %ap, align 16102	%b = load %i32vec7, ptr %bp, align 16103	%x = add %i32vec7 %a, %b104	store %i32vec7 %x, ptr %ret, align 16105	ret void106}107 108%i32vec12 = type <12 x i32>109define void @add12i32(ptr sret(%i32vec12) %ret, ptr %ap, ptr %bp)  {110; X86-LABEL: add12i32:111; X86:       # %bb.0:112; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax113; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx114; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx115; X86-NEXT:    movdqa 32(%edx), %xmm0116; X86-NEXT:    movdqa (%edx), %xmm1117; X86-NEXT:    movdqa 16(%edx), %xmm2118; X86-NEXT:    paddd (%ecx), %xmm1119; X86-NEXT:    paddd 32(%ecx), %xmm0120; X86-NEXT:    paddd 16(%ecx), %xmm2121; X86-NEXT:    movdqa %xmm2, 16(%eax)122; X86-NEXT:    movdqa %xmm0, 32(%eax)123; X86-NEXT:    movdqa %xmm1, (%eax)124; X86-NEXT:    retl $4125;126; X64-LABEL: add12i32:127; X64:       # %bb.0:128; X64-NEXT:    movq %rdi, %rax129; X64-NEXT:    movdqa (%rsi), %xmm0130; X64-NEXT:    movdqa 16(%rsi), %xmm1131; X64-NEXT:    movdqa 32(%rsi), %xmm2132; X64-NEXT:    paddd (%rdx), %xmm0133; X64-NEXT:    paddd 32(%rdx), %xmm2134; X64-NEXT:    paddd 16(%rdx), %xmm1135; X64-NEXT:    movdqa %xmm1, 16(%rdi)136; X64-NEXT:    movdqa %xmm2, 32(%rdi)137; X64-NEXT:    movdqa %xmm0, (%rdi)138; X64-NEXT:    retq139	%a = load %i32vec12, ptr %ap, align 16140	%b = load %i32vec12, ptr %bp, align 16141	%x = add %i32vec12 %a, %b142	store %i32vec12 %x, ptr %ret, align 16143	ret void144}145 146 147%i16vec3 = type <3 x i16>148define void @add3i16(ptr nocapture sret(%i16vec3) %ret, ptr %ap, ptr %bp) nounwind {149; X86-LABEL: add3i16:150; X86:       # %bb.0:151; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax152; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx153; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx154; X86-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero155; X86-NEXT:    pinsrw $2, 4(%edx), %xmm0156; X86-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero157; X86-NEXT:    pinsrw $2, 4(%ecx), %xmm1158; X86-NEXT:    paddw %xmm0, %xmm1159; X86-NEXT:    pextrw $2, %xmm1, 4(%eax)160; X86-NEXT:    movd %xmm1, (%eax)161; X86-NEXT:    retl $4162;163; X64-LABEL: add3i16:164; X64:       # %bb.0:165; X64-NEXT:    movq %rdi, %rax166; X64-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero167; X64-NEXT:    movq {{.*#+}} xmm1 = mem[0],zero168; X64-NEXT:    paddw %xmm0, %xmm1169; X64-NEXT:    pextrw $2, %xmm1, 4(%rdi)170; X64-NEXT:    movd %xmm1, (%rdi)171; X64-NEXT:    retq172	%a = load %i16vec3, ptr %ap, align 16173	%b = load %i16vec3, ptr %bp, align 16174	%x = add %i16vec3 %a, %b175	store %i16vec3 %x, ptr %ret, align 16176	ret void177}178 179%i16vec4 = type <4 x i16>180define void @add4i16(ptr nocapture sret(%i16vec4) %ret, ptr %ap, ptr %bp) nounwind {181; X86-LABEL: add4i16:182; X86:       # %bb.0:183; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax184; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx185; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx186; X86-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero187; X86-NEXT:    movq {{.*#+}} xmm1 = mem[0],zero188; X86-NEXT:    paddw %xmm0, %xmm1189; X86-NEXT:    movq %xmm1, (%eax)190; X86-NEXT:    retl $4191;192; X64-LABEL: add4i16:193; X64:       # %bb.0:194; X64-NEXT:    movq %rdi, %rax195; X64-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero196; X64-NEXT:    movq {{.*#+}} xmm1 = mem[0],zero197; X64-NEXT:    paddw %xmm0, %xmm1198; X64-NEXT:    movq %xmm1, (%rdi)199; X64-NEXT:    retq200	%a = load %i16vec4, ptr %ap, align 16201	%b = load %i16vec4, ptr %bp, align 16202	%x = add %i16vec4 %a, %b203	store %i16vec4 %x, ptr %ret, align 16204	ret void205}206 207%i16vec12 = type <12 x i16>208define void @add12i16(ptr nocapture sret(%i16vec12) %ret, ptr %ap, ptr %bp) nounwind {209; X86-LABEL: add12i16:210; X86:       # %bb.0:211; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax212; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx213; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx214; X86-NEXT:    movdqa (%edx), %xmm0215; X86-NEXT:    movdqa 16(%edx), %xmm1216; X86-NEXT:    paddw (%ecx), %xmm0217; X86-NEXT:    paddw 16(%ecx), %xmm1218; X86-NEXT:    movd %xmm1, 16(%eax)219; X86-NEXT:    pextrd $1, %xmm1, 20(%eax)220; X86-NEXT:    movdqa %xmm0, (%eax)221; X86-NEXT:    retl $4222;223; X64-LABEL: add12i16:224; X64:       # %bb.0:225; X64-NEXT:    movq %rdi, %rax226; X64-NEXT:    movdqa (%rsi), %xmm0227; X64-NEXT:    movdqa 16(%rsi), %xmm1228; X64-NEXT:    paddw (%rdx), %xmm0229; X64-NEXT:    paddw 16(%rdx), %xmm1230; X64-NEXT:    movq %xmm1, 16(%rdi)231; X64-NEXT:    movdqa %xmm0, (%rdi)232; X64-NEXT:    retq233	%a = load %i16vec12, ptr %ap, align 16234	%b = load %i16vec12, ptr %bp, align 16235	%x = add %i16vec12 %a, %b236	store %i16vec12 %x, ptr %ret, align 16237	ret void238}239 240%i16vec18 = type <18 x i16>241define void @add18i16(ptr nocapture sret(%i16vec18) %ret, ptr %ap, ptr %bp) nounwind {242; X86-LABEL: add18i16:243; X86:       # %bb.0:244; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax245; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx246; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx247; X86-NEXT:    movdqa 32(%edx), %xmm0248; X86-NEXT:    movdqa (%edx), %xmm1249; X86-NEXT:    movdqa 16(%edx), %xmm2250; X86-NEXT:    paddw (%ecx), %xmm1251; X86-NEXT:    paddw 32(%ecx), %xmm0252; X86-NEXT:    paddw 16(%ecx), %xmm2253; X86-NEXT:    movdqa %xmm2, 16(%eax)254; X86-NEXT:    movd %xmm0, 32(%eax)255; X86-NEXT:    movdqa %xmm1, (%eax)256; X86-NEXT:    retl $4257;258; X64-LABEL: add18i16:259; X64:       # %bb.0:260; X64-NEXT:    movq %rdi, %rax261; X64-NEXT:    movdqa (%rsi), %xmm0262; X64-NEXT:    movdqa 16(%rsi), %xmm1263; X64-NEXT:    movdqa 32(%rsi), %xmm2264; X64-NEXT:    paddw (%rdx), %xmm0265; X64-NEXT:    paddw 32(%rdx), %xmm2266; X64-NEXT:    paddw 16(%rdx), %xmm1267; X64-NEXT:    movdqa %xmm1, 16(%rdi)268; X64-NEXT:    movd %xmm2, 32(%rdi)269; X64-NEXT:    movdqa %xmm0, (%rdi)270; X64-NEXT:    retq271	%a = load %i16vec18, ptr %ap, align 16272	%b = load %i16vec18, ptr %bp, align 16273	%x = add %i16vec18 %a, %b274	store %i16vec18 %x, ptr %ret, align 16275	ret void276}277 278 279%i8vec3 = type <3 x i8>280define void @add3i8(ptr nocapture sret(%i8vec3) %ret, ptr %ap, ptr %bp) nounwind {281; X86-LABEL: add3i8:282; X86:       # %bb.0:283; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax284; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx285; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx286; X86-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero287; X86-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero288; X86-NEXT:    paddb %xmm0, %xmm1289; X86-NEXT:    pextrb $2, %xmm1, 2(%eax)290; X86-NEXT:    pextrw $0, %xmm1, (%eax)291; X86-NEXT:    retl $4292;293; X64-LABEL: add3i8:294; X64:       # %bb.0:295; X64-NEXT:    movq %rdi, %rax296; X64-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero297; X64-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero298; X64-NEXT:    paddb %xmm0, %xmm1299; X64-NEXT:    pextrb $2, %xmm1, 2(%rdi)300; X64-NEXT:    pextrw $0, %xmm1, (%rdi)301; X64-NEXT:    retq302	%a = load %i8vec3, ptr %ap, align 16303	%b = load %i8vec3, ptr %bp, align 16304	%x = add %i8vec3 %a, %b305	store %i8vec3 %x, ptr %ret, align 16306	ret void307}308 309%i8vec31 = type <31 x i8>310define void @add31i8(ptr nocapture sret(%i8vec31) %ret, ptr %ap, ptr %bp) nounwind {311; X86-LABEL: add31i8:312; X86:       # %bb.0:313; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax314; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx315; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx316; X86-NEXT:    movdqa (%edx), %xmm0317; X86-NEXT:    movdqa 16(%edx), %xmm1318; X86-NEXT:    paddb (%ecx), %xmm0319; X86-NEXT:    paddb 16(%ecx), %xmm1320; X86-NEXT:    movd %xmm1, 16(%eax)321; X86-NEXT:    pextrd $1, %xmm1, 20(%eax)322; X86-NEXT:    pextrd $2, %xmm1, 24(%eax)323; X86-NEXT:    pextrw $6, %xmm1, 28(%eax)324; X86-NEXT:    pextrb $14, %xmm1, 30(%eax)325; X86-NEXT:    movdqa %xmm0, (%eax)326; X86-NEXT:    retl $4327;328; X64-LABEL: add31i8:329; X64:       # %bb.0:330; X64-NEXT:    movq %rdi, %rax331; X64-NEXT:    movdqa (%rsi), %xmm0332; X64-NEXT:    movdqa 16(%rsi), %xmm1333; X64-NEXT:    paddb (%rdx), %xmm0334; X64-NEXT:    paddb 16(%rdx), %xmm1335; X64-NEXT:    movq %xmm1, 16(%rdi)336; X64-NEXT:    pextrd $2, %xmm1, 24(%rdi)337; X64-NEXT:    pextrw $6, %xmm1, 28(%rdi)338; X64-NEXT:    pextrb $14, %xmm1, 30(%rdi)339; X64-NEXT:    movdqa %xmm0, (%rdi)340; X64-NEXT:    retq341	%a = load %i8vec31, ptr %ap, align 16342	%b = load %i8vec31, ptr %bp, align 16343	%x = add %i8vec31 %a, %b344	store %i8vec31 %x, ptr %ret, align 16345	ret void346}347 348 349%i8vec3pack = type { <3 x i8>, i8 }350define void @rot(ptr nocapture sret(%i8vec3pack) %result, ptr %X, ptr %rot) nounwind {351; X86-LABEL: rot:352; X86:       # %bb.0: # %entry353; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax354; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx355; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx356; X86-NEXT:    movb $-98, 2(%edx)357; X86-NEXT:    movw $-24930, (%edx) # imm = 0x9E9E358; X86-NEXT:    movb $1, 2(%ecx)359; X86-NEXT:    movw $257, (%ecx) # imm = 0x101360; X86-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero361; X86-NEXT:    psrlw $1, %xmm0362; X86-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0363; X86-NEXT:    pextrb $2, %xmm0, 2(%eax)364; X86-NEXT:    pextrw $0, %xmm0, (%eax)365; X86-NEXT:    retl $4366;367; X64-LABEL: rot:368; X64:       # %bb.0: # %entry369; X64-NEXT:    movq %rdi, %rax370; X64-NEXT:    movb $-98, 2(%rsi)371; X64-NEXT:    movw $-24930, (%rsi) # imm = 0x9E9E372; X64-NEXT:    movb $1, 2(%rdx)373; X64-NEXT:    movw $257, (%rdx) # imm = 0x101374; X64-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero375; X64-NEXT:    psrlw $1, %xmm0376; X64-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0377; X64-NEXT:    pextrb $2, %xmm0, 2(%rdi)378; X64-NEXT:    pextrw $0, %xmm0, (%rdi)379; X64-NEXT:    retq380entry:381  store <3 x i8> <i8 -98, i8 -98, i8 -98>, ptr %X382  store <3 x i8> <i8 1, i8 1, i8 1>, ptr %rot383  %tmp = load %i8vec3pack, ptr %X384  %extractVec = extractvalue %i8vec3pack %tmp, 0385  %tmp2 = load %i8vec3pack, ptr %rot386  %extractVec3 = extractvalue %i8vec3pack %tmp2, 0387  %shr = lshr <3 x i8> %extractVec, %extractVec3388  store <3 x i8> %shr, ptr %result389  ret void390}391 392