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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=SSE --check-prefix=SSE23; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE414; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX7 8; Test multiplies of various narrow types.9 10define <2 x i8> @mul_v2i8(<2 x i8> %x, <2 x i8> %y) {11; SSE2-LABEL: mul_v2i8:12; SSE2: # %bb.0:13; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]14; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]15; SSE2-NEXT: pmullw %xmm1, %xmm016; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm017; SSE2-NEXT: packuswb %xmm0, %xmm018; SSE2-NEXT: retq19;20; SSE41-LABEL: mul_v2i8:21; SSE41: # %bb.0:22; SSE41-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero23; SSE41-NEXT: pmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero24; SSE41-NEXT: pmullw %xmm1, %xmm025; SSE41-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,u,u,u,u,u,u,u,u,u,u,u,u,u,u]26; SSE41-NEXT: retq27;28; AVX-LABEL: mul_v2i8:29; AVX: # %bb.0:30; AVX-NEXT: vpmovzxbw {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero31; AVX-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero32; AVX-NEXT: vpmullw %xmm1, %xmm0, %xmm033; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,u,u,u,u,u,u,u,u,u,u,u,u,u,u]34; AVX-NEXT: retq35 %res = mul <2 x i8> %x, %y36 ret <2 x i8> %res37}38 39define <4 x i8> @mul_v4i8(<4 x i8> %x, <4 x i8> %y) {40; SSE2-LABEL: mul_v4i8:41; SSE2: # %bb.0:42; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]43; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]44; SSE2-NEXT: pmullw %xmm1, %xmm045; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm046; SSE2-NEXT: packuswb %xmm0, %xmm047; SSE2-NEXT: retq48;49; SSE41-LABEL: mul_v4i8:50; SSE41: # %bb.0:51; SSE41-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero52; SSE41-NEXT: pmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero53; SSE41-NEXT: pmullw %xmm1, %xmm054; SSE41-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,u,u,u,u,u,u,u,u,u,u,u,u]55; SSE41-NEXT: retq56;57; AVX-LABEL: mul_v4i8:58; AVX: # %bb.0:59; AVX-NEXT: vpmovzxbw {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero60; AVX-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero61; AVX-NEXT: vpmullw %xmm1, %xmm0, %xmm062; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,u,u,u,u,u,u,u,u,u,u,u,u]63; AVX-NEXT: retq64 %res = mul <4 x i8> %x, %y65 ret <4 x i8> %res66}67 68define <8 x i8> @mul_v8i8(<8 x i8> %x, <8 x i8> %y) {69; SSE2-LABEL: mul_v8i8:70; SSE2: # %bb.0:71; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]72; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]73; SSE2-NEXT: pmullw %xmm1, %xmm074; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm075; SSE2-NEXT: packuswb %xmm0, %xmm076; SSE2-NEXT: retq77;78; SSE41-LABEL: mul_v8i8:79; SSE41: # %bb.0:80; SSE41-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero81; SSE41-NEXT: pmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero82; SSE41-NEXT: pmullw %xmm1, %xmm083; SSE41-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]84; SSE41-NEXT: retq85;86; AVX-LABEL: mul_v8i8:87; AVX: # %bb.0:88; AVX-NEXT: vpmovzxbw {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero89; AVX-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero90; AVX-NEXT: vpmullw %xmm1, %xmm0, %xmm091; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]92; AVX-NEXT: retq93 %res = mul <8 x i8> %x, %y94 ret <8 x i8> %res95}96 97define <2 x i16> @mul_v2i16(<2 x i16> %x, <2 x i16> %y) {98; SSE-LABEL: mul_v2i16:99; SSE: # %bb.0:100; SSE-NEXT: pmullw %xmm1, %xmm0101; SSE-NEXT: retq102;103; AVX-LABEL: mul_v2i16:104; AVX: # %bb.0:105; AVX-NEXT: vpmullw %xmm1, %xmm0, %xmm0106; AVX-NEXT: retq107 %res = mul <2 x i16> %x, %y108 ret <2 x i16> %res109}110 111define <4 x i16> @mul_v4i16(<4 x i16> %x, <4 x i16> %y) {112; SSE-LABEL: mul_v4i16:113; SSE: # %bb.0:114; SSE-NEXT: pmullw %xmm1, %xmm0115; SSE-NEXT: retq116;117; AVX-LABEL: mul_v4i16:118; AVX: # %bb.0:119; AVX-NEXT: vpmullw %xmm1, %xmm0, %xmm0120; AVX-NEXT: retq121 %res = mul <4 x i16> %x, %y122 ret <4 x i16> %res123}124 125define <2 x i32> @mul_v2i32(<2 x i32> %x, <2 x i32> %y) {126; SSE2-LABEL: mul_v2i32:127; SSE2: # %bb.0:128; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]129; SSE2-NEXT: pmuludq %xmm1, %xmm0130; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]131; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]132; SSE2-NEXT: pmuludq %xmm2, %xmm1133; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]134; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]135; SSE2-NEXT: retq136;137; SSE41-LABEL: mul_v2i32:138; SSE41: # %bb.0:139; SSE41-NEXT: pmulld %xmm1, %xmm0140; SSE41-NEXT: retq141;142; AVX-LABEL: mul_v2i32:143; AVX: # %bb.0:144; AVX-NEXT: vpmulld %xmm1, %xmm0, %xmm0145; AVX-NEXT: retq146 %res = mul <2 x i32> %x, %y147 ret <2 x i32> %res148}149