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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s -check-prefix=SSE3; RUN: llc < %s -mtriple=x86_64-linux-gnux32 -mattr=-sse | FileCheck %s -check-prefix=NOSSE4; RUN: llc < %s -mtriple=i386-linux-gnux32 | FileCheck %s -check-prefix=X32BITABI5; RUN: llc < %s -mtriple=i686-linux-gnux32 | FileCheck %s -check-prefix=X32BITABI6;7; Verifies that x32 va_start lowering is sane. To regenerate this test, use8; cat <<EOF |9; #include <stdarg.h>10;11; int foo(float a, const char* fmt, ...) {12; va_list ap;13; va_start(ap, fmt);14; int value = va_arg(ap, int);15; va_end(ap);16; return value;17; }18; EOF19; build/bin/clang -mx32 -O3 -o- -S -emit-llvm -xc -20;21target datalayout = "e-m:e-p:32:32-i64:64-f80:128-n8:16:32:64-S128"22target triple = "x86_64-unknown-linux-gnux32"23 24%struct.__va_list_tag = type { i32, i32, ptr, ptr }25 26define i32 @foo(float %a, ptr nocapture readnone %fmt, ...) nounwind {27; SSE-LABEL: foo:28; SSE: # %bb.0: # %entry29; SSE-NEXT: subl $72, %esp30; SSE-NEXT: movq %rsi, -{{[0-9]+}}(%esp)31; SSE-NEXT: movq %rdx, -{{[0-9]+}}(%esp)32; SSE-NEXT: movq %rcx, -{{[0-9]+}}(%esp)33; SSE-NEXT: movq %r8, -{{[0-9]+}}(%esp)34; SSE-NEXT: movq %r9, -{{[0-9]+}}(%esp)35; SSE-NEXT: testb %al, %al36; SSE-NEXT: je .LBB0_537; SSE-NEXT: # %bb.4: # %entry38; SSE-NEXT: movaps %xmm1, -{{[0-9]+}}(%esp)39; SSE-NEXT: movaps %xmm2, -{{[0-9]+}}(%esp)40; SSE-NEXT: movaps %xmm3, -{{[0-9]+}}(%esp)41; SSE-NEXT: movaps %xmm4, (%esp)42; SSE-NEXT: movaps %xmm5, {{[0-9]+}}(%esp)43; SSE-NEXT: movaps %xmm6, {{[0-9]+}}(%esp)44; SSE-NEXT: movaps %xmm7, {{[0-9]+}}(%esp)45; SSE-NEXT: .LBB0_5: # %entry46; SSE-NEXT: leal -{{[0-9]+}}(%rsp), %eax47; SSE-NEXT: movl %eax, -{{[0-9]+}}(%esp)48; SSE-NEXT: leal {{[0-9]+}}(%rsp), %eax49; SSE-NEXT: movl %eax, -{{[0-9]+}}(%esp)50; SSE-NEXT: movabsq $274877906952, %rax # imm = 0x400000000851; SSE-NEXT: movq %rax, -{{[0-9]+}}(%esp)52; SSE-NEXT: movl $8, %ecx53; SSE-NEXT: cmpl $40, %ecx54; SSE-NEXT: ja .LBB0_255; SSE-NEXT: # %bb.1: # %vaarg.in_reg56; SSE-NEXT: movl -{{[0-9]+}}(%esp), %eax57; SSE-NEXT: addl %ecx, %eax58; SSE-NEXT: addl $8, %ecx59; SSE-NEXT: movl %ecx, -{{[0-9]+}}(%esp)60; SSE-NEXT: jmp .LBB0_361; SSE-NEXT: .LBB0_2: # %vaarg.in_mem62; SSE-NEXT: movl -{{[0-9]+}}(%esp), %eax63; SSE-NEXT: leal 8(%rax), %ecx64; SSE-NEXT: movl %ecx, -{{[0-9]+}}(%esp)65; SSE-NEXT: .LBB0_3: # %vaarg.end66; SSE-NEXT: movl (%eax), %eax67; SSE-NEXT: addl $72, %esp68; SSE-NEXT: retq69;70; NOSSE-LABEL: foo:71; NOSSE: # %bb.0: # %entry72; NOSSE-NEXT: movq %rsi, -{{[0-9]+}}(%esp)73; NOSSE-NEXT: movq %rdx, -{{[0-9]+}}(%esp)74; NOSSE-NEXT: movq %rcx, -{{[0-9]+}}(%esp)75; NOSSE-NEXT: movq %r8, -{{[0-9]+}}(%esp)76; NOSSE-NEXT: movq %r9, -{{[0-9]+}}(%esp)77; NOSSE-NEXT: leal -{{[0-9]+}}(%rsp), %eax78; NOSSE-NEXT: movl %eax, -{{[0-9]+}}(%esp)79; NOSSE-NEXT: leal {{[0-9]+}}(%rsp), %eax80; NOSSE-NEXT: movl %eax, -{{[0-9]+}}(%esp)81; NOSSE-NEXT: movabsq $206158430216, %rax # imm = 0x300000000882; NOSSE-NEXT: movq %rax, -{{[0-9]+}}(%esp)83; NOSSE-NEXT: movl $8, %ecx84; NOSSE-NEXT: cmpl $40, %ecx85; NOSSE-NEXT: ja .LBB0_286; NOSSE-NEXT: # %bb.1: # %vaarg.in_reg87; NOSSE-NEXT: movl -{{[0-9]+}}(%esp), %eax88; NOSSE-NEXT: addl %ecx, %eax89; NOSSE-NEXT: addl $8, %ecx90; NOSSE-NEXT: movl %ecx, -{{[0-9]+}}(%esp)91; NOSSE-NEXT: movl (%eax), %eax92; NOSSE-NEXT: retq93; NOSSE-NEXT: .LBB0_2: # %vaarg.in_mem94; NOSSE-NEXT: movl -{{[0-9]+}}(%esp), %eax95; NOSSE-NEXT: leal 8(%rax), %ecx96; NOSSE-NEXT: movl %ecx, -{{[0-9]+}}(%esp)97; NOSSE-NEXT: movl (%eax), %eax98; NOSSE-NEXT: retq99;100; X32BITABI-LABEL: foo:101; X32BITABI: # %bb.0: # %entry102; X32BITABI-NEXT: subl $28, %esp103; X32BITABI-NEXT: leal {{[0-9]+}}(%esp), %ecx104; X32BITABI-NEXT: movl %ecx, (%esp)105; X32BITABI-NEXT: cmpl $40, %ecx106; X32BITABI-NEXT: ja .LBB0_2107; X32BITABI-NEXT: # %bb.1: # %vaarg.in_reg108; X32BITABI-NEXT: movl {{[0-9]+}}(%esp), %eax109; X32BITABI-NEXT: addl %ecx, %eax110; X32BITABI-NEXT: addl $8, %ecx111; X32BITABI-NEXT: movl %ecx, (%esp)112; X32BITABI-NEXT: jmp .LBB0_3113; X32BITABI-NEXT: .LBB0_2: # %vaarg.in_mem114; X32BITABI-NEXT: movl {{[0-9]+}}(%esp), %eax115; X32BITABI-NEXT: leal 8(%eax), %ecx116; X32BITABI-NEXT: movl %ecx, {{[0-9]+}}(%esp)117; X32BITABI-NEXT: .LBB0_3: # %vaarg.end118; X32BITABI-NEXT: movl (%eax), %eax119; X32BITABI-NEXT: addl $28, %esp120; X32BITABI-NEXT: retl121entry:122 %ap = alloca [1 x %struct.__va_list_tag], align 16123 call void @llvm.lifetime.start.p0(i64 16, ptr %ap) #2124 call void @llvm.va_start(ptr %ap)125 %gp_offset = load i32, ptr %ap, align 16126 %fits_in_gp = icmp ult i32 %gp_offset, 41127 br i1 %fits_in_gp, label %vaarg.in_reg, label %vaarg.in_mem128 129vaarg.in_reg: ; preds = %entry130 %0 = getelementptr inbounds [1 x %struct.__va_list_tag], ptr %ap, i32 0, i32 0, i32 3131 %reg_save_area = load ptr, ptr %0, align 4132 %1 = getelementptr i8, ptr %reg_save_area, i32 %gp_offset133 %2 = add i32 %gp_offset, 8134 store i32 %2, ptr %ap, align 16135 br label %vaarg.end136vaarg.in_mem: ; preds = %entry137 %overflow_arg_area_p = getelementptr inbounds [1 x %struct.__va_list_tag], ptr %ap, i32 0, i32 0, i32 2138 %overflow_arg_area = load ptr, ptr %overflow_arg_area_p, align 8139 %overflow_arg_area.next = getelementptr i8, ptr %overflow_arg_area, i32 8140 store ptr %overflow_arg_area.next, ptr %overflow_arg_area_p, align 8141 br label %vaarg.end142 143vaarg.end: ; preds = %vaarg.in_mem, %vaarg.in_reg144 %vaarg.addr.in = phi ptr [ %1, %vaarg.in_reg ], [ %overflow_arg_area, %vaarg.in_mem ]145 %3 = load i32, ptr %vaarg.addr.in, align 4146 call void @llvm.va_end(ptr %ap)147 call void @llvm.lifetime.end.p0(i64 16, ptr %ap) #2148 ret i32 %3149}150 151; Function Attrs: nounwind argmemonly152declare void @llvm.lifetime.start.p0(i64, ptr nocapture) nounwind153 154; Function Attrs: nounwind155declare void @llvm.va_start(ptr) nounwind156 157; Function Attrs: nounwind158declare void @llvm.va_end(ptr) nounwind159 160; Function Attrs: nounwind argmemonly161declare void @llvm.lifetime.end.p0(i64, ptr nocapture) nounwind162 163