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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=x86_64-pc-linux -mattr=mmx < %s | FileCheck %s3 4; MMX packed sub opcodes were wrongly marked as commutative.5; This test checks that the operands of packed sub instructions are6; never interchanged by the "Two-Address instruction pass".7 8declare { i64, double } @getFirstParam()9declare { i64, double } @getSecondParam()10 11define i64 @test_psubb() {12; CHECK-LABEL: test_psubb:13; CHECK: # %bb.0: # %entry14; CHECK-NEXT: pushq %rbx15; CHECK-NEXT: .cfi_def_cfa_offset 1616; CHECK-NEXT: .cfi_offset %rbx, -1617; CHECK-NEXT: callq getFirstParam@PLT18; CHECK-NEXT: movq %rax, %rbx19; CHECK-NEXT: callq getSecondParam@PLT20; CHECK-NEXT: movq %rbx, %mm021; CHECK-NEXT: movq %rax, %mm122; CHECK-NEXT: psubb %mm1, %mm023; CHECK-NEXT: movq %mm0, %rax24; CHECK-NEXT: popq %rbx25; CHECK-NEXT: .cfi_def_cfa_offset 826; CHECK-NEXT: retq27entry:28 %call = tail call { i64, double } @getFirstParam()29 %0 = extractvalue { i64, double } %call, 030 %call2 = tail call { i64, double } @getSecondParam()31 %1 = extractvalue { i64, double } %call2, 032 %__m1.0.insert.i = insertelement <1 x i64> undef, i64 %0, i32 033 %__m2.0.insert.i = insertelement <1 x i64> undef, i64 %1, i32 034 %2 = bitcast <1 x i64> %__m1.0.insert.i to <8 x i8>35 %3 = bitcast <8 x i8> %2 to <1 x i64>36 %4 = bitcast <1 x i64> %__m2.0.insert.i to <8 x i8>37 %5 = bitcast <8 x i8> %4 to <1 x i64>38 %6 = tail call <1 x i64> @llvm.x86.mmx.psub.b(<1 x i64> %3, <1 x i64> %5) nounwind39 %7 = bitcast <1 x i64> %6 to <8 x i8>40 %8 = bitcast <8 x i8> %7 to <1 x i64>41 %retval.0.extract.i15 = extractelement <1 x i64> %8, i32 042 ret i64 %retval.0.extract.i1543}44 45define i64 @test_psubw() {46; CHECK-LABEL: test_psubw:47; CHECK: # %bb.0: # %entry48; CHECK-NEXT: pushq %rbx49; CHECK-NEXT: .cfi_def_cfa_offset 1650; CHECK-NEXT: .cfi_offset %rbx, -1651; CHECK-NEXT: callq getFirstParam@PLT52; CHECK-NEXT: movq %rax, %rbx53; CHECK-NEXT: callq getSecondParam@PLT54; CHECK-NEXT: movq %rbx, %mm055; CHECK-NEXT: movq %rax, %mm156; CHECK-NEXT: psubw %mm1, %mm057; CHECK-NEXT: movq %mm0, %rax58; CHECK-NEXT: popq %rbx59; CHECK-NEXT: .cfi_def_cfa_offset 860; CHECK-NEXT: retq61entry:62 %call = tail call { i64, double } @getFirstParam()63 %0 = extractvalue { i64, double } %call, 064 %call2 = tail call { i64, double } @getSecondParam()65 %1 = extractvalue { i64, double } %call2, 066 %__m1.0.insert.i = insertelement <1 x i64> undef, i64 %0, i32 067 %__m2.0.insert.i = insertelement <1 x i64> undef, i64 %1, i32 068 %2 = bitcast <1 x i64> %__m1.0.insert.i to <4 x i16>69 %3 = bitcast <4 x i16> %2 to <1 x i64>70 %4 = bitcast <1 x i64> %__m2.0.insert.i to <4 x i16>71 %5 = bitcast <4 x i16> %4 to <1 x i64>72 %6 = tail call <1 x i64> @llvm.x86.mmx.psub.w(<1 x i64> %3, <1 x i64> %5) nounwind73 %7 = bitcast <1 x i64> %6 to <4 x i16>74 %8 = bitcast <4 x i16> %7 to <1 x i64>75 %retval.0.extract.i15 = extractelement <1 x i64> %8, i32 076 ret i64 %retval.0.extract.i1577}78 79define i64 @test_psubd() {80; CHECK-LABEL: test_psubd:81; CHECK: # %bb.0: # %entry82; CHECK-NEXT: pushq %rbx83; CHECK-NEXT: .cfi_def_cfa_offset 1684; CHECK-NEXT: .cfi_offset %rbx, -1685; CHECK-NEXT: callq getFirstParam@PLT86; CHECK-NEXT: movq %rax, %rbx87; CHECK-NEXT: callq getSecondParam@PLT88; CHECK-NEXT: movq %rbx, %mm089; CHECK-NEXT: movq %rax, %mm190; CHECK-NEXT: psubd %mm1, %mm091; CHECK-NEXT: movq %mm0, %rax92; CHECK-NEXT: popq %rbx93; CHECK-NEXT: .cfi_def_cfa_offset 894; CHECK-NEXT: retq95entry:96 %call = tail call { i64, double } @getFirstParam()97 %0 = extractvalue { i64, double } %call, 098 %call2 = tail call { i64, double } @getSecondParam()99 %1 = extractvalue { i64, double } %call2, 0100 %__m1.0.insert.i = insertelement <1 x i64> undef, i64 %0, i32 0101 %__m2.0.insert.i = insertelement <1 x i64> undef, i64 %1, i32 0102 %2 = bitcast <1 x i64> %__m1.0.insert.i to <2 x i32>103 %3 = bitcast <2 x i32> %2 to <1 x i64>104 %4 = bitcast <1 x i64> %__m2.0.insert.i to <2 x i32>105 %5 = bitcast <2 x i32> %4 to <1 x i64>106 %6 = tail call <1 x i64> @llvm.x86.mmx.psub.d(<1 x i64> %3, <1 x i64> %5) nounwind107 %7 = bitcast <1 x i64> %6 to <2 x i32>108 %8 = bitcast <2 x i32> %7 to <1 x i64>109 %retval.0.extract.i15 = extractelement <1 x i64> %8, i32 0110 ret i64 %retval.0.extract.i15111}112 113define i64 @test_psubsb() {114; CHECK-LABEL: test_psubsb:115; CHECK: # %bb.0: # %entry116; CHECK-NEXT: pushq %rbx117; CHECK-NEXT: .cfi_def_cfa_offset 16118; CHECK-NEXT: .cfi_offset %rbx, -16119; CHECK-NEXT: callq getFirstParam@PLT120; CHECK-NEXT: movq %rax, %rbx121; CHECK-NEXT: callq getSecondParam@PLT122; CHECK-NEXT: movq %rbx, %mm0123; CHECK-NEXT: movq %rax, %mm1124; CHECK-NEXT: psubsb %mm1, %mm0125; CHECK-NEXT: movq %mm0, %rax126; CHECK-NEXT: popq %rbx127; CHECK-NEXT: .cfi_def_cfa_offset 8128; CHECK-NEXT: retq129entry:130 %call = tail call { i64, double } @getFirstParam()131 %0 = extractvalue { i64, double } %call, 0132 %call2 = tail call { i64, double } @getSecondParam()133 %1 = extractvalue { i64, double } %call2, 0134 %__m1.0.insert.i = insertelement <1 x i64> undef, i64 %0, i32 0135 %__m2.0.insert.i = insertelement <1 x i64> undef, i64 %1, i32 0136 %2 = bitcast <1 x i64> %__m1.0.insert.i to <8 x i8>137 %3 = bitcast <8 x i8> %2 to <1 x i64>138 %4 = bitcast <1 x i64> %__m2.0.insert.i to <8 x i8>139 %5 = bitcast <8 x i8> %4 to <1 x i64>140 %6 = tail call <1 x i64> @llvm.x86.mmx.psubs.b(<1 x i64> %3, <1 x i64> %5) nounwind141 %7 = bitcast <1 x i64> %6 to <8 x i8>142 %8 = bitcast <8 x i8> %7 to <1 x i64>143 %retval.0.extract.i15 = extractelement <1 x i64> %8, i32 0144 ret i64 %retval.0.extract.i15145}146 147define i64 @test_psubswv() {148; CHECK-LABEL: test_psubswv:149; CHECK: # %bb.0: # %entry150; CHECK-NEXT: pushq %rbx151; CHECK-NEXT: .cfi_def_cfa_offset 16152; CHECK-NEXT: .cfi_offset %rbx, -16153; CHECK-NEXT: callq getFirstParam@PLT154; CHECK-NEXT: movq %rax, %rbx155; CHECK-NEXT: callq getSecondParam@PLT156; CHECK-NEXT: movq %rbx, %mm0157; CHECK-NEXT: movq %rax, %mm1158; CHECK-NEXT: psubsw %mm1, %mm0159; CHECK-NEXT: movq %mm0, %rax160; CHECK-NEXT: popq %rbx161; CHECK-NEXT: .cfi_def_cfa_offset 8162; CHECK-NEXT: retq163entry:164 %call = tail call { i64, double } @getFirstParam()165 %0 = extractvalue { i64, double } %call, 0166 %call2 = tail call { i64, double } @getSecondParam()167 %1 = extractvalue { i64, double } %call2, 0168 %__m1.0.insert.i = insertelement <1 x i64> undef, i64 %0, i32 0169 %__m2.0.insert.i = insertelement <1 x i64> undef, i64 %1, i32 0170 %2 = bitcast <1 x i64> %__m1.0.insert.i to <4 x i16>171 %3 = bitcast <4 x i16> %2 to <1 x i64>172 %4 = bitcast <1 x i64> %__m2.0.insert.i to <4 x i16>173 %5 = bitcast <4 x i16> %4 to <1 x i64>174 %6 = tail call <1 x i64> @llvm.x86.mmx.psubs.w(<1 x i64> %3, <1 x i64> %5) nounwind175 %7 = bitcast <1 x i64> %6 to <4 x i16>176 %8 = bitcast <4 x i16> %7 to <1 x i64>177 %retval.0.extract.i15 = extractelement <1 x i64> %8, i32 0178 ret i64 %retval.0.extract.i15179}180 181define i64 @test_psubusbv() {182; CHECK-LABEL: test_psubusbv:183; CHECK: # %bb.0: # %entry184; CHECK-NEXT: pushq %rbx185; CHECK-NEXT: .cfi_def_cfa_offset 16186; CHECK-NEXT: .cfi_offset %rbx, -16187; CHECK-NEXT: callq getFirstParam@PLT188; CHECK-NEXT: movq %rax, %rbx189; CHECK-NEXT: callq getSecondParam@PLT190; CHECK-NEXT: movq %rbx, %mm0191; CHECK-NEXT: movq %rax, %mm1192; CHECK-NEXT: psubusb %mm1, %mm0193; CHECK-NEXT: movq %mm0, %rax194; CHECK-NEXT: popq %rbx195; CHECK-NEXT: .cfi_def_cfa_offset 8196; CHECK-NEXT: retq197entry:198 %call = tail call { i64, double } @getFirstParam()199 %0 = extractvalue { i64, double } %call, 0200 %call2 = tail call { i64, double } @getSecondParam()201 %1 = extractvalue { i64, double } %call2, 0202 %__m1.0.insert.i = insertelement <1 x i64> undef, i64 %0, i32 0203 %__m2.0.insert.i = insertelement <1 x i64> undef, i64 %1, i32 0204 %2 = bitcast <1 x i64> %__m1.0.insert.i to <8 x i8>205 %3 = bitcast <8 x i8> %2 to <1 x i64>206 %4 = bitcast <1 x i64> %__m2.0.insert.i to <8 x i8>207 %5 = bitcast <8 x i8> %4 to <1 x i64>208 %6 = tail call <1 x i64> @llvm.x86.mmx.psubus.b(<1 x i64> %3, <1 x i64> %5) nounwind209 %7 = bitcast <1 x i64> %6 to <8 x i8>210 %8 = bitcast <8 x i8> %7 to <1 x i64>211 %retval.0.extract.i15 = extractelement <1 x i64> %8, i32 0212 ret i64 %retval.0.extract.i15213}214 215define i64 @test_psubuswv() {216; CHECK-LABEL: test_psubuswv:217; CHECK: # %bb.0: # %entry218; CHECK-NEXT: pushq %rbx219; CHECK-NEXT: .cfi_def_cfa_offset 16220; CHECK-NEXT: .cfi_offset %rbx, -16221; CHECK-NEXT: callq getFirstParam@PLT222; CHECK-NEXT: movq %rax, %rbx223; CHECK-NEXT: callq getSecondParam@PLT224; CHECK-NEXT: movq %rbx, %mm0225; CHECK-NEXT: movq %rax, %mm1226; CHECK-NEXT: psubusw %mm1, %mm0227; CHECK-NEXT: movq %mm0, %rax228; CHECK-NEXT: popq %rbx229; CHECK-NEXT: .cfi_def_cfa_offset 8230; CHECK-NEXT: retq231entry:232 %call = tail call { i64, double } @getFirstParam()233 %0 = extractvalue { i64, double } %call, 0234 %call2 = tail call { i64, double } @getSecondParam()235 %1 = extractvalue { i64, double } %call2, 0236 %__m1.0.insert.i = insertelement <1 x i64> undef, i64 %0, i32 0237 %__m2.0.insert.i = insertelement <1 x i64> undef, i64 %1, i32 0238 %2 = bitcast <1 x i64> %__m1.0.insert.i to <4 x i16>239 %3 = bitcast <4 x i16> %2 to <1 x i64>240 %4 = bitcast <1 x i64> %__m2.0.insert.i to <4 x i16>241 %5 = bitcast <4 x i16> %4 to <1 x i64>242 %6 = tail call <1 x i64> @llvm.x86.mmx.psubus.w(<1 x i64> %3, <1 x i64> %5) nounwind243 %7 = bitcast <1 x i64> %6 to <4 x i16>244 %8 = bitcast <4 x i16> %7 to <1 x i64>245 %retval.0.extract.i15 = extractelement <1 x i64> %8, i32 0246 ret i64 %retval.0.extract.i15247}248 249declare <1 x i64> @llvm.x86.mmx.psubus.w(<1 x i64>, <1 x i64>) nounwind readnone250 251declare <1 x i64> @llvm.x86.mmx.psubus.b(<1 x i64>, <1 x i64>) nounwind readnone252 253declare <1 x i64> @llvm.x86.mmx.psubs.w(<1 x i64>, <1 x i64>) nounwind readnone254 255declare <1 x i64> @llvm.x86.mmx.psubs.b(<1 x i64>, <1 x i64>) nounwind readnone256 257declare <1 x i64> @llvm.x86.mmx.psub.d(<1 x i64>, <1 x i64>) nounwind readnone258 259declare <1 x i64> @llvm.x86.mmx.psub.w(<1 x i64>, <1 x i64>) nounwind readnone260 261declare <1 x i64> @llvm.x86.mmx.psub.b(<1 x i64>, <1 x i64>) nounwind readnone262