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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=x86_64-- -mattr=+x87 -mattr=-sse -run-pass none -o - %s | FileCheck %s3# This test ensures that the MIR parser parses the x87 fpsw and fpcw regs4 5--- |6 declare float @llvm.sqrt.f32(float)7 8 define void @f1(ptr %a, ptr %b) {9 %1 = load float, ptr %a, align 410 %2 = load float, ptr %b, align 411 %sub = fsub float %1, %212 store float %sub, ptr %a, align 413 ret void14 }15 16 define void @f2(ptr %a, ptr %b) {17 %1 = load double, ptr %a, align 818 %2 = load double, ptr %b, align 819 %add = fadd double %1, %220 store double %add, ptr %a, align 821 ret void22 }23 24 define void @f3(ptr %a, ptr %b) {25 %1 = load x86_fp80, ptr %a, align 1626 %2 = load x86_fp80, ptr %b, align 1627 %mul = fmul x86_fp80 %1, %228 store x86_fp80 %mul, ptr %a, align 1629 ret void30 }31 32 define void @f4(ptr %a, ptr %b) {33 %1 = load float, ptr %a, align 434 %2 = load float, ptr %b, align 435 %div = fdiv float %1, %236 store float %div, ptr %a, align 437 ret void38 }39 40 define void @f5(ptr %val, ptr %ret) {41 %1 = load float, ptr %val, align 442 %res = fpext float %1 to double43 store double %res, ptr %ret, align 844 ret void45 }46 47 define void @f6(ptr %val, ptr %ret) {48 %1 = load double, ptr %val, align 849 %res = fptrunc double %1 to float50 store float %res, ptr %ret, align 451 ret void52 }53 54 define void @f7(ptr %a) {55 %1 = load float, ptr %a, align 456 %res = call float @llvm.sqrt.f32(float %1)57 store float %res, ptr %a, align 458 ret void59 }60 61 62 63...64---65name: f166alignment: 1667tracksRegLiveness: true68liveins:69 - { reg: '$rdi' }70 - { reg: '$rsi' }71frameInfo:72 maxAlignment: 173machineFunctionInfo: {}74body: |75 bb.0 (%ir-block.0):76 liveins: $rdi, $rsi77 78 ; CHECK-LABEL: name: f179 ; CHECK: liveins: $rdi, $rsi80 ; CHECK: renamable $fp0 = LD_Fp32m renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s32) from %ir.a)81 ; CHECK: renamable $fp0 = SUB_Fp32m killed renamable $fp0, killed renamable $rsi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s32) from %ir.b)82 ; CHECK: ST_Fp32m killed renamable $rdi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store (s32) into %ir.a)83 ; CHECK: RET 084 renamable $fp0 = LD_Fp32m renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s32) from %ir.a)85 renamable $fp0 = SUB_Fp32m killed renamable $fp0, killed renamable $rsi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s32) from %ir.b)86 ST_Fp32m killed renamable $rdi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store (s32) into %ir.a)87 RET 088 89...90---91name: f292alignment: 1693tracksRegLiveness: true94liveins:95 - { reg: '$rdi' }96 - { reg: '$rsi' }97frameInfo:98 maxAlignment: 199machineFunctionInfo: {}100body: |101 bb.0 (%ir-block.0):102 liveins: $rdi, $rsi103 104 ; CHECK-LABEL: name: f2105 ; CHECK: liveins: $rdi, $rsi106 ; CHECK: renamable $fp0 = LD_Fp64m renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s64) from %ir.a)107 ; CHECK: renamable $fp0 = ADD_Fp64m killed renamable $fp0, killed renamable $rsi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s64) from %ir.b)108 ; CHECK: ST_Fp64m killed renamable $rdi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store (s64) into %ir.a)109 ; CHECK: RET 0110 renamable $fp0 = LD_Fp64m renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s64) from %ir.a)111 renamable $fp0 = ADD_Fp64m killed renamable $fp0, killed renamable $rsi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s64) from %ir.b)112 ST_Fp64m killed renamable $rdi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store (s64) into %ir.a)113 RET 0114 115...116---117name: f3118alignment: 16119tracksRegLiveness: true120liveins:121 - { reg: '$rdi' }122 - { reg: '$rsi' }123frameInfo:124 maxAlignment: 1125machineFunctionInfo: {}126body: |127 bb.0 (%ir-block.0):128 liveins: $rdi, $rsi129 130 ; CHECK-LABEL: name: f3131 ; CHECK: liveins: $rdi, $rsi132 ; CHECK: renamable $fp0 = LD_Fp80m renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s80) from %ir.a, align 16)133 ; CHECK: renamable $fp1 = LD_Fp80m killed renamable $rsi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s80) from %ir.b, align 16)134 ; CHECK: renamable $fp0 = MUL_Fp80 killed renamable $fp0, killed renamable $fp1, implicit-def dead $fpsw, implicit $fpcw135 ; CHECK: ST_FpP80m killed renamable $rdi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store (s80) into %ir.a, align 16)136 ; CHECK: RET 0137 renamable $fp0 = LD_Fp80m renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s80) from %ir.a, align 16)138 renamable $fp1 = LD_Fp80m killed renamable $rsi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s80) from %ir.b, align 16)139 renamable $fp0 = MUL_Fp80 killed renamable $fp0, killed renamable $fp1, implicit-def dead $fpsw, implicit $fpcw140 ST_FpP80m killed renamable $rdi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store (s80) into %ir.a, align 16)141 RET 0142 143...144---145name: f4146alignment: 16147tracksRegLiveness: true148liveins:149 - { reg: '$rdi' }150 - { reg: '$rsi' }151frameInfo:152 maxAlignment: 1153machineFunctionInfo: {}154body: |155 bb.0 (%ir-block.0):156 liveins: $rdi, $rsi157 158 ; CHECK-LABEL: name: f4159 ; CHECK: liveins: $rdi, $rsi160 ; CHECK: renamable $fp0 = LD_Fp32m renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s32) from %ir.a)161 ; CHECK: renamable $fp0 = DIV_Fp32m killed renamable $fp0, killed renamable $rsi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s32) from %ir.b)162 ; CHECK: ST_Fp32m killed renamable $rdi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store (s32) into %ir.a)163 ; CHECK: RET 0164 renamable $fp0 = LD_Fp32m renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s32) from %ir.a)165 renamable $fp0 = DIV_Fp32m killed renamable $fp0, killed renamable $rsi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s32) from %ir.b)166 ST_Fp32m killed renamable $rdi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store (s32) into %ir.a)167 RET 0168 169...170---171name: f5172alignment: 16173tracksRegLiveness: true174liveins:175 - { reg: '$rdi' }176 - { reg: '$rsi' }177frameInfo:178 maxAlignment: 1179machineFunctionInfo: {}180body: |181 bb.0 (%ir-block.0):182 liveins: $rdi, $rsi183 184 ; CHECK-LABEL: name: f5185 ; CHECK: liveins: $rdi, $rsi186 ; CHECK: renamable $fp0 = LD_Fp32m64 killed renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s32) from %ir.val)187 ; CHECK: ST_Fp64m killed renamable $rsi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store (s64) into %ir.ret)188 ; CHECK: RET 0189 renamable $fp0 = LD_Fp32m64 killed renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s32) from %ir.val)190 ST_Fp64m killed renamable $rsi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store (s64) into %ir.ret)191 RET 0192 193...194---195name: f6196alignment: 16197tracksRegLiveness: true198liveins:199 - { reg: '$rdi' }200 - { reg: '$rsi' }201frameInfo:202 maxAlignment: 4203stack:204 - { id: 0, size: 4, alignment: 4 }205machineFunctionInfo: {}206body: |207 bb.0 (%ir-block.0):208 liveins: $rdi, $rsi209 210 ; CHECK-LABEL: name: f6211 ; CHECK: liveins: $rdi, $rsi212 ; CHECK: renamable $fp0 = LD_Fp64m killed renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s64) from %ir.val)213 ; CHECK: ST_Fp64m32 %stack.0, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store (s32) into %stack.0)214 ; CHECK: renamable $fp0 = LD_Fp32m %stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s32) from %stack.0)215 ; CHECK: ST_Fp32m killed renamable $rsi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store (s32) into %ir.ret)216 ; CHECK: RET 0217 renamable $fp0 = LD_Fp64m killed renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s64) from %ir.val)218 ST_Fp64m32 %stack.0, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store (s32) into %stack.0)219 renamable $fp0 = LD_Fp32m %stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s32) from %stack.0)220 ST_Fp32m killed renamable $rsi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store (s32) into %ir.ret)221 RET 0222 223...224---225name: f7226alignment: 16227tracksRegLiveness: true228liveins:229 - { reg: '$rdi' }230frameInfo:231 maxAlignment: 1232machineFunctionInfo: {}233body: |234 bb.0 (%ir-block.0):235 liveins: $rdi236 237 ; CHECK-LABEL: name: f7238 ; CHECK: liveins: $rdi239 ; CHECK: renamable $fp0 = LD_Fp32m renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s32) from %ir.a)240 ; CHECK: renamable $fp0 = SQRT_Fp32 killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw241 ; CHECK: ST_Fp32m killed renamable $rdi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store (s32) into %ir.a)242 ; CHECK: RET 0243 renamable $fp0 = LD_Fp32m renamable $rdi, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s32) from %ir.a)244 renamable $fp0 = SQRT_Fp32 killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw245 ST_Fp32m killed renamable $rdi, 1, $noreg, 0, $noreg, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw :: (store (s32) into %ir.a)246 RET 0247 248...249