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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -fast-isel -mtriple=i686-unknown-unknown -mattr=+avx,+fma4,+xop | FileCheck %s3; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma4,+xop | FileCheck %s4 5; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/xop-builtins.c6 7define <2 x i64> @test_mm_maccs_epi16(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {8; CHECK-LABEL: test_mm_maccs_epi16:9; CHECK: # %bb.0:10; CHECK-NEXT: vpmacssww %xmm2, %xmm1, %xmm0, %xmm011; CHECK-NEXT: ret{{[l|q]}}12 %arg0 = bitcast <2 x i64> %a0 to <8 x i16>13 %arg1 = bitcast <2 x i64> %a1 to <8 x i16>14 %arg2 = bitcast <2 x i64> %a2 to <8 x i16>15 %res = call <8 x i16> @llvm.x86.xop.vpmacssww(<8 x i16> %arg0, <8 x i16> %arg1, <8 x i16> %arg2)16 %bc = bitcast <8 x i16> %res to <2 x i64>17 ret <2 x i64> %bc18}19declare <8 x i16> @llvm.x86.xop.vpmacssww(<8 x i16>, <8 x i16>, <8 x i16>) nounwind readnone20 21define <2 x i64> @test_mm_macc_epi16(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {22; CHECK-LABEL: test_mm_macc_epi16:23; CHECK: # %bb.0:24; CHECK-NEXT: vpmacsww %xmm2, %xmm1, %xmm0, %xmm025; CHECK-NEXT: ret{{[l|q]}}26 %arg0 = bitcast <2 x i64> %a0 to <8 x i16>27 %arg1 = bitcast <2 x i64> %a1 to <8 x i16>28 %arg2 = bitcast <2 x i64> %a2 to <8 x i16>29 %res = call <8 x i16> @llvm.x86.xop.vpmacsww(<8 x i16> %arg0, <8 x i16> %arg1, <8 x i16> %arg2)30 %bc = bitcast <8 x i16> %res to <2 x i64>31 ret <2 x i64> %bc32}33declare <8 x i16> @llvm.x86.xop.vpmacsww(<8 x i16>, <8 x i16>, <8 x i16>) nounwind readnone34 35define <2 x i64> @test_mm_maccsd_epi16(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {36; CHECK-LABEL: test_mm_maccsd_epi16:37; CHECK: # %bb.0:38; CHECK-NEXT: vpmacsswd %xmm2, %xmm1, %xmm0, %xmm039; CHECK-NEXT: ret{{[l|q]}}40 %arg0 = bitcast <2 x i64> %a0 to <8 x i16>41 %arg1 = bitcast <2 x i64> %a1 to <8 x i16>42 %arg2 = bitcast <2 x i64> %a2 to <4 x i32>43 %res = call <4 x i32> @llvm.x86.xop.vpmacsswd(<8 x i16> %arg0, <8 x i16> %arg1, <4 x i32> %arg2)44 %bc = bitcast <4 x i32> %res to <2 x i64>45 ret <2 x i64> %bc46}47declare <4 x i32> @llvm.x86.xop.vpmacsswd(<8 x i16>, <8 x i16>, <4 x i32>) nounwind readnone48 49define <2 x i64> @test_mm_maccd_epi16(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {50; CHECK-LABEL: test_mm_maccd_epi16:51; CHECK: # %bb.0:52; CHECK-NEXT: vpmacswd %xmm2, %xmm1, %xmm0, %xmm053; CHECK-NEXT: ret{{[l|q]}}54 %arg0 = bitcast <2 x i64> %a0 to <8 x i16>55 %arg1 = bitcast <2 x i64> %a1 to <8 x i16>56 %arg2 = bitcast <2 x i64> %a2 to <4 x i32>57 %res = call <4 x i32> @llvm.x86.xop.vpmacswd(<8 x i16> %arg0, <8 x i16> %arg1, <4 x i32> %arg2)58 %bc = bitcast <4 x i32> %res to <2 x i64>59 ret <2 x i64> %bc60}61declare <4 x i32> @llvm.x86.xop.vpmacswd(<8 x i16>, <8 x i16>, <4 x i32>) nounwind readnone62 63define <2 x i64> @test_mm_maccs_epi32(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {64; CHECK-LABEL: test_mm_maccs_epi32:65; CHECK: # %bb.0:66; CHECK-NEXT: vpmacssdd %xmm2, %xmm1, %xmm0, %xmm067; CHECK-NEXT: ret{{[l|q]}}68 %arg0 = bitcast <2 x i64> %a0 to <4 x i32>69 %arg1 = bitcast <2 x i64> %a1 to <4 x i32>70 %arg2 = bitcast <2 x i64> %a2 to <4 x i32>71 %res = call <4 x i32> @llvm.x86.xop.vpmacssdd(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2)72 %bc = bitcast <4 x i32> %res to <2 x i64>73 ret <2 x i64> %bc74}75declare <4 x i32> @llvm.x86.xop.vpmacssdd(<4 x i32>, <4 x i32>, <4 x i32>) nounwind readnone76 77define <2 x i64> @test_mm_macc_epi32(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {78; CHECK-LABEL: test_mm_macc_epi32:79; CHECK: # %bb.0:80; CHECK-NEXT: vpmacsdd %xmm2, %xmm1, %xmm0, %xmm081; CHECK-NEXT: ret{{[l|q]}}82 %arg0 = bitcast <2 x i64> %a0 to <4 x i32>83 %arg1 = bitcast <2 x i64> %a1 to <4 x i32>84 %arg2 = bitcast <2 x i64> %a2 to <4 x i32>85 %res = call <4 x i32> @llvm.x86.xop.vpmacsdd(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2)86 %bc = bitcast <4 x i32> %res to <2 x i64>87 ret <2 x i64> %bc88}89declare <4 x i32> @llvm.x86.xop.vpmacsdd(<4 x i32>, <4 x i32>, <4 x i32>) nounwind readnone90 91define <2 x i64> @test_mm_maccslo_epi32(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {92; CHECK-LABEL: test_mm_maccslo_epi32:93; CHECK: # %bb.0:94; CHECK-NEXT: vpmacssdql %xmm2, %xmm1, %xmm0, %xmm095; CHECK-NEXT: ret{{[l|q]}}96 %arg0 = bitcast <2 x i64> %a0 to <4 x i32>97 %arg1 = bitcast <2 x i64> %a1 to <4 x i32>98 %res = call <2 x i64> @llvm.x86.xop.vpmacssdql(<4 x i32> %arg0, <4 x i32> %arg1, <2 x i64> %a2)99 ret <2 x i64> %res100}101declare <2 x i64> @llvm.x86.xop.vpmacssdql(<4 x i32>, <4 x i32>, <2 x i64>) nounwind readnone102 103define <2 x i64> @test_mm_macclo_epi32(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {104; CHECK-LABEL: test_mm_macclo_epi32:105; CHECK: # %bb.0:106; CHECK-NEXT: vpmacsdql %xmm2, %xmm1, %xmm0, %xmm0107; CHECK-NEXT: ret{{[l|q]}}108 %arg0 = bitcast <2 x i64> %a0 to <4 x i32>109 %arg1 = bitcast <2 x i64> %a1 to <4 x i32>110 %res = call <2 x i64> @llvm.x86.xop.vpmacsdql(<4 x i32> %arg0, <4 x i32> %arg1, <2 x i64> %a2)111 ret <2 x i64> %res112}113declare <2 x i64> @llvm.x86.xop.vpmacsdql(<4 x i32>, <4 x i32>, <2 x i64>) nounwind readnone114 115define <2 x i64> @test_mm_maccshi_epi32(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {116; CHECK-LABEL: test_mm_maccshi_epi32:117; CHECK: # %bb.0:118; CHECK-NEXT: vpmacssdqh %xmm2, %xmm1, %xmm0, %xmm0119; CHECK-NEXT: ret{{[l|q]}}120 %arg0 = bitcast <2 x i64> %a0 to <4 x i32>121 %arg1 = bitcast <2 x i64> %a1 to <4 x i32>122 %res = call <2 x i64> @llvm.x86.xop.vpmacssdqh(<4 x i32> %arg0, <4 x i32> %arg1, <2 x i64> %a2)123 ret <2 x i64> %res124}125declare <2 x i64> @llvm.x86.xop.vpmacssdqh(<4 x i32>, <4 x i32>, <2 x i64>) nounwind readnone126 127define <2 x i64> @test_mm_macchi_epi32(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {128; CHECK-LABEL: test_mm_macchi_epi32:129; CHECK: # %bb.0:130; CHECK-NEXT: vpmacsdqh %xmm2, %xmm1, %xmm0, %xmm0131; CHECK-NEXT: ret{{[l|q]}}132 %arg0 = bitcast <2 x i64> %a0 to <4 x i32>133 %arg1 = bitcast <2 x i64> %a1 to <4 x i32>134 %res = call <2 x i64> @llvm.x86.xop.vpmacsdqh(<4 x i32> %arg0, <4 x i32> %arg1, <2 x i64> %a2)135 ret <2 x i64> %res136}137declare <2 x i64> @llvm.x86.xop.vpmacsdqh(<4 x i32>, <4 x i32>, <2 x i64>) nounwind readnone138 139define <2 x i64> @test_mm_maddsd_epi16(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {140; CHECK-LABEL: test_mm_maddsd_epi16:141; CHECK: # %bb.0:142; CHECK-NEXT: vpmadcsswd %xmm2, %xmm1, %xmm0, %xmm0143; CHECK-NEXT: ret{{[l|q]}}144 %arg0 = bitcast <2 x i64> %a0 to <8 x i16>145 %arg1 = bitcast <2 x i64> %a1 to <8 x i16>146 %arg2 = bitcast <2 x i64> %a2 to <4 x i32>147 %res = call <4 x i32> @llvm.x86.xop.vpmadcsswd(<8 x i16> %arg0, <8 x i16> %arg1, <4 x i32> %arg2)148 %bc = bitcast <4 x i32> %res to <2 x i64>149 ret <2 x i64> %bc150}151declare <4 x i32> @llvm.x86.xop.vpmadcsswd(<8 x i16>, <8 x i16>, <4 x i32>) nounwind readnone152 153define <2 x i64> @test_mm_maddd_epi16(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {154; CHECK-LABEL: test_mm_maddd_epi16:155; CHECK: # %bb.0:156; CHECK-NEXT: vpmadcswd %xmm2, %xmm1, %xmm0, %xmm0157; CHECK-NEXT: ret{{[l|q]}}158 %arg0 = bitcast <2 x i64> %a0 to <8 x i16>159 %arg1 = bitcast <2 x i64> %a1 to <8 x i16>160 %arg2 = bitcast <2 x i64> %a2 to <4 x i32>161 %res = call <4 x i32> @llvm.x86.xop.vpmadcswd(<8 x i16> %arg0, <8 x i16> %arg1, <4 x i32> %arg2)162 %bc = bitcast <4 x i32> %res to <2 x i64>163 ret <2 x i64> %bc164}165declare <4 x i32> @llvm.x86.xop.vpmadcswd(<8 x i16>, <8 x i16>, <4 x i32>) nounwind readnone166 167define <2 x i64> @test_mm_haddw_epi8(<2 x i64> %a0) {168; CHECK-LABEL: test_mm_haddw_epi8:169; CHECK: # %bb.0:170; CHECK-NEXT: vphaddbw %xmm0, %xmm0171; CHECK-NEXT: ret{{[l|q]}}172 %arg0 = bitcast <2 x i64> %a0 to <16 x i8>173 %res = call <8 x i16> @llvm.x86.xop.vphaddbw(<16 x i8> %arg0)174 %bc = bitcast <8 x i16> %res to <2 x i64>175 ret <2 x i64> %bc176}177declare <8 x i16> @llvm.x86.xop.vphaddbw(<16 x i8>) nounwind readnone178 179define <2 x i64> @test_mm_haddd_epi8(<2 x i64> %a0) {180; CHECK-LABEL: test_mm_haddd_epi8:181; CHECK: # %bb.0:182; CHECK-NEXT: vphaddbd %xmm0, %xmm0183; CHECK-NEXT: ret{{[l|q]}}184 %arg0 = bitcast <2 x i64> %a0 to <16 x i8>185 %res = call <4 x i32> @llvm.x86.xop.vphaddbd(<16 x i8> %arg0)186 %bc = bitcast <4 x i32> %res to <2 x i64>187 ret <2 x i64> %bc188}189declare <4 x i32> @llvm.x86.xop.vphaddbd(<16 x i8>) nounwind readnone190 191define <2 x i64> @test_mm_haddq_epi8(<2 x i64> %a0) {192; CHECK-LABEL: test_mm_haddq_epi8:193; CHECK: # %bb.0:194; CHECK-NEXT: vphaddbq %xmm0, %xmm0195; CHECK-NEXT: ret{{[l|q]}}196 %arg0 = bitcast <2 x i64> %a0 to <16 x i8>197 %res = call <2 x i64> @llvm.x86.xop.vphaddbq(<16 x i8> %arg0)198 ret <2 x i64> %res199}200declare <2 x i64> @llvm.x86.xop.vphaddbq(<16 x i8>) nounwind readnone201 202define <2 x i64> @test_mm_haddd_epi16(<2 x i64> %a0) {203; CHECK-LABEL: test_mm_haddd_epi16:204; CHECK: # %bb.0:205; CHECK-NEXT: vphaddwd %xmm0, %xmm0206; CHECK-NEXT: ret{{[l|q]}}207 %arg0 = bitcast <2 x i64> %a0 to <8 x i16>208 %res = call <4 x i32> @llvm.x86.xop.vphaddwd(<8 x i16> %arg0)209 %bc = bitcast <4 x i32> %res to <2 x i64>210 ret <2 x i64> %bc211}212declare <4 x i32> @llvm.x86.xop.vphaddwd(<8 x i16>) nounwind readnone213 214define <2 x i64> @test_mm_haddq_epi16(<2 x i64> %a0) {215; CHECK-LABEL: test_mm_haddq_epi16:216; CHECK: # %bb.0:217; CHECK-NEXT: vphaddwq %xmm0, %xmm0218; CHECK-NEXT: ret{{[l|q]}}219 %arg0 = bitcast <2 x i64> %a0 to <8 x i16>220 %res = call <2 x i64> @llvm.x86.xop.vphaddwq(<8 x i16> %arg0)221 ret <2 x i64> %res222}223declare <2 x i64> @llvm.x86.xop.vphaddwq(<8 x i16>) nounwind readnone224 225define <2 x i64> @test_mm_haddq_epi32(<2 x i64> %a0) {226; CHECK-LABEL: test_mm_haddq_epi32:227; CHECK: # %bb.0:228; CHECK-NEXT: vphadddq %xmm0, %xmm0229; CHECK-NEXT: ret{{[l|q]}}230 %arg0 = bitcast <2 x i64> %a0 to <4 x i32>231 %res = call <2 x i64> @llvm.x86.xop.vphadddq(<4 x i32> %arg0)232 ret <2 x i64> %res233}234declare <2 x i64> @llvm.x86.xop.vphadddq(<4 x i32>) nounwind readnone235 236define <2 x i64> @test_mm_haddw_epu8(<2 x i64> %a0) {237; CHECK-LABEL: test_mm_haddw_epu8:238; CHECK: # %bb.0:239; CHECK-NEXT: vphaddubw %xmm0, %xmm0240; CHECK-NEXT: ret{{[l|q]}}241 %arg0 = bitcast <2 x i64> %a0 to <16 x i8>242 %res = call <8 x i16> @llvm.x86.xop.vphaddubw(<16 x i8> %arg0)243 %bc = bitcast <8 x i16> %res to <2 x i64>244 ret <2 x i64> %bc245}246declare <8 x i16> @llvm.x86.xop.vphaddubw(<16 x i8>) nounwind readnone247 248define <2 x i64> @test_mm_haddd_epu8(<2 x i64> %a0) {249; CHECK-LABEL: test_mm_haddd_epu8:250; CHECK: # %bb.0:251; CHECK-NEXT: vphaddubd %xmm0, %xmm0252; CHECK-NEXT: ret{{[l|q]}}253 %arg0 = bitcast <2 x i64> %a0 to <16 x i8>254 %res = call <4 x i32> @llvm.x86.xop.vphaddubd(<16 x i8> %arg0)255 %bc = bitcast <4 x i32> %res to <2 x i64>256 ret <2 x i64> %bc257}258declare <4 x i32> @llvm.x86.xop.vphaddubd(<16 x i8>) nounwind readnone259 260define <2 x i64> @test_mm_haddq_epu8(<2 x i64> %a0) {261; CHECK-LABEL: test_mm_haddq_epu8:262; CHECK: # %bb.0:263; CHECK-NEXT: vphaddubq %xmm0, %xmm0264; CHECK-NEXT: ret{{[l|q]}}265 %arg0 = bitcast <2 x i64> %a0 to <16 x i8>266 %res = call <2 x i64> @llvm.x86.xop.vphaddubq(<16 x i8> %arg0)267 ret <2 x i64> %res268}269declare <2 x i64> @llvm.x86.xop.vphaddubq(<16 x i8>) nounwind readnone270 271define <2 x i64> @test_mm_haddd_epu16(<2 x i64> %a0) {272; CHECK-LABEL: test_mm_haddd_epu16:273; CHECK: # %bb.0:274; CHECK-NEXT: vphadduwd %xmm0, %xmm0275; CHECK-NEXT: ret{{[l|q]}}276 %arg0 = bitcast <2 x i64> %a0 to <8 x i16>277 %res = call <4 x i32> @llvm.x86.xop.vphadduwd(<8 x i16> %arg0)278 %bc = bitcast <4 x i32> %res to <2 x i64>279 ret <2 x i64> %bc280}281declare <4 x i32> @llvm.x86.xop.vphadduwd(<8 x i16>) nounwind readnone282 283 284define <2 x i64> @test_mm_haddq_epu16(<2 x i64> %a0) {285; CHECK-LABEL: test_mm_haddq_epu16:286; CHECK: # %bb.0:287; CHECK-NEXT: vphadduwq %xmm0, %xmm0288; CHECK-NEXT: ret{{[l|q]}}289 %arg0 = bitcast <2 x i64> %a0 to <8 x i16>290 %res = call <2 x i64> @llvm.x86.xop.vphadduwq(<8 x i16> %arg0)291 ret <2 x i64> %res292}293declare <2 x i64> @llvm.x86.xop.vphadduwq(<8 x i16>) nounwind readnone294 295define <2 x i64> @test_mm_haddq_epu32(<2 x i64> %a0) {296; CHECK-LABEL: test_mm_haddq_epu32:297; CHECK: # %bb.0:298; CHECK-NEXT: vphaddudq %xmm0, %xmm0299; CHECK-NEXT: ret{{[l|q]}}300 %arg0 = bitcast <2 x i64> %a0 to <4 x i32>301 %res = call <2 x i64> @llvm.x86.xop.vphaddudq(<4 x i32> %arg0)302 ret <2 x i64> %res303}304declare <2 x i64> @llvm.x86.xop.vphaddudq(<4 x i32>) nounwind readnone305 306define <2 x i64> @test_mm_hsubw_epi8(<2 x i64> %a0) {307; CHECK-LABEL: test_mm_hsubw_epi8:308; CHECK: # %bb.0:309; CHECK-NEXT: vphsubbw %xmm0, %xmm0310; CHECK-NEXT: ret{{[l|q]}}311 %arg0 = bitcast <2 x i64> %a0 to <16 x i8>312 %res = call <8 x i16> @llvm.x86.xop.vphsubbw(<16 x i8> %arg0)313 %bc = bitcast <8 x i16> %res to <2 x i64>314 ret <2 x i64> %bc315}316declare <8 x i16> @llvm.x86.xop.vphsubbw(<16 x i8>) nounwind readnone317 318define <2 x i64> @test_mm_hsubd_epi16(<2 x i64> %a0) {319; CHECK-LABEL: test_mm_hsubd_epi16:320; CHECK: # %bb.0:321; CHECK-NEXT: vphsubwd %xmm0, %xmm0322; CHECK-NEXT: ret{{[l|q]}}323 %arg0 = bitcast <2 x i64> %a0 to <8 x i16>324 %res = call <4 x i32> @llvm.x86.xop.vphsubwd(<8 x i16> %arg0)325 %bc = bitcast <4 x i32> %res to <2 x i64>326 ret <2 x i64> %bc327}328declare <4 x i32> @llvm.x86.xop.vphsubwd(<8 x i16>) nounwind readnone329 330define <2 x i64> @test_mm_hsubq_epi32(<2 x i64> %a0) {331; CHECK-LABEL: test_mm_hsubq_epi32:332; CHECK: # %bb.0:333; CHECK-NEXT: vphsubdq %xmm0, %xmm0334; CHECK-NEXT: ret{{[l|q]}}335 %arg0 = bitcast <2 x i64> %a0 to <4 x i32>336 %res = call <2 x i64> @llvm.x86.xop.vphsubdq(<4 x i32> %arg0)337 ret <2 x i64> %res338}339declare <2 x i64> @llvm.x86.xop.vphsubdq(<4 x i32>) nounwind readnone340 341define <2 x i64> @test_mm_cmov_si128(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) {342; CHECK-LABEL: test_mm_cmov_si128:343; CHECK: # %bb.0:344; CHECK-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3345; CHECK-NEXT: vpxor %xmm3, %xmm2, %xmm3346; CHECK-NEXT: vpand %xmm2, %xmm0, %xmm0347; CHECK-NEXT: vpand %xmm3, %xmm1, %xmm1348; CHECK-NEXT: vpor %xmm1, %xmm0, %xmm0349; CHECK-NEXT: ret{{[l|q]}}350 %res = call <2 x i64> @llvm.x86.xop.vpcmov(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2)351 ret <2 x i64> %res352}353declare <2 x i64> @llvm.x86.xop.vpcmov(<2 x i64>, <2 x i64>, <2 x i64>) nounwind readnone354 355define <4 x i64> @test_mm256_cmov_si256(<4 x i64> %a0, <4 x i64> %a1, <4 x i64> %a2) {356; CHECK-LABEL: test_mm256_cmov_si256:357; CHECK: # %bb.0:358; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3359; CHECK-NEXT: vcmptrueps %ymm3, %ymm3, %ymm3360; CHECK-NEXT: vxorps %ymm3, %ymm2, %ymm3361; CHECK-NEXT: vandps %ymm2, %ymm0, %ymm0362; CHECK-NEXT: vandps %ymm3, %ymm1, %ymm1363; CHECK-NEXT: vorps %ymm1, %ymm0, %ymm0364; CHECK-NEXT: ret{{[l|q]}}365 %res = call <4 x i64> @llvm.x86.xop.vpcmov.256(<4 x i64> %a0, <4 x i64> %a1, <4 x i64> %a2)366 ret <4 x i64> %res367}368declare <4 x i64> @llvm.x86.xop.vpcmov.256(<4 x i64>, <4 x i64>, <4 x i64>) nounwind readnone369 370define <2 x i64> @test_mm_perm_epi8(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) {371; CHECK-LABEL: test_mm_perm_epi8:372; CHECK: # %bb.0:373; CHECK-NEXT: vpperm %xmm2, %xmm1, %xmm0, %xmm0374; CHECK-NEXT: ret{{[l|q]}}375 %arg0 = bitcast <2 x i64> %a0 to <16 x i8>376 %arg1 = bitcast <2 x i64> %a1 to <16 x i8>377 %arg2 = bitcast <2 x i64> %a2 to <16 x i8>378 %res = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %arg0, <16 x i8> %arg1, <16 x i8> %arg2)379 %bc = bitcast <16 x i8> %res to <2 x i64>380 ret <2 x i64> %bc381}382declare <16 x i8> @llvm.x86.xop.vpperm(<16 x i8>, <16 x i8>, <16 x i8>) nounwind readnone383 384define <2 x i64> @test_mm_rot_epi8(<2 x i64> %a0, <2 x i64> %a1) {385; CHECK-LABEL: test_mm_rot_epi8:386; CHECK: # %bb.0:387; CHECK-NEXT: vprotb %xmm1, %xmm0, %xmm0388; CHECK-NEXT: ret{{[l|q]}}389 %arg0 = bitcast <2 x i64> %a0 to <16 x i8>390 %arg1 = bitcast <2 x i64> %a1 to <16 x i8>391 %res = call <16 x i8> @llvm.fshl.v16i8(<16 x i8> %arg0, <16 x i8> %arg0, <16 x i8> %arg1)392 %bc = bitcast <16 x i8> %res to <2 x i64>393 ret <2 x i64> %bc394}395declare <16 x i8> @llvm.fshl.v16i8(<16 x i8>, <16 x i8>, <16 x i8>) nounwind readnone396 397define <2 x i64> @test_mm_rot_epi16(<2 x i64> %a0, <2 x i64> %a1) {398; CHECK-LABEL: test_mm_rot_epi16:399; CHECK: # %bb.0:400; CHECK-NEXT: vprotw %xmm1, %xmm0, %xmm0401; CHECK-NEXT: ret{{[l|q]}}402 %arg0 = bitcast <2 x i64> %a0 to <8 x i16>403 %arg1 = bitcast <2 x i64> %a1 to <8 x i16>404 %res = call <8 x i16> @llvm.fshl.v8i16(<8 x i16> %arg0, <8 x i16> %arg0, <8 x i16> %arg1)405 %bc = bitcast <8 x i16> %res to <2 x i64>406 ret <2 x i64> %bc407}408declare <8 x i16> @llvm.fshl.v8i16(<8 x i16>, <8 x i16>, <8 x i16>) nounwind readnone409 410define <2 x i64> @test_mm_rot_epi32(<2 x i64> %a0, <2 x i64> %a1) {411; CHECK-LABEL: test_mm_rot_epi32:412; CHECK: # %bb.0:413; CHECK-NEXT: vprotd %xmm1, %xmm0, %xmm0414; CHECK-NEXT: ret{{[l|q]}}415 %arg0 = bitcast <2 x i64> %a0 to <4 x i32>416 %arg1 = bitcast <2 x i64> %a1 to <4 x i32>417 %res = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %arg0, <4 x i32> %arg0, <4 x i32> %arg1)418 %bc = bitcast <4 x i32> %res to <2 x i64>419 ret <2 x i64> %bc420}421declare <4 x i32> @llvm.fshl.v4i32(<4 x i32>, <4 x i32>, <4 x i32>) nounwind readnone422 423define <2 x i64> @test_mm_rot_epi64(<2 x i64> %a0, <2 x i64> %a1) {424; CHECK-LABEL: test_mm_rot_epi64:425; CHECK: # %bb.0:426; CHECK-NEXT: vprotq %xmm1, %xmm0, %xmm0427; CHECK-NEXT: ret{{[l|q]}}428 %res = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %a0, <2 x i64> %a0, <2 x i64> %a1)429 ret <2 x i64> %res430}431declare <2 x i64> @llvm.fshl.v2i64(<2 x i64>, <2 x i64>, <2 x i64>) nounwind readnone432 433define <2 x i64> @test_mm_roti_epi8(<2 x i64> %a0) {434; CHECK-LABEL: test_mm_roti_epi8:435; CHECK: # %bb.0:436; CHECK-NEXT: vprotb $1, %xmm0, %xmm0437; CHECK-NEXT: ret{{[l|q]}}438 %arg0 = bitcast <2 x i64> %a0 to <16 x i8>439 %res = call <16 x i8> @llvm.fshl.v16i8(<16 x i8> %arg0, <16 x i8> %arg0, <16 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>)440 %bc = bitcast <16 x i8> %res to <2 x i64>441 ret <2 x i64> %bc442}443 444define <2 x i64> @test_mm_roti_epi16(<2 x i64> %a0) {445; CHECK-LABEL: test_mm_roti_epi16:446; CHECK: # %bb.0:447; CHECK-NEXT: vprotw $2, %xmm0, %xmm0448; CHECK-NEXT: ret{{[l|q]}}449 %arg0 = bitcast <2 x i64> %a0 to <8 x i16>450 %res = call <8 x i16> @llvm.fshl.v8i16(<8 x i16> %arg0, <8 x i16> %arg0, <8 x i16> <i16 50, i16 50, i16 50, i16 50, i16 50, i16 50, i16 50, i16 50>)451 %bc = bitcast <8 x i16> %res to <2 x i64>452 ret <2 x i64> %bc453}454 455define <2 x i64> @test_mm_roti_epi32(<2 x i64> %a0) {456; CHECK-LABEL: test_mm_roti_epi32:457; CHECK: # %bb.0:458; CHECK-NEXT: vprotd $2, %xmm0, %xmm0459; CHECK-NEXT: ret{{[l|q]}}460 %arg0 = bitcast <2 x i64> %a0 to <4 x i32>461 %res = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %arg0, <4 x i32> %arg0, <4 x i32> <i32 -30, i32 -30, i32 -30, i32 -30>)462 %bc = bitcast <4 x i32> %res to <2 x i64>463 ret <2 x i64> %bc464}465 466define <2 x i64> @test_mm_roti_epi64(<2 x i64> %a0) {467; CHECK-LABEL: test_mm_roti_epi64:468; CHECK: # %bb.0:469; CHECK-NEXT: vprotq $36, %xmm0, %xmm0470; CHECK-NEXT: ret{{[l|q]}}471 %res = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %a0, <2 x i64> %a0, <2 x i64> <i64 100, i64 100>)472 ret <2 x i64> %res473}474 475define <2 x i64> @test_mm_shl_epi8(<2 x i64> %a0, <2 x i64> %a1) {476; CHECK-LABEL: test_mm_shl_epi8:477; CHECK: # %bb.0:478; CHECK-NEXT: vpshlb %xmm1, %xmm0, %xmm0479; CHECK-NEXT: ret{{[l|q]}}480 %arg0 = bitcast <2 x i64> %a0 to <16 x i8>481 %arg1 = bitcast <2 x i64> %a1 to <16 x i8>482 %res = call <16 x i8> @llvm.x86.xop.vpshlb(<16 x i8> %arg0, <16 x i8> %arg1)483 %bc = bitcast <16 x i8> %res to <2 x i64>484 ret <2 x i64> %bc485}486declare <16 x i8> @llvm.x86.xop.vpshlb(<16 x i8>, <16 x i8>) nounwind readnone487 488define <2 x i64> @test_mm_shl_epi16(<2 x i64> %a0, <2 x i64> %a1) {489; CHECK-LABEL: test_mm_shl_epi16:490; CHECK: # %bb.0:491; CHECK-NEXT: vpshlw %xmm1, %xmm0, %xmm0492; CHECK-NEXT: ret{{[l|q]}}493 %arg0 = bitcast <2 x i64> %a0 to <8 x i16>494 %arg1 = bitcast <2 x i64> %a1 to <8 x i16>495 %res = call <8 x i16> @llvm.x86.xop.vpshlw(<8 x i16> %arg0, <8 x i16> %arg1)496 %bc = bitcast <8 x i16> %res to <2 x i64>497 ret <2 x i64> %bc498}499declare <8 x i16> @llvm.x86.xop.vpshlw(<8 x i16>, <8 x i16>) nounwind readnone500 501define <2 x i64> @test_mm_shl_epi32(<2 x i64> %a0, <2 x i64> %a1) {502; CHECK-LABEL: test_mm_shl_epi32:503; CHECK: # %bb.0:504; CHECK-NEXT: vpshld %xmm1, %xmm0, %xmm0505; CHECK-NEXT: ret{{[l|q]}}506 %arg0 = bitcast <2 x i64> %a0 to <4 x i32>507 %arg1 = bitcast <2 x i64> %a1 to <4 x i32>508 %res = call <4 x i32> @llvm.x86.xop.vpshld(<4 x i32> %arg0, <4 x i32> %arg1)509 %bc = bitcast <4 x i32> %res to <2 x i64>510 ret <2 x i64> %bc511}512declare <4 x i32> @llvm.x86.xop.vpshld(<4 x i32>, <4 x i32>) nounwind readnone513 514define <2 x i64> @test_mm_shl_epi64(<2 x i64> %a0, <2 x i64> %a1) {515; CHECK-LABEL: test_mm_shl_epi64:516; CHECK: # %bb.0:517; CHECK-NEXT: vpshlq %xmm1, %xmm0, %xmm0518; CHECK-NEXT: ret{{[l|q]}}519 %res = call <2 x i64> @llvm.x86.xop.vpshlq(<2 x i64> %a0, <2 x i64> %a1)520 ret <2 x i64> %res521}522declare <2 x i64> @llvm.x86.xop.vpshlq(<2 x i64>, <2 x i64>) nounwind readnone523 524define <2 x i64> @test_mm_sha_epi8(<2 x i64> %a0, <2 x i64> %a1) {525; CHECK-LABEL: test_mm_sha_epi8:526; CHECK: # %bb.0:527; CHECK-NEXT: vpshab %xmm1, %xmm0, %xmm0528; CHECK-NEXT: ret{{[l|q]}}529 %arg0 = bitcast <2 x i64> %a0 to <16 x i8>530 %arg1 = bitcast <2 x i64> %a1 to <16 x i8>531 %res = call <16 x i8> @llvm.x86.xop.vpshab(<16 x i8> %arg0, <16 x i8> %arg1)532 %bc = bitcast <16 x i8> %res to <2 x i64>533 ret <2 x i64> %bc534}535declare <16 x i8> @llvm.x86.xop.vpshab(<16 x i8>, <16 x i8>) nounwind readnone536 537define <2 x i64> @test_mm_sha_epi16(<2 x i64> %a0, <2 x i64> %a1) {538; CHECK-LABEL: test_mm_sha_epi16:539; CHECK: # %bb.0:540; CHECK-NEXT: vpshaw %xmm1, %xmm0, %xmm0541; CHECK-NEXT: ret{{[l|q]}}542 %arg0 = bitcast <2 x i64> %a0 to <8 x i16>543 %arg1 = bitcast <2 x i64> %a1 to <8 x i16>544 %res = call <8 x i16> @llvm.x86.xop.vpshaw(<8 x i16> %arg0, <8 x i16> %arg1)545 %bc = bitcast <8 x i16> %res to <2 x i64>546 ret <2 x i64> %bc547}548declare <8 x i16> @llvm.x86.xop.vpshaw(<8 x i16>, <8 x i16>) nounwind readnone549 550define <2 x i64> @test_mm_sha_epi32(<2 x i64> %a0, <2 x i64> %a1) {551; CHECK-LABEL: test_mm_sha_epi32:552; CHECK: # %bb.0:553; CHECK-NEXT: vpshad %xmm1, %xmm0, %xmm0554; CHECK-NEXT: ret{{[l|q]}}555 %arg0 = bitcast <2 x i64> %a0 to <4 x i32>556 %arg1 = bitcast <2 x i64> %a1 to <4 x i32>557 %res = call <4 x i32> @llvm.x86.xop.vpshad(<4 x i32> %arg0, <4 x i32> %arg1)558 %bc = bitcast <4 x i32> %res to <2 x i64>559 ret <2 x i64> %bc560}561declare <4 x i32> @llvm.x86.xop.vpshad(<4 x i32>, <4 x i32>) nounwind readnone562 563define <2 x i64> @test_mm_sha_epi64(<2 x i64> %a0, <2 x i64> %a1) {564; CHECK-LABEL: test_mm_sha_epi64:565; CHECK: # %bb.0:566; CHECK-NEXT: vpshaq %xmm1, %xmm0, %xmm0567; CHECK-NEXT: ret{{[l|q]}}568 %res = call <2 x i64> @llvm.x86.xop.vpshaq(<2 x i64> %a0, <2 x i64> %a1)569 ret <2 x i64> %res570}571declare <2 x i64> @llvm.x86.xop.vpshaq(<2 x i64>, <2 x i64>) nounwind readnone572 573define <2 x i64> @test_mm_com_epu8(<2 x i64> %a0, <2 x i64> %a1) {574; CHECK-LABEL: test_mm_com_epu8:575; CHECK: # %bb.0:576; CHECK-NEXT: vpcomltub %xmm1, %xmm0, %xmm0577; CHECK-NEXT: ret{{[l|q]}}578 %arg0 = bitcast <2 x i64> %a0 to <16 x i8>579 %arg1 = bitcast <2 x i64> %a1 to <16 x i8>580 %cmp = icmp ult <16 x i8> %arg0, %arg1581 %res = sext <16 x i1> %cmp to <16 x i8>582 %bc = bitcast <16 x i8> %res to <2 x i64>583 ret <2 x i64> %bc584}585 586define <2 x i64> @test_mm_com_epu16(<2 x i64> %a0, <2 x i64> %a1) {587; CHECK-LABEL: test_mm_com_epu16:588; CHECK: # %bb.0:589; CHECK-NEXT: vpcomltuw %xmm1, %xmm0, %xmm0590; CHECK-NEXT: ret{{[l|q]}}591 %arg0 = bitcast <2 x i64> %a0 to <8 x i16>592 %arg1 = bitcast <2 x i64> %a1 to <8 x i16>593 %cmp = icmp ult <8 x i16> %arg0, %arg1594 %res = sext <8 x i1> %cmp to <8 x i16>595 %bc = bitcast <8 x i16> %res to <2 x i64>596 ret <2 x i64> %bc597}598 599define <2 x i64> @test_mm_com_epu32(<2 x i64> %a0, <2 x i64> %a1) {600; CHECK-LABEL: test_mm_com_epu32:601; CHECK: # %bb.0:602; CHECK-NEXT: vpcomltud %xmm1, %xmm0, %xmm0603; CHECK-NEXT: ret{{[l|q]}}604 %arg0 = bitcast <2 x i64> %a0 to <4 x i32>605 %arg1 = bitcast <2 x i64> %a1 to <4 x i32>606 %cmp = icmp ult <4 x i32> %arg0, %arg1607 %res = sext <4 x i1> %cmp to <4 x i32>608 %bc = bitcast <4 x i32> %res to <2 x i64>609 ret <2 x i64> %bc610}611 612define <2 x i64> @test_mm_com_epu64(<2 x i64> %a0, <2 x i64> %a1) {613; CHECK-LABEL: test_mm_com_epu64:614; CHECK: # %bb.0:615; CHECK-NEXT: vpcomltuq %xmm1, %xmm0, %xmm0616; CHECK-NEXT: ret{{[l|q]}}617 %cmp = icmp ult <2 x i64> %a0, %a1618 %res = sext <2 x i1> %cmp to <2 x i64>619 ret <2 x i64> %res620}621 622define <2 x i64> @test_mm_com_epi8(<2 x i64> %a0, <2 x i64> %a1) {623; CHECK-LABEL: test_mm_com_epi8:624; CHECK: # %bb.0:625; CHECK-NEXT: vpcomltb %xmm1, %xmm0, %xmm0626; CHECK-NEXT: ret{{[l|q]}}627 %arg0 = bitcast <2 x i64> %a0 to <16 x i8>628 %arg1 = bitcast <2 x i64> %a1 to <16 x i8>629 %cmp = icmp slt <16 x i8> %arg0, %arg1630 %res = sext <16 x i1> %cmp to <16 x i8>631 %bc = bitcast <16 x i8> %res to <2 x i64>632 ret <2 x i64> %bc633}634 635define <2 x i64> @test_mm_com_epi16(<2 x i64> %a0, <2 x i64> %a1) {636; CHECK-LABEL: test_mm_com_epi16:637; CHECK: # %bb.0:638; CHECK-NEXT: vpcomltw %xmm1, %xmm0, %xmm0639; CHECK-NEXT: ret{{[l|q]}}640 %arg0 = bitcast <2 x i64> %a0 to <8 x i16>641 %arg1 = bitcast <2 x i64> %a1 to <8 x i16>642 %cmp = icmp slt <8 x i16> %arg0, %arg1643 %res = sext <8 x i1> %cmp to <8 x i16>644 %bc = bitcast <8 x i16> %res to <2 x i64>645 ret <2 x i64> %bc646}647 648define <2 x i64> @test_mm_com_epi32(<2 x i64> %a0, <2 x i64> %a1) {649; CHECK-LABEL: test_mm_com_epi32:650; CHECK: # %bb.0:651; CHECK-NEXT: vpcomltd %xmm1, %xmm0, %xmm0652; CHECK-NEXT: ret{{[l|q]}}653 %arg0 = bitcast <2 x i64> %a0 to <4 x i32>654 %arg1 = bitcast <2 x i64> %a1 to <4 x i32>655 %cmp = icmp slt <4 x i32> %arg0, %arg1656 %res = sext <4 x i1> %cmp to <4 x i32>657 %bc = bitcast <4 x i32> %res to <2 x i64>658 ret <2 x i64> %bc659}660 661define <2 x i64> @test_mm_com_epi64(<2 x i64> %a0, <2 x i64> %a1) {662; CHECK-LABEL: test_mm_com_epi64:663; CHECK: # %bb.0:664; CHECK-NEXT: vpcomltq %xmm1, %xmm0, %xmm0665; CHECK-NEXT: ret{{[l|q]}}666 %cmp = icmp slt <2 x i64> %a0, %a1667 %res = sext <2 x i1> %cmp to <2 x i64>668 ret <2 x i64> %res669}670 671define <2 x double> @test_mm_permute2_pd(<2 x double> %a0, <2 x double> %a1, <2 x i64> %a2) {672; CHECK-LABEL: test_mm_permute2_pd:673; CHECK: # %bb.0:674; CHECK-NEXT: vpermil2pd $0, %xmm2, %xmm1, %xmm0, %xmm0675; CHECK-NEXT: ret{{[l|q]}}676 %res = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> %a0, <2 x double> %a1, <2 x i64> %a2, i8 0)677 ret <2 x double> %res678}679declare <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double>, <2 x double>, <2 x i64>, i8) nounwind readnone680 681define <4 x double> @test_mm256_permute2_pd(<4 x double> %a0, <4 x double> %a1, <4 x i64> %a2) {682; CHECK-LABEL: test_mm256_permute2_pd:683; CHECK: # %bb.0:684; CHECK-NEXT: vpermil2pd $0, %ymm2, %ymm1, %ymm0, %ymm0685; CHECK-NEXT: ret{{[l|q]}}686 %res = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> %a0, <4 x double> %a1, <4 x i64> %a2, i8 0)687 ret <4 x double> %res688}689declare <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double>, <4 x double>, <4 x i64>, i8) nounwind readnone690 691define <4 x float> @test_mm_permute2_ps(<4 x float> %a0, <4 x float> %a1, <2 x i64> %a2) {692; CHECK-LABEL: test_mm_permute2_ps:693; CHECK: # %bb.0:694; CHECK-NEXT: vpermil2ps $0, %xmm2, %xmm1, %xmm0, %xmm0695; CHECK-NEXT: ret{{[l|q]}}696 %arg2 = bitcast <2 x i64> %a2 to <4 x i32>697 %res = call <4 x float> @llvm.x86.xop.vpermil2ps(<4 x float> %a0, <4 x float> %a1, <4 x i32> %arg2, i8 0)698 ret <4 x float> %res699}700declare <4 x float> @llvm.x86.xop.vpermil2ps(<4 x float>, <4 x float>, <4 x i32>, i8) nounwind readnone701 702define <8 x float> @test_mm256_permute2_ps(<8 x float> %a0, <8 x float> %a1, <4 x i64> %a2) {703; CHECK-LABEL: test_mm256_permute2_ps:704; CHECK: # %bb.0:705; CHECK-NEXT: vpermil2ps $0, %ymm2, %ymm1, %ymm0, %ymm0706; CHECK-NEXT: ret{{[l|q]}}707 %arg2 = bitcast <4 x i64> %a2 to <8 x i32>708 %res = call <8 x float> @llvm.x86.xop.vpermil2ps.256(<8 x float> %a0, <8 x float> %a1, <8 x i32> %arg2, i8 0)709 ret <8 x float> %res710}711declare <8 x float> @llvm.x86.xop.vpermil2ps.256(<8 x float>, <8 x float>, <8 x i32>, i8) nounwind readnone712 713define <4 x float> @test_mm_frcz_ss(<4 x float> %a0) {714; CHECK-LABEL: test_mm_frcz_ss:715; CHECK: # %bb.0:716; CHECK-NEXT: vfrczss %xmm0, %xmm0717; CHECK-NEXT: ret{{[l|q]}}718 %res = call <4 x float> @llvm.x86.xop.vfrcz.ss(<4 x float> %a0)719 ret <4 x float> %res720}721declare <4 x float> @llvm.x86.xop.vfrcz.ss(<4 x float>) nounwind readnone722 723define <2 x double> @test_mm_frcz_sd(<2 x double> %a0) {724; CHECK-LABEL: test_mm_frcz_sd:725; CHECK: # %bb.0:726; CHECK-NEXT: vfrczsd %xmm0, %xmm0727; CHECK-NEXT: ret{{[l|q]}}728 %res = call <2 x double> @llvm.x86.xop.vfrcz.sd(<2 x double> %a0)729 ret <2 x double> %res730}731declare <2 x double> @llvm.x86.xop.vfrcz.sd(<2 x double>) nounwind readnone732 733define <4 x float> @test_mm_frcz_ps(<4 x float> %a0) {734; CHECK-LABEL: test_mm_frcz_ps:735; CHECK: # %bb.0:736; CHECK-NEXT: vfrczps %xmm0, %xmm0737; CHECK-NEXT: ret{{[l|q]}}738 %res = call <4 x float> @llvm.x86.xop.vfrcz.ps(<4 x float> %a0)739 ret <4 x float> %res740}741declare <4 x float> @llvm.x86.xop.vfrcz.ps(<4 x float>) nounwind readnone742 743define <2 x double> @test_mm_frcz_pd(<2 x double> %a0) {744; CHECK-LABEL: test_mm_frcz_pd:745; CHECK: # %bb.0:746; CHECK-NEXT: vfrczpd %xmm0, %xmm0747; CHECK-NEXT: ret{{[l|q]}}748 %res = call <2 x double> @llvm.x86.xop.vfrcz.pd(<2 x double> %a0)749 ret <2 x double> %res750}751declare <2 x double> @llvm.x86.xop.vfrcz.pd(<2 x double>) nounwind readnone752 753define <8 x float> @test_mm256_frcz_ps(<8 x float> %a0) {754; CHECK-LABEL: test_mm256_frcz_ps:755; CHECK: # %bb.0:756; CHECK-NEXT: vfrczps %ymm0, %ymm0757; CHECK-NEXT: ret{{[l|q]}}758 %res = call <8 x float> @llvm.x86.xop.vfrcz.ps.256(<8 x float> %a0)759 ret <8 x float> %res760}761declare <8 x float> @llvm.x86.xop.vfrcz.ps.256(<8 x float>) nounwind readnone762 763define <4 x double> @test_mm256_frcz_pd(<4 x double> %a0) {764; CHECK-LABEL: test_mm256_frcz_pd:765; CHECK: # %bb.0:766; CHECK-NEXT: vfrczpd %ymm0, %ymm0767; CHECK-NEXT: ret{{[l|q]}}768 %res = call <4 x double> @llvm.x86.xop.vfrcz.pd.256(<4 x double> %a0)769 ret <4 x double> %res770}771declare <4 x double> @llvm.x86.xop.vfrcz.pd.256(<4 x double>) nounwind readnone772