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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-- | FileCheck %s3 4; These tests differ from the ones in zext-inreg-0.ll in that5; on x86-64 they do require and instructions.6 7; These should use movzbl instead of 'and 255'.8; This related to not having ZERO_EXTEND_REG node.9 10define i64 @l(i64 %d) nounwind {11; CHECK-LABEL: l:12; CHECK: # %bb.0:13; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax14; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx15; CHECK-NEXT: addl $1, %eax16; CHECK-NEXT: adcl $0, %ecx17; CHECK-NEXT: movzbl %cl, %edx18; CHECK-NEXT: retl19 %e = add i64 %d, 120 %retval = and i64 %e, 109951162777521 ret i64 %retval22}23define i64 @m(i64 %d) nounwind {24; CHECK-LABEL: m:25; CHECK: # %bb.0:26; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax27; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx28; CHECK-NEXT: addl $1, %eax29; CHECK-NEXT: adcl $0, %ecx30; CHECK-NEXT: movzwl %cx, %edx31; CHECK-NEXT: retl32 %e = add i64 %d, 133 %retval = and i64 %e, 28147497671065534 ret i64 %retval35}36