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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=CHECK,X863; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=CHECK,X644 5define i32 @i32_zext_shift_i16_zext_i1(i1 %a0) nounwind {6; CHECK-LABEL: i32_zext_shift_i16_zext_i1:7; CHECK: # %bb.0:8; CHECK-NEXT: xorl %eax, %eax9; CHECK-NEXT: ret{{[l|q]}}10 %t0 = zext i1 %a0 to i1611 %t1 = lshr i16 %t0, 512 %t2 = zext i16 %t1 to i3213 ret i32 %t214}15 16define i32 @i32_zext_shift_i16_zext_i8(i8 %a0) nounwind {17; X86-LABEL: i32_zext_shift_i16_zext_i8:18; X86: # %bb.0:19; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax20; X86-NEXT: shrl $5, %eax21; X86-NEXT: retl22;23; X64-LABEL: i32_zext_shift_i16_zext_i8:24; X64: # %bb.0:25; X64-NEXT: movzbl %dil, %eax26; X64-NEXT: shrl $5, %eax27; X64-NEXT: retq28 %t0 = zext i8 %a0 to i1629 %t1 = lshr i16 %t0, 530 %t2 = zext i16 %t1 to i3231 ret i32 %t232}33 34define i64 @i64_zext_shift_i16_zext_i8(i8 %a0) nounwind {35; X86-LABEL: i64_zext_shift_i16_zext_i8:36; X86: # %bb.0:37; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax38; X86-NEXT: shrl $5, %eax39; X86-NEXT: xorl %edx, %edx40; X86-NEXT: retl41;42; X64-LABEL: i64_zext_shift_i16_zext_i8:43; X64: # %bb.0:44; X64-NEXT: movzbl %dil, %eax45; X64-NEXT: shrl $5, %eax46; X64-NEXT: retq47 %t0 = zext i8 %a0 to i1648 %t1 = lshr i16 %t0, 549 %t2 = zext i16 %t1 to i6450 ret i64 %t251}52 53define i64 @i64_zext_shift_i32_zext_i8(i8 %a0) nounwind {54; X86-LABEL: i64_zext_shift_i32_zext_i8:55; X86: # %bb.0:56; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax57; X86-NEXT: shrl $3, %eax58; X86-NEXT: xorl %edx, %edx59; X86-NEXT: retl60;61; X64-LABEL: i64_zext_shift_i32_zext_i8:62; X64: # %bb.0:63; X64-NEXT: movzbl %dil, %eax64; X64-NEXT: shrl $3, %eax65; X64-NEXT: retq66 %t0 = zext i8 %a0 to i3267 %t1 = lshr i32 %t0, 368 %t2 = zext i32 %t1 to i6469 ret i64 %t270}71 72define i64 @i64_zext_shift_i32_zext_i16(i16 %a0) nounwind {73; X86-LABEL: i64_zext_shift_i32_zext_i16:74; X86: # %bb.0:75; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax76; X86-NEXT: shrl $5, %eax77; X86-NEXT: xorl %edx, %edx78; X86-NEXT: retl79;80; X64-LABEL: i64_zext_shift_i32_zext_i16:81; X64: # %bb.0:82; X64-NEXT: movzwl %di, %eax83; X64-NEXT: shrl $5, %eax84; X64-NEXT: retq85 %t0 = zext i16 %a0 to i3286 %t1 = lshr i32 %t0, 587 %t2 = zext i32 %t1 to i6488 ret i64 %t289}90 91define i128 @i128_zext_shift_i64_zext_i8(i8 %a0) nounwind {92; X86-LABEL: i128_zext_shift_i64_zext_i8:93; X86: # %bb.0:94; X86-NEXT: movl {{[0-9]+}}(%esp), %eax95; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx96; X86-NEXT: shrl $4, %ecx97; X86-NEXT: movl %ecx, (%eax)98; X86-NEXT: movl $0, 12(%eax)99; X86-NEXT: movl $0, 8(%eax)100; X86-NEXT: movl $0, 4(%eax)101; X86-NEXT: retl $4102;103; X64-LABEL: i128_zext_shift_i64_zext_i8:104; X64: # %bb.0:105; X64-NEXT: movzbl %dil, %eax106; X64-NEXT: shrl $4, %eax107; X64-NEXT: xorl %edx, %edx108; X64-NEXT: retq109 %t0 = zext i8 %a0 to i64110 %t1 = lshr i64 %t0, 4111 %t2 = zext i64 %t1 to i128112 ret i128 %t2113}114 115define i128 @i128_zext_shift_i64_zext_i16(i16 %a0) nounwind {116; X86-LABEL: i128_zext_shift_i64_zext_i16:117; X86: # %bb.0:118; X86-NEXT: movl {{[0-9]+}}(%esp), %eax119; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx120; X86-NEXT: shrl $7, %ecx121; X86-NEXT: movl %ecx, (%eax)122; X86-NEXT: movl $0, 12(%eax)123; X86-NEXT: movl $0, 8(%eax)124; X86-NEXT: movl $0, 4(%eax)125; X86-NEXT: retl $4126;127; X64-LABEL: i128_zext_shift_i64_zext_i16:128; X64: # %bb.0:129; X64-NEXT: movzwl %di, %eax130; X64-NEXT: shrl $7, %eax131; X64-NEXT: xorl %edx, %edx132; X64-NEXT: retq133 %t0 = zext i16 %a0 to i64134 %t1 = lshr i64 %t0,7135 %t2 = zext i64 %t1 to i128136 ret i128 %t2137}138