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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=xtensa -disable-block-placement -verify-machineinstrs < %s \3; RUN: | FileCheck %s4 5define i32 @f_eq(i32 %a, ptr %b) nounwind {6; CHECK-LABEL: f_eq:7; CHECK: l32i a8, a3, 08; CHECK-NEXT: beq a2, a8, .LBB0_29; CHECK-NEXT: # %bb.1:10; CHECK-NEXT: or a2, a8, a811; CHECK-NEXT: .LBB0_2:12; CHECK-NEXT: ret13 %val1 = load i32, ptr %b14 %tst1 = icmp eq i32 %a, %val115 %val2 = select i1 %tst1, i32 %a, i32 %val116 ret i32 %val217}18 19define i32 @f_ne(i32 %a, ptr %b) nounwind {20; CHECK-LABEL: f_ne:21; CHECK: l32i a8, a3, 022; CHECK-NEXT: bne a2, a8, .LBB1_223; CHECK-NEXT: # %bb.1:24; CHECK-NEXT: or a2, a8, a825; CHECK-NEXT: .LBB1_2:26; CHECK-NEXT: ret27 %val1 = load i32, ptr %b28 %tst1 = icmp ne i32 %a, %val129 %val2 = select i1 %tst1, i32 %a, i32 %val130 ret i32 %val231}32 33define i32 @f_ugt(i32 %a, ptr %b) nounwind {34; CHECK-LABEL: f_ugt:35; CHECK: or a8, a2, a236; CHECK-NEXT: l32i a2, a3, 037; CHECK-NEXT: bgeu a2, a8, .LBB2_238; CHECK-NEXT: # %bb.1:39; CHECK-NEXT: or a2, a8, a840; CHECK-NEXT: .LBB2_2:41; CHECK-NEXT: ret42 %val1 = load i32, ptr %b43 %tst1 = icmp ugt i32 %a, %val144 %val2 = select i1 %tst1, i32 %a, i32 %val145 ret i32 %val246}47 48define i32 @f_uge(i32 %a, ptr %b) nounwind {49; CHECK-LABEL: f_uge:50; CHECK: l32i a8, a3, 051; CHECK-NEXT: bgeu a2, a8, .LBB3_252; CHECK-NEXT: # %bb.1:53; CHECK-NEXT: or a2, a8, a854; CHECK-NEXT: .LBB3_2:55; CHECK-NEXT: ret56 %val1 = load i32, ptr %b57 %tst1 = icmp uge i32 %a, %val158 %val2 = select i1 %tst1, i32 %a, i32 %val159 ret i32 %val260}61 62define i32 @f_ult(i32 %a, ptr %b) nounwind {63; CHECK-LABEL: f_ult:64; CHECK: l32i a8, a3, 065; CHECK-NEXT: bltu a2, a8, .LBB4_266; CHECK-NEXT: # %bb.1:67; CHECK-NEXT: or a2, a8, a868; CHECK-NEXT: .LBB4_2:69; CHECK-NEXT: ret70 %val1 = load i32, ptr %b71 %tst1 = icmp ult i32 %a, %val172 %val2 = select i1 %tst1, i32 %a, i32 %val173 ret i32 %val274}75 76define i32 @f_ule(i32 %a, ptr %b) nounwind {77; CHECK-LABEL: f_ule:78; CHECK: or a8, a2, a279; CHECK-NEXT: l32i a2, a3, 080; CHECK-NEXT: bltu a2, a8, .LBB5_281; CHECK-NEXT: # %bb.1:82; CHECK-NEXT: or a2, a8, a883; CHECK-NEXT: .LBB5_2:84; CHECK-NEXT: ret85 %val1 = load i32, ptr %b86 %tst1 = icmp ule i32 %a, %val187 %val2 = select i1 %tst1, i32 %a, i32 %val188 ret i32 %val289}90 91define i32 @f_sgt(i32 %a, ptr %b) nounwind {92; CHECK-LABEL: f_sgt:93; CHECK: or a8, a2, a294; CHECK-NEXT: l32i a2, a3, 095; CHECK-NEXT: bge a2, a8, .LBB6_296; CHECK-NEXT: # %bb.1:97; CHECK-NEXT: or a2, a8, a898; CHECK-NEXT: .LBB6_2:99; CHECK-NEXT: ret100 %val1 = load i32, ptr %b101 %tst1 = icmp sgt i32 %a, %val1102 %val2 = select i1 %tst1, i32 %a, i32 %val1103 ret i32 %val2104}105 106define i32 @f_sge(i32 %a, ptr %b) nounwind {107; CHECK-LABEL: f_sge:108; CHECK: l32i a8, a3, 0109; CHECK-NEXT: bge a2, a8, .LBB7_2110; CHECK-NEXT: # %bb.1:111; CHECK-NEXT: or a2, a8, a8112; CHECK-NEXT: .LBB7_2:113; CHECK-NEXT: ret114 %val1 = load i32, ptr %b115 %tst1 = icmp sge i32 %a, %val1116 %val2 = select i1 %tst1, i32 %a, i32 %val1117 ret i32 %val2118}119 120define i32 @f_slt(i32 %a, ptr %b) nounwind {121; CHECK-LABEL: f_slt:122; CHECK: l32i a8, a3, 0123; CHECK-NEXT: blt a2, a8, .LBB8_2124; CHECK-NEXT: # %bb.1:125; CHECK-NEXT: or a2, a8, a8126; CHECK-NEXT: .LBB8_2:127; CHECK-NEXT: ret128 %val1 = load i32, ptr %b129 %tst1 = icmp slt i32 %a, %val1130 %val2 = select i1 %tst1, i32 %a, i32 %val1131 ret i32 %val2132}133 134define i32 @f_sle(i32 %a, ptr %b) nounwind {135; CHECK-LABEL: f_sle:136; CHECK: or a8, a2, a2137; CHECK-NEXT: l32i a2, a3, 0138; CHECK-NEXT: blt a2, a8, .LBB9_2139; CHECK-NEXT: # %bb.1:140; CHECK-NEXT: or a2, a8, a8141; CHECK-NEXT: .LBB9_2:142; CHECK-NEXT: ret143 %val1 = load i32, ptr %b144 %tst1 = icmp sle i32 %a, %val1145 %val2 = select i1 %tst1, i32 %a, i32 %val1146 ret i32 %val2147}148 149define i32 @f_slt_imm(i32 %a, ptr %b) nounwind {150; CHECK-LABEL: f_slt_imm:151; CHECK: movi a8, 1152; CHECK-NEXT: blt a2, a8, .LBB10_2153; CHECK-NEXT: # %bb.1:154; CHECK-NEXT: l32i a2, a3, 0155; CHECK-NEXT: .LBB10_2:156; CHECK-NEXT: ret157 %val1 = load i32, ptr %b158 %tst1 = icmp slt i32 %a, 1159 %val2 = select i1 %tst1, i32 %a, i32 %val1160 ret i32 %val2161}162 163define i32 @f_sgt_imm(i32 %a, ptr %b) nounwind {164; CHECK-LABEL: f_sgt_imm:165; CHECK: movi a8, -1166; CHECK-NEXT: blt a8, a2, .LBB11_2167; CHECK-NEXT: # %bb.1:168; CHECK-NEXT: l32i a2, a3, 0169; CHECK-NEXT: .LBB11_2:170; CHECK-NEXT: ret171 %val1 = load i32, ptr %b172 %tst1 = icmp sgt i32 %a, -1173 %val2 = select i1 %tst1, i32 %a, i32 %val1174 ret i32 %val2175}176 177define i32 @f_ult_imm(i32 %a, ptr %b) nounwind {178; CHECK-LABEL: f_ult_imm:179; CHECK: movi a8, 1024180; CHECK-NEXT: bltu a2, a8, .LBB12_2181; CHECK-NEXT: # %bb.1:182; CHECK-NEXT: l32i a2, a3, 0183; CHECK-NEXT: .LBB12_2:184; CHECK-NEXT: ret185 %val1 = load i32, ptr %b186 %tst1 = icmp ult i32 %a, 1024187 %val2 = select i1 %tst1, i32 %a, i32 %val1188 ret i32 %val2189}190 191; Tests for i64 operands192 193define i64 @f_eq_i64(i64 %a, ptr %b) nounwind {194; CHECK-LABEL: f_eq_i64:195; CHECK: l32i a8, a4, 4196; CHECK-NEXT: xor a9, a3, a8197; CHECK-NEXT: l32i a11, a4, 0198; CHECK-NEXT: xor a10, a2, a11199; CHECK-NEXT: or a9, a10, a9200; CHECK-NEXT: movi a10, 0201; CHECK-NEXT: beq a9, a10, .LBB13_2202; CHECK-NEXT: # %bb.1:203; CHECK-NEXT: or a2, a11, a11204; CHECK-NEXT: .LBB13_2:205; CHECK-NEXT: beq a9, a10, .LBB13_4206; CHECK-NEXT: # %bb.3:207; CHECK-NEXT: or a3, a8, a8208; CHECK-NEXT: .LBB13_4:209; CHECK-NEXT: ret210 %val1 = load i64, ptr %b211 %tst1 = icmp eq i64 %a, %val1212 %val2 = select i1 %tst1, i64 %a, i64 %val1213 ret i64 %val2214}215 216define i64 @f_ne_i64(i64 %a, ptr %b) nounwind {217; CHECK-LABEL: f_ne_i64:218; CHECK: l32i a8, a4, 4219; CHECK-NEXT: xor a9, a3, a8220; CHECK-NEXT: l32i a11, a4, 0221; CHECK-NEXT: xor a10, a2, a11222; CHECK-NEXT: or a9, a10, a9223; CHECK-NEXT: movi a10, 0224; CHECK-NEXT: bne a9, a10, .LBB14_2225; CHECK-NEXT: # %bb.1:226; CHECK-NEXT: or a2, a11, a11227; CHECK-NEXT: .LBB14_2:228; CHECK-NEXT: bne a9, a10, .LBB14_4229; CHECK-NEXT: # %bb.3:230; CHECK-NEXT: or a3, a8, a8231; CHECK-NEXT: .LBB14_4:232; CHECK-NEXT: ret233 %val1 = load i64, ptr %b234 %tst1 = icmp ne i64 %a, %val1235 %val2 = select i1 %tst1, i64 %a, i64 %val1236 ret i64 %val2237}238 239define i64 @f_ugt_i64(i64 %a, ptr %b) nounwind {240; CHECK-LABEL: f_ugt_i64:241; CHECK: l32i a8, a4, 4242; CHECK-NEXT: movi a9, 0243; CHECK-NEXT: movi a10, 1244; CHECK-NEXT: or a7, a10, a10245; CHECK-NEXT: bltu a8, a3, .LBB15_2246; CHECK-NEXT: # %bb.1:247; CHECK-NEXT: or a7, a9, a9248; CHECK-NEXT: .LBB15_2:249; CHECK-NEXT: l32i a11, a4, 0250; CHECK-NEXT: bltu a11, a2, .LBB15_4251; CHECK-NEXT: # %bb.3:252; CHECK-NEXT: or a10, a9, a9253; CHECK-NEXT: .LBB15_4:254; CHECK-NEXT: beq a3, a8, .LBB15_6255; CHECK-NEXT: # %bb.5:256; CHECK-NEXT: or a10, a7, a7257; CHECK-NEXT: .LBB15_6:258; CHECK-NEXT: bne a10, a9, .LBB15_8259; CHECK-NEXT: # %bb.7:260; CHECK-NEXT: or a2, a11, a11261; CHECK-NEXT: .LBB15_8:262; CHECK-NEXT: bne a10, a9, .LBB15_10263; CHECK-NEXT: # %bb.9:264; CHECK-NEXT: or a3, a8, a8265; CHECK-NEXT: .LBB15_10:266; CHECK-NEXT: ret267 %val1 = load i64, ptr %b268 %tst1 = icmp ugt i64 %a, %val1269 %val2 = select i1 %tst1, i64 %a, i64 %val1270 ret i64 %val2271}272 273define i64 @f_uge_i64(i64 %a, ptr %b) nounwind {274; CHECK-LABEL: f_uge_i64:275; CHECK: l32i a8, a4, 4276; CHECK-NEXT: movi a9, 0277; CHECK-NEXT: movi a10, 1278; CHECK-NEXT: or a7, a10, a10279; CHECK-NEXT: bgeu a3, a8, .LBB16_2280; CHECK-NEXT: # %bb.1:281; CHECK-NEXT: or a7, a9, a9282; CHECK-NEXT: .LBB16_2:283; CHECK-NEXT: l32i a11, a4, 0284; CHECK-NEXT: bgeu a2, a11, .LBB16_4285; CHECK-NEXT: # %bb.3:286; CHECK-NEXT: or a10, a9, a9287; CHECK-NEXT: .LBB16_4:288; CHECK-NEXT: beq a3, a8, .LBB16_6289; CHECK-NEXT: # %bb.5:290; CHECK-NEXT: or a10, a7, a7291; CHECK-NEXT: .LBB16_6:292; CHECK-NEXT: bne a10, a9, .LBB16_8293; CHECK-NEXT: # %bb.7:294; CHECK-NEXT: or a2, a11, a11295; CHECK-NEXT: .LBB16_8:296; CHECK-NEXT: bne a10, a9, .LBB16_10297; CHECK-NEXT: # %bb.9:298; CHECK-NEXT: or a3, a8, a8299; CHECK-NEXT: .LBB16_10:300; CHECK-NEXT: ret301 %val1 = load i64, ptr %b302 %tst1 = icmp uge i64 %a, %val1303 %val2 = select i1 %tst1, i64 %a, i64 %val1304 ret i64 %val2305}306 307define i64 @f_ult_i64(i64 %a, ptr %b) nounwind {308; CHECK-LABEL: f_ult_i64:309; CHECK: l32i a8, a4, 4310; CHECK-NEXT: movi a9, 0311; CHECK-NEXT: movi a10, 1312; CHECK-NEXT: or a7, a10, a10313; CHECK-NEXT: bltu a3, a8, .LBB17_2314; CHECK-NEXT: # %bb.1:315; CHECK-NEXT: or a7, a9, a9316; CHECK-NEXT: .LBB17_2:317; CHECK-NEXT: l32i a11, a4, 0318; CHECK-NEXT: bltu a2, a11, .LBB17_4319; CHECK-NEXT: # %bb.3:320; CHECK-NEXT: or a10, a9, a9321; CHECK-NEXT: .LBB17_4:322; CHECK-NEXT: beq a3, a8, .LBB17_6323; CHECK-NEXT: # %bb.5:324; CHECK-NEXT: or a10, a7, a7325; CHECK-NEXT: .LBB17_6:326; CHECK-NEXT: bne a10, a9, .LBB17_8327; CHECK-NEXT: # %bb.7:328; CHECK-NEXT: or a2, a11, a11329; CHECK-NEXT: .LBB17_8:330; CHECK-NEXT: bne a10, a9, .LBB17_10331; CHECK-NEXT: # %bb.9:332; CHECK-NEXT: or a3, a8, a8333; CHECK-NEXT: .LBB17_10:334; CHECK-NEXT: ret335 %val1 = load i64, ptr %b336 %tst1 = icmp ult i64 %a, %val1337 %val2 = select i1 %tst1, i64 %a, i64 %val1338 ret i64 %val2339}340 341define i64 @f_ule_i64(i64 %a, ptr %b) nounwind {342; CHECK-LABEL: f_ule_i64:343; CHECK: l32i a8, a4, 4344; CHECK-NEXT: movi a9, 0345; CHECK-NEXT: movi a10, 1346; CHECK-NEXT: or a7, a10, a10347; CHECK-NEXT: bgeu a8, a3, .LBB18_2348; CHECK-NEXT: # %bb.1:349; CHECK-NEXT: or a7, a9, a9350; CHECK-NEXT: .LBB18_2:351; CHECK-NEXT: l32i a11, a4, 0352; CHECK-NEXT: bgeu a11, a2, .LBB18_4353; CHECK-NEXT: # %bb.3:354; CHECK-NEXT: or a10, a9, a9355; CHECK-NEXT: .LBB18_4:356; CHECK-NEXT: beq a3, a8, .LBB18_6357; CHECK-NEXT: # %bb.5:358; CHECK-NEXT: or a10, a7, a7359; CHECK-NEXT: .LBB18_6:360; CHECK-NEXT: bne a10, a9, .LBB18_8361; CHECK-NEXT: # %bb.7:362; CHECK-NEXT: or a2, a11, a11363; CHECK-NEXT: .LBB18_8:364; CHECK-NEXT: bne a10, a9, .LBB18_10365; CHECK-NEXT: # %bb.9:366; CHECK-NEXT: or a3, a8, a8367; CHECK-NEXT: .LBB18_10:368; CHECK-NEXT: ret369 %val1 = load i64, ptr %b370 %tst1 = icmp ule i64 %a, %val1371 %val2 = select i1 %tst1, i64 %a, i64 %val1372 ret i64 %val2373}374 375define i64 @f_sgt_i64(i64 %a, ptr %b) nounwind {376; CHECK-LABEL: f_sgt_i64:377; CHECK: l32i a8, a4, 4378; CHECK-NEXT: movi a9, 0379; CHECK-NEXT: movi a10, 1380; CHECK-NEXT: or a7, a10, a10381; CHECK-NEXT: blt a8, a3, .LBB19_2382; CHECK-NEXT: # %bb.1:383; CHECK-NEXT: or a7, a9, a9384; CHECK-NEXT: .LBB19_2:385; CHECK-NEXT: l32i a11, a4, 0386; CHECK-NEXT: bltu a11, a2, .LBB19_4387; CHECK-NEXT: # %bb.3:388; CHECK-NEXT: or a10, a9, a9389; CHECK-NEXT: .LBB19_4:390; CHECK-NEXT: beq a3, a8, .LBB19_6391; CHECK-NEXT: # %bb.5:392; CHECK-NEXT: or a10, a7, a7393; CHECK-NEXT: .LBB19_6:394; CHECK-NEXT: bne a10, a9, .LBB19_8395; CHECK-NEXT: # %bb.7:396; CHECK-NEXT: or a2, a11, a11397; CHECK-NEXT: .LBB19_8:398; CHECK-NEXT: bne a10, a9, .LBB19_10399; CHECK-NEXT: # %bb.9:400; CHECK-NEXT: or a3, a8, a8401; CHECK-NEXT: .LBB19_10:402; CHECK-NEXT: ret403 %val1 = load i64, ptr %b404 %tst1 = icmp sgt i64 %a, %val1405 %val2 = select i1 %tst1, i64 %a, i64 %val1406 ret i64 %val2407}408 409define i64 @f_sge_i64(i64 %a, ptr %b) nounwind {410; CHECK-LABEL: f_sge_i64:411; CHECK: l32i a8, a4, 4412; CHECK-NEXT: movi a9, 0413; CHECK-NEXT: movi a10, 1414; CHECK-NEXT: or a7, a10, a10415; CHECK-NEXT: bge a3, a8, .LBB20_2416; CHECK-NEXT: # %bb.1:417; CHECK-NEXT: or a7, a9, a9418; CHECK-NEXT: .LBB20_2:419; CHECK-NEXT: l32i a11, a4, 0420; CHECK-NEXT: bgeu a2, a11, .LBB20_4421; CHECK-NEXT: # %bb.3:422; CHECK-NEXT: or a10, a9, a9423; CHECK-NEXT: .LBB20_4:424; CHECK-NEXT: beq a3, a8, .LBB20_6425; CHECK-NEXT: # %bb.5:426; CHECK-NEXT: or a10, a7, a7427; CHECK-NEXT: .LBB20_6:428; CHECK-NEXT: bne a10, a9, .LBB20_8429; CHECK-NEXT: # %bb.7:430; CHECK-NEXT: or a2, a11, a11431; CHECK-NEXT: .LBB20_8:432; CHECK-NEXT: bne a10, a9, .LBB20_10433; CHECK-NEXT: # %bb.9:434; CHECK-NEXT: or a3, a8, a8435; CHECK-NEXT: .LBB20_10:436; CHECK-NEXT: ret437 %val1 = load i64, ptr %b438 %tst1 = icmp sge i64 %a, %val1439 %val2 = select i1 %tst1, i64 %a, i64 %val1440 ret i64 %val2441}442 443define i64 @f_slt_i64(i64 %a, ptr %b) nounwind {444; CHECK-LABEL: f_slt_i64:445; CHECK: l32i a8, a4, 4446; CHECK-NEXT: movi a9, 0447; CHECK-NEXT: movi a10, 1448; CHECK-NEXT: or a7, a10, a10449; CHECK-NEXT: blt a3, a8, .LBB21_2450; CHECK-NEXT: # %bb.1:451; CHECK-NEXT: or a7, a9, a9452; CHECK-NEXT: .LBB21_2:453; CHECK-NEXT: l32i a11, a4, 0454; CHECK-NEXT: bltu a2, a11, .LBB21_4455; CHECK-NEXT: # %bb.3:456; CHECK-NEXT: or a10, a9, a9457; CHECK-NEXT: .LBB21_4:458; CHECK-NEXT: beq a3, a8, .LBB21_6459; CHECK-NEXT: # %bb.5:460; CHECK-NEXT: or a10, a7, a7461; CHECK-NEXT: .LBB21_6:462; CHECK-NEXT: bne a10, a9, .LBB21_8463; CHECK-NEXT: # %bb.7:464; CHECK-NEXT: or a2, a11, a11465; CHECK-NEXT: .LBB21_8:466; CHECK-NEXT: bne a10, a9, .LBB21_10467; CHECK-NEXT: # %bb.9:468; CHECK-NEXT: or a3, a8, a8469; CHECK-NEXT: .LBB21_10:470; CHECK-NEXT: ret471 %val1 = load i64, ptr %b472 %tst1 = icmp slt i64 %a, %val1473 %val2 = select i1 %tst1, i64 %a, i64 %val1474 ret i64 %val2475}476 477define i64 @f_sle_i64(i64 %a, ptr %b) nounwind {478; CHECK-LABEL: f_sle_i64:479; CHECK: l32i a8, a4, 4480; CHECK-NEXT: movi a9, 0481; CHECK-NEXT: movi a10, 1482; CHECK-NEXT: or a7, a10, a10483; CHECK-NEXT: bge a8, a3, .LBB22_2484; CHECK-NEXT: # %bb.1:485; CHECK-NEXT: or a7, a9, a9486; CHECK-NEXT: .LBB22_2:487; CHECK-NEXT: l32i a11, a4, 0488; CHECK-NEXT: bgeu a11, a2, .LBB22_4489; CHECK-NEXT: # %bb.3:490; CHECK-NEXT: or a10, a9, a9491; CHECK-NEXT: .LBB22_4:492; CHECK-NEXT: beq a3, a8, .LBB22_6493; CHECK-NEXT: # %bb.5:494; CHECK-NEXT: or a10, a7, a7495; CHECK-NEXT: .LBB22_6:496; CHECK-NEXT: bne a10, a9, .LBB22_8497; CHECK-NEXT: # %bb.7:498; CHECK-NEXT: or a2, a11, a11499; CHECK-NEXT: .LBB22_8:500; CHECK-NEXT: bne a10, a9, .LBB22_10501; CHECK-NEXT: # %bb.9:502; CHECK-NEXT: or a3, a8, a8503; CHECK-NEXT: .LBB22_10:504; CHECK-NEXT: ret505 %val1 = load i64, ptr %b506 %tst1 = icmp sle i64 %a, %val1507 %val2 = select i1 %tst1, i64 %a, i64 %val1508 ret i64 %val2509}510