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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 32; RUN: opt < %s -passes=asan -S | FileCheck %s3; RUN: opt < %s -passes=asan -asan-recover -S | FileCheck %s --check-prefix=RECOV4target triple = "amdgcn-amd-amdhsa"5 6@x = addrspace(4) global [2 x i32] zeroinitializer, align 47@x8 = addrspace(4) global [2 x i64] zeroinitializer, align 88 9define protected amdgpu_kernel void @constant_load(i64 %i) sanitize_address {10; CHECK-LABEL: define protected amdgpu_kernel void @constant_load(11; CHECK-SAME: i64 [[I:%.*]]) #[[ATTR0:[0-9]+]] {12; CHECK-NEXT: entry:13; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds [2 x i32], ptr addrspace(4) @x, i64 0, i64 [[I]]14; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr addrspace(4) [[A]] to i6415; CHECK-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 316; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], 214745088017; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr18; CHECK-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP3]], align 119; CHECK-NEXT: [[TMP5:%.*]] = icmp ne i8 [[TMP4]], 020; CHECK-NEXT: [[TMP6:%.*]] = and i64 [[TMP0]], 721; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[TMP6]], 322; CHECK-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP7]] to i823; CHECK-NEXT: [[TMP9:%.*]] = icmp sge i8 [[TMP8]], [[TMP4]]24; CHECK-NEXT: [[TMP10:%.*]] = and i1 [[TMP5]], [[TMP9]]25; CHECK-NEXT: [[TMP11:%.*]] = call i64 @llvm.amdgcn.ballot.i64(i1 [[TMP10]])26; CHECK-NEXT: [[TMP12:%.*]] = icmp ne i64 [[TMP11]], 027; CHECK-NEXT: br i1 [[TMP12]], label [[ASAN_REPORT:%.*]], label [[TMP15:%.*]], !prof [[PROF2:![0-9]+]]28; CHECK: asan.report:29; CHECK-NEXT: br i1 [[TMP10]], label [[TMP13:%.*]], label [[TMP14:%.*]]30; CHECK: 13:31; CHECK-NEXT: call void @__asan_report_load4(i64 [[TMP0]]) #[[ATTR5:[0-9]+]]32; CHECK-NEXT: call void @llvm.amdgcn.unreachable()33; CHECK-NEXT: br label [[TMP14]]34; CHECK: 14:35; CHECK-NEXT: br label [[TMP15]]36; CHECK: 15:37; CHECK-NEXT: [[Q:%.*]] = load i32, ptr addrspace(4) [[A]], align 438; CHECK-NEXT: ret void39;40; RECOV-LABEL: define protected amdgpu_kernel void @constant_load(41; RECOV-SAME: i64 [[I:%.*]]) #[[ATTR0:[0-9]+]] {42; RECOV-NEXT: entry:43; RECOV-NEXT: [[A:%.*]] = getelementptr inbounds [2 x i32], ptr addrspace(4) @x, i64 0, i64 [[I]]44; RECOV-NEXT: [[TMP0:%.*]] = ptrtoint ptr addrspace(4) [[A]] to i6445; RECOV-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 346; RECOV-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], 214745088047; RECOV-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr48; RECOV-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP3]], align 149; RECOV-NEXT: [[TMP5:%.*]] = icmp ne i8 [[TMP4]], 050; RECOV-NEXT: [[TMP6:%.*]] = and i64 [[TMP0]], 751; RECOV-NEXT: [[TMP7:%.*]] = add i64 [[TMP6]], 352; RECOV-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP7]] to i853; RECOV-NEXT: [[TMP9:%.*]] = icmp sge i8 [[TMP8]], [[TMP4]]54; RECOV-NEXT: [[TMP10:%.*]] = and i1 [[TMP5]], [[TMP9]]55; RECOV-NEXT: br i1 [[TMP10]], label [[ASAN_REPORT:%.*]], label [[TMP11:%.*]], !prof [[PROF2:![0-9]+]]56; RECOV: asan.report:57; RECOV-NEXT: call void @__asan_report_load4_noabort(i64 [[TMP0]]) #[[ATTR3:[0-9]+]]58; RECOV-NEXT: br label [[TMP11]]59; RECOV: 11:60; RECOV-NEXT: [[Q:%.*]] = load i32, ptr addrspace(4) [[A]], align 461; RECOV-NEXT: ret void62;63entry:64 %a = getelementptr inbounds [2 x i32], ptr addrspace(4) @x, i64 0, i64 %i65 %q = load i32, ptr addrspace(4) %a, align 466 ret void67}68 69define protected amdgpu_kernel void @constant_load_8(i64 %i) sanitize_address {70; CHECK-LABEL: define protected amdgpu_kernel void @constant_load_8(71; CHECK-SAME: i64 [[I:%.*]]) #[[ATTR0]] {72; CHECK-NEXT: entry:73; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds [2 x i64], ptr addrspace(4) @x8, i64 0, i64 [[I]]74; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr addrspace(4) [[A]] to i6475; CHECK-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 376; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], 214745088077; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr78; CHECK-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP3]], align 179; CHECK-NEXT: [[TMP5:%.*]] = icmp ne i8 [[TMP4]], 080; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.amdgcn.ballot.i64(i1 [[TMP5]])81; CHECK-NEXT: [[TMP7:%.*]] = icmp ne i64 [[TMP6]], 082; CHECK-NEXT: br i1 [[TMP7]], label [[ASAN_REPORT:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]83; CHECK: asan.report:84; CHECK-NEXT: br i1 [[TMP5]], label [[TMP8:%.*]], label [[TMP9:%.*]]85; CHECK: 8:86; CHECK-NEXT: call void @__asan_report_load8(i64 [[TMP0]]) #[[ATTR5]]87; CHECK-NEXT: call void @llvm.amdgcn.unreachable()88; CHECK-NEXT: br label [[TMP9]]89; CHECK: 9:90; CHECK-NEXT: br label [[TMP10]]91; CHECK: 10:92; CHECK-NEXT: [[Q:%.*]] = load i64, ptr addrspace(4) [[A]], align 893; CHECK-NEXT: ret void94;95; RECOV-LABEL: define protected amdgpu_kernel void @constant_load_8(96; RECOV-SAME: i64 [[I:%.*]]) #[[ATTR0]] {97; RECOV-NEXT: entry:98; RECOV-NEXT: [[A:%.*]] = getelementptr inbounds [2 x i64], ptr addrspace(4) @x8, i64 0, i64 [[I]]99; RECOV-NEXT: [[TMP0:%.*]] = ptrtoint ptr addrspace(4) [[A]] to i64100; RECOV-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 3101; RECOV-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], 2147450880102; RECOV-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr103; RECOV-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP3]], align 1104; RECOV-NEXT: [[TMP5:%.*]] = icmp ne i8 [[TMP4]], 0105; RECOV-NEXT: br i1 [[TMP5]], label [[ASAN_REPORT:%.*]], label [[TMP6:%.*]], !prof [[PROF2]]106; RECOV: asan.report:107; RECOV-NEXT: call void @__asan_report_load8_noabort(i64 [[TMP0]]) #[[ATTR3]]108; RECOV-NEXT: br label [[TMP6]]109; RECOV: 6:110; RECOV-NEXT: [[Q:%.*]] = load i64, ptr addrspace(4) [[A]], align 8111; RECOV-NEXT: ret void112;113entry:114 %a = getelementptr inbounds [2 x i64], ptr addrspace(4) @x8, i64 0, i64 %i115 %q = load i64, ptr addrspace(4) %a, align 8116 ret void117}118