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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 32; RUN: opt < %s -passes=asan -S | FileCheck %s3; RUN: opt < %s -passes=asan -asan-recover -S | FileCheck %s --check-prefix=RECOV4target triple = "amdgcn-amd-amdhsa"5 6define protected amdgpu_kernel void @global_store(ptr addrspace(1) %p, i32 %i) sanitize_address {7; CHECK-LABEL: define protected amdgpu_kernel void @global_store(8; CHECK-SAME: ptr addrspace(1) [[P:%.*]], i32 [[I:%.*]]) #[[ATTR0:[0-9]+]] {9; CHECK-NEXT: entry:10; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr addrspace(1) [[P]] to i6411; CHECK-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 312; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], 214745088013; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr14; CHECK-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP3]], align 115; CHECK-NEXT: [[TMP5:%.*]] = icmp ne i8 [[TMP4]], 016; CHECK-NEXT: [[TMP6:%.*]] = and i64 [[TMP0]], 717; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[TMP6]], 318; CHECK-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP7]] to i819; CHECK-NEXT: [[TMP9:%.*]] = icmp sge i8 [[TMP8]], [[TMP4]]20; CHECK-NEXT: [[TMP10:%.*]] = and i1 [[TMP5]], [[TMP9]]21; CHECK-NEXT: [[TMP11:%.*]] = call i64 @llvm.amdgcn.ballot.i64(i1 [[TMP10]])22; CHECK-NEXT: [[TMP12:%.*]] = icmp ne i64 [[TMP11]], 023; CHECK-NEXT: br i1 [[TMP12]], label [[ASAN_REPORT:%.*]], label [[TMP15:%.*]], !prof [[PROF0:![0-9]+]]24; CHECK: asan.report:25; CHECK-NEXT: br i1 [[TMP10]], label [[TMP13:%.*]], label [[TMP14:%.*]]26; CHECK: 13:27; CHECK-NEXT: call void @__asan_report_store4(i64 [[TMP0]]) #[[ATTR5:[0-9]+]]28; CHECK-NEXT: call void @llvm.amdgcn.unreachable()29; CHECK-NEXT: br label [[TMP14]]30; CHECK: 14:31; CHECK-NEXT: br label [[TMP15]]32; CHECK: 15:33; CHECK-NEXT: store i32 0, ptr addrspace(1) [[P]], align 434; CHECK-NEXT: ret void35;36; RECOV-LABEL: define protected amdgpu_kernel void @global_store(37; RECOV-SAME: ptr addrspace(1) [[P:%.*]], i32 [[I:%.*]]) #[[ATTR0:[0-9]+]] {38; RECOV-NEXT: entry:39; RECOV-NEXT: [[TMP0:%.*]] = ptrtoint ptr addrspace(1) [[P]] to i6440; RECOV-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 341; RECOV-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], 214745088042; RECOV-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr43; RECOV-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP3]], align 144; RECOV-NEXT: [[TMP5:%.*]] = icmp ne i8 [[TMP4]], 045; RECOV-NEXT: [[TMP6:%.*]] = and i64 [[TMP0]], 746; RECOV-NEXT: [[TMP7:%.*]] = add i64 [[TMP6]], 347; RECOV-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP7]] to i848; RECOV-NEXT: [[TMP9:%.*]] = icmp sge i8 [[TMP8]], [[TMP4]]49; RECOV-NEXT: [[TMP10:%.*]] = and i1 [[TMP5]], [[TMP9]]50; RECOV-NEXT: br i1 [[TMP10]], label [[ASAN_REPORT:%.*]], label [[TMP11:%.*]], !prof [[PROF0:![0-9]+]]51; RECOV: asan.report:52; RECOV-NEXT: call void @__asan_report_store4_noabort(i64 [[TMP0]]) #[[ATTR3:[0-9]+]]53; RECOV-NEXT: br label [[TMP11]]54; RECOV: 11:55; RECOV-NEXT: store i32 0, ptr addrspace(1) [[P]], align 456; RECOV-NEXT: ret void57;58entry:59 60 store i32 0, ptr addrspace(1) %p, align 461 ret void62}63 64define protected amdgpu_kernel void @global_load(ptr addrspace(1) %p, i32 %i) sanitize_address {65; CHECK-LABEL: define protected amdgpu_kernel void @global_load(66; CHECK-SAME: ptr addrspace(1) [[P:%.*]], i32 [[I:%.*]]) #[[ATTR0]] {67; CHECK-NEXT: entry:68; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr addrspace(1) [[P]] to i6469; CHECK-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 370; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], 214745088071; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr72; CHECK-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP3]], align 173; CHECK-NEXT: [[TMP5:%.*]] = icmp ne i8 [[TMP4]], 074; CHECK-NEXT: [[TMP6:%.*]] = and i64 [[TMP0]], 775; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[TMP6]], 376; CHECK-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP7]] to i877; CHECK-NEXT: [[TMP9:%.*]] = icmp sge i8 [[TMP8]], [[TMP4]]78; CHECK-NEXT: [[TMP10:%.*]] = and i1 [[TMP5]], [[TMP9]]79; CHECK-NEXT: [[TMP11:%.*]] = call i64 @llvm.amdgcn.ballot.i64(i1 [[TMP10]])80; CHECK-NEXT: [[TMP12:%.*]] = icmp ne i64 [[TMP11]], 081; CHECK-NEXT: br i1 [[TMP12]], label [[ASAN_REPORT:%.*]], label [[TMP15:%.*]], !prof [[PROF0]]82; CHECK: asan.report:83; CHECK-NEXT: br i1 [[TMP10]], label [[TMP13:%.*]], label [[TMP14:%.*]]84; CHECK: 13:85; CHECK-NEXT: call void @__asan_report_load4(i64 [[TMP0]]) #[[ATTR5]]86; CHECK-NEXT: call void @llvm.amdgcn.unreachable()87; CHECK-NEXT: br label [[TMP14]]88; CHECK: 14:89; CHECK-NEXT: br label [[TMP15]]90; CHECK: 15:91; CHECK-NEXT: [[Q:%.*]] = load i32, ptr addrspace(1) [[P]], align 492; CHECK-NEXT: ret void93;94; RECOV-LABEL: define protected amdgpu_kernel void @global_load(95; RECOV-SAME: ptr addrspace(1) [[P:%.*]], i32 [[I:%.*]]) #[[ATTR0]] {96; RECOV-NEXT: entry:97; RECOV-NEXT: [[TMP0:%.*]] = ptrtoint ptr addrspace(1) [[P]] to i6498; RECOV-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 399; RECOV-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], 2147450880100; RECOV-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr101; RECOV-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP3]], align 1102; RECOV-NEXT: [[TMP5:%.*]] = icmp ne i8 [[TMP4]], 0103; RECOV-NEXT: [[TMP6:%.*]] = and i64 [[TMP0]], 7104; RECOV-NEXT: [[TMP7:%.*]] = add i64 [[TMP6]], 3105; RECOV-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP7]] to i8106; RECOV-NEXT: [[TMP9:%.*]] = icmp sge i8 [[TMP8]], [[TMP4]]107; RECOV-NEXT: [[TMP10:%.*]] = and i1 [[TMP5]], [[TMP9]]108; RECOV-NEXT: br i1 [[TMP10]], label [[ASAN_REPORT:%.*]], label [[TMP11:%.*]], !prof [[PROF0]]109; RECOV: asan.report:110; RECOV-NEXT: call void @__asan_report_load4_noabort(i64 [[TMP0]]) #[[ATTR3]]111; RECOV-NEXT: br label [[TMP11]]112; RECOV: 11:113; RECOV-NEXT: [[Q:%.*]] = load i32, ptr addrspace(1) [[P]], align 4114; RECOV-NEXT: ret void115;116entry:117 118 %q = load i32, ptr addrspace(1) %p, align 4119 ret void120}121 122define protected amdgpu_kernel void @global_store_8(ptr addrspace(1) %p) sanitize_address {123; CHECK-LABEL: define protected amdgpu_kernel void @global_store_8(124; CHECK-SAME: ptr addrspace(1) [[P:%.*]]) #[[ATTR0]] {125; CHECK-NEXT: entry:126; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr addrspace(1) [[P]] to i64127; CHECK-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 3128; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], 2147450880129; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr130; CHECK-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP3]], align 1131; CHECK-NEXT: [[TMP5:%.*]] = icmp ne i8 [[TMP4]], 0132; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.amdgcn.ballot.i64(i1 [[TMP5]])133; CHECK-NEXT: [[TMP7:%.*]] = icmp ne i64 [[TMP6]], 0134; CHECK-NEXT: br i1 [[TMP7]], label [[ASAN_REPORT:%.*]], label [[TMP10:%.*]], !prof [[PROF0]]135; CHECK: asan.report:136; CHECK-NEXT: br i1 [[TMP5]], label [[TMP8:%.*]], label [[TMP9:%.*]]137; CHECK: 8:138; CHECK-NEXT: call void @__asan_report_store8(i64 [[TMP0]]) #[[ATTR5]]139; CHECK-NEXT: call void @llvm.amdgcn.unreachable()140; CHECK-NEXT: br label [[TMP9]]141; CHECK: 9:142; CHECK-NEXT: br label [[TMP10]]143; CHECK: 10:144; CHECK-NEXT: store i64 0, ptr addrspace(1) [[P]], align 8145; CHECK-NEXT: ret void146;147; RECOV-LABEL: define protected amdgpu_kernel void @global_store_8(148; RECOV-SAME: ptr addrspace(1) [[P:%.*]]) #[[ATTR0]] {149; RECOV-NEXT: entry:150; RECOV-NEXT: [[TMP0:%.*]] = ptrtoint ptr addrspace(1) [[P]] to i64151; RECOV-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 3152; RECOV-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], 2147450880153; RECOV-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr154; RECOV-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP3]], align 1155; RECOV-NEXT: [[TMP5:%.*]] = icmp ne i8 [[TMP4]], 0156; RECOV-NEXT: br i1 [[TMP5]], label [[ASAN_REPORT:%.*]], label [[TMP6:%.*]], !prof [[PROF0]]157; RECOV: asan.report:158; RECOV-NEXT: call void @__asan_report_store8_noabort(i64 [[TMP0]]) #[[ATTR3]]159; RECOV-NEXT: br label [[TMP6]]160; RECOV: 6:161; RECOV-NEXT: store i64 0, ptr addrspace(1) [[P]], align 8162; RECOV-NEXT: ret void163;164entry:165 store i64 0, ptr addrspace(1) %p, align 8166 ret void167}168 169define protected amdgpu_kernel void @global_load_8(ptr addrspace(1) %p) sanitize_address {170; CHECK-LABEL: define protected amdgpu_kernel void @global_load_8(171; CHECK-SAME: ptr addrspace(1) [[P:%.*]]) #[[ATTR0]] {172; CHECK-NEXT: entry:173; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr addrspace(1) [[P]] to i64174; CHECK-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 3175; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], 2147450880176; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr177; CHECK-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP3]], align 1178; CHECK-NEXT: [[TMP5:%.*]] = icmp ne i8 [[TMP4]], 0179; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.amdgcn.ballot.i64(i1 [[TMP5]])180; CHECK-NEXT: [[TMP7:%.*]] = icmp ne i64 [[TMP6]], 0181; CHECK-NEXT: br i1 [[TMP7]], label [[ASAN_REPORT:%.*]], label [[TMP10:%.*]], !prof [[PROF0]]182; CHECK: asan.report:183; CHECK-NEXT: br i1 [[TMP5]], label [[TMP8:%.*]], label [[TMP9:%.*]]184; CHECK: 8:185; CHECK-NEXT: call void @__asan_report_load8(i64 [[TMP0]]) #[[ATTR5]]186; CHECK-NEXT: call void @llvm.amdgcn.unreachable()187; CHECK-NEXT: br label [[TMP9]]188; CHECK: 9:189; CHECK-NEXT: br label [[TMP10]]190; CHECK: 10:191; CHECK-NEXT: [[Q:%.*]] = load i64, ptr addrspace(1) [[P]], align 8192; CHECK-NEXT: ret void193;194; RECOV-LABEL: define protected amdgpu_kernel void @global_load_8(195; RECOV-SAME: ptr addrspace(1) [[P:%.*]]) #[[ATTR0]] {196; RECOV-NEXT: entry:197; RECOV-NEXT: [[TMP0:%.*]] = ptrtoint ptr addrspace(1) [[P]] to i64198; RECOV-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 3199; RECOV-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], 2147450880200; RECOV-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr201; RECOV-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP3]], align 1202; RECOV-NEXT: [[TMP5:%.*]] = icmp ne i8 [[TMP4]], 0203; RECOV-NEXT: br i1 [[TMP5]], label [[ASAN_REPORT:%.*]], label [[TMP6:%.*]], !prof [[PROF0]]204; RECOV: asan.report:205; RECOV-NEXT: call void @__asan_report_load8_noabort(i64 [[TMP0]]) #[[ATTR3]]206; RECOV-NEXT: br label [[TMP6]]207; RECOV: 6:208; RECOV-NEXT: [[Q:%.*]] = load i64, ptr addrspace(1) [[P]], align 8209; RECOV-NEXT: ret void210;211entry:212 %q = load i64, ptr addrspace(1) %p, align 8213 ret void214}215