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1; RUN: opt < %s -passes=dfsan -dfsan-track-origins=1 -S | FileCheck %s --check-prefixes=CHECK,COMBINE_LOAD_PTR2; RUN: opt < %s -passes=dfsan -dfsan-track-origins=1 -dfsan-combine-pointer-labels-on-load=false -S | FileCheck %s3target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"4target triple = "x86_64-unknown-linux-gnu"5 6define {} @load0(ptr %p) {7 ; CHECK-LABEL: @load0.dfsan8 ; CHECK-NEXT: %a = load {}, ptr %p, align 19 ; CHECK-NEXT: store {} zeroinitializer, ptr @__dfsan_retval_tls, align [[ALIGN:2]]10 ; CHECK-NEXT: store i32 0, ptr @__dfsan_retval_origin_tls, align 411 ; CHECK-NEXT: ret {} %a12 13 %a = load {}, ptr %p14 ret {} %a15}16 17define i16 @load_non_escaped_alloca() {18 ; CHECK-LABEL: @load_non_escaped_alloca.dfsan19 ; CHECK-NEXT: %[[#S_ALLOCA:]] = alloca i8, align 120 ; CHECK-NEXT: %_dfsa = alloca i32, align 421 ; CHECK: %[[#SHADOW:]] = load i8, ptr %[[#S_ALLOCA]], align 122 ; CHECK-NEXT: %[[#ORIGIN:]] = load i32, ptr %_dfsa, align 423 ; CHECK-NEXT: %a = load i16, ptr %p, align 224 ; CHECK-NEXT: store i8 %[[#SHADOW]], ptr @__dfsan_retval_tls, align [[ALIGN]]25 ; CHECK-NEXT: store i32 %[[#ORIGIN]], ptr @__dfsan_retval_origin_tls, align 426 27 %p = alloca i1628 %a = load i16, ptr %p29 ret i16 %a30}31 32define ptr @load_escaped_alloca() {33 ; CHECK-LABEL: @load_escaped_alloca.dfsan34 ; CHECK: %[[#INTP:]] = ptrtoint ptr %p to i6435 ; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]36 ; CHECK-NEXT: %[[#SHADOW_PTR0:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr37 ; CHECK-NEXT: %[[#ORIGIN_OFFSET:]] = add i64 %[[#SHADOW_OFFSET]], [[#%.10d,ORIGIN_BASE:]]38 ; CHECK-NEXT: %[[#ORIGIN_ADDR:]] = and i64 %[[#ORIGIN_OFFSET]], -439 ; CHECK-NEXT: %[[#ORIGIN_PTR:]] = inttoptr i64 %[[#ORIGIN_ADDR]] to ptr40 ; CHECK-NEXT: {{%.*}} = load i32, ptr %[[#ORIGIN_PTR]], align 441 ; CHECK-NEXT: %[[#SHADOW_PTR1:]] = getelementptr i8, ptr %[[#SHADOW_PTR0]], i64 142 ; CHECK-NEXT: %[[#SHADOW:]] = load i8, ptr %[[#SHADOW_PTR0]], align 143 ; CHECK-NEXT: %[[#SHADOW+1]] = load i8, ptr %[[#SHADOW_PTR1]], align 144 ; CHECK-NEXT: {{%.*}} = or i8 %[[#SHADOW]], %[[#SHADOW+1]]45 ; CHECK-NEXT: %a = load i16, ptr %p, align 246 ; CHECK-NEXT: store i8 0, ptr @__dfsan_retval_tls, align [[ALIGN]]47 ; CHECK-NEXT: store i32 0, ptr @__dfsan_retval_origin_tls, align 448 49 %p = alloca i1650 %a = load i16, ptr %p51 ret ptr %p52}53 54@X = constant i1 155define i1 @load_global() {56 ; CHECK-LABEL: @load_global.dfsan57 ; CHECK: %a = load i1, ptr @X, align 158 ; CHECK-NEXT: store i8 0, ptr @__dfsan_retval_tls, align [[ALIGN]]59 ; CHECK-NEXT: store i32 0, ptr @__dfsan_retval_origin_tls, align 460 61 %a = load i1, ptr @X62 ret i1 %a63}64 65define i1 @load1(ptr %p) {66 ; CHECK-LABEL: @load1.dfsan67 68 ; COMBINE_LOAD_PTR-NEXT: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 469 ; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i8, ptr @__dfsan_arg_tls, align [[ALIGN]]70 71 ; CHECK-NEXT: %[[#INTP:]] = ptrtoint ptr %p to i6472 ; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#MASK]]73 ; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr74 ; CHECK-NEXT: %[[#ORIGIN_OFFSET:]] = add i64 %[[#SHADOW_OFFSET]], [[#ORIGIN_BASE]]75 ; CHECK-NEXT: %[[#ORIGIN_ADDR:]] = and i64 %[[#ORIGIN_OFFSET]], -476 ; CHECK-NEXT: %[[#ORIGIN_PTR:]] = inttoptr i64 %[[#ORIGIN_ADDR]] to ptr77 ; CHECK-NEXT: %[[#AO:]] = load i32, ptr %[[#ORIGIN_PTR]], align 478 ; CHECK-NEXT: %[[#AS:]] = load i8, ptr %[[#SHADOW_PTR]], align 179 80 ; COMBINE_LOAD_PTR-NEXT: %[[#AS:]] = or i8 %[[#AS]], %[[#PS]]81 ; COMBINE_LOAD_PTR-NEXT: %[[#NZ:]] = icmp ne i8 %[[#PS]], 082 ; COMBINE_LOAD_PTR-NEXT: %[[#AO:]] = select i1 %[[#NZ]], i32 %[[#PO]], i32 %[[#AO]]83 84 ; CHECK-NEXT: %a = load i1, ptr %p, align 185 ; CHECK-NEXT: store i8 %[[#AS]], ptr @__dfsan_retval_tls, align [[ALIGN]]86 ; CHECK-NEXT: store i32 %[[#AO]], ptr @__dfsan_retval_origin_tls, align 487 88 %a = load i1, ptr %p89 ret i1 %a90}91 92define i16 @load16(i1 %i, ptr %p) {93 ; CHECK-LABEL: @load16.dfsan94 95 ; COMBINE_LOAD_PTR-NEXT: %[[#PO:]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 496 ; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i8, ptr getelementptr (i8, ptr @__dfsan_arg_tls, i64 2), align [[ALIGN]]97 98 ; CHECK-NEXT: %[[#INTP:]] = ptrtoint ptr %p to i6499 ; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#MASK]]100 ; CHECK-NEXT: %[[#SHADOW_PTR0:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr101 ; CHECK-NEXT: %[[#ORIGIN_OFFSET:]] = add i64 %[[#SHADOW_OFFSET]], [[#ORIGIN_BASE]]102 ; CHECK-NEXT: %[[#ORIGIN_ADDR:]] = and i64 %[[#ORIGIN_OFFSET]], -4103 ; CHECK-NEXT: %[[#ORIGIN_PTR:]] = inttoptr i64 %[[#ORIGIN_ADDR]] to ptr104 ; CHECK-NEXT: %[[#AO:]] = load i32, ptr %[[#ORIGIN_PTR]], align 4105 ; CHECK-NEXT: %[[#SHADOW_PTR1:]] = getelementptr i8, ptr %[[#SHADOW_PTR0]], i64 1106 ; CHECK-NEXT: %[[#SHADOW:]] = load i8, ptr %[[#SHADOW_PTR0]], align 1107 ; CHECK-NEXT: %[[#SHADOW+1]] = load i8, ptr %[[#SHADOW_PTR1]], align 1108 ; CHECK-NEXT: %[[#AS:]] = or i8 %[[#SHADOW]], %[[#SHADOW+1]]109 110 ; COMBINE_LOAD_PTR-NEXT: %[[#AS:]] = or i8 %[[#AS]], %[[#PS]]111 ; COMBINE_LOAD_PTR-NEXT: %[[#NZ:]] = icmp ne i8 %[[#PS]], 0112 ; COMBINE_LOAD_PTR-NEXT: %[[#AO:]] = select i1 %[[#NZ]], i32 %[[#PO]], i32 %[[#AO]]113 114 ; CHECK-NEXT: %a = load i16, ptr %p, align 2115 ; CHECK-NEXT: store i8 %[[#AS]], ptr @__dfsan_retval_tls, align [[ALIGN]]116 ; CHECK-NEXT: store i32 %[[#AO]], ptr @__dfsan_retval_origin_tls, align 4117 118 %a = load i16, ptr %p119 ret i16 %a120}121 122define i32 @load32(ptr %p) {123 ; CHECK-LABEL: @load32.dfsan124 125 ; COMBINE_LOAD_PTR-NEXT: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4126 ; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i8, ptr @__dfsan_arg_tls, align [[ALIGN]]127 128 ; CHECK-NEXT: %[[#INTP:]] = ptrtoint ptr %p to i64129 ; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#MASK]]130 ; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr131 ; CHECK-NEXT: %[[#ORIGIN_ADDR:]] = add i64 %[[#SHADOW_OFFSET]], [[#ORIGIN_BASE]]132 ; CHECK-NEXT: %[[#ORIGIN_PTR:]] = inttoptr i64 %[[#ORIGIN_ADDR]] to ptr133 ; CHECK-NEXT: %[[#AO:]] = load i32, ptr %[[#ORIGIN_PTR]], align 4134 ; CHECK-NEXT: %[[#WIDE_SHADOW:]] = load i[[#WSBITS:32]], ptr %[[#SHADOW_PTR]], align 1135 ; CHECK-NEXT: %[[#WIDE_SHADOW+1]] = lshr i[[#WSBITS]] %[[#WIDE_SHADOW]], 16136 ; CHECK-NEXT: %[[#WIDE_SHADOW+2]] = or i[[#WSBITS]] %[[#WIDE_SHADOW]], %[[#WIDE_SHADOW+1]]137 ; CHECK-NEXT: %[[#WIDE_SHADOW+3]] = lshr i[[#WSBITS]] %[[#WIDE_SHADOW+2]], 8138 ; CHECK-NEXT: %[[#WIDE_SHADOW+4]] = or i[[#WSBITS]] %[[#WIDE_SHADOW+2]], %[[#WIDE_SHADOW+3]]139 ; CHECK-NEXT: %[[#SHADOW:]] = trunc i[[#WSBITS]] %[[#WIDE_SHADOW+4]] to i8140 141 ; COMBINE_LOAD_PTR-NEXT: %[[#SHADOW:]] = or i8 %[[#SHADOW]], %[[#PS]]142 ; COMBINE_LOAD_PTR-NEXT: %[[#NZ:]] = icmp ne i8 %[[#PS]], 0143 ; COMBINE_LOAD_PTR-NEXT: %[[#AO:]] = select i1 %[[#NZ]], i32 %[[#PO]], i32 %[[#AO]]144 145 ; CHECK-NEXT: %a = load i32, ptr %p, align 4146 ; CHECK-NEXT: store i8 %[[#SHADOW]], ptr @__dfsan_retval_tls, align [[ALIGN]]147 ; CHECK-NEXT: store i32 %[[#AO]], ptr @__dfsan_retval_origin_tls, align 4148 149 %a = load i32, ptr %p150 ret i32 %a151}152 153define i64 @load64(ptr %p) {154 ; CHECK-LABEL: @load64.dfsan155 156 ; COMBINE_LOAD_PTR-NEXT: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4157 ; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i8, ptr @__dfsan_arg_tls, align [[ALIGN]]158 159 ; CHECK-NEXT: %[[#INTP:]] = ptrtoint ptr %p to i64160 ; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#MASK]]161 ; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr162 ; CHECK-NEXT: %[[#ORIGIN_ADDR:]] = add i64 %[[#SHADOW_OFFSET]], [[#ORIGIN_BASE]]163 ; CHECK-NEXT: %[[#ORIGIN_PTR:]] = inttoptr i64 %[[#ORIGIN_ADDR]] to ptr164 ; CHECK-NEXT: %[[#ORIGIN:]] = load i32, ptr %[[#ORIGIN_PTR]], align 8165 ; CHECK-NEXT: %[[#WIDE_SHADOW:]] = load i64, ptr %[[#SHADOW_PTR]], align 1166 ; CHECK-NEXT: %[[#WIDE_SHADOW_LO:]] = shl i64 %[[#WIDE_SHADOW]], 32167 ; CHECK-NEXT: %[[#ORIGIN2_PTR:]] = getelementptr i32, ptr %[[#ORIGIN_PTR]], i64 1168 ; CHECK-NEXT: %[[#ORIGIN2:]] = load i32, ptr %[[#ORIGIN2_PTR]], align 8169 ; CHECK-NEXT: %[[#WIDE_SHADOW_SHIFTED:]] = lshr i64 %[[#WIDE_SHADOW]], 32170 ; CHECK-NEXT: %[[#WIDE_SHADOW:]] = or i64 %[[#WIDE_SHADOW]], %[[#WIDE_SHADOW_SHIFTED]]171 ; CHECK-NEXT: %[[#WIDE_SHADOW_SHIFTED:]] = lshr i64 %[[#WIDE_SHADOW]], 16172 ; CHECK-NEXT: %[[#WIDE_SHADOW:]] = or i64 %[[#WIDE_SHADOW]], %[[#WIDE_SHADOW_SHIFTED]]173 ; CHECK-NEXT: %[[#WIDE_SHADOW_SHIFTED:]] = lshr i64 %[[#WIDE_SHADOW]], 8174 ; CHECK-NEXT: %[[#WIDE_SHADOW:]] = or i64 %[[#WIDE_SHADOW]], %[[#WIDE_SHADOW_SHIFTED]]175 ; CHECK-NEXT: %[[#SHADOW:]] = trunc i64 %[[#WIDE_SHADOW]] to i8176 ; CHECK-NEXT: %[[#SHADOW_NZ:]] = icmp ne i64 %[[#WIDE_SHADOW_LO]], 0177 ; CHECK-NEXT: %[[#ORIGIN:]] = select i1 %[[#SHADOW_NZ]], i32 %[[#ORIGIN]], i32 %[[#ORIGIN2]]178 ; CHECK8-NEXT: %[[#SHADOW_NZ:]] = icmp ne i64 %[[#WIDE_SHADOW_LO]], 0179 ; CHECK8-NEXT: %[[#ORIGIN:]] = select i1 %[[#SHADOW_NZ]], i32 %[[#ORIGIN]], i32 %[[#ORIGIN2]]180 181 ; COMBINE_LOAD_PTR-NEXT: %[[#SHADOW:]] = or i8 %[[#SHADOW]], %[[#PS]]182 ; COMBINE_LOAD_PTR-NEXT: %[[#NZ:]] = icmp ne i8 %[[#PS]], 0183 ; COMBINE_LOAD_PTR-NEXT: %[[#ORIGIN:]] = select i1 %[[#NZ]], i32 %[[#PO]], i32 %[[#ORIGIN]]184 185 ; CHECK-NEXT: %a = load i64, ptr %p, align 8186 ; CHECK-NEXT: store i8 %[[#SHADOW]], ptr @__dfsan_retval_tls, align [[ALIGN]]187 ; CHECK-NEXT: store i32 %[[#ORIGIN]], ptr @__dfsan_retval_origin_tls, align 4188 189 %a = load i64, ptr %p190 ret i64 %a191}192 193define i64 @load64_align2(ptr %p) {194 ; CHECK-LABEL: @load64_align2.dfsan195 196 ; COMBINE_LOAD_PTR-NEXT: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4197 ; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i8, ptr @__dfsan_arg_tls, align [[ALIGN]]198 199 ; CHECK-NEXT: %[[#LABEL_ORIGIN:]] = call zeroext i64 @__dfsan_load_label_and_origin(ptr %p, i64 8)200 ; CHECK-NEXT: %[[#LABEL_ORIGIN+1]] = lshr i64 %[[#LABEL_ORIGIN]], 32201 ; CHECK-NEXT: %[[#LABEL:]] = trunc i64 %[[#LABEL_ORIGIN+1]] to i8202 ; CHECK-NEXT: %[[#ORIGIN:]] = trunc i64 %[[#LABEL_ORIGIN]] to i32203 204 ; COMBINE_LOAD_PTR-NEXT: %[[#LABEL:]] = or i8 %[[#LABEL]], %[[#PS]]205 ; COMBINE_LOAD_PTR-NEXT: %[[#NZ:]] = icmp ne i8 %[[#PS]], 0206 ; COMBINE_LOAD_PTR-NEXT: %[[#ORIGIN:]] = select i1 %[[#NZ]], i32 %[[#PO]], i32 %[[#ORIGIN]]207 208 ; CHECK-NEXT: %a = load i64, ptr %p, align 2209 ; CHECK-NEXT: store i8 %[[#LABEL]], ptr @__dfsan_retval_tls, align [[ALIGN]]210 ; CHECK-NEXT: store i32 %[[#ORIGIN]], ptr @__dfsan_retval_origin_tls, align 4211 212 %a = load i64, ptr %p, align 2213 ret i64 %a214}215 216define i128 @load128(ptr %p) {217 ; CHECK-LABEL: @load128.dfsan218 219 ; COMBINE_LOAD_PTR-NEXT: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4220 ; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i8, ptr @__dfsan_arg_tls, align [[ALIGN]]221 222 ; CHECK-NEXT: %[[#INTP:]] = ptrtoint ptr %p to i64223 ; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#MASK]]224 ; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr225 ; CHECK-NEXT: %[[#ORIGIN_ADDR:]] = add i64 %[[#SHADOW_OFFSET]], [[#ORIGIN_BASE]]226 ; CHECK-NEXT: %[[#ORIGIN1_PTR:]] = inttoptr i64 %[[#ORIGIN_ADDR]] to ptr227 ; CHECK-NEXT: %[[#ORIGIN1:]] = load i32, ptr %[[#ORIGIN1_PTR]], align 8228 ; CHECK-NEXT: %[[#WIDE_SHADOW1:]] = load i64, ptr %[[#SHADOW_PTR]], align 1229 ; CHECK-NEXT: %[[#WIDE_SHADOW1_LO:]] = shl i64 %[[#WIDE_SHADOW1]], 32230 ; CHECK-NEXT: %[[#ORIGIN2_PTR:]] = getelementptr i32, ptr %[[#ORIGIN1_PTR]], i64 1231 ; CHECK-NEXT: %[[#ORIGIN2:]] = load i32, ptr %[[#ORIGIN2_PTR]], align 8232 ; CHECK-NEXT: %[[#WIDE_SHADOW2_PTR:]] = getelementptr i64, ptr %[[#SHADOW_PTR]], i64 1233 ; CHECK-NEXT: %[[#WIDE_SHADOW2:]] = load i64, ptr %[[#WIDE_SHADOW2_PTR]], align 1234 ; CHECK-NEXT: %[[#WIDE_SHADOW:]] = or i64 %[[#WIDE_SHADOW1]], %[[#WIDE_SHADOW2]]235 ; CHECK-NEXT: %[[#ORIGIN3_PTR:]] = getelementptr i32, ptr %[[#ORIGIN2_PTR]], i64 1236 ; CHECK-NEXT: %[[#ORIGIN3:]] = load i32, ptr %[[#ORIGIN3_PTR]], align 8237 ; CHECK-NEXT: %[[#WIDE_SHADOW2_LO:]] = shl i64 %[[#WIDE_SHADOW2]], 32238 ; CHECK-NEXT: %[[#ORIGIN4_PTR:]] = getelementptr i32, ptr %[[#ORIGIN3_PTR]], i64 1239 ; CHECK-NEXT: %[[#ORIGIN4:]] = load i32, ptr %[[#ORIGIN4_PTR]], align 8240 ; CHECK-NEXT: %[[#WIDE_SHADOW_SHIFTED:]] = lshr i64 %[[#WIDE_SHADOW]], 32241 ; CHECK-NEXT: %[[#WIDE_SHADOW:]] = or i64 %[[#WIDE_SHADOW]], %[[#WIDE_SHADOW_SHIFTED]]242 ; CHECK-NEXT: %[[#WIDE_SHADOW_SHIFTED:]] = lshr i64 %[[#WIDE_SHADOW]], 16243 ; CHECK-NEXT: %[[#WIDE_SHADOW:]] = or i64 %[[#WIDE_SHADOW]], %[[#WIDE_SHADOW_SHIFTED]]244 ; CHECK-NEXT: %[[#WIDE_SHADOW_SHIFTED:]] = lshr i64 %[[#WIDE_SHADOW]], 8245 ; CHECK-NEXT: %[[#WIDE_SHADOW:]] = or i64 %[[#WIDE_SHADOW]], %[[#WIDE_SHADOW_SHIFTED]]246 ; CHECK-NEXT: %[[#SHADOW:]] = trunc i64 %[[#WIDE_SHADOW]] to i8247 ; CHECK-NEXT: %[[#SHADOW1_LO_NZ:]] = icmp ne i64 %[[#WIDE_SHADOW1_LO]], 0248 ; CHECK-NEXT: %[[#ORIGIN12:]] = select i1 %[[#SHADOW1_LO_NZ]], i32 %[[#ORIGIN1]], i32 %[[#ORIGIN2]]249 ; CHECK-NEXT: %[[#SHADOW2_NZ:]] = icmp ne i64 %[[#WIDE_SHADOW2]], 0250 ; CHECK-NEXT: %[[#ORIGIN124:]] = select i1 %[[#SHADOW2_NZ]], i32 %[[#ORIGIN4]], i32 %[[#ORIGIN12]]251 ; CHECK-NEXT: %[[#SHADOW2_LO_NZ:]] = icmp ne i64 %[[#WIDE_SHADOW2_LO]], 0252 ; CHECK-NEXT: %[[#ORIGIN:]] = select i1 %[[#SHADOW2_LO_NZ]], i32 %[[#ORIGIN3]], i32 %[[#ORIGIN124]]253 254 ; COMBINE_LOAD_PTR-NEXT: %[[#SHADOW:]] = or i8 %[[#SHADOW]], %[[#PS]]255 ; COMBINE_LOAD_PTR-NEXT: %[[#NZ:]] = icmp ne i8 %[[#PS]], 0256 ; COMBINE_LOAD_PTR-NEXT: %[[#ORIGIN:]] = select i1 %[[#NZ]], i32 %[[#PO]], i32 %[[#ORIGIN]]257 258 ; CHECK-NEXT: %a = load i128, ptr %p, align 8259 ; CHECK-NEXT: store i8 %[[#SHADOW]], ptr @__dfsan_retval_tls, align [[ALIGN]]260 ; CHECK-NEXT: store i32 %[[#ORIGIN]], ptr @__dfsan_retval_origin_tls, align 4261 262 %a = load i128, ptr %p263 ret i128 %a264}265 266define i17 @load17(ptr %p) {267 ; CHECK-LABEL: @load17.dfsan268 269 ; COMBINE_LOAD_PTR-NEXT: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4270 ; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i8, ptr @__dfsan_arg_tls, align [[ALIGN]]271 272 ; CHECK-NEXT: %[[#LABEL_ORIGIN:]] = call zeroext i64 @__dfsan_load_label_and_origin(ptr %p, i64 3)273 ; CHECK-NEXT: %[[#LABEL_ORIGIN_H32:]] = lshr i64 %[[#LABEL_ORIGIN]], 32274 ; CHECK-NEXT: %[[#LABEL:]] = trunc i64 %[[#LABEL_ORIGIN_H32]] to i8275 ; CHECK-NEXT: %[[#ORIGIN:]] = trunc i64 %[[#LABEL_ORIGIN]] to i32276 277 ; COMBINE_LOAD_PTR-NEXT: %[[#LABEL:]] = or i8 %[[#LABEL]], %[[#PS]]278 ; COMBINE_LOAD_PTR-NEXT: %[[#NZ:]] = icmp ne i8 %[[#PS]], 0279 ; COMBINE_LOAD_PTR-NEXT: %[[#ORIGIN:]] = select i1 %[[#NZ]], i32 %[[#PO]], i32 %[[#ORIGIN]]280 281 ; CHECK-NEXT: %a = load i17, ptr %p, align 4282 ; CHECK-NEXT: store i8 %[[#LABEL]], ptr @__dfsan_retval_tls, align [[ALIGN]]283 ; CHECK-NEXT: store i32 %[[#ORIGIN]], ptr @__dfsan_retval_origin_tls, align 4284 285 %a = load i17, ptr %p, align 4286 ret i17 %a287}288