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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 22; Test alloca instrumentation when tags are generated by HWASan function.3;4; RUN: opt < %s -passes=hwasan -hwasan-generate-tags-with-calls -S | FileCheck %s5 6target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"7target triple = "riscv64-unknown-linux"8 9declare void @use32(ptr)10 11define void @test_alloca() sanitize_hwaddress {12; CHECK-LABEL: define void @test_alloca13; CHECK-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__hwasan_personality_thunk {14; CHECK-NEXT: entry:15; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 816; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 7205759403792793517; CHECK-NEXT: [[TMP2:%.*]] = ashr i64 [[TMP0]], 318; CHECK-NEXT: [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)19; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i6420; CHECK-NEXT: [[TMP5:%.*]] = shl i64 [[TMP4]], 4421; CHECK-NEXT: [[TMP6:%.*]] = or i64 ptrtoint (ptr @test_alloca to i64), [[TMP5]]22; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP1]] to ptr23; CHECK-NEXT: store i64 [[TMP6]], ptr [[TMP7]], align 824; CHECK-NEXT: [[TMP8:%.*]] = ashr i64 [[TMP0]], 5625; CHECK-NEXT: [[TMP9:%.*]] = shl nuw nsw i64 [[TMP8]], 1226; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], -127; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP0]], 828; CHECK-NEXT: [[TMP12:%.*]] = and i64 [[TMP11]], [[TMP10]]29; CHECK-NEXT: store i64 [[TMP12]], ptr @__hwasan_tls, align 830; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 429496729531; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 132; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr33; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 5634; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 1635; CHECK-NEXT: [[TMP15:%.*]] = call i8 @__hwasan_generate_tag()36; CHECK-NEXT: [[TMP16:%.*]] = zext i8 [[TMP15]] to i6437; CHECK-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[X]] to i6438; CHECK-NEXT: [[TMP18:%.*]] = and i64 [[TMP17]], 7205759403792793539; CHECK-NEXT: [[TMP19:%.*]] = shl i64 [[TMP16]], 5640; CHECK-NEXT: [[TMP20:%.*]] = or i64 [[TMP18]], [[TMP19]]41; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP20]] to ptr42; CHECK-NEXT: [[TMP21:%.*]] = trunc i64 [[TMP16]] to i843; CHECK-NEXT: [[TMP22:%.*]] = ptrtoint ptr [[X]] to i6444; CHECK-NEXT: [[TMP23:%.*]] = and i64 [[TMP22]], 7205759403792793545; CHECK-NEXT: [[TMP24:%.*]] = lshr i64 [[TMP23]], 446; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP24]]47; CHECK-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP25]], i32 048; CHECK-NEXT: store i8 4, ptr [[TMP26]], align 149; CHECK-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[X]], i32 1550; CHECK-NEXT: store i8 [[TMP21]], ptr [[TMP27]], align 151; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]])52; CHECK-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i853; CHECK-NEXT: [[TMP29:%.*]] = ptrtoint ptr [[X]] to i6454; CHECK-NEXT: [[TMP30:%.*]] = and i64 [[TMP29]], 7205759403792793555; CHECK-NEXT: [[TMP31:%.*]] = lshr i64 [[TMP30]], 456; CHECK-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP31]]57; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP32]], i8 [[TMP28]], i64 1, i1 false)58; CHECK-NEXT: ret void59;60 61entry:62 %x = alloca i32, align 463 call void @use32(ptr nonnull %x)64 ret void65}66