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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 22; RUN: opt < %s -passes=hwasan -S | FileCheck %s3 4target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"5target triple = "aarch64--linux-android"6 7declare void @use(ptr, ptr)8 9define void @test_alloca() sanitize_hwaddress {10; CHECK-LABEL: define void @test_alloca11; CHECK-SAME: () #[[ATTR0:[0-9]+]] {12; CHECK-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0()13; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 4814; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 815; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 316; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])17; CHECK-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)18; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i6419; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 4420; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]21; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr22; CHECK-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 823; CHECK-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 5624; CHECK-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 1225; CHECK-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -126; CHECK-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 827; CHECK-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]28; CHECK-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 829; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 429496729530; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 131; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr32; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 5633; CHECK-NEXT: [[X:%.*]] = alloca { [4 x i8], [12 x i8] }, align 1634; CHECK-NEXT: [[TMP18:%.*]] = xor i64 [[TMP4]], 035; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i6436; CHECK-NEXT: [[TMP20:%.*]] = and i64 [[TMP19]], 7205759403792793537; CHECK-NEXT: [[TMP21:%.*]] = shl i64 [[TMP18]], 5638; CHECK-NEXT: [[TMP22:%.*]] = or i64 [[TMP20]], [[TMP21]]39; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP22]] to ptr40; CHECK-NEXT: [[TMP23:%.*]] = trunc i64 [[TMP18]] to i841; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[X]] to i6442; CHECK-NEXT: [[TMP25:%.*]] = and i64 [[TMP24]], 7205759403792793543; CHECK-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 444; CHECK-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]45; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 [[TMP23]], i64 1, i1 false)46; CHECK-NEXT: [[Y:%.*]] = alloca i8, i64 16, align 1647; CHECK-NEXT: [[TMP28:%.*]] = xor i64 [[TMP4]], 12848; CHECK-NEXT: [[TMP29:%.*]] = ptrtoint ptr [[Y]] to i6449; CHECK-NEXT: [[TMP30:%.*]] = and i64 [[TMP29]], 7205759403792793550; CHECK-NEXT: [[TMP31:%.*]] = shl i64 [[TMP28]], 5651; CHECK-NEXT: [[TMP32:%.*]] = or i64 [[TMP30]], [[TMP31]]52; CHECK-NEXT: [[Y_HWASAN:%.*]] = inttoptr i64 [[TMP32]] to ptr53; CHECK-NEXT: [[TMP33:%.*]] = trunc i64 [[TMP28]] to i854; CHECK-NEXT: [[TMP34:%.*]] = ptrtoint ptr [[Y]] to i6455; CHECK-NEXT: [[TMP35:%.*]] = and i64 [[TMP34]], 7205759403792793556; CHECK-NEXT: [[TMP36:%.*]] = lshr i64 [[TMP35]], 457; CHECK-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP36]]58; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP37]], i8 [[TMP33]], i64 1, i1 false)59; CHECK-NEXT: call void @use(ptr [[X_HWASAN]], ptr [[Y_HWASAN]])60; CHECK-NEXT: [[TMP38:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i861; CHECK-NEXT: [[TMP39:%.*]] = ptrtoint ptr [[X]] to i6462; CHECK-NEXT: [[TMP40:%.*]] = and i64 [[TMP39]], 7205759403792793563; CHECK-NEXT: [[TMP41:%.*]] = lshr i64 [[TMP40]], 464; CHECK-NEXT: [[TMP42:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP41]]65; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP42]], i8 [[TMP38]], i64 1, i1 false)66; CHECK-NEXT: [[TMP43:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i867; CHECK-NEXT: [[TMP44:%.*]] = ptrtoint ptr [[Y]] to i6468; CHECK-NEXT: [[TMP45:%.*]] = and i64 [[TMP44]], 7205759403792793569; CHECK-NEXT: [[TMP46:%.*]] = lshr i64 [[TMP45]], 470; CHECK-NEXT: [[TMP47:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP46]]71; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP47]], i8 [[TMP43]], i64 1, i1 false)72; CHECK-NEXT: ret void73;74 %x = alloca i8, i64 475 %y = alloca i8, i64 1676 call void @use(ptr %x, ptr %y)77 ret void78}79