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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 22; Test allocas with multiple lifetime ends, as frequently seen for exception3; handling.4;5; RUN: opt -passes=hwasan -hwasan-use-after-scope -S -o - %s | FileCheck %s6 7target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"8target triple = "aarch64--linux-android"9 10declare void @mayFail(ptr %x) sanitize_hwaddress11declare void @onExcept(ptr %x) sanitize_hwaddress12 13declare void @llvm.lifetime.start.p0(ptr nocapture) nounwind14declare void @llvm.lifetime.end.p0(ptr nocapture) nounwind15declare i32 @__gxx_personality_v0(...)16 17define void @test() sanitize_hwaddress personality ptr @__gxx_personality_v0 {18; CHECK-LABEL: define void @test19; CHECK-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__gxx_personality_v0 {20; CHECK-NEXT: entry:21; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer.p0()22; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 4823; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 824; CHECK-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 325; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])26; CHECK-NEXT: [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)27; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i6428; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 4429; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[TMP4]], [[TMP7]]30; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP2]] to ptr31; CHECK-NEXT: store i64 [[TMP8]], ptr [[TMP9]], align 832; CHECK-NEXT: [[TMP10:%.*]] = ashr i64 [[TMP2]], 5633; CHECK-NEXT: [[TMP11:%.*]] = shl nuw nsw i64 [[TMP10]], 1234; CHECK-NEXT: [[TMP12:%.*]] = xor i64 [[TMP11]], -135; CHECK-NEXT: [[TMP13:%.*]] = add i64 [[TMP2]], 836; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], [[TMP12]]37; CHECK-NEXT: store i64 [[TMP14]], ptr [[TMP1]], align 838; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 429496729539; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 140; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr41; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 5642; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 1643; CHECK-NEXT: [[TMP17:%.*]] = xor i64 [[TMP3]], 044; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[X]] to i6445; CHECK-NEXT: [[TMP19:%.*]] = and i64 [[TMP18]], 7205759403792793546; CHECK-NEXT: [[TMP20:%.*]] = shl i64 [[TMP17]], 5647; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[TMP19]], [[TMP20]]48; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr49; CHECK-NEXT: [[EXN_SLOT:%.*]] = alloca ptr, align 850; CHECK-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 451; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[X]])52; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP17]] to i853; CHECK-NEXT: [[TMP23:%.*]] = ptrtoint ptr [[X]] to i6454; CHECK-NEXT: [[TMP24:%.*]] = and i64 [[TMP23]], 7205759403792793555; CHECK-NEXT: [[TMP25:%.*]] = lshr i64 [[TMP24]], 456; CHECK-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP25]]57; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP26]], i8 [[TMP22]], i64 1, i1 false)58; CHECK-NEXT: invoke void @mayFail(ptr [[X_HWASAN]])59; CHECK-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]60; CHECK: invoke.cont:61; CHECK-NEXT: [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i862; CHECK-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[X]] to i6463; CHECK-NEXT: [[TMP29:%.*]] = and i64 [[TMP28]], 7205759403792793564; CHECK-NEXT: [[TMP30:%.*]] = lshr i64 [[TMP29]], 465; CHECK-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP30]]66; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP27]], i64 1, i1 false)67; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[X]])68; CHECK-NEXT: ret void69; CHECK: lpad:70; CHECK-NEXT: [[TMP32:%.*]] = landingpad { ptr, i32 }71; CHECK-NEXT: cleanup72; CHECK-NEXT: [[TMP33:%.*]] = call i64 @llvm.read_register.i64(metadata [[META3:![0-9]+]])73; CHECK-NEXT: call void @__hwasan_handle_vfork(i64 [[TMP33]])74; CHECK-NEXT: [[TMP34:%.*]] = extractvalue { ptr, i32 } [[TMP32]], 075; CHECK-NEXT: store ptr [[TMP34]], ptr [[EXN_SLOT]], align 876; CHECK-NEXT: [[TMP35:%.*]] = extractvalue { ptr, i32 } [[TMP32]], 177; CHECK-NEXT: store i32 [[TMP35]], ptr [[EHSELECTOR_SLOT]], align 478; CHECK-NEXT: call void @onExcept(ptr [[X_HWASAN]])79; CHECK-NEXT: [[TMP36:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i880; CHECK-NEXT: [[TMP37:%.*]] = ptrtoint ptr [[X]] to i6481; CHECK-NEXT: [[TMP38:%.*]] = and i64 [[TMP37]], 7205759403792793582; CHECK-NEXT: [[TMP39:%.*]] = lshr i64 [[TMP38]], 483; CHECK-NEXT: [[TMP40:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP39]]84; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP40]], i8 [[TMP36]], i64 1, i1 false)85; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[X]])86; CHECK-NEXT: br label [[EH_RESUME:%.*]]87; CHECK: eh.resume:88; CHECK-NEXT: [[EXN:%.*]] = load ptr, ptr [[EXN_SLOT]], align 889; CHECK-NEXT: [[SEL:%.*]] = load i32, ptr [[EHSELECTOR_SLOT]], align 490; CHECK-NEXT: [[LPAD_VAL:%.*]] = insertvalue { ptr, i32 } undef, ptr [[EXN]], 091; CHECK-NEXT: [[LPAD_VAL1:%.*]] = insertvalue { ptr, i32 } [[LPAD_VAL]], i32 [[SEL]], 192; CHECK-NEXT: resume { ptr, i32 } [[LPAD_VAL1]]93;94entry:95 %x = alloca i32, align 896 %exn.slot = alloca ptr, align 897 %ehselector.slot = alloca i32, align 498 call void @llvm.lifetime.start.p0(ptr %x)99 invoke void @mayFail(ptr %x) to label %invoke.cont unwind label %lpad100 101invoke.cont: ; preds = %entry102 103 call void @llvm.lifetime.end.p0(ptr %x)104 ret void105 106lpad: ; preds = %entry107 108 %0 = landingpad { ptr, i32 }109 cleanup110 %1 = extractvalue { ptr, i32 } %0, 0111 store ptr %1, ptr %exn.slot, align 8112 %2 = extractvalue { ptr, i32 } %0, 1113 store i32 %2, ptr %ehselector.slot, align 4114 call void @onExcept(ptr %x) #18115 call void @llvm.lifetime.end.p0(ptr %x)116 br label %eh.resume117 118eh.resume: ; preds = %lpad119 %exn = load ptr, ptr %exn.slot, align 8120 %sel = load i32, ptr %ehselector.slot, align 4121 %lpad.val = insertvalue { ptr, i32 } undef, ptr %exn, 0122 %lpad.val1 = insertvalue { ptr, i32 } %lpad.val, i32 %sel, 1123 resume { ptr, i32 } %lpad.val1124}125