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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals all --global-value-regex "x" --version 42; RUN: opt < %s -S -passes=hwasan -mtriple=aarch64-linux-gnu -hwasan-globals=0 | FileCheck %s --check-prefixes=NOGLOB3; RUN: opt < %s -S -passes=hwasan -mtriple=aarch64-linux-gnu -hwasan-globals=1 | FileCheck %s4 5target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"6 7@x = dso_local global i32 0, align 48 9;.10; NOGLOB: @x = dso_local global i32 0, align 411;.12; CHECK: @x = alias i32, inttoptr (i64 add (i64 ptrtoint (ptr @x.hwasan to i64), i64 5260204364768739328) to ptr)13;.14define dso_local noundef i32 @_Z3tmpv() sanitize_hwaddress {15; NOGLOB-LABEL: define dso_local noundef i32 @_Z3tmpv(16; NOGLOB-SAME: ) #[[ATTR0:[0-9]+]] {17; NOGLOB-NEXT: entry:18; NOGLOB-NEXT: [[TMP0:%.*]] = load i32, ptr @x, align 419; NOGLOB-NEXT: ret i32 [[TMP0]]20;21; CHECK-LABEL: define dso_local noundef i32 @_Z3tmpv(22; CHECK-SAME: ) #[[ATTR0:[0-9]+]] {23; CHECK-NEXT: entry:24; CHECK-NEXT: [[TMP12:%.*]] = load i64, ptr @__hwasan_tls, align 825; CHECK-NEXT: [[TMP1:%.*]] = or i64 [[TMP12]], 429496729526; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP1]], 127; CHECK-NEXT: [[TMP2:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr28; CHECK-NEXT: [[TMP3:%.*]] = lshr i64 ptrtoint (ptr @x to i64), 5629; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i830; CHECK-NEXT: [[TMP5:%.*]] = and i64 ptrtoint (ptr @x to i64), 7205759403792793531; CHECK-NEXT: [[TMP6:%.*]] = lshr i64 [[TMP5]], 432; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP2]], i64 [[TMP6]]33; CHECK-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 134; CHECK-NEXT: [[TMP9:%.*]] = icmp ne i8 [[TMP4]], [[TMP8]]35; CHECK-NEXT: br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2:![0-9]+]]36; CHECK: 10:37; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP2]], ptr @x, i32 2)38; CHECK-NEXT: br label [[TMP11]]39; CHECK: 11:40; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @x, align 441; CHECK-NEXT: ret i32 [[TMP0]]42;43entry:44 %0 = load i32, ptr @x, align 445 ret i32 %046}47