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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 22; Test kernel hwasan instrumentation for alloca.3;4; RUN: opt < %s -passes=hwasan -hwasan-kernel=1 -S | FileCheck %s5 6target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"7target triple = "aarch64--linux-android"8 9declare void @use32(ptr)10 11define void @test_alloca() sanitize_hwaddress {12; CHECK-LABEL: define void @test_alloca13; CHECK-SAME: () #[[ATTR0:[0-9]+]] {14; CHECK-NEXT: entry:15; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null)16; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)17; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i6418; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 2019; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]]20; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 5621; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 1622; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 023; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i6424; CHECK-NEXT: [[TMP5:%.*]] = or i64 [[TMP4]], -7205759403792793625; CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 5626; CHECK-NEXT: [[TMP7:%.*]] = or i64 [[TMP6]], 7205759403792793527; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP5]], [[TMP7]]28; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr29; CHECK-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP3]] to i830; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[X]] to i6431; CHECK-NEXT: [[TMP11:%.*]] = or i64 [[TMP10]], -7205759403792793632; CHECK-NEXT: [[TMP12:%.*]] = lshr i64 [[TMP11]], 433; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr34; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP13]], i8 [[TMP9]], i64 1, i1 false)35; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]])36; CHECK-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i837; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[X]] to i6438; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[TMP15]], -7205759403792793639; CHECK-NEXT: [[TMP17:%.*]] = lshr i64 [[TMP16]], 440; CHECK-NEXT: [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr41; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP18]], i8 [[TMP14]], i64 1, i1 false)42; CHECK-NEXT: ret void43;44 45 46entry:47 %x = alloca i32, align 448 call void @use32(ptr nonnull %x)49 ret void50}51