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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=hwasan -S | FileCheck %s3 4target triple = "aarch64--linux-android10000"5target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"6 7define void @load.v1i32(ptr %p) sanitize_hwaddress {8; CHECK-LABEL: @load.v1i32(9; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)10; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[P:%.*]], i32 2)11; CHECK-NEXT: [[TMP1:%.*]] = load <1 x i32>, ptr [[P]], align 412; CHECK-NEXT: ret void13;14 load <1 x i32>, ptr %p15 ret void16}17 18define void @load.v2i32(ptr %p) sanitize_hwaddress {19; CHECK-LABEL: @load.v2i32(20; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)21; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[P:%.*]], i32 3)22; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i32>, ptr [[P]], align 823; CHECK-NEXT: ret void24;25 load <2 x i32>, ptr %p26 ret void27}28 29define void @load.v4i32(ptr %p) sanitize_hwaddress {30; CHECK-LABEL: @load.v4i32(31; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)32; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[P:%.*]], i32 4)33; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr [[P]], align 1634; CHECK-NEXT: ret void35;36 load <4 x i32>, ptr %p37 ret void38}39 40define void @load.v8i32(ptr %p) sanitize_hwaddress {41; CHECK-LABEL: @load.v8i32(42; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)43; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P:%.*]] to i6444; CHECK-NEXT: call void @__hwasan_loadN(i64 [[TMP1]], i64 32)45; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i32>, ptr [[P]], align 3246; CHECK-NEXT: ret void47;48 load <8 x i32>, ptr %p49 ret void50}51 52define void @load.v16i32(ptr %p) sanitize_hwaddress {53; CHECK-LABEL: @load.v16i32(54; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)55; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P:%.*]] to i6456; CHECK-NEXT: call void @__hwasan_loadN(i64 [[TMP1]], i64 64)57; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr [[P]], align 6458; CHECK-NEXT: ret void59;60 load <16 x i32>, ptr %p61 ret void62}63 64 65define void @store.v1i32(ptr %p) sanitize_hwaddress {66; CHECK-LABEL: @store.v1i32(67; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)68; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[P:%.*]], i32 18)69; CHECK-NEXT: store <1 x i32> zeroinitializer, ptr [[P]], align 470; CHECK-NEXT: ret void71;72 store <1 x i32> zeroinitializer, ptr %p73 ret void74}75 76define void @store.v2i32(ptr %p) sanitize_hwaddress {77; CHECK-LABEL: @store.v2i32(78; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)79; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[P:%.*]], i32 19)80; CHECK-NEXT: store <2 x i32> zeroinitializer, ptr [[P]], align 881; CHECK-NEXT: ret void82;83 store <2 x i32> zeroinitializer, ptr %p84 ret void85}86 87define void @store.v4i32(ptr %p) sanitize_hwaddress {88; CHECK-LABEL: @store.v4i32(89; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)90; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[P:%.*]], i32 20)91; CHECK-NEXT: store <4 x i32> zeroinitializer, ptr [[P]], align 1692; CHECK-NEXT: ret void93;94 store <4 x i32> zeroinitializer, ptr %p95 ret void96}97 98define void @store.v8i32(ptr %p) sanitize_hwaddress {99; CHECK-LABEL: @store.v8i32(100; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)101; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P:%.*]] to i64102; CHECK-NEXT: call void @__hwasan_storeN(i64 [[TMP1]], i64 32)103; CHECK-NEXT: store <8 x i32> zeroinitializer, ptr [[P]], align 32104; CHECK-NEXT: ret void105;106 store <8 x i32> zeroinitializer, ptr %p107 ret void108}109 110define void @store.v16i32(ptr %p) sanitize_hwaddress {111; CHECK-LABEL: @store.v16i32(112; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)113; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P:%.*]] to i64114; CHECK-NEXT: call void @__hwasan_storeN(i64 [[TMP1]], i64 64)115; CHECK-NEXT: store <16 x i32> zeroinitializer, ptr [[P]], align 64116; CHECK-NEXT: ret void117;118 store <16 x i32> zeroinitializer, ptr %p119 ret void120}121 122 123define void @load.nxv1i32(ptr %p) sanitize_hwaddress {124; CHECK-LABEL: @load.nxv1i32(125; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)126; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P:%.*]] to i64127; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()128; CHECK-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 32129; CHECK-NEXT: [[TMP4:%.*]] = udiv i64 [[TMP3]], 8130; CHECK-NEXT: call void @__hwasan_loadN(i64 [[TMP1]], i64 [[TMP4]])131; CHECK-NEXT: [[TMP5:%.*]] = load <vscale x 1 x i32>, ptr [[P]], align 4132; CHECK-NEXT: ret void133;134 load <vscale x 1 x i32>, ptr %p135 ret void136}137 138define void @load.nxv2i32(ptr %p) sanitize_hwaddress {139; CHECK-LABEL: @load.nxv2i32(140; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)141; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P:%.*]] to i64142; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()143; CHECK-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 64144; CHECK-NEXT: [[TMP4:%.*]] = udiv i64 [[TMP3]], 8145; CHECK-NEXT: call void @__hwasan_loadN(i64 [[TMP1]], i64 [[TMP4]])146; CHECK-NEXT: [[TMP5:%.*]] = load <vscale x 2 x i32>, ptr [[P]], align 8147; CHECK-NEXT: ret void148;149 load <vscale x 2 x i32>, ptr %p150 ret void151}152 153define void @load.nxv4i32(ptr %p) sanitize_hwaddress {154; CHECK-LABEL: @load.nxv4i32(155; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)156; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P:%.*]] to i64157; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()158; CHECK-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 128159; CHECK-NEXT: [[TMP4:%.*]] = udiv i64 [[TMP3]], 8160; CHECK-NEXT: call void @__hwasan_loadN(i64 [[TMP1]], i64 [[TMP4]])161; CHECK-NEXT: [[TMP5:%.*]] = load <vscale x 4 x i32>, ptr [[P]], align 16162; CHECK-NEXT: ret void163;164 load <vscale x 4 x i32>, ptr %p165 ret void166}167 168define void @load.nxv8i32(ptr %p) sanitize_hwaddress {169; CHECK-LABEL: @load.nxv8i32(170; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)171; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P:%.*]] to i64172; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()173; CHECK-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 256174; CHECK-NEXT: [[TMP4:%.*]] = udiv i64 [[TMP3]], 8175; CHECK-NEXT: call void @__hwasan_loadN(i64 [[TMP1]], i64 [[TMP4]])176; CHECK-NEXT: [[TMP5:%.*]] = load <vscale x 8 x i32>, ptr [[P]], align 32177; CHECK-NEXT: ret void178;179 load <vscale x 8 x i32>, ptr %p180 ret void181}182 183define void @load.nxv16i32(ptr %p) sanitize_hwaddress {184; CHECK-LABEL: @load.nxv16i32(185; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)186; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P:%.*]] to i64187; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()188; CHECK-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 512189; CHECK-NEXT: [[TMP4:%.*]] = udiv i64 [[TMP3]], 8190; CHECK-NEXT: call void @__hwasan_loadN(i64 [[TMP1]], i64 [[TMP4]])191; CHECK-NEXT: [[TMP5:%.*]] = load <vscale x 16 x i32>, ptr [[P]], align 64192; CHECK-NEXT: ret void193;194 load <vscale x 16 x i32>, ptr %p195 ret void196}197 198 199define void @store.nxv1i32(ptr %p) sanitize_hwaddress {200; CHECK-LABEL: @store.nxv1i32(201; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)202; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P:%.*]] to i64203; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()204; CHECK-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 32205; CHECK-NEXT: [[TMP4:%.*]] = udiv i64 [[TMP3]], 8206; CHECK-NEXT: call void @__hwasan_storeN(i64 [[TMP1]], i64 [[TMP4]])207; CHECK-NEXT: store <vscale x 1 x i32> zeroinitializer, ptr [[P]], align 4208; CHECK-NEXT: ret void209;210 store <vscale x 1 x i32> zeroinitializer, ptr %p211 ret void212}213 214define void @store.nxv2i32(ptr %p) sanitize_hwaddress {215; CHECK-LABEL: @store.nxv2i32(216; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)217; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P:%.*]] to i64218; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()219; CHECK-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 64220; CHECK-NEXT: [[TMP4:%.*]] = udiv i64 [[TMP3]], 8221; CHECK-NEXT: call void @__hwasan_storeN(i64 [[TMP1]], i64 [[TMP4]])222; CHECK-NEXT: store <vscale x 2 x i32> zeroinitializer, ptr [[P]], align 8223; CHECK-NEXT: ret void224;225 store <vscale x 2 x i32> zeroinitializer, ptr %p226 ret void227}228 229define void @store.nxv4i32(ptr %p) sanitize_hwaddress {230; CHECK-LABEL: @store.nxv4i32(231; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)232; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P:%.*]] to i64233; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()234; CHECK-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 128235; CHECK-NEXT: [[TMP4:%.*]] = udiv i64 [[TMP3]], 8236; CHECK-NEXT: call void @__hwasan_storeN(i64 [[TMP1]], i64 [[TMP4]])237; CHECK-NEXT: store <vscale x 4 x i32> zeroinitializer, ptr [[P]], align 16238; CHECK-NEXT: ret void239;240 store <vscale x 4 x i32> zeroinitializer, ptr %p241 ret void242}243 244define void @store.nxv8i32(ptr %p) sanitize_hwaddress {245; CHECK-LABEL: @store.nxv8i32(246; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)247; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P:%.*]] to i64248; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()249; CHECK-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 256250; CHECK-NEXT: [[TMP4:%.*]] = udiv i64 [[TMP3]], 8251; CHECK-NEXT: call void @__hwasan_storeN(i64 [[TMP1]], i64 [[TMP4]])252; CHECK-NEXT: store <vscale x 8 x i32> zeroinitializer, ptr [[P]], align 32253; CHECK-NEXT: ret void254;255 store <vscale x 8 x i32> zeroinitializer, ptr %p256 ret void257}258 259define void @store.nxv16i32(ptr %p) sanitize_hwaddress {260; CHECK-LABEL: @store.nxv16i32(261; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)262; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P:%.*]] to i64263; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()264; CHECK-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 512265; CHECK-NEXT: [[TMP4:%.*]] = udiv i64 [[TMP3]], 8266; CHECK-NEXT: call void @__hwasan_storeN(i64 [[TMP1]], i64 [[TMP4]])267; CHECK-NEXT: store <vscale x 16 x i32> zeroinitializer, ptr [[P]], align 64268; CHECK-NEXT: ret void269;270 store <vscale x 16 x i32> zeroinitializer, ptr %p271 ret void272}273