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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -S -passes=msan -mattr=+sme -o - %s | FileCheck %s3 4; Forked from llvm/test/CodeGen/AArch64/sme-aarch64-svcount.ll5 6target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"7target triple = "aarch64--linux-android9001"8 9;10; Test simple loads, stores and return.11;12define target("aarch64.svcount") @test_load(ptr %ptr) nounwind {13; CHECK-LABEL: @test_load(14; CHECK-NEXT: call void @llvm.donothing()15; CHECK-NEXT: [[RES:%.*]] = load target("aarch64.svcount"), ptr [[PTR:%.*]], align 216; CHECK-NEXT: store target("aarch64.svcount") zeroinitializer, ptr @__msan_retval_tls, align 817; CHECK-NEXT: ret target("aarch64.svcount") [[RES]]18;19 %res = load target("aarch64.svcount"), ptr %ptr20 ret target("aarch64.svcount") %res21}22 23define void @test_store(ptr %ptr, target("aarch64.svcount") %val) nounwind {24; CHECK-LABEL: @test_store(25; CHECK-NEXT: call void @llvm.donothing()26; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[PTR:%.*]] to i6427; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 19351404648857628; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr29; CHECK-NEXT: store target("aarch64.svcount") zeroinitializer, ptr [[TMP3]], align 230; CHECK-NEXT: store target("aarch64.svcount") [[VAL:%.*]], ptr [[PTR]], align 231; CHECK-NEXT: ret void32;33 store target("aarch64.svcount") %val, ptr %ptr34 ret void35}36 37define target("aarch64.svcount") @test_alloca_store_reload(target("aarch64.svcount") %val) nounwind {38; CHECK-LABEL: @test_alloca_store_reload(39; CHECK-NEXT: call void @llvm.donothing()40; CHECK-NEXT: [[PTR:%.*]] = alloca target("aarch64.svcount"), align 141; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64()42; CHECK-NEXT: [[TMP2:%.*]] = mul nuw i64 [[TMP1]], 243; CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[PTR]] to i6444; CHECK-NEXT: [[TMP4:%.*]] = xor i64 [[TMP3]], 19351404648857645; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr46; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP5]], i8 0, i64 [[TMP2]], i1 false)47; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR]] to i6448; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 19351404648857649; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr50; CHECK-NEXT: store target("aarch64.svcount") zeroinitializer, ptr [[TMP8]], align 251; CHECK-NEXT: store target("aarch64.svcount") [[VAL:%.*]], ptr [[PTR]], align 252; CHECK-NEXT: [[RES:%.*]] = load target("aarch64.svcount"), ptr [[PTR]], align 253; CHECK-NEXT: store target("aarch64.svcount") zeroinitializer, ptr @__msan_retval_tls, align 854; CHECK-NEXT: ret target("aarch64.svcount") [[RES]]55;56 %ptr = alloca target("aarch64.svcount"), align 157 store target("aarch64.svcount") %val, ptr %ptr58 %res = load target("aarch64.svcount"), ptr %ptr59 ret target("aarch64.svcount") %res60}61 62;63; Test passing as arguments (from perspective of callee)64;65 66define target("aarch64.svcount") @test_return_arg1(target("aarch64.svcount") %arg0, target("aarch64.svcount") %arg1) nounwind {67; CHECK-LABEL: @test_return_arg1(68; CHECK-NEXT: call void @llvm.donothing()69; CHECK-NEXT: store target("aarch64.svcount") zeroinitializer, ptr @__msan_retval_tls, align 870; CHECK-NEXT: ret target("aarch64.svcount") [[ARG1:%.*]]71;72 ret target("aarch64.svcount") %arg173}74 75define target("aarch64.svcount") @test_return_arg4(target("aarch64.svcount") %arg0, target("aarch64.svcount") %arg1, target("aarch64.svcount") %arg2, target("aarch64.svcount") %arg3, target("aarch64.svcount") %arg4) nounwind {76; CHECK-LABEL: @test_return_arg4(77; CHECK-NEXT: call void @llvm.donothing()78; CHECK-NEXT: store target("aarch64.svcount") zeroinitializer, ptr @__msan_retval_tls, align 879; CHECK-NEXT: ret target("aarch64.svcount") [[ARG4:%.*]]80;81 ret target("aarch64.svcount") %arg482}83 84;85; Test passing as arguments (from perspective of caller)86;87 88declare void @take_svcount_1(target("aarch64.svcount") %arg)89define void @test_pass_1arg(target("aarch64.svcount") %arg) nounwind {90; CHECK-LABEL: @test_pass_1arg(91; CHECK-NEXT: call void @llvm.donothing()92; CHECK-NEXT: call void @take_svcount_1(target("aarch64.svcount") [[ARG:%.*]])93; CHECK-NEXT: ret void94;95 call void @take_svcount_1(target("aarch64.svcount") %arg)96 ret void97}98 99declare void @take_svcount_5(target("aarch64.svcount") %arg0, target("aarch64.svcount") %arg1, target("aarch64.svcount") %arg2, target("aarch64.svcount") %arg3, target("aarch64.svcount") %arg4)100define void @test_pass_5args(target("aarch64.svcount") %arg) nounwind {101; CHECK-LABEL: @test_pass_5args(102; CHECK-NEXT: call void @llvm.donothing()103; CHECK-NEXT: call void @take_svcount_5(target("aarch64.svcount") [[ARG:%.*]], target("aarch64.svcount") [[ARG]], target("aarch64.svcount") [[ARG]], target("aarch64.svcount") [[ARG]], target("aarch64.svcount") [[ARG]])104; CHECK-NEXT: ret void105;106 call void @take_svcount_5(target("aarch64.svcount") %arg, target("aarch64.svcount") %arg, target("aarch64.svcount") %arg, target("aarch64.svcount") %arg, target("aarch64.svcount") %arg)107 ret void108}109 110define target("aarch64.svcount") @test_sel(target("aarch64.svcount") %x, target("aarch64.svcount") %y, i1 %cmp) sanitize_memory {111; CHECK-LABEL: @test_sel(112; CHECK-NEXT: [[TMP1:%.*]] = load i1, ptr @__msan_param_tls, align 8113; CHECK-NEXT: call void @llvm.donothing()114; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[CMP:%.*]], target("aarch64.svcount") zeroinitializer, target("aarch64.svcount") zeroinitializer115; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select i1 [[TMP1]], target("aarch64.svcount") zeroinitializer, target("aarch64.svcount") [[TMP2]]116; CHECK-NEXT: [[X_Y:%.*]] = select i1 [[CMP]], target("aarch64.svcount") [[X:%.*]], target("aarch64.svcount") [[Y:%.*]]117; CHECK-NEXT: store target("aarch64.svcount") [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8118; CHECK-NEXT: ret target("aarch64.svcount") [[X_Y]]119;120 %x.y = select i1 %cmp, target("aarch64.svcount") %x, target("aarch64.svcount") %y121 ret target("aarch64.svcount") %x.y122}123 124define target("aarch64.svcount") @test_sel_cc(target("aarch64.svcount") %x, target("aarch64.svcount") %y, i32 %k) sanitize_memory {125; CHECK-LABEL: @test_sel_cc(126; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8127; CHECK-NEXT: call void @llvm.donothing()128; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[K:%.*]], -2147483648129; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], -1130; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[TMP2]], [[TMP3]]131; CHECK-NEXT: [[TMP5:%.*]] = or i32 [[TMP2]], [[TMP1]]132; CHECK-NEXT: [[TMP6:%.*]] = icmp ugt i32 [[TMP4]], -2147483606133; CHECK-NEXT: [[TMP7:%.*]] = icmp ugt i32 [[TMP5]], -2147483606134; CHECK-NEXT: [[TMP8:%.*]] = xor i1 [[TMP6]], [[TMP7]]135; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[K]], 42136; CHECK-NEXT: [[TMP9:%.*]] = select i1 [[CMP]], target("aarch64.svcount") zeroinitializer, target("aarch64.svcount") zeroinitializer137; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select i1 [[TMP8]], target("aarch64.svcount") zeroinitializer, target("aarch64.svcount") [[TMP9]]138; CHECK-NEXT: [[X_Y:%.*]] = select i1 [[CMP]], target("aarch64.svcount") [[X:%.*]], target("aarch64.svcount") [[Y:%.*]]139; CHECK-NEXT: store target("aarch64.svcount") [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8140; CHECK-NEXT: ret target("aarch64.svcount") [[X_Y]]141;142 %cmp = icmp sgt i32 %k, 42143 %x.y = select i1 %cmp, target("aarch64.svcount") %x, target("aarch64.svcount") %y144 ret target("aarch64.svcount") %x.y145}146