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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt %s -S -mattr=+avx512f -passes=msan 2>&1 | FileCheck %s3;4; Forked from llvm/test/CodeGen/X86/avx512-intrinsics-upgrade.ll5 6target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"7target triple = "x86_64-unknown-linux-gnu"8 9declare i16 @llvm.x86.avx512.kunpck.bw(i16, i16) nounwind readnone10 11define i16 @unpckbw_test(i16 %a0, i16 %a1) #0 {12;13; CHECK-LABEL: @unpckbw_test(14; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 815; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 816; CHECK-NEXT: call void @llvm.donothing()17; CHECK-NEXT: [[TMP3:%.*]] = bitcast i16 [[TMP1]] to <16 x i1>18; CHECK-NEXT: [[TMP4:%.*]] = bitcast i16 [[A0:%.*]] to <16 x i1>19; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>20; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[A1:%.*]] to <16 x i1>21; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i1> [[TMP3]], <16 x i1> [[TMP3]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>22; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <16 x i1> [[TMP4]], <16 x i1> [[TMP4]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>23; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <16 x i1> [[TMP5]], <16 x i1> [[TMP5]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>24; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <16 x i1> [[TMP6]], <16 x i1> [[TMP6]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>25; CHECK-NEXT: [[_MSPROP2:%.*]] = shufflevector <8 x i1> [[_MSPROP1]], <8 x i1> [[_MSPROP]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>26; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <8 x i1> [[TMP8]], <8 x i1> [[TMP7]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>27; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i1> [[_MSPROP2]] to i1628; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i1> [[TMP9]] to i1629; CHECK-NEXT: store i16 [[TMP10]], ptr @__msan_retval_tls, align 830; CHECK-NEXT: ret i16 [[TMP11]]31;32 %res = call i16 @llvm.x86.avx512.kunpck.bw(i16 %a0, i16 %a1)33 ret i16 %res34}35 36define { <16 x i32>, <16 x i32>, <16 x i32> } @test_int_x86_avx512_mask_pbroadcastd_gpr_512(i32 %x0, <16 x i32> %x1, i16 %mask) #0 {37;38; CHECK-LABEL: @test_int_x86_avx512_mask_pbroadcastd_gpr_512(39; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 840; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 841; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 842; CHECK-NEXT: call void @llvm.donothing()43; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <16 x i32> splat (i32 -1), i32 [[TMP1]], i64 044; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <16 x i32> poison, i32 [[X0:%.*]], i64 045; CHECK-NEXT: [[_MSPROP5:%.*]] = shufflevector <16 x i32> [[_MSPROP]], <16 x i32> splat (i32 -1), <16 x i32> zeroinitializer46; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <16 x i32> [[DOTSPLATINSERT]], <16 x i32> poison, <16 x i32> zeroinitializer47; CHECK-NEXT: [[_MSPROP6:%.*]] = insertelement <16 x i32> splat (i32 -1), i32 [[TMP1]], i64 048; CHECK-NEXT: [[DOTSPLATINSERT1:%.*]] = insertelement <16 x i32> poison, i32 [[X0]], i64 049; CHECK-NEXT: [[_MSPROP7:%.*]] = shufflevector <16 x i32> [[_MSPROP6]], <16 x i32> splat (i32 -1), <16 x i32> zeroinitializer50; CHECK-NEXT: [[DOTSPLAT2:%.*]] = shufflevector <16 x i32> [[DOTSPLATINSERT1]], <16 x i32> poison, <16 x i32> zeroinitializer51; CHECK-NEXT: [[TMP4:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>52; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>53; CHECK-NEXT: [[TMP6:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[_MSPROP7]], <16 x i32> [[TMP3]]54; CHECK-NEXT: [[TMP7:%.*]] = xor <16 x i32> [[DOTSPLAT2]], [[X1:%.*]]55; CHECK-NEXT: [[TMP8:%.*]] = or <16 x i32> [[TMP7]], [[_MSPROP7]]56; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], [[TMP3]]57; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP4]], <16 x i32> [[TMP9]], <16 x i32> [[TMP6]]58; CHECK-NEXT: [[TMP10:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[DOTSPLAT2]], <16 x i32> [[X1]]59; CHECK-NEXT: [[_MSPROP8:%.*]] = insertelement <16 x i32> splat (i32 -1), i32 [[TMP1]], i64 060; CHECK-NEXT: [[DOTSPLATINSERT3:%.*]] = insertelement <16 x i32> poison, i32 [[X0]], i64 061; CHECK-NEXT: [[_MSPROP9:%.*]] = shufflevector <16 x i32> [[_MSPROP8]], <16 x i32> splat (i32 -1), <16 x i32> zeroinitializer62; CHECK-NEXT: [[DOTSPLAT4:%.*]] = shufflevector <16 x i32> [[DOTSPLATINSERT3]], <16 x i32> poison, <16 x i32> zeroinitializer63; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>64; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16 [[MASK]] to <16 x i1>65; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[_MSPROP9]], <16 x i32> zeroinitializer66; CHECK-NEXT: [[TMP14:%.*]] = xor <16 x i32> [[DOTSPLAT4]], zeroinitializer67; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], [[_MSPROP9]]68; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i32> [[TMP15]], zeroinitializer69; CHECK-NEXT: [[_MSPROP_SELECT10:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP16]], <16 x i32> [[TMP13]]70; CHECK-NEXT: [[TMP17:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[DOTSPLAT4]], <16 x i32> zeroinitializer71; CHECK-NEXT: [[TMP18:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } { <16 x i32> splat (i32 -1), <16 x i32> splat (i32 -1), <16 x i32> splat (i32 -1) }, <16 x i32> [[_MSPROP5]], 072; CHECK-NEXT: [[RES3:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> [[DOTSPLAT]], 073; CHECK-NEXT: [[TMP19:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[TMP18]], <16 x i32> [[_MSPROP_SELECT]], 174; CHECK-NEXT: [[RES4:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[RES3]], <16 x i32> [[TMP10]], 175; CHECK-NEXT: [[TMP20:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[TMP19]], <16 x i32> [[_MSPROP_SELECT10]], 276; CHECK-NEXT: [[RES5:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[RES4]], <16 x i32> [[TMP17]], 277; CHECK-NEXT: store { <16 x i32>, <16 x i32>, <16 x i32> } [[TMP20]], ptr @__msan_retval_tls, align 878; CHECK-NEXT: ret { <16 x i32>, <16 x i32>, <16 x i32> } [[RES5]]79;80 %res0 = call <16 x i32> @llvm.x86.avx512.mask.pbroadcast.d.gpr.512(i32 %x0, <16 x i32> %x1, i16 -1)81 %res1 = call <16 x i32> @llvm.x86.avx512.mask.pbroadcast.d.gpr.512(i32 %x0, <16 x i32> %x1, i16 %mask)82 %res2 = call <16 x i32> @llvm.x86.avx512.mask.pbroadcast.d.gpr.512(i32 %x0, <16 x i32> zeroinitializer, i16 %mask)83 %res3 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> %res0, 084 %res4 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res3, <16 x i32> %res1, 185 %res5 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res4, <16 x i32> %res2, 286 ret { <16 x i32>, <16 x i32>, <16 x i32> } %res587}88declare <16 x i32> @llvm.x86.avx512.mask.pbroadcast.d.gpr.512(i32, <16 x i32>, i16)89 90 91define { <8 x i64>, <8 x i64>, <8 x i64> } @test_int_x86_avx512_mask_pbroadcastq_gpr_512(i64 %x0, <8 x i64> %x1, i8 %mask) #0 {92;93; CHECK-LABEL: @test_int_x86_avx512_mask_pbroadcastq_gpr_512(94; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 895; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 896; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 897; CHECK-NEXT: call void @llvm.donothing()98; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i64> splat (i64 -1), i64 [[TMP1]], i64 099; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x i64> poison, i64 [[X0:%.*]], i64 0100; CHECK-NEXT: [[_MSPROP5:%.*]] = shufflevector <8 x i64> [[_MSPROP]], <8 x i64> splat (i64 -1), <8 x i32> zeroinitializer101; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <8 x i64> [[DOTSPLATINSERT]], <8 x i64> poison, <8 x i32> zeroinitializer102; CHECK-NEXT: [[_MSPROP6:%.*]] = insertelement <8 x i64> splat (i64 -1), i64 [[TMP1]], i64 0103; CHECK-NEXT: [[DOTSPLATINSERT1:%.*]] = insertelement <8 x i64> poison, i64 [[X0]], i64 0104; CHECK-NEXT: [[_MSPROP7:%.*]] = shufflevector <8 x i64> [[_MSPROP6]], <8 x i64> splat (i64 -1), <8 x i32> zeroinitializer105; CHECK-NEXT: [[DOTSPLAT2:%.*]] = shufflevector <8 x i64> [[DOTSPLATINSERT1]], <8 x i64> poison, <8 x i32> zeroinitializer106; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>107; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>108; CHECK-NEXT: [[TMP6:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[_MSPROP7]], <8 x i64> [[TMP3]]109; CHECK-NEXT: [[TMP7:%.*]] = xor <8 x i64> [[DOTSPLAT2]], [[X1:%.*]]110; CHECK-NEXT: [[TMP8:%.*]] = or <8 x i64> [[TMP7]], [[_MSPROP7]]111; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[TMP3]]112; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP4]], <8 x i64> [[TMP9]], <8 x i64> [[TMP6]]113; CHECK-NEXT: [[TMP10:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[DOTSPLAT2]], <8 x i64> [[X1]]114; CHECK-NEXT: [[_MSPROP8:%.*]] = insertelement <8 x i64> splat (i64 -1), i64 [[TMP1]], i64 0115; CHECK-NEXT: [[DOTSPLATINSERT3:%.*]] = insertelement <8 x i64> poison, i64 [[X0]], i64 0116; CHECK-NEXT: [[_MSPROP9:%.*]] = shufflevector <8 x i64> [[_MSPROP8]], <8 x i64> splat (i64 -1), <8 x i32> zeroinitializer117; CHECK-NEXT: [[DOTSPLAT4:%.*]] = shufflevector <8 x i64> [[DOTSPLATINSERT3]], <8 x i64> poison, <8 x i32> zeroinitializer118; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>119; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8 [[MASK]] to <8 x i1>120; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP12]], <8 x i64> [[_MSPROP9]], <8 x i64> zeroinitializer121; CHECK-NEXT: [[TMP14:%.*]] = xor <8 x i64> [[DOTSPLAT4]], zeroinitializer122; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], [[_MSPROP9]]123; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP15]], zeroinitializer124; CHECK-NEXT: [[_MSPROP_SELECT10:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP16]], <8 x i64> [[TMP13]]125; CHECK-NEXT: [[TMP17:%.*]] = select <8 x i1> [[TMP12]], <8 x i64> [[DOTSPLAT4]], <8 x i64> zeroinitializer126; CHECK-NEXT: [[TMP18:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } { <8 x i64> splat (i64 -1), <8 x i64> splat (i64 -1), <8 x i64> splat (i64 -1) }, <8 x i64> [[_MSPROP5]], 0127; CHECK-NEXT: [[RES3:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> [[DOTSPLAT]], 0128; CHECK-NEXT: [[TMP19:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[TMP18]], <8 x i64> [[_MSPROP_SELECT]], 1129; CHECK-NEXT: [[RES4:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[RES3]], <8 x i64> [[TMP10]], 1130; CHECK-NEXT: [[TMP20:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[TMP19]], <8 x i64> [[_MSPROP_SELECT10]], 2131; CHECK-NEXT: [[RES5:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[RES4]], <8 x i64> [[TMP17]], 2132; CHECK-NEXT: store { <8 x i64>, <8 x i64>, <8 x i64> } [[TMP20]], ptr @__msan_retval_tls, align 8133; CHECK-NEXT: ret { <8 x i64>, <8 x i64>, <8 x i64> } [[RES5]]134;135 %res0 = call <8 x i64> @llvm.x86.avx512.mask.pbroadcast.q.gpr.512(i64 %x0, <8 x i64> %x1,i8 -1)136 %res1 = call <8 x i64> @llvm.x86.avx512.mask.pbroadcast.q.gpr.512(i64 %x0, <8 x i64> %x1,i8 %mask)137 %res2 = call <8 x i64> @llvm.x86.avx512.mask.pbroadcast.q.gpr.512(i64 %x0, <8 x i64> zeroinitializer,i8 %mask)138 %res3 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> %res0, 0139 %res4 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res3, <8 x i64> %res1, 1140 %res5 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res4, <8 x i64> %res2, 2141 ret { <8 x i64>, <8 x i64>, <8 x i64> } %res5142}143declare <8 x i64> @llvm.x86.avx512.mask.pbroadcast.q.gpr.512(i64, <8 x i64>, i8)144 145 146declare <16 x float> @llvm.x86.avx512.mask.broadcast.ss.ps.512(<4 x float>, <16 x float>, i16) nounwind readonly147 148define <16 x float> @test_x86_vbroadcast_ss_ps_512(<4 x float> %a0, <16 x float> %a1, <16 x float> %extra_param) #0 {149; CHECK-LABEL: @test_x86_vbroadcast_ss_ps_512(150; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 8151; CHECK-NEXT: call void @llvm.donothing()152; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> splat (i32 -1), <16 x i32> zeroinitializer153; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x float> [[A0:%.*]], <4 x float> poison, <16 x i32> zeroinitializer154; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 8155; CHECK-NEXT: ret <16 x float> [[TMP2]]156;157 %res = call <16 x float> @llvm.x86.avx512.mask.broadcast.ss.ps.512(<4 x float> %a0, <16 x float> %extra_param, i16 -1)158 ret <16 x float> %res159}160 161define <16 x float> @test_x86_mask_vbroadcast_ss_ps_512(<4 x float> %a0, <16 x float> %a1, i16 %mask ) #0 {162;163; CHECK-LABEL: @test_x86_mask_vbroadcast_ss_ps_512(164; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 8165; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 8166; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8167; CHECK-NEXT: call void @llvm.donothing()168; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> splat (i32 -1), <16 x i32> zeroinitializer169; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[A0:%.*]], <4 x float> poison, <16 x i32> zeroinitializer170; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>171; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>172; CHECK-NEXT: [[TMP7:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP3]]173; CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x float> [[TMP4]] to <16 x i32>174; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x float> [[A1:%.*]] to <16 x i32>175; CHECK-NEXT: [[TMP10:%.*]] = xor <16 x i32> [[TMP8]], [[TMP9]]176; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[_MSPROP]]177; CHECK-NEXT: [[TMP12:%.*]] = or <16 x i32> [[TMP11]], [[TMP3]]178; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[TMP12]], <16 x i32> [[TMP7]]179; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP6]], <16 x float> [[TMP4]], <16 x float> [[A1]]180; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8181; CHECK-NEXT: ret <16 x float> [[TMP13]]182;183 %res = call <16 x float> @llvm.x86.avx512.mask.broadcast.ss.ps.512(<4 x float> %a0, <16 x float> %a1, i16 %mask)184 ret <16 x float> %res185}186 187define <16 x float> @test_x86_maskz_vbroadcast_ss_ps_512(<4 x float> %a0, i16 %mask ) #0 {188;189; CHECK-LABEL: @test_x86_maskz_vbroadcast_ss_ps_512(190; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 8191; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8192; CHECK-NEXT: call void @llvm.donothing()193; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> splat (i32 -1), <16 x i32> zeroinitializer194; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x float> [[A0:%.*]], <4 x float> poison, <16 x i32> zeroinitializer195; CHECK-NEXT: [[TMP4:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>196; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>197; CHECK-NEXT: [[TMP6:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[_MSPROP]], <16 x i32> zeroinitializer198; CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x float> [[TMP3]] to <16 x i32>199; CHECK-NEXT: [[TMP8:%.*]] = xor <16 x i32> [[TMP7]], zeroinitializer200; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], [[_MSPROP]]201; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], zeroinitializer202; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP4]], <16 x i32> [[TMP10]], <16 x i32> [[TMP6]]203; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP5]], <16 x float> [[TMP3]], <16 x float> zeroinitializer204; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8205; CHECK-NEXT: ret <16 x float> [[TMP11]]206;207 %res = call <16 x float> @llvm.x86.avx512.mask.broadcast.ss.ps.512(<4 x float> %a0, <16 x float> zeroinitializer, i16 %mask)208 ret <16 x float> %res209}210 211declare <8 x double> @llvm.x86.avx512.mask.broadcast.sd.pd.512(<2 x double>, <8 x double>, i8) nounwind readonly212 213define <8 x double> @test_x86_vbroadcast_sd_pd_512(<2 x double> %a0, <8 x double> %a1, <8 x double> %extra_param) #0 {214; CHECK-LABEL: @test_x86_vbroadcast_sd_pd_512(215; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr @__msan_param_tls, align 8216; CHECK-NEXT: call void @llvm.donothing()217; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <2 x i64> [[TMP1]], <2 x i64> splat (i64 -1), <8 x i32> zeroinitializer218; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x double> [[A0:%.*]], <2 x double> poison, <8 x i32> zeroinitializer219; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 8220; CHECK-NEXT: ret <8 x double> [[TMP2]]221;222 %res = call <8 x double> @llvm.x86.avx512.mask.broadcast.sd.pd.512(<2 x double> %a0, <8 x double> %extra_param, i8 -1)223 ret <8 x double> %res224}225 226define <8 x double> @test_x86_mask_vbroadcast_sd_pd_512(<2 x double> %a0, <8 x double> %a1, i8 %mask ) #0 {227;228; CHECK-LABEL: @test_x86_mask_vbroadcast_sd_pd_512(229; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr @__msan_param_tls, align 8230; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 8231; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8232; CHECK-NEXT: call void @llvm.donothing()233; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <2 x i64> [[TMP1]], <2 x i64> splat (i64 -1), <8 x i32> zeroinitializer234; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <2 x double> [[A0:%.*]], <2 x double> poison, <8 x i32> zeroinitializer235; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>236; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>237; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP3]]238; CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x double> [[TMP4]] to <8 x i64>239; CHECK-NEXT: [[TMP9:%.*]] = bitcast <8 x double> [[A1:%.*]] to <8 x i64>240; CHECK-NEXT: [[TMP10:%.*]] = xor <8 x i64> [[TMP8]], [[TMP9]]241; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[_MSPROP]]242; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], [[TMP3]]243; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP12]], <8 x i64> [[TMP7]]244; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP6]], <8 x double> [[TMP4]], <8 x double> [[A1]]245; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8246; CHECK-NEXT: ret <8 x double> [[TMP13]]247;248 %res = call <8 x double> @llvm.x86.avx512.mask.broadcast.sd.pd.512(<2 x double> %a0, <8 x double> %a1, i8 %mask)249 ret <8 x double> %res250}251 252define <8 x double> @test_x86_maskz_vbroadcast_sd_pd_512(<2 x double> %a0, i8 %mask ) #0 {253;254; CHECK-LABEL: @test_x86_maskz_vbroadcast_sd_pd_512(255; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr @__msan_param_tls, align 8256; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8257; CHECK-NEXT: call void @llvm.donothing()258; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <2 x i64> [[TMP1]], <2 x i64> splat (i64 -1), <8 x i32> zeroinitializer259; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x double> [[A0:%.*]], <2 x double> poison, <8 x i32> zeroinitializer260; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>261; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>262; CHECK-NEXT: [[TMP6:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer263; CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x double> [[TMP3]] to <8 x i64>264; CHECK-NEXT: [[TMP8:%.*]] = xor <8 x i64> [[TMP7]], zeroinitializer265; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[_MSPROP]]266; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], zeroinitializer267; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP4]], <8 x i64> [[TMP10]], <8 x i64> [[TMP6]]268; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP5]], <8 x double> [[TMP3]], <8 x double> zeroinitializer269; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8270; CHECK-NEXT: ret <8 x double> [[TMP11]]271;272 %res = call <8 x double> @llvm.x86.avx512.mask.broadcast.sd.pd.512(<2 x double> %a0, <8 x double> zeroinitializer, i8 %mask)273 ret <8 x double> %res274}275 276declare <16 x i32> @llvm.x86.avx512.pbroadcastd.512(<4 x i32>, <16 x i32>, i16)277 278define <16 x i32>@test_int_x86_avx512_pbroadcastd_512(<4 x i32> %x0, <16 x i32> %x1) #0 {279; CHECK-LABEL: @test_int_x86_avx512_pbroadcastd_512(280; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 8281; CHECK-NEXT: call void @llvm.donothing()282; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> splat (i32 -1), <16 x i32> zeroinitializer283; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32> [[X0:%.*]], <4 x i32> poison, <16 x i32> zeroinitializer284; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 8285; CHECK-NEXT: ret <16 x i32> [[TMP2]]286;287 %res = call <16 x i32> @llvm.x86.avx512.pbroadcastd.512(<4 x i32> %x0, <16 x i32> %x1, i16 -1)288 ret <16 x i32> %res289}290 291define <16 x i32>@test_int_x86_avx512_mask_pbroadcastd_512(<4 x i32> %x0, <16 x i32> %x1, i16 %mask) #0 {292;293; CHECK-LABEL: @test_int_x86_avx512_mask_pbroadcastd_512(294; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 8295; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 8296; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8297; CHECK-NEXT: call void @llvm.donothing()298; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> splat (i32 -1), <16 x i32> zeroinitializer299; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x i32> [[X0:%.*]], <4 x i32> poison, <16 x i32> zeroinitializer300; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>301; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>302; CHECK-NEXT: [[TMP7:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP3]]303; CHECK-NEXT: [[TMP8:%.*]] = xor <16 x i32> [[TMP4]], [[X1:%.*]]304; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], [[_MSPROP]]305; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[TMP3]]306; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[TMP10]], <16 x i32> [[TMP7]]307; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP4]], <16 x i32> [[X1]]308; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8309; CHECK-NEXT: ret <16 x i32> [[TMP11]]310;311 %res = call <16 x i32> @llvm.x86.avx512.pbroadcastd.512(<4 x i32> %x0, <16 x i32> %x1, i16 %mask)312 ret <16 x i32> %res313}314 315define <16 x i32>@test_int_x86_avx512_maskz_pbroadcastd_512(<4 x i32> %x0, i16 %mask) #0 {316;317; CHECK-LABEL: @test_int_x86_avx512_maskz_pbroadcastd_512(318; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 8319; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8320; CHECK-NEXT: call void @llvm.donothing()321; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> splat (i32 -1), <16 x i32> zeroinitializer322; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x i32> [[X0:%.*]], <4 x i32> poison, <16 x i32> zeroinitializer323; CHECK-NEXT: [[TMP4:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>324; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>325; CHECK-NEXT: [[TMP6:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[_MSPROP]], <16 x i32> zeroinitializer326; CHECK-NEXT: [[TMP7:%.*]] = xor <16 x i32> [[TMP3]], zeroinitializer327; CHECK-NEXT: [[TMP8:%.*]] = or <16 x i32> [[TMP7]], [[_MSPROP]]328; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], zeroinitializer329; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP4]], <16 x i32> [[TMP9]], <16 x i32> [[TMP6]]330; CHECK-NEXT: [[TMP10:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[TMP3]], <16 x i32> zeroinitializer331; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8332; CHECK-NEXT: ret <16 x i32> [[TMP10]]333;334 %res = call <16 x i32> @llvm.x86.avx512.pbroadcastd.512(<4 x i32> %x0, <16 x i32> zeroinitializer, i16 %mask)335 ret <16 x i32> %res336}337 338declare <8 x i64> @llvm.x86.avx512.pbroadcastq.512(<2 x i64>, <8 x i64>, i8)339 340define <8 x i64>@test_int_x86_avx512_pbroadcastq_512(<2 x i64> %x0, <8 x i64> %x1) #0 {341; CHECK-LABEL: @test_int_x86_avx512_pbroadcastq_512(342; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr @__msan_param_tls, align 8343; CHECK-NEXT: call void @llvm.donothing()344; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <2 x i64> [[TMP1]], <2 x i64> splat (i64 -1), <8 x i32> zeroinitializer345; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x i64> [[X0:%.*]], <2 x i64> poison, <8 x i32> zeroinitializer346; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 8347; CHECK-NEXT: ret <8 x i64> [[TMP2]]348;349 %res = call <8 x i64> @llvm.x86.avx512.pbroadcastq.512(<2 x i64> %x0, <8 x i64> %x1,i8 -1)350 ret <8 x i64> %res351}352 353define <8 x i64>@test_int_x86_avx512_mask_pbroadcastq_512(<2 x i64> %x0, <8 x i64> %x1, i8 %mask) #0 {354;355; CHECK-LABEL: @test_int_x86_avx512_mask_pbroadcastq_512(356; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr @__msan_param_tls, align 8357; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 8358; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8359; CHECK-NEXT: call void @llvm.donothing()360; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <2 x i64> [[TMP1]], <2 x i64> splat (i64 -1), <8 x i32> zeroinitializer361; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <2 x i64> [[X0:%.*]], <2 x i64> poison, <8 x i32> zeroinitializer362; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>363; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>364; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP3]]365; CHECK-NEXT: [[TMP8:%.*]] = xor <8 x i64> [[TMP4]], [[X1:%.*]]366; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[_MSPROP]]367; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[TMP3]]368; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP10]], <8 x i64> [[TMP7]]369; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP4]], <8 x i64> [[X1]]370; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8371; CHECK-NEXT: ret <8 x i64> [[TMP11]]372;373 %res = call <8 x i64> @llvm.x86.avx512.pbroadcastq.512(<2 x i64> %x0, <8 x i64> %x1,i8 %mask)374 ret <8 x i64> %res375}376 377define <8 x i64>@test_int_x86_avx512_maskz_pbroadcastq_512(<2 x i64> %x0, i8 %mask) #0 {378;379; CHECK-LABEL: @test_int_x86_avx512_maskz_pbroadcastq_512(380; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr @__msan_param_tls, align 8381; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8382; CHECK-NEXT: call void @llvm.donothing()383; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <2 x i64> [[TMP1]], <2 x i64> splat (i64 -1), <8 x i32> zeroinitializer384; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x i64> [[X0:%.*]], <2 x i64> poison, <8 x i32> zeroinitializer385; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>386; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>387; CHECK-NEXT: [[TMP6:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer388; CHECK-NEXT: [[TMP7:%.*]] = xor <8 x i64> [[TMP3]], zeroinitializer389; CHECK-NEXT: [[TMP8:%.*]] = or <8 x i64> [[TMP7]], [[_MSPROP]]390; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], zeroinitializer391; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP4]], <8 x i64> [[TMP9]], <8 x i64> [[TMP6]]392; CHECK-NEXT: [[TMP10:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP3]], <8 x i64> zeroinitializer393; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8394; CHECK-NEXT: ret <8 x i64> [[TMP10]]395;396 %res = call <8 x i64> @llvm.x86.avx512.pbroadcastq.512(<2 x i64> %x0, <8 x i64> zeroinitializer,i8 %mask)397 ret <8 x i64> %res398}399 400declare <16 x float> @llvm.x86.avx512.mask.movsldup.512(<16 x float>, <16 x float>, i16)401 402define <16 x float>@test_int_x86_avx512_movsldup_512(<16 x float> %x0, <16 x float> %x1) #0 {403; CHECK-LABEL: @test_int_x86_avx512_movsldup_512(404; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 8405; CHECK-NEXT: call void @llvm.donothing()406; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6, i32 8, i32 8, i32 10, i32 10, i32 12, i32 12, i32 14, i32 14>407; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <16 x float> [[X0:%.*]], <16 x float> [[X0]], <16 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6, i32 8, i32 8, i32 10, i32 10, i32 12, i32 12, i32 14, i32 14>408; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 8409; CHECK-NEXT: ret <16 x float> [[TMP2]]410;411 %res = call <16 x float> @llvm.x86.avx512.mask.movsldup.512(<16 x float> %x0, <16 x float> %x1, i16 -1)412 ret <16 x float> %res413}414 415define <16 x float>@test_int_x86_avx512_mask_movsldup_512(<16 x float> %x0, <16 x float> %x1, i16 %x2) #0 {416;417; CHECK-LABEL: @test_int_x86_avx512_mask_movsldup_512(418; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 8419; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 8420; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8421; CHECK-NEXT: call void @llvm.donothing()422; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6, i32 8, i32 8, i32 10, i32 10, i32 12, i32 12, i32 14, i32 14>423; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <16 x float> [[X0:%.*]], <16 x float> [[X0]], <16 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6, i32 8, i32 8, i32 10, i32 10, i32 12, i32 12, i32 14, i32 14>424; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>425; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[X2:%.*]] to <16 x i1>426; CHECK-NEXT: [[TMP7:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP3]]427; CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x float> [[TMP4]] to <16 x i32>428; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x float> [[X1:%.*]] to <16 x i32>429; CHECK-NEXT: [[TMP10:%.*]] = xor <16 x i32> [[TMP8]], [[TMP9]]430; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[_MSPROP]]431; CHECK-NEXT: [[TMP12:%.*]] = or <16 x i32> [[TMP11]], [[TMP3]]432; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[TMP12]], <16 x i32> [[TMP7]]433; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP6]], <16 x float> [[TMP4]], <16 x float> [[X1]]434; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8435; CHECK-NEXT: ret <16 x float> [[TMP13]]436;437 %res = call <16 x float> @llvm.x86.avx512.mask.movsldup.512(<16 x float> %x0, <16 x float> %x1, i16 %x2)438 ret <16 x float> %res439}440 441define <16 x float>@test_int_x86_avx512_maskz_movsldup_512(<16 x float> %x0, i16 %x2) #0 {442;443; CHECK-LABEL: @test_int_x86_avx512_maskz_movsldup_512(444; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 8445; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8446; CHECK-NEXT: call void @llvm.donothing()447; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6, i32 8, i32 8, i32 10, i32 10, i32 12, i32 12, i32 14, i32 14>448; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <16 x float> [[X0:%.*]], <16 x float> [[X0]], <16 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6, i32 8, i32 8, i32 10, i32 10, i32 12, i32 12, i32 14, i32 14>449; CHECK-NEXT: [[TMP4:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>450; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[X2:%.*]] to <16 x i1>451; CHECK-NEXT: [[TMP6:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[_MSPROP]], <16 x i32> zeroinitializer452; CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x float> [[TMP3]] to <16 x i32>453; CHECK-NEXT: [[TMP8:%.*]] = xor <16 x i32> [[TMP7]], zeroinitializer454; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], [[_MSPROP]]455; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], zeroinitializer456; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP4]], <16 x i32> [[TMP10]], <16 x i32> [[TMP6]]457; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP5]], <16 x float> [[TMP3]], <16 x float> zeroinitializer458; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8459; CHECK-NEXT: ret <16 x float> [[TMP11]]460;461 %res = call <16 x float> @llvm.x86.avx512.mask.movsldup.512(<16 x float> %x0, <16 x float> zeroinitializer, i16 %x2)462 ret <16 x float> %res463}464 465declare <16 x float> @llvm.x86.avx512.mask.movshdup.512(<16 x float>, <16 x float>, i16)466 467define <16 x float>@test_int_x86_avx512_movshdup_512(<16 x float> %x0, <16 x float> %x1) #0 {468; CHECK-LABEL: @test_int_x86_avx512_movshdup_512(469; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 8470; CHECK-NEXT: call void @llvm.donothing()471; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7, i32 9, i32 9, i32 11, i32 11, i32 13, i32 13, i32 15, i32 15>472; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <16 x float> [[X0:%.*]], <16 x float> [[X0]], <16 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7, i32 9, i32 9, i32 11, i32 11, i32 13, i32 13, i32 15, i32 15>473; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 8474; CHECK-NEXT: ret <16 x float> [[TMP2]]475;476 %res = call <16 x float> @llvm.x86.avx512.mask.movshdup.512(<16 x float> %x0, <16 x float> %x1, i16 -1)477 ret <16 x float> %res478}479 480define <16 x float>@test_int_x86_avx512_mask_movshdup_512(<16 x float> %x0, <16 x float> %x1, i16 %x2) #0 {481;482; CHECK-LABEL: @test_int_x86_avx512_mask_movshdup_512(483; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 8484; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 8485; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8486; CHECK-NEXT: call void @llvm.donothing()487; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7, i32 9, i32 9, i32 11, i32 11, i32 13, i32 13, i32 15, i32 15>488; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <16 x float> [[X0:%.*]], <16 x float> [[X0]], <16 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7, i32 9, i32 9, i32 11, i32 11, i32 13, i32 13, i32 15, i32 15>489; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>490; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[X2:%.*]] to <16 x i1>491; CHECK-NEXT: [[TMP7:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP3]]492; CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x float> [[TMP4]] to <16 x i32>493; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x float> [[X1:%.*]] to <16 x i32>494; CHECK-NEXT: [[TMP10:%.*]] = xor <16 x i32> [[TMP8]], [[TMP9]]495; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[_MSPROP]]496; CHECK-NEXT: [[TMP12:%.*]] = or <16 x i32> [[TMP11]], [[TMP3]]497; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[TMP12]], <16 x i32> [[TMP7]]498; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP6]], <16 x float> [[TMP4]], <16 x float> [[X1]]499; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8500; CHECK-NEXT: ret <16 x float> [[TMP13]]501;502 %res = call <16 x float> @llvm.x86.avx512.mask.movshdup.512(<16 x float> %x0, <16 x float> %x1, i16 %x2)503 ret <16 x float> %res504}505 506define <16 x float>@test_int_x86_avx512_maskz_movshdup_512(<16 x float> %x0, i16 %x2) #0 {507;508; CHECK-LABEL: @test_int_x86_avx512_maskz_movshdup_512(509; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 8510; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8511; CHECK-NEXT: call void @llvm.donothing()512; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7, i32 9, i32 9, i32 11, i32 11, i32 13, i32 13, i32 15, i32 15>513; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <16 x float> [[X0:%.*]], <16 x float> [[X0]], <16 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7, i32 9, i32 9, i32 11, i32 11, i32 13, i32 13, i32 15, i32 15>514; CHECK-NEXT: [[TMP4:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>515; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[X2:%.*]] to <16 x i1>516; CHECK-NEXT: [[TMP6:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[_MSPROP]], <16 x i32> zeroinitializer517; CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x float> [[TMP3]] to <16 x i32>518; CHECK-NEXT: [[TMP8:%.*]] = xor <16 x i32> [[TMP7]], zeroinitializer519; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], [[_MSPROP]]520; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], zeroinitializer521; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP4]], <16 x i32> [[TMP10]], <16 x i32> [[TMP6]]522; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP5]], <16 x float> [[TMP3]], <16 x float> zeroinitializer523; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8524; CHECK-NEXT: ret <16 x float> [[TMP11]]525;526 %res = call <16 x float> @llvm.x86.avx512.mask.movshdup.512(<16 x float> %x0, <16 x float> zeroinitializer, i16 %x2)527 ret <16 x float> %res528}529 530declare <8 x double> @llvm.x86.avx512.mask.movddup.512(<8 x double>, <8 x double>, i8)531 532define <8 x double>@test_int_x86_avx512_movddup_512(<8 x double> %x0, <8 x double> %x1) #0 {533; CHECK-LABEL: @test_int_x86_avx512_movddup_512(534; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 8535; CHECK-NEXT: call void @llvm.donothing()536; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>537; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x double> [[X0:%.*]], <8 x double> [[X0]], <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>538; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 8539; CHECK-NEXT: ret <8 x double> [[TMP2]]540;541 %res = call <8 x double> @llvm.x86.avx512.mask.movddup.512(<8 x double> %x0, <8 x double> %x1, i8 -1)542 ret <8 x double> %res543}544 545define <8 x double>@test_int_x86_avx512_mask_movddup_512(<8 x double> %x0, <8 x double> %x1, i8 %x2) #0 {546;547; CHECK-LABEL: @test_int_x86_avx512_mask_movddup_512(548; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 8549; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 8550; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8551; CHECK-NEXT: call void @llvm.donothing()552; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>553; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <8 x double> [[X0:%.*]], <8 x double> [[X0]], <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>554; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>555; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[X2:%.*]] to <8 x i1>556; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP3]]557; CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x double> [[TMP4]] to <8 x i64>558; CHECK-NEXT: [[TMP9:%.*]] = bitcast <8 x double> [[X1:%.*]] to <8 x i64>559; CHECK-NEXT: [[TMP10:%.*]] = xor <8 x i64> [[TMP8]], [[TMP9]]560; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[_MSPROP]]561; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], [[TMP3]]562; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP12]], <8 x i64> [[TMP7]]563; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP6]], <8 x double> [[TMP4]], <8 x double> [[X1]]564; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8565; CHECK-NEXT: ret <8 x double> [[TMP13]]566;567 %res = call <8 x double> @llvm.x86.avx512.mask.movddup.512(<8 x double> %x0, <8 x double> %x1, i8 %x2)568 ret <8 x double> %res569}570 571define <8 x double>@test_int_x86_avx512_maskz_movddup_512(<8 x double> %x0, i8 %x2) #0 {572;573; CHECK-LABEL: @test_int_x86_avx512_maskz_movddup_512(574; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 8575; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8576; CHECK-NEXT: call void @llvm.donothing()577; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>578; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x double> [[X0:%.*]], <8 x double> [[X0]], <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>579; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>580; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[X2:%.*]] to <8 x i1>581; CHECK-NEXT: [[TMP6:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer582; CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x double> [[TMP3]] to <8 x i64>583; CHECK-NEXT: [[TMP8:%.*]] = xor <8 x i64> [[TMP7]], zeroinitializer584; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[_MSPROP]]585; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], zeroinitializer586; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP4]], <8 x i64> [[TMP10]], <8 x i64> [[TMP6]]587; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP5]], <8 x double> [[TMP3]], <8 x double> zeroinitializer588; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8589; CHECK-NEXT: ret <8 x double> [[TMP11]]590;591 %res = call <8 x double> @llvm.x86.avx512.mask.movddup.512(<8 x double> %x0, <8 x double> zeroinitializer, i8 %x2)592 ret <8 x double> %res593}594 595declare <8 x double> @llvm.x86.avx512.mask.perm.df.512(<8 x double>, i32, <8 x double>, i8)596 597define <8 x double>@test_int_x86_avx512_perm_df_512(<8 x double> %x0, <8 x double> %x2) #0 {598; CHECK-LABEL: @test_int_x86_avx512_perm_df_512(599; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 8600; CHECK-NEXT: call void @llvm.donothing()601; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i32> <i32 3, i32 0, i32 0, i32 0, i32 7, i32 4, i32 4, i32 4>602; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x double> [[X0:%.*]], <8 x double> [[X0]], <8 x i32> <i32 3, i32 0, i32 0, i32 0, i32 7, i32 4, i32 4, i32 4>603; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 8604; CHECK-NEXT: ret <8 x double> [[TMP2]]605;606 %res = call <8 x double> @llvm.x86.avx512.mask.perm.df.512(<8 x double> %x0, i32 3, <8 x double> %x2, i8 -1)607 ret <8 x double> %res608}609 610define <8 x double>@test_int_x86_avx512_mask_perm_df_512(<8 x double> %x0, <8 x double> %x2, i8 %x3) #0 {611;612; CHECK-LABEL: @test_int_x86_avx512_mask_perm_df_512(613; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 8614; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 8615; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8616; CHECK-NEXT: call void @llvm.donothing()617; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i32> <i32 3, i32 0, i32 0, i32 0, i32 7, i32 4, i32 4, i32 4>618; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <8 x double> [[X0:%.*]], <8 x double> [[X0]], <8 x i32> <i32 3, i32 0, i32 0, i32 0, i32 7, i32 4, i32 4, i32 4>619; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>620; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>621; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP3]]622; CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x double> [[TMP4]] to <8 x i64>623; CHECK-NEXT: [[TMP9:%.*]] = bitcast <8 x double> [[X2:%.*]] to <8 x i64>624; CHECK-NEXT: [[TMP10:%.*]] = xor <8 x i64> [[TMP8]], [[TMP9]]625; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[_MSPROP]]626; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], [[TMP3]]627; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP12]], <8 x i64> [[TMP7]]628; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP6]], <8 x double> [[TMP4]], <8 x double> [[X2]]629; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8630; CHECK-NEXT: ret <8 x double> [[TMP13]]631;632 %res = call <8 x double> @llvm.x86.avx512.mask.perm.df.512(<8 x double> %x0, i32 3, <8 x double> %x2, i8 %x3)633 ret <8 x double> %res634}635 636define <8 x double>@test_int_x86_avx512_maskz_perm_df_512(<8 x double> %x0, i8 %x3) #0 {637;638; CHECK-LABEL: @test_int_x86_avx512_maskz_perm_df_512(639; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 8640; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8641; CHECK-NEXT: call void @llvm.donothing()642; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i32> <i32 3, i32 0, i32 0, i32 0, i32 7, i32 4, i32 4, i32 4>643; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x double> [[X0:%.*]], <8 x double> [[X0]], <8 x i32> <i32 3, i32 0, i32 0, i32 0, i32 7, i32 4, i32 4, i32 4>644; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>645; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>646; CHECK-NEXT: [[TMP6:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer647; CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x double> [[TMP3]] to <8 x i64>648; CHECK-NEXT: [[TMP8:%.*]] = xor <8 x i64> [[TMP7]], zeroinitializer649; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[_MSPROP]]650; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], zeroinitializer651; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP4]], <8 x i64> [[TMP10]], <8 x i64> [[TMP6]]652; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP5]], <8 x double> [[TMP3]], <8 x double> zeroinitializer653; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8654; CHECK-NEXT: ret <8 x double> [[TMP11]]655;656 %res = call <8 x double> @llvm.x86.avx512.mask.perm.df.512(<8 x double> %x0, i32 3, <8 x double> zeroinitializer, i8 %x3)657 ret <8 x double> %res658}659 660declare <8 x i64> @llvm.x86.avx512.mask.perm.di.512(<8 x i64>, i32, <8 x i64>, i8)661 662define <8 x i64>@test_int_x86_avx512_perm_di_512(<8 x i64> %x0, i32 %x1, <8 x i64> %x2) #0 {663; CHECK-LABEL: @test_int_x86_avx512_perm_di_512(664; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 8665; CHECK-NEXT: call void @llvm.donothing()666; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i32> <i32 3, i32 0, i32 0, i32 0, i32 7, i32 4, i32 4, i32 4>667; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x i64> [[X0:%.*]], <8 x i64> [[X0]], <8 x i32> <i32 3, i32 0, i32 0, i32 0, i32 7, i32 4, i32 4, i32 4>668; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 8669; CHECK-NEXT: ret <8 x i64> [[TMP2]]670;671 %res = call <8 x i64> @llvm.x86.avx512.mask.perm.di.512(<8 x i64> %x0, i32 3, <8 x i64> %x2, i8 -1)672 ret <8 x i64> %res673}674 675define <8 x i64>@test_int_x86_avx512_mask_perm_di_512(<8 x i64> %x0, i32 %x1, <8 x i64> %x2, i8 %x3) #0 {676;677; CHECK-LABEL: @test_int_x86_avx512_mask_perm_di_512(678; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 8679; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 8680; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 8681; CHECK-NEXT: call void @llvm.donothing()682; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i32> <i32 3, i32 0, i32 0, i32 0, i32 7, i32 4, i32 4, i32 4>683; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <8 x i64> [[X0:%.*]], <8 x i64> [[X0]], <8 x i32> <i32 3, i32 0, i32 0, i32 0, i32 7, i32 4, i32 4, i32 4>684; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>685; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>686; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP3]]687; CHECK-NEXT: [[TMP8:%.*]] = xor <8 x i64> [[TMP4]], [[X2:%.*]]688; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[_MSPROP]]689; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[TMP3]]690; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP10]], <8 x i64> [[TMP7]]691; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP4]], <8 x i64> [[X2]]692; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8693; CHECK-NEXT: ret <8 x i64> [[TMP11]]694;695 %res = call <8 x i64> @llvm.x86.avx512.mask.perm.di.512(<8 x i64> %x0, i32 3, <8 x i64> %x2, i8 %x3)696 ret <8 x i64> %res697}698 699define <8 x i64>@test_int_x86_avx512_maskz_perm_di_512(<8 x i64> %x0, i32 %x1, i8 %x3) #0 {700;701; CHECK-LABEL: @test_int_x86_avx512_maskz_perm_di_512(702; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 8703; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 8704; CHECK-NEXT: call void @llvm.donothing()705; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i32> <i32 3, i32 0, i32 0, i32 0, i32 7, i32 4, i32 4, i32 4>706; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x i64> [[X0:%.*]], <8 x i64> [[X0]], <8 x i32> <i32 3, i32 0, i32 0, i32 0, i32 7, i32 4, i32 4, i32 4>707; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>708; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>709; CHECK-NEXT: [[TMP6:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer710; CHECK-NEXT: [[TMP7:%.*]] = xor <8 x i64> [[TMP3]], zeroinitializer711; CHECK-NEXT: [[TMP8:%.*]] = or <8 x i64> [[TMP7]], [[_MSPROP]]712; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], zeroinitializer713; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP4]], <8 x i64> [[TMP9]], <8 x i64> [[TMP6]]714; CHECK-NEXT: [[TMP10:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP3]], <8 x i64> zeroinitializer715; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8716; CHECK-NEXT: ret <8 x i64> [[TMP10]]717;718 %res = call <8 x i64> @llvm.x86.avx512.mask.perm.di.512(<8 x i64> %x0, i32 3, <8 x i64> zeroinitializer, i8 %x3)719 ret <8 x i64> %res720}721 722define void @test_store1(<16 x float> %data, ptr %ptr, ptr %ptr2, i16 %mask) #0 {723;724; CHECK-LABEL: @test_store1(725; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 8726; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 8727; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8728; CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 8729; CHECK-NEXT: call void @llvm.donothing()730; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[TMP1]] to <16 x i1>731; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>732; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR:%.*]] to i64733; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080734; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr735; CHECK-NEXT: call void @llvm.masked.store.v16i32.p0(<16 x i32> [[TMP2]], ptr align 1 [[TMP9]], <16 x i1> [[TMP6]])736; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP3]], 0737; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i1> [[TMP5]] to i16738; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i16 [[TMP10]], 0739; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]740; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF1:![0-9]+]]741; CHECK: 11:742; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8:[0-9]+]]743; CHECK-NEXT: unreachable744; CHECK: 12:745; CHECK-NEXT: call void @llvm.masked.store.v16f32.p0(<16 x float> [[DATA:%.*]], ptr align 1 [[PTR]], <16 x i1> [[TMP6]])746; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i64 [[TMP4]], 0747; CHECK-NEXT: br i1 [[_MSCMP2]], label [[TMP13:%.*]], label [[TMP14:%.*]], !prof [[PROF1]]748; CHECK: 13:749; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]750; CHECK-NEXT: unreachable751; CHECK: 14:752; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[PTR2:%.*]] to i64753; CHECK-NEXT: [[TMP16:%.*]] = xor i64 [[TMP15]], 87960930222080754; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr755; CHECK-NEXT: store <16 x i32> [[TMP2]], ptr [[TMP17]], align 1756; CHECK-NEXT: store <16 x float> [[DATA]], ptr [[PTR2]], align 1757; CHECK-NEXT: ret void758;759 call void @llvm.x86.avx512.mask.storeu.ps.512(ptr %ptr, <16 x float> %data, i16 %mask)760 call void @llvm.x86.avx512.mask.storeu.ps.512(ptr %ptr2, <16 x float> %data, i16 -1)761 ret void762}763 764declare void @llvm.x86.avx512.mask.storeu.ps.512(ptr, <16 x float>, i16 )765 766define void @test_store2(<8 x double> %data, ptr %ptr, ptr %ptr2, i8 %mask) #0 {767;768; CHECK-LABEL: @test_store2(769; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 8770; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 8771; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8772; CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 8773; CHECK-NEXT: call void @llvm.donothing()774; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP1]] to <8 x i1>775; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>776; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR:%.*]] to i64777; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080778; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr779; CHECK-NEXT: call void @llvm.masked.store.v8i64.p0(<8 x i64> [[TMP2]], ptr align 1 [[TMP9]], <8 x i1> [[TMP6]])780; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP3]], 0781; CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x i1> [[TMP5]] to i8782; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i8 [[TMP10]], 0783; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]784; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF1]]785; CHECK: 11:786; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]787; CHECK-NEXT: unreachable788; CHECK: 12:789; CHECK-NEXT: call void @llvm.masked.store.v8f64.p0(<8 x double> [[DATA:%.*]], ptr align 1 [[PTR]], <8 x i1> [[TMP6]])790; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i64 [[TMP4]], 0791; CHECK-NEXT: br i1 [[_MSCMP2]], label [[TMP13:%.*]], label [[TMP14:%.*]], !prof [[PROF1]]792; CHECK: 13:793; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]794; CHECK-NEXT: unreachable795; CHECK: 14:796; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[PTR2:%.*]] to i64797; CHECK-NEXT: [[TMP16:%.*]] = xor i64 [[TMP15]], 87960930222080798; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr799; CHECK-NEXT: store <8 x i64> [[TMP2]], ptr [[TMP17]], align 1800; CHECK-NEXT: store <8 x double> [[DATA]], ptr [[PTR2]], align 1801; CHECK-NEXT: ret void802;803 call void @llvm.x86.avx512.mask.storeu.pd.512(ptr %ptr, <8 x double> %data, i8 %mask)804 call void @llvm.x86.avx512.mask.storeu.pd.512(ptr %ptr2, <8 x double> %data, i8 -1)805 ret void806}807 808declare void @llvm.x86.avx512.mask.storeu.pd.512(ptr, <8 x double>, i8)809 810define void @test_mask_store_aligned_ps(<16 x float> %data, ptr %ptr, ptr %ptr2, i16 %mask) #0 {811;812; CHECK-LABEL: @test_mask_store_aligned_ps(813; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 8814; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 8815; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8816; CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 8817; CHECK-NEXT: call void @llvm.donothing()818; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[TMP1]] to <16 x i1>819; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>820; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR:%.*]] to i64821; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080822; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr823; CHECK-NEXT: call void @llvm.masked.store.v16i32.p0(<16 x i32> [[TMP2]], ptr align 64 [[TMP9]], <16 x i1> [[TMP6]])824; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP3]], 0825; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i1> [[TMP5]] to i16826; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i16 [[TMP10]], 0827; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]828; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF1]]829; CHECK: 11:830; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]831; CHECK-NEXT: unreachable832; CHECK: 12:833; CHECK-NEXT: call void @llvm.masked.store.v16f32.p0(<16 x float> [[DATA:%.*]], ptr align 64 [[PTR]], <16 x i1> [[TMP6]])834; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i64 [[TMP4]], 0835; CHECK-NEXT: br i1 [[_MSCMP2]], label [[TMP13:%.*]], label [[TMP14:%.*]], !prof [[PROF1]]836; CHECK: 13:837; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]838; CHECK-NEXT: unreachable839; CHECK: 14:840; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[PTR2:%.*]] to i64841; CHECK-NEXT: [[TMP16:%.*]] = xor i64 [[TMP15]], 87960930222080842; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr843; CHECK-NEXT: store <16 x i32> [[TMP2]], ptr [[TMP17]], align 64844; CHECK-NEXT: store <16 x float> [[DATA]], ptr [[PTR2]], align 64845; CHECK-NEXT: ret void846;847 call void @llvm.x86.avx512.mask.store.ps.512(ptr %ptr, <16 x float> %data, i16 %mask)848 call void @llvm.x86.avx512.mask.store.ps.512(ptr %ptr2, <16 x float> %data, i16 -1)849 ret void850}851 852declare void @llvm.x86.avx512.mask.store.ps.512(ptr, <16 x float>, i16 )853 854define void @test_mask_store_aligned_pd(<8 x double> %data, ptr %ptr, ptr %ptr2, i8 %mask) #0 {855;856; CHECK-LABEL: @test_mask_store_aligned_pd(857; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 8858; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 8859; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8860; CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 8861; CHECK-NEXT: call void @llvm.donothing()862; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP1]] to <8 x i1>863; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>864; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR:%.*]] to i64865; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080866; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr867; CHECK-NEXT: call void @llvm.masked.store.v8i64.p0(<8 x i64> [[TMP2]], ptr align 64 [[TMP9]], <8 x i1> [[TMP6]])868; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP3]], 0869; CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x i1> [[TMP5]] to i8870; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i8 [[TMP10]], 0871; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]872; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF1]]873; CHECK: 11:874; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]875; CHECK-NEXT: unreachable876; CHECK: 12:877; CHECK-NEXT: call void @llvm.masked.store.v8f64.p0(<8 x double> [[DATA:%.*]], ptr align 64 [[PTR]], <8 x i1> [[TMP6]])878; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i64 [[TMP4]], 0879; CHECK-NEXT: br i1 [[_MSCMP2]], label [[TMP13:%.*]], label [[TMP14:%.*]], !prof [[PROF1]]880; CHECK: 13:881; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]882; CHECK-NEXT: unreachable883; CHECK: 14:884; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[PTR2:%.*]] to i64885; CHECK-NEXT: [[TMP16:%.*]] = xor i64 [[TMP15]], 87960930222080886; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr887; CHECK-NEXT: store <8 x i64> [[TMP2]], ptr [[TMP17]], align 64888; CHECK-NEXT: store <8 x double> [[DATA]], ptr [[PTR2]], align 64889; CHECK-NEXT: ret void890;891 call void @llvm.x86.avx512.mask.store.pd.512(ptr %ptr, <8 x double> %data, i8 %mask)892 call void @llvm.x86.avx512.mask.store.pd.512(ptr %ptr2, <8 x double> %data, i8 -1)893 ret void894}895 896declare void @llvm.x86.avx512.mask.store.pd.512(ptr, <8 x double>, i8)897 898define void@test_int_x86_avx512_mask_storeu_q_512(ptr %ptr1, ptr %ptr2, <8 x i64> %x1, i8 %x2) #0 {899;900; CHECK-LABEL: @test_int_x86_avx512_mask_storeu_q_512(901; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 8902; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8903; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr @__msan_param_tls, align 8904; CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8905; CHECK-NEXT: call void @llvm.donothing()906; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP1]] to <8 x i1>907; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[X2:%.*]] to <8 x i1>908; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR1:%.*]] to i64909; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080910; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr911; CHECK-NEXT: call void @llvm.masked.store.v8i64.p0(<8 x i64> [[TMP2]], ptr align 1 [[TMP9]], <8 x i1> [[TMP6]])912; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP3]], 0913; CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x i1> [[TMP5]] to i8914; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i8 [[TMP10]], 0915; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]916; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF1]]917; CHECK: 11:918; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]919; CHECK-NEXT: unreachable920; CHECK: 12:921; CHECK-NEXT: call void @llvm.masked.store.v8i64.p0(<8 x i64> [[X1:%.*]], ptr align 1 [[PTR1]], <8 x i1> [[TMP6]])922; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i64 [[TMP4]], 0923; CHECK-NEXT: br i1 [[_MSCMP2]], label [[TMP13:%.*]], label [[TMP14:%.*]], !prof [[PROF1]]924; CHECK: 13:925; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]926; CHECK-NEXT: unreachable927; CHECK: 14:928; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[PTR2:%.*]] to i64929; CHECK-NEXT: [[TMP16:%.*]] = xor i64 [[TMP15]], 87960930222080930; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr931; CHECK-NEXT: store <8 x i64> [[TMP2]], ptr [[TMP17]], align 1932; CHECK-NEXT: store <8 x i64> [[X1]], ptr [[PTR2]], align 1933; CHECK-NEXT: ret void934;935 call void @llvm.x86.avx512.mask.storeu.q.512(ptr %ptr1, <8 x i64> %x1, i8 %x2)936 call void @llvm.x86.avx512.mask.storeu.q.512(ptr %ptr2, <8 x i64> %x1, i8 -1)937 ret void938}939 940declare void @llvm.x86.avx512.mask.storeu.q.512(ptr, <8 x i64>, i8)941 942define void@test_int_x86_avx512_mask_storeu_d_512(ptr %ptr1, ptr %ptr2, <16 x i32> %x1, i16 %x2) #0 {943;944; CHECK-LABEL: @test_int_x86_avx512_mask_storeu_d_512(945; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 8946; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8947; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr @__msan_param_tls, align 8948; CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8949; CHECK-NEXT: call void @llvm.donothing()950; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[TMP1]] to <16 x i1>951; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[X2:%.*]] to <16 x i1>952; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR1:%.*]] to i64953; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080954; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr955; CHECK-NEXT: call void @llvm.masked.store.v16i32.p0(<16 x i32> [[TMP2]], ptr align 1 [[TMP9]], <16 x i1> [[TMP6]])956; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP3]], 0957; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i1> [[TMP5]] to i16958; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i16 [[TMP10]], 0959; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]960; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF1]]961; CHECK: 11:962; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]963; CHECK-NEXT: unreachable964; CHECK: 12:965; CHECK-NEXT: call void @llvm.masked.store.v16i32.p0(<16 x i32> [[X1:%.*]], ptr align 1 [[PTR1]], <16 x i1> [[TMP6]])966; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i64 [[TMP4]], 0967; CHECK-NEXT: br i1 [[_MSCMP2]], label [[TMP13:%.*]], label [[TMP14:%.*]], !prof [[PROF1]]968; CHECK: 13:969; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]970; CHECK-NEXT: unreachable971; CHECK: 14:972; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[PTR2:%.*]] to i64973; CHECK-NEXT: [[TMP16:%.*]] = xor i64 [[TMP15]], 87960930222080974; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr975; CHECK-NEXT: store <16 x i32> [[TMP2]], ptr [[TMP17]], align 1976; CHECK-NEXT: store <16 x i32> [[X1]], ptr [[PTR2]], align 1977; CHECK-NEXT: ret void978;979 call void @llvm.x86.avx512.mask.storeu.d.512(ptr %ptr1, <16 x i32> %x1, i16 %x2)980 call void @llvm.x86.avx512.mask.storeu.d.512(ptr %ptr2, <16 x i32> %x1, i16 -1)981 ret void982}983 984declare void @llvm.x86.avx512.mask.storeu.d.512(ptr, <16 x i32>, i16)985 986define void@test_int_x86_avx512_mask_store_q_512(ptr %ptr1, ptr %ptr2, <8 x i64> %x1, i8 %x2) #0 {987;988; CHECK-LABEL: @test_int_x86_avx512_mask_store_q_512(989; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 8990; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8991; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr @__msan_param_tls, align 8992; CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8993; CHECK-NEXT: call void @llvm.donothing()994; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP1]] to <8 x i1>995; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[X2:%.*]] to <8 x i1>996; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR1:%.*]] to i64997; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080998; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr999; CHECK-NEXT: call void @llvm.masked.store.v8i64.p0(<8 x i64> [[TMP2]], ptr align 64 [[TMP9]], <8 x i1> [[TMP6]])1000; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP3]], 01001; CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x i1> [[TMP5]] to i81002; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i8 [[TMP10]], 01003; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]1004; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF1]]1005; CHECK: 11:1006; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1007; CHECK-NEXT: unreachable1008; CHECK: 12:1009; CHECK-NEXT: call void @llvm.masked.store.v8i64.p0(<8 x i64> [[X1:%.*]], ptr align 64 [[PTR1]], <8 x i1> [[TMP6]])1010; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i64 [[TMP4]], 01011; CHECK-NEXT: br i1 [[_MSCMP2]], label [[TMP13:%.*]], label [[TMP14:%.*]], !prof [[PROF1]]1012; CHECK: 13:1013; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1014; CHECK-NEXT: unreachable1015; CHECK: 14:1016; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[PTR2:%.*]] to i641017; CHECK-NEXT: [[TMP16:%.*]] = xor i64 [[TMP15]], 879609302220801018; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr1019; CHECK-NEXT: store <8 x i64> [[TMP2]], ptr [[TMP17]], align 641020; CHECK-NEXT: store <8 x i64> [[X1]], ptr [[PTR2]], align 641021; CHECK-NEXT: ret void1022;1023 call void @llvm.x86.avx512.mask.store.q.512(ptr %ptr1, <8 x i64> %x1, i8 %x2)1024 call void @llvm.x86.avx512.mask.store.q.512(ptr %ptr2, <8 x i64> %x1, i8 -1)1025 ret void1026}1027 1028declare void @llvm.x86.avx512.mask.store.q.512(ptr, <8 x i64>, i8)1029 1030define void@test_int_x86_avx512_mask_store_d_512(ptr %ptr1, ptr %ptr2, <16 x i32> %x1, i16 %x2) #0 {1031;1032; CHECK-LABEL: @test_int_x86_avx512_mask_store_d_512(1033; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 81034; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 81035; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr @__msan_param_tls, align 81036; CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 81037; CHECK-NEXT: call void @llvm.donothing()1038; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[TMP1]] to <16 x i1>1039; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[X2:%.*]] to <16 x i1>1040; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR1:%.*]] to i641041; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220801042; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr1043; CHECK-NEXT: call void @llvm.masked.store.v16i32.p0(<16 x i32> [[TMP2]], ptr align 64 [[TMP9]], <16 x i1> [[TMP6]])1044; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP3]], 01045; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i1> [[TMP5]] to i161046; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i16 [[TMP10]], 01047; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]1048; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF1]]1049; CHECK: 11:1050; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1051; CHECK-NEXT: unreachable1052; CHECK: 12:1053; CHECK-NEXT: call void @llvm.masked.store.v16i32.p0(<16 x i32> [[X1:%.*]], ptr align 64 [[PTR1]], <16 x i1> [[TMP6]])1054; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i64 [[TMP4]], 01055; CHECK-NEXT: br i1 [[_MSCMP2]], label [[TMP13:%.*]], label [[TMP14:%.*]], !prof [[PROF1]]1056; CHECK: 13:1057; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1058; CHECK-NEXT: unreachable1059; CHECK: 14:1060; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[PTR2:%.*]] to i641061; CHECK-NEXT: [[TMP16:%.*]] = xor i64 [[TMP15]], 879609302220801062; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr1063; CHECK-NEXT: store <16 x i32> [[TMP2]], ptr [[TMP17]], align 641064; CHECK-NEXT: store <16 x i32> [[X1]], ptr [[PTR2]], align 641065; CHECK-NEXT: ret void1066;1067 call void @llvm.x86.avx512.mask.store.d.512(ptr %ptr1, <16 x i32> %x1, i16 %x2)1068 call void @llvm.x86.avx512.mask.store.d.512(ptr %ptr2, <16 x i32> %x1, i16 -1)1069 ret void1070}1071 1072declare void @llvm.x86.avx512.mask.store.d.512(ptr, <16 x i32>, i16)1073 1074define <16 x float> @test_mask_load_aligned_ps(<16 x float> %data, ptr %ptr, i16 %mask) #0 {1075;1076; CHECK-LABEL: @test_mask_load_aligned_ps(1077; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81078; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 81079; CHECK-NEXT: call void @llvm.donothing()1080; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 01081; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]1082; CHECK: 3:1083; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1084; CHECK-NEXT: unreachable1085; CHECK: 4:1086; CHECK-NEXT: [[TMP5:%.*]] = load <16 x float>, ptr [[PTR:%.*]], align 641087; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR]] to i641088; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220801089; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr1090; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP8]], align 641091; CHECK-NEXT: [[TMP9:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>1092; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>1093; CHECK-NEXT: [[TMP11:%.*]] = ptrtoint ptr [[PTR]] to i641094; CHECK-NEXT: [[TMP12:%.*]] = xor i64 [[TMP11]], 879609302220801095; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr1096; CHECK-NEXT: [[_MSMASKEDLD:%.*]] = call <16 x i32> @llvm.masked.load.v16i32.p0(ptr align 64 [[TMP13]], <16 x i1> [[TMP10]], <16 x i32> [[_MSLD]])1097; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i64 [[TMP1]], 01098; CHECK-NEXT: [[TMP14:%.*]] = bitcast <16 x i1> [[TMP9]] to i161099; CHECK-NEXT: [[_MSCMP3:%.*]] = icmp ne i16 [[TMP14]], 01100; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP2]], [[_MSCMP3]]1101; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP15:%.*]], label [[TMP16:%.*]], !prof [[PROF1]]1102; CHECK: 15:1103; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1104; CHECK-NEXT: unreachable1105; CHECK: 16:1106; CHECK-NEXT: [[TMP17:%.*]] = call <16 x float> @llvm.masked.load.v16f32.p0(ptr align 64 [[PTR]], <16 x i1> [[TMP10]], <16 x float> [[TMP5]])1107; CHECK-NEXT: [[TMP18:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>1108; CHECK-NEXT: [[TMP19:%.*]] = bitcast i16 [[MASK]] to <16 x i1>1109; CHECK-NEXT: [[TMP20:%.*]] = ptrtoint ptr [[PTR]] to i641110; CHECK-NEXT: [[TMP21:%.*]] = xor i64 [[TMP20]], 879609302220801111; CHECK-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr1112; CHECK-NEXT: [[_MSMASKEDLD1:%.*]] = call <16 x i32> @llvm.masked.load.v16i32.p0(ptr align 64 [[TMP22]], <16 x i1> [[TMP19]], <16 x i32> zeroinitializer)1113; CHECK-NEXT: [[_MSCMP4:%.*]] = icmp ne i64 [[TMP1]], 01114; CHECK-NEXT: [[TMP23:%.*]] = bitcast <16 x i1> [[TMP18]] to i161115; CHECK-NEXT: [[_MSCMP5:%.*]] = icmp ne i16 [[TMP23]], 01116; CHECK-NEXT: [[_MSOR6:%.*]] = or i1 [[_MSCMP4]], [[_MSCMP5]]1117; CHECK-NEXT: br i1 [[_MSOR6]], label [[TMP24:%.*]], label [[TMP25:%.*]], !prof [[PROF1]]1118; CHECK: 24:1119; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1120; CHECK-NEXT: unreachable1121; CHECK: 25:1122; CHECK-NEXT: [[TMP26:%.*]] = call <16 x float> @llvm.masked.load.v16f32.p0(ptr align 64 [[PTR]], <16 x i1> [[TMP19]], <16 x float> zeroinitializer)1123; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[_MSMASKEDLD1]], [[_MSMASKEDLD]]1124; CHECK-NEXT: [[RES4:%.*]] = fadd <16 x float> [[TMP26]], [[TMP17]]1125; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 81126; CHECK-NEXT: ret <16 x float> [[RES4]]1127;1128 %res = call <16 x float> @llvm.x86.avx512.mask.load.ps.512(ptr %ptr, <16 x float> zeroinitializer, i16 -1)1129 %res1 = call <16 x float> @llvm.x86.avx512.mask.load.ps.512(ptr %ptr, <16 x float> %res, i16 %mask)1130 %res2 = call <16 x float> @llvm.x86.avx512.mask.load.ps.512(ptr %ptr, <16 x float> zeroinitializer, i16 %mask)1131 %res4 = fadd <16 x float> %res2, %res11132 ret <16 x float> %res41133}1134 1135declare <16 x float> @llvm.x86.avx512.mask.load.ps.512(ptr, <16 x float>, i16)1136 1137define <16 x float> @test_mask_load_unaligned_ps(<16 x float> %data, ptr %ptr, i16 %mask) #0 {1138;1139; CHECK-LABEL: @test_mask_load_unaligned_ps(1140; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81141; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 81142; CHECK-NEXT: call void @llvm.donothing()1143; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 01144; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]1145; CHECK: 3:1146; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1147; CHECK-NEXT: unreachable1148; CHECK: 4:1149; CHECK-NEXT: [[TMP5:%.*]] = load <16 x float>, ptr [[PTR:%.*]], align 11150; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR]] to i641151; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220801152; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr1153; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP8]], align 11154; CHECK-NEXT: [[TMP9:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>1155; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>1156; CHECK-NEXT: [[TMP11:%.*]] = ptrtoint ptr [[PTR]] to i641157; CHECK-NEXT: [[TMP12:%.*]] = xor i64 [[TMP11]], 879609302220801158; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr1159; CHECK-NEXT: [[_MSMASKEDLD:%.*]] = call <16 x i32> @llvm.masked.load.v16i32.p0(ptr align 1 [[TMP13]], <16 x i1> [[TMP10]], <16 x i32> [[_MSLD]])1160; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i64 [[TMP1]], 01161; CHECK-NEXT: [[TMP14:%.*]] = bitcast <16 x i1> [[TMP9]] to i161162; CHECK-NEXT: [[_MSCMP3:%.*]] = icmp ne i16 [[TMP14]], 01163; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP2]], [[_MSCMP3]]1164; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP15:%.*]], label [[TMP16:%.*]], !prof [[PROF1]]1165; CHECK: 15:1166; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1167; CHECK-NEXT: unreachable1168; CHECK: 16:1169; CHECK-NEXT: [[TMP17:%.*]] = call <16 x float> @llvm.masked.load.v16f32.p0(ptr align 1 [[PTR]], <16 x i1> [[TMP10]], <16 x float> [[TMP5]])1170; CHECK-NEXT: [[TMP18:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>1171; CHECK-NEXT: [[TMP19:%.*]] = bitcast i16 [[MASK]] to <16 x i1>1172; CHECK-NEXT: [[TMP20:%.*]] = ptrtoint ptr [[PTR]] to i641173; CHECK-NEXT: [[TMP21:%.*]] = xor i64 [[TMP20]], 879609302220801174; CHECK-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr1175; CHECK-NEXT: [[_MSMASKEDLD1:%.*]] = call <16 x i32> @llvm.masked.load.v16i32.p0(ptr align 1 [[TMP22]], <16 x i1> [[TMP19]], <16 x i32> zeroinitializer)1176; CHECK-NEXT: [[_MSCMP4:%.*]] = icmp ne i64 [[TMP1]], 01177; CHECK-NEXT: [[TMP23:%.*]] = bitcast <16 x i1> [[TMP18]] to i161178; CHECK-NEXT: [[_MSCMP5:%.*]] = icmp ne i16 [[TMP23]], 01179; CHECK-NEXT: [[_MSOR6:%.*]] = or i1 [[_MSCMP4]], [[_MSCMP5]]1180; CHECK-NEXT: br i1 [[_MSOR6]], label [[TMP24:%.*]], label [[TMP25:%.*]], !prof [[PROF1]]1181; CHECK: 24:1182; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1183; CHECK-NEXT: unreachable1184; CHECK: 25:1185; CHECK-NEXT: [[TMP26:%.*]] = call <16 x float> @llvm.masked.load.v16f32.p0(ptr align 1 [[PTR]], <16 x i1> [[TMP19]], <16 x float> zeroinitializer)1186; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[_MSMASKEDLD1]], [[_MSMASKEDLD]]1187; CHECK-NEXT: [[RES4:%.*]] = fadd <16 x float> [[TMP26]], [[TMP17]]1188; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 81189; CHECK-NEXT: ret <16 x float> [[RES4]]1190;1191 %res = call <16 x float> @llvm.x86.avx512.mask.loadu.ps.512(ptr %ptr, <16 x float> zeroinitializer, i16 -1)1192 %res1 = call <16 x float> @llvm.x86.avx512.mask.loadu.ps.512(ptr %ptr, <16 x float> %res, i16 %mask)1193 %res2 = call <16 x float> @llvm.x86.avx512.mask.loadu.ps.512(ptr %ptr, <16 x float> zeroinitializer, i16 %mask)1194 %res4 = fadd <16 x float> %res2, %res11195 ret <16 x float> %res41196}1197 1198declare <16 x float> @llvm.x86.avx512.mask.loadu.ps.512(ptr, <16 x float>, i16)1199 1200define <8 x double> @test_mask_load_aligned_pd(<8 x double> %data, ptr %ptr, i8 %mask) #0 {1201;1202; CHECK-LABEL: @test_mask_load_aligned_pd(1203; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81204; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 81205; CHECK-NEXT: call void @llvm.donothing()1206; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 01207; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]1208; CHECK: 3:1209; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1210; CHECK-NEXT: unreachable1211; CHECK: 4:1212; CHECK-NEXT: [[TMP5:%.*]] = load <8 x double>, ptr [[PTR:%.*]], align 641213; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR]] to i641214; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220801215; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr1216; CHECK-NEXT: [[_MSLD:%.*]] = load <8 x i64>, ptr [[TMP8]], align 641217; CHECK-NEXT: [[TMP9:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>1218; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>1219; CHECK-NEXT: [[TMP11:%.*]] = ptrtoint ptr [[PTR]] to i641220; CHECK-NEXT: [[TMP12:%.*]] = xor i64 [[TMP11]], 879609302220801221; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr1222; CHECK-NEXT: [[_MSMASKEDLD:%.*]] = call <8 x i64> @llvm.masked.load.v8i64.p0(ptr align 64 [[TMP13]], <8 x i1> [[TMP10]], <8 x i64> [[_MSLD]])1223; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i64 [[TMP1]], 01224; CHECK-NEXT: [[TMP14:%.*]] = bitcast <8 x i1> [[TMP9]] to i81225; CHECK-NEXT: [[_MSCMP3:%.*]] = icmp ne i8 [[TMP14]], 01226; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP2]], [[_MSCMP3]]1227; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP15:%.*]], label [[TMP16:%.*]], !prof [[PROF1]]1228; CHECK: 15:1229; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1230; CHECK-NEXT: unreachable1231; CHECK: 16:1232; CHECK-NEXT: [[TMP17:%.*]] = call <8 x double> @llvm.masked.load.v8f64.p0(ptr align 64 [[PTR]], <8 x i1> [[TMP10]], <8 x double> [[TMP5]])1233; CHECK-NEXT: [[TMP18:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>1234; CHECK-NEXT: [[TMP19:%.*]] = bitcast i8 [[MASK]] to <8 x i1>1235; CHECK-NEXT: [[TMP20:%.*]] = ptrtoint ptr [[PTR]] to i641236; CHECK-NEXT: [[TMP21:%.*]] = xor i64 [[TMP20]], 879609302220801237; CHECK-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr1238; CHECK-NEXT: [[_MSMASKEDLD1:%.*]] = call <8 x i64> @llvm.masked.load.v8i64.p0(ptr align 64 [[TMP22]], <8 x i1> [[TMP19]], <8 x i64> zeroinitializer)1239; CHECK-NEXT: [[_MSCMP4:%.*]] = icmp ne i64 [[TMP1]], 01240; CHECK-NEXT: [[TMP23:%.*]] = bitcast <8 x i1> [[TMP18]] to i81241; CHECK-NEXT: [[_MSCMP5:%.*]] = icmp ne i8 [[TMP23]], 01242; CHECK-NEXT: [[_MSOR6:%.*]] = or i1 [[_MSCMP4]], [[_MSCMP5]]1243; CHECK-NEXT: br i1 [[_MSOR6]], label [[TMP24:%.*]], label [[TMP25:%.*]], !prof [[PROF1]]1244; CHECK: 24:1245; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1246; CHECK-NEXT: unreachable1247; CHECK: 25:1248; CHECK-NEXT: [[TMP26:%.*]] = call <8 x double> @llvm.masked.load.v8f64.p0(ptr align 64 [[PTR]], <8 x i1> [[TMP19]], <8 x double> zeroinitializer)1249; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[_MSMASKEDLD1]], [[_MSMASKEDLD]]1250; CHECK-NEXT: [[RES4:%.*]] = fadd <8 x double> [[TMP26]], [[TMP17]]1251; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 81252; CHECK-NEXT: ret <8 x double> [[RES4]]1253;1254 %res = call <8 x double> @llvm.x86.avx512.mask.load.pd.512(ptr %ptr, <8 x double> zeroinitializer, i8 -1)1255 %res1 = call <8 x double> @llvm.x86.avx512.mask.load.pd.512(ptr %ptr, <8 x double> %res, i8 %mask)1256 %res2 = call <8 x double> @llvm.x86.avx512.mask.load.pd.512(ptr %ptr, <8 x double> zeroinitializer, i8 %mask)1257 %res4 = fadd <8 x double> %res2, %res11258 ret <8 x double> %res41259}1260 1261declare <8 x double> @llvm.x86.avx512.mask.load.pd.512(ptr, <8 x double>, i8)1262 1263define <8 x double> @test_mask_load_unaligned_pd(<8 x double> %data, ptr %ptr, i8 %mask) #0 {1264;1265; CHECK-LABEL: @test_mask_load_unaligned_pd(1266; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81267; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 81268; CHECK-NEXT: call void @llvm.donothing()1269; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 01270; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]1271; CHECK: 3:1272; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1273; CHECK-NEXT: unreachable1274; CHECK: 4:1275; CHECK-NEXT: [[TMP5:%.*]] = load <8 x double>, ptr [[PTR:%.*]], align 11276; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR]] to i641277; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220801278; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr1279; CHECK-NEXT: [[_MSLD:%.*]] = load <8 x i64>, ptr [[TMP8]], align 11280; CHECK-NEXT: [[TMP9:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>1281; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>1282; CHECK-NEXT: [[TMP11:%.*]] = ptrtoint ptr [[PTR]] to i641283; CHECK-NEXT: [[TMP12:%.*]] = xor i64 [[TMP11]], 879609302220801284; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr1285; CHECK-NEXT: [[_MSMASKEDLD:%.*]] = call <8 x i64> @llvm.masked.load.v8i64.p0(ptr align 1 [[TMP13]], <8 x i1> [[TMP10]], <8 x i64> [[_MSLD]])1286; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i64 [[TMP1]], 01287; CHECK-NEXT: [[TMP14:%.*]] = bitcast <8 x i1> [[TMP9]] to i81288; CHECK-NEXT: [[_MSCMP3:%.*]] = icmp ne i8 [[TMP14]], 01289; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP2]], [[_MSCMP3]]1290; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP15:%.*]], label [[TMP16:%.*]], !prof [[PROF1]]1291; CHECK: 15:1292; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1293; CHECK-NEXT: unreachable1294; CHECK: 16:1295; CHECK-NEXT: [[TMP17:%.*]] = call <8 x double> @llvm.masked.load.v8f64.p0(ptr align 1 [[PTR]], <8 x i1> [[TMP10]], <8 x double> [[TMP5]])1296; CHECK-NEXT: [[TMP18:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>1297; CHECK-NEXT: [[TMP19:%.*]] = bitcast i8 [[MASK]] to <8 x i1>1298; CHECK-NEXT: [[TMP20:%.*]] = ptrtoint ptr [[PTR]] to i641299; CHECK-NEXT: [[TMP21:%.*]] = xor i64 [[TMP20]], 879609302220801300; CHECK-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr1301; CHECK-NEXT: [[_MSMASKEDLD1:%.*]] = call <8 x i64> @llvm.masked.load.v8i64.p0(ptr align 1 [[TMP22]], <8 x i1> [[TMP19]], <8 x i64> zeroinitializer)1302; CHECK-NEXT: [[_MSCMP4:%.*]] = icmp ne i64 [[TMP1]], 01303; CHECK-NEXT: [[TMP23:%.*]] = bitcast <8 x i1> [[TMP18]] to i81304; CHECK-NEXT: [[_MSCMP5:%.*]] = icmp ne i8 [[TMP23]], 01305; CHECK-NEXT: [[_MSOR6:%.*]] = or i1 [[_MSCMP4]], [[_MSCMP5]]1306; CHECK-NEXT: br i1 [[_MSOR6]], label [[TMP24:%.*]], label [[TMP25:%.*]], !prof [[PROF1]]1307; CHECK: 24:1308; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1309; CHECK-NEXT: unreachable1310; CHECK: 25:1311; CHECK-NEXT: [[TMP26:%.*]] = call <8 x double> @llvm.masked.load.v8f64.p0(ptr align 1 [[PTR]], <8 x i1> [[TMP19]], <8 x double> zeroinitializer)1312; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[_MSMASKEDLD1]], [[_MSMASKEDLD]]1313; CHECK-NEXT: [[RES4:%.*]] = fadd <8 x double> [[TMP26]], [[TMP17]]1314; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 81315; CHECK-NEXT: ret <8 x double> [[RES4]]1316;1317 %res = call <8 x double> @llvm.x86.avx512.mask.loadu.pd.512(ptr %ptr, <8 x double> zeroinitializer, i8 -1)1318 %res1 = call <8 x double> @llvm.x86.avx512.mask.loadu.pd.512(ptr %ptr, <8 x double> %res, i8 %mask)1319 %res2 = call <8 x double> @llvm.x86.avx512.mask.loadu.pd.512(ptr %ptr, <8 x double> zeroinitializer, i8 %mask)1320 %res4 = fadd <8 x double> %res2, %res11321 ret <8 x double> %res41322}1323 1324declare <8 x double> @llvm.x86.avx512.mask.loadu.pd.512(ptr, <8 x double>, i8)1325 1326declare <16 x i32> @llvm.x86.avx512.mask.loadu.d.512(ptr, <16 x i32>, i16)1327 1328define <16 x i32> @test_mask_load_unaligned_d(ptr %ptr, ptr %ptr2, <16 x i32> %data, i16 %mask) #0 {1329;1330; CHECK-LABEL: @test_mask_load_unaligned_d(1331; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 81332; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 81333; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 81334; CHECK-NEXT: call void @llvm.donothing()1335; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 01336; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]1337; CHECK: 4:1338; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1339; CHECK-NEXT: unreachable1340; CHECK: 5:1341; CHECK-NEXT: [[TMP6:%.*]] = load <16 x i32>, ptr [[PTR:%.*]], align 11342; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR]] to i641343; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220801344; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr1345; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP9]], align 11346; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>1347; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>1348; CHECK-NEXT: [[TMP12:%.*]] = ptrtoint ptr [[PTR2:%.*]] to i641349; CHECK-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], 879609302220801350; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr1351; CHECK-NEXT: [[_MSMASKEDLD:%.*]] = call <16 x i32> @llvm.masked.load.v16i32.p0(ptr align 1 [[TMP14]], <16 x i1> [[TMP11]], <16 x i32> [[_MSLD]])1352; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i64 [[TMP3]], 01353; CHECK-NEXT: [[TMP15:%.*]] = bitcast <16 x i1> [[TMP10]] to i161354; CHECK-NEXT: [[_MSCMP3:%.*]] = icmp ne i16 [[TMP15]], 01355; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP2]], [[_MSCMP3]]1356; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP16:%.*]], label [[TMP17:%.*]], !prof [[PROF1]]1357; CHECK: 16:1358; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1359; CHECK-NEXT: unreachable1360; CHECK: 17:1361; CHECK-NEXT: [[TMP18:%.*]] = call <16 x i32> @llvm.masked.load.v16i32.p0(ptr align 1 [[PTR2]], <16 x i1> [[TMP11]], <16 x i32> [[TMP6]])1362; CHECK-NEXT: [[TMP19:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>1363; CHECK-NEXT: [[TMP20:%.*]] = bitcast i16 [[MASK]] to <16 x i1>1364; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[PTR]] to i641365; CHECK-NEXT: [[TMP22:%.*]] = xor i64 [[TMP21]], 879609302220801366; CHECK-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr1367; CHECK-NEXT: [[_MSMASKEDLD1:%.*]] = call <16 x i32> @llvm.masked.load.v16i32.p0(ptr align 1 [[TMP23]], <16 x i1> [[TMP20]], <16 x i32> zeroinitializer)1368; CHECK-NEXT: [[_MSCMP4:%.*]] = icmp ne i64 [[TMP1]], 01369; CHECK-NEXT: [[TMP24:%.*]] = bitcast <16 x i1> [[TMP19]] to i161370; CHECK-NEXT: [[_MSCMP5:%.*]] = icmp ne i16 [[TMP24]], 01371; CHECK-NEXT: [[_MSOR6:%.*]] = or i1 [[_MSCMP4]], [[_MSCMP5]]1372; CHECK-NEXT: br i1 [[_MSOR6]], label [[TMP25:%.*]], label [[TMP26:%.*]], !prof [[PROF1]]1373; CHECK: 25:1374; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1375; CHECK-NEXT: unreachable1376; CHECK: 26:1377; CHECK-NEXT: [[TMP27:%.*]] = call <16 x i32> @llvm.masked.load.v16i32.p0(ptr align 1 [[PTR]], <16 x i1> [[TMP20]], <16 x i32> zeroinitializer)1378; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[_MSMASKEDLD1]], [[_MSMASKEDLD]]1379; CHECK-NEXT: [[RES4:%.*]] = add <16 x i32> [[TMP27]], [[TMP18]]1380; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 81381; CHECK-NEXT: ret <16 x i32> [[RES4]]1382;1383 %res = call <16 x i32> @llvm.x86.avx512.mask.loadu.d.512(ptr %ptr, <16 x i32> zeroinitializer, i16 -1)1384 %res1 = call <16 x i32> @llvm.x86.avx512.mask.loadu.d.512(ptr %ptr2, <16 x i32> %res, i16 %mask)1385 %res2 = call <16 x i32> @llvm.x86.avx512.mask.loadu.d.512(ptr %ptr, <16 x i32> zeroinitializer, i16 %mask)1386 %res4 = add <16 x i32> %res2, %res11387 ret <16 x i32> %res41388}1389 1390declare <8 x i64> @llvm.x86.avx512.mask.loadu.q.512(ptr, <8 x i64>, i8)1391 1392define <8 x i64> @test_mask_load_unaligned_q(ptr %ptr, ptr %ptr2, <8 x i64> %data, i8 %mask) #0 {1393;1394; CHECK-LABEL: @test_mask_load_unaligned_q(1395; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 81396; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 81397; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 81398; CHECK-NEXT: call void @llvm.donothing()1399; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 01400; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]1401; CHECK: 4:1402; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1403; CHECK-NEXT: unreachable1404; CHECK: 5:1405; CHECK-NEXT: [[TMP6:%.*]] = load <8 x i64>, ptr [[PTR:%.*]], align 11406; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR]] to i641407; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220801408; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr1409; CHECK-NEXT: [[_MSLD:%.*]] = load <8 x i64>, ptr [[TMP9]], align 11410; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>1411; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>1412; CHECK-NEXT: [[TMP12:%.*]] = ptrtoint ptr [[PTR2:%.*]] to i641413; CHECK-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], 879609302220801414; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr1415; CHECK-NEXT: [[_MSMASKEDLD:%.*]] = call <8 x i64> @llvm.masked.load.v8i64.p0(ptr align 1 [[TMP14]], <8 x i1> [[TMP11]], <8 x i64> [[_MSLD]])1416; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i64 [[TMP3]], 01417; CHECK-NEXT: [[TMP15:%.*]] = bitcast <8 x i1> [[TMP10]] to i81418; CHECK-NEXT: [[_MSCMP3:%.*]] = icmp ne i8 [[TMP15]], 01419; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP2]], [[_MSCMP3]]1420; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP16:%.*]], label [[TMP17:%.*]], !prof [[PROF1]]1421; CHECK: 16:1422; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1423; CHECK-NEXT: unreachable1424; CHECK: 17:1425; CHECK-NEXT: [[TMP18:%.*]] = call <8 x i64> @llvm.masked.load.v8i64.p0(ptr align 1 [[PTR2]], <8 x i1> [[TMP11]], <8 x i64> [[TMP6]])1426; CHECK-NEXT: [[TMP19:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>1427; CHECK-NEXT: [[TMP20:%.*]] = bitcast i8 [[MASK]] to <8 x i1>1428; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[PTR]] to i641429; CHECK-NEXT: [[TMP22:%.*]] = xor i64 [[TMP21]], 879609302220801430; CHECK-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr1431; CHECK-NEXT: [[_MSMASKEDLD1:%.*]] = call <8 x i64> @llvm.masked.load.v8i64.p0(ptr align 1 [[TMP23]], <8 x i1> [[TMP20]], <8 x i64> zeroinitializer)1432; CHECK-NEXT: [[_MSCMP4:%.*]] = icmp ne i64 [[TMP1]], 01433; CHECK-NEXT: [[TMP24:%.*]] = bitcast <8 x i1> [[TMP19]] to i81434; CHECK-NEXT: [[_MSCMP5:%.*]] = icmp ne i8 [[TMP24]], 01435; CHECK-NEXT: [[_MSOR6:%.*]] = or i1 [[_MSCMP4]], [[_MSCMP5]]1436; CHECK-NEXT: br i1 [[_MSOR6]], label [[TMP25:%.*]], label [[TMP26:%.*]], !prof [[PROF1]]1437; CHECK: 25:1438; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1439; CHECK-NEXT: unreachable1440; CHECK: 26:1441; CHECK-NEXT: [[TMP27:%.*]] = call <8 x i64> @llvm.masked.load.v8i64.p0(ptr align 1 [[PTR]], <8 x i1> [[TMP20]], <8 x i64> zeroinitializer)1442; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[_MSMASKEDLD1]], [[_MSMASKEDLD]]1443; CHECK-NEXT: [[RES4:%.*]] = add <8 x i64> [[TMP27]], [[TMP18]]1444; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 81445; CHECK-NEXT: ret <8 x i64> [[RES4]]1446;1447 %res = call <8 x i64> @llvm.x86.avx512.mask.loadu.q.512(ptr %ptr, <8 x i64> zeroinitializer, i8 -1)1448 %res1 = call <8 x i64> @llvm.x86.avx512.mask.loadu.q.512(ptr %ptr2, <8 x i64> %res, i8 %mask)1449 %res2 = call <8 x i64> @llvm.x86.avx512.mask.loadu.q.512(ptr %ptr, <8 x i64> zeroinitializer, i8 %mask)1450 %res4 = add <8 x i64> %res2, %res11451 ret <8 x i64> %res41452}1453 1454declare <16 x i32> @llvm.x86.avx512.mask.load.d.512(ptr, <16 x i32>, i16)1455 1456define <16 x i32> @test_mask_load_aligned_d(<16 x i32> %data, ptr %ptr, i16 %mask) #0 {1457;1458; CHECK-LABEL: @test_mask_load_aligned_d(1459; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81460; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 81461; CHECK-NEXT: call void @llvm.donothing()1462; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 01463; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]1464; CHECK: 3:1465; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1466; CHECK-NEXT: unreachable1467; CHECK: 4:1468; CHECK-NEXT: [[TMP5:%.*]] = load <16 x i32>, ptr [[PTR:%.*]], align 641469; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR]] to i641470; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220801471; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr1472; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP8]], align 641473; CHECK-NEXT: [[TMP9:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>1474; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>1475; CHECK-NEXT: [[TMP11:%.*]] = ptrtoint ptr [[PTR]] to i641476; CHECK-NEXT: [[TMP12:%.*]] = xor i64 [[TMP11]], 879609302220801477; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr1478; CHECK-NEXT: [[_MSMASKEDLD:%.*]] = call <16 x i32> @llvm.masked.load.v16i32.p0(ptr align 64 [[TMP13]], <16 x i1> [[TMP10]], <16 x i32> [[_MSLD]])1479; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i64 [[TMP1]], 01480; CHECK-NEXT: [[TMP14:%.*]] = bitcast <16 x i1> [[TMP9]] to i161481; CHECK-NEXT: [[_MSCMP3:%.*]] = icmp ne i16 [[TMP14]], 01482; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP2]], [[_MSCMP3]]1483; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP15:%.*]], label [[TMP16:%.*]], !prof [[PROF1]]1484; CHECK: 15:1485; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1486; CHECK-NEXT: unreachable1487; CHECK: 16:1488; CHECK-NEXT: [[TMP17:%.*]] = call <16 x i32> @llvm.masked.load.v16i32.p0(ptr align 64 [[PTR]], <16 x i1> [[TMP10]], <16 x i32> [[TMP5]])1489; CHECK-NEXT: [[TMP18:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>1490; CHECK-NEXT: [[TMP19:%.*]] = bitcast i16 [[MASK]] to <16 x i1>1491; CHECK-NEXT: [[TMP20:%.*]] = ptrtoint ptr [[PTR]] to i641492; CHECK-NEXT: [[TMP21:%.*]] = xor i64 [[TMP20]], 879609302220801493; CHECK-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr1494; CHECK-NEXT: [[_MSMASKEDLD1:%.*]] = call <16 x i32> @llvm.masked.load.v16i32.p0(ptr align 64 [[TMP22]], <16 x i1> [[TMP19]], <16 x i32> zeroinitializer)1495; CHECK-NEXT: [[_MSCMP4:%.*]] = icmp ne i64 [[TMP1]], 01496; CHECK-NEXT: [[TMP23:%.*]] = bitcast <16 x i1> [[TMP18]] to i161497; CHECK-NEXT: [[_MSCMP5:%.*]] = icmp ne i16 [[TMP23]], 01498; CHECK-NEXT: [[_MSOR6:%.*]] = or i1 [[_MSCMP4]], [[_MSCMP5]]1499; CHECK-NEXT: br i1 [[_MSOR6]], label [[TMP24:%.*]], label [[TMP25:%.*]], !prof [[PROF1]]1500; CHECK: 24:1501; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1502; CHECK-NEXT: unreachable1503; CHECK: 25:1504; CHECK-NEXT: [[TMP26:%.*]] = call <16 x i32> @llvm.masked.load.v16i32.p0(ptr align 64 [[PTR]], <16 x i1> [[TMP19]], <16 x i32> zeroinitializer)1505; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[_MSMASKEDLD1]], [[_MSMASKEDLD]]1506; CHECK-NEXT: [[RES4:%.*]] = add <16 x i32> [[TMP26]], [[TMP17]]1507; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 81508; CHECK-NEXT: ret <16 x i32> [[RES4]]1509;1510 %res = call <16 x i32> @llvm.x86.avx512.mask.load.d.512(ptr %ptr, <16 x i32> zeroinitializer, i16 -1)1511 %res1 = call <16 x i32> @llvm.x86.avx512.mask.load.d.512(ptr %ptr, <16 x i32> %res, i16 %mask)1512 %res2 = call <16 x i32> @llvm.x86.avx512.mask.load.d.512(ptr %ptr, <16 x i32> zeroinitializer, i16 %mask)1513 %res4 = add <16 x i32> %res2, %res11514 ret <16 x i32> %res41515}1516 1517declare <8 x i64> @llvm.x86.avx512.mask.load.q.512(ptr, <8 x i64>, i8)1518 1519define <8 x i64> @test_mask_load_aligned_q(<8 x i64> %data, ptr %ptr, i8 %mask) #0 {1520;1521; CHECK-LABEL: @test_mask_load_aligned_q(1522; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81523; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 81524; CHECK-NEXT: call void @llvm.donothing()1525; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 01526; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]1527; CHECK: 3:1528; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1529; CHECK-NEXT: unreachable1530; CHECK: 4:1531; CHECK-NEXT: [[TMP5:%.*]] = load <8 x i64>, ptr [[PTR:%.*]], align 641532; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR]] to i641533; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220801534; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr1535; CHECK-NEXT: [[_MSLD:%.*]] = load <8 x i64>, ptr [[TMP8]], align 641536; CHECK-NEXT: [[TMP9:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>1537; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>1538; CHECK-NEXT: [[TMP11:%.*]] = ptrtoint ptr [[PTR]] to i641539; CHECK-NEXT: [[TMP12:%.*]] = xor i64 [[TMP11]], 879609302220801540; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr1541; CHECK-NEXT: [[_MSMASKEDLD:%.*]] = call <8 x i64> @llvm.masked.load.v8i64.p0(ptr align 64 [[TMP13]], <8 x i1> [[TMP10]], <8 x i64> [[_MSLD]])1542; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i64 [[TMP1]], 01543; CHECK-NEXT: [[TMP14:%.*]] = bitcast <8 x i1> [[TMP9]] to i81544; CHECK-NEXT: [[_MSCMP3:%.*]] = icmp ne i8 [[TMP14]], 01545; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP2]], [[_MSCMP3]]1546; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP15:%.*]], label [[TMP16:%.*]], !prof [[PROF1]]1547; CHECK: 15:1548; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1549; CHECK-NEXT: unreachable1550; CHECK: 16:1551; CHECK-NEXT: [[TMP17:%.*]] = call <8 x i64> @llvm.masked.load.v8i64.p0(ptr align 64 [[PTR]], <8 x i1> [[TMP10]], <8 x i64> [[TMP5]])1552; CHECK-NEXT: [[TMP18:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>1553; CHECK-NEXT: [[TMP19:%.*]] = bitcast i8 [[MASK]] to <8 x i1>1554; CHECK-NEXT: [[TMP20:%.*]] = ptrtoint ptr [[PTR]] to i641555; CHECK-NEXT: [[TMP21:%.*]] = xor i64 [[TMP20]], 879609302220801556; CHECK-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr1557; CHECK-NEXT: [[_MSMASKEDLD1:%.*]] = call <8 x i64> @llvm.masked.load.v8i64.p0(ptr align 64 [[TMP22]], <8 x i1> [[TMP19]], <8 x i64> zeroinitializer)1558; CHECK-NEXT: [[_MSCMP4:%.*]] = icmp ne i64 [[TMP1]], 01559; CHECK-NEXT: [[TMP23:%.*]] = bitcast <8 x i1> [[TMP18]] to i81560; CHECK-NEXT: [[_MSCMP5:%.*]] = icmp ne i8 [[TMP23]], 01561; CHECK-NEXT: [[_MSOR6:%.*]] = or i1 [[_MSCMP4]], [[_MSCMP5]]1562; CHECK-NEXT: br i1 [[_MSOR6]], label [[TMP24:%.*]], label [[TMP25:%.*]], !prof [[PROF1]]1563; CHECK: 24:1564; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]1565; CHECK-NEXT: unreachable1566; CHECK: 25:1567; CHECK-NEXT: [[TMP26:%.*]] = call <8 x i64> @llvm.masked.load.v8i64.p0(ptr align 64 [[PTR]], <8 x i1> [[TMP19]], <8 x i64> zeroinitializer)1568; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[_MSMASKEDLD1]], [[_MSMASKEDLD]]1569; CHECK-NEXT: [[RES4:%.*]] = add <8 x i64> [[TMP26]], [[TMP17]]1570; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 81571; CHECK-NEXT: ret <8 x i64> [[RES4]]1572;1573 %res = call <8 x i64> @llvm.x86.avx512.mask.load.q.512(ptr %ptr, <8 x i64> zeroinitializer, i8 -1)1574 %res1 = call <8 x i64> @llvm.x86.avx512.mask.load.q.512(ptr %ptr, <8 x i64> %res, i8 %mask)1575 %res2 = call <8 x i64> @llvm.x86.avx512.mask.load.q.512(ptr %ptr, <8 x i64> zeroinitializer, i8 %mask)1576 %res4 = add <8 x i64> %res2, %res11577 ret <8 x i64> %res41578}1579 1580declare <8 x double> @llvm.x86.avx512.mask.vpermil.pd.512(<8 x double>, i32, <8 x double>, i8)1581 1582define <8 x double>@test_int_x86_avx512_vpermil_pd_512(<8 x double> %x0, <8 x double> %x2) #0 {1583; CHECK-LABEL: @test_int_x86_avx512_vpermil_pd_512(1584; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 81585; CHECK-NEXT: call void @llvm.donothing()1586; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 3, i32 2, i32 5, i32 4, i32 6, i32 6>1587; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x double> [[X0:%.*]], <8 x double> [[X0]], <8 x i32> <i32 0, i32 1, i32 3, i32 2, i32 5, i32 4, i32 6, i32 6>1588; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 81589; CHECK-NEXT: ret <8 x double> [[TMP2]]1590;1591 %res = call <8 x double> @llvm.x86.avx512.mask.vpermil.pd.512(<8 x double> %x0, i32 22, <8 x double> %x2, i8 -1)1592 ret <8 x double> %res1593}1594 1595define <8 x double>@test_int_x86_avx512_mask_vpermil_pd_512(<8 x double> %x0, <8 x double> %x2, i8 %x3) #0 {1596;1597; CHECK-LABEL: @test_int_x86_avx512_mask_vpermil_pd_512(1598; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 81599; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 81600; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81601; CHECK-NEXT: call void @llvm.donothing()1602; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 3, i32 2, i32 5, i32 4, i32 6, i32 6>1603; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <8 x double> [[X0:%.*]], <8 x double> [[X0]], <8 x i32> <i32 0, i32 1, i32 3, i32 2, i32 5, i32 4, i32 6, i32 6>1604; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>1605; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>1606; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP3]]1607; CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x double> [[TMP4]] to <8 x i64>1608; CHECK-NEXT: [[TMP9:%.*]] = bitcast <8 x double> [[X2:%.*]] to <8 x i64>1609; CHECK-NEXT: [[TMP10:%.*]] = xor <8 x i64> [[TMP8]], [[TMP9]]1610; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[_MSPROP]]1611; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], [[TMP3]]1612; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP12]], <8 x i64> [[TMP7]]1613; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP6]], <8 x double> [[TMP4]], <8 x double> [[X2]]1614; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81615; CHECK-NEXT: ret <8 x double> [[TMP13]]1616;1617 %res = call <8 x double> @llvm.x86.avx512.mask.vpermil.pd.512(<8 x double> %x0, i32 22, <8 x double> %x2, i8 %x3)1618 ret <8 x double> %res1619}1620 1621define <8 x double>@test_int_x86_avx512_maskz_vpermil_pd_512(<8 x double> %x0, i8 %x3) #0 {1622;1623; CHECK-LABEL: @test_int_x86_avx512_maskz_vpermil_pd_512(1624; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 81625; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81626; CHECK-NEXT: call void @llvm.donothing()1627; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 3, i32 2, i32 5, i32 4, i32 6, i32 6>1628; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x double> [[X0:%.*]], <8 x double> [[X0]], <8 x i32> <i32 0, i32 1, i32 3, i32 2, i32 5, i32 4, i32 6, i32 6>1629; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>1630; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>1631; CHECK-NEXT: [[TMP6:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer1632; CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x double> [[TMP3]] to <8 x i64>1633; CHECK-NEXT: [[TMP8:%.*]] = xor <8 x i64> [[TMP7]], zeroinitializer1634; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[_MSPROP]]1635; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], zeroinitializer1636; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP4]], <8 x i64> [[TMP10]], <8 x i64> [[TMP6]]1637; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP5]], <8 x double> [[TMP3]], <8 x double> zeroinitializer1638; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81639; CHECK-NEXT: ret <8 x double> [[TMP11]]1640;1641 %res = call <8 x double> @llvm.x86.avx512.mask.vpermil.pd.512(<8 x double> %x0, i32 22, <8 x double> zeroinitializer, i8 %x3)1642 ret <8 x double> %res1643}1644 1645declare <16 x float> @llvm.x86.avx512.mask.vpermil.ps.512(<16 x float>, i32, <16 x float>, i16)1646 1647define <16 x float>@test_int_x86_avx512_vpermil_ps_512(<16 x float> %x0, <16 x float> %x2) #0 {1648; CHECK-LABEL: @test_int_x86_avx512_vpermil_ps_512(1649; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 81650; CHECK-NEXT: call void @llvm.donothing()1651; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> <i32 2, i32 1, i32 1, i32 0, i32 6, i32 5, i32 5, i32 4, i32 10, i32 9, i32 9, i32 8, i32 14, i32 13, i32 13, i32 12>1652; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <16 x float> [[X0:%.*]], <16 x float> [[X0]], <16 x i32> <i32 2, i32 1, i32 1, i32 0, i32 6, i32 5, i32 5, i32 4, i32 10, i32 9, i32 9, i32 8, i32 14, i32 13, i32 13, i32 12>1653; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 81654; CHECK-NEXT: ret <16 x float> [[TMP2]]1655;1656 %res = call <16 x float> @llvm.x86.avx512.mask.vpermil.ps.512(<16 x float> %x0, i32 22, <16 x float> %x2, i16 -1)1657 ret <16 x float> %res1658}1659 1660define <16 x float>@test_int_x86_avx512_mask_vpermil_ps_512(<16 x float> %x0, <16 x float> %x2, i16 %x3) #0 {1661;1662; CHECK-LABEL: @test_int_x86_avx512_mask_vpermil_ps_512(1663; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 81664; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 81665; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81666; CHECK-NEXT: call void @llvm.donothing()1667; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> <i32 2, i32 1, i32 1, i32 0, i32 6, i32 5, i32 5, i32 4, i32 10, i32 9, i32 9, i32 8, i32 14, i32 13, i32 13, i32 12>1668; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <16 x float> [[X0:%.*]], <16 x float> [[X0]], <16 x i32> <i32 2, i32 1, i32 1, i32 0, i32 6, i32 5, i32 5, i32 4, i32 10, i32 9, i32 9, i32 8, i32 14, i32 13, i32 13, i32 12>1669; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>1670; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>1671; CHECK-NEXT: [[TMP7:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP3]]1672; CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x float> [[TMP4]] to <16 x i32>1673; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x float> [[X2:%.*]] to <16 x i32>1674; CHECK-NEXT: [[TMP10:%.*]] = xor <16 x i32> [[TMP8]], [[TMP9]]1675; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[_MSPROP]]1676; CHECK-NEXT: [[TMP12:%.*]] = or <16 x i32> [[TMP11]], [[TMP3]]1677; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[TMP12]], <16 x i32> [[TMP7]]1678; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP6]], <16 x float> [[TMP4]], <16 x float> [[X2]]1679; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81680; CHECK-NEXT: ret <16 x float> [[TMP13]]1681;1682 %res = call <16 x float> @llvm.x86.avx512.mask.vpermil.ps.512(<16 x float> %x0, i32 22, <16 x float> %x2, i16 %x3)1683 ret <16 x float> %res1684}1685 1686define <16 x float>@test_int_x86_avx512_maskz_vpermil_ps_512(<16 x float> %x0, i16 %x3) #0 {1687;1688; CHECK-LABEL: @test_int_x86_avx512_maskz_vpermil_ps_512(1689; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 81690; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81691; CHECK-NEXT: call void @llvm.donothing()1692; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> <i32 2, i32 1, i32 1, i32 0, i32 6, i32 5, i32 5, i32 4, i32 10, i32 9, i32 9, i32 8, i32 14, i32 13, i32 13, i32 12>1693; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <16 x float> [[X0:%.*]], <16 x float> [[X0]], <16 x i32> <i32 2, i32 1, i32 1, i32 0, i32 6, i32 5, i32 5, i32 4, i32 10, i32 9, i32 9, i32 8, i32 14, i32 13, i32 13, i32 12>1694; CHECK-NEXT: [[TMP4:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>1695; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>1696; CHECK-NEXT: [[TMP6:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[_MSPROP]], <16 x i32> zeroinitializer1697; CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x float> [[TMP3]] to <16 x i32>1698; CHECK-NEXT: [[TMP8:%.*]] = xor <16 x i32> [[TMP7]], zeroinitializer1699; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], [[_MSPROP]]1700; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], zeroinitializer1701; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP4]], <16 x i32> [[TMP10]], <16 x i32> [[TMP6]]1702; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP5]], <16 x float> [[TMP3]], <16 x float> zeroinitializer1703; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81704; CHECK-NEXT: ret <16 x float> [[TMP11]]1705;1706 %res = call <16 x float> @llvm.x86.avx512.mask.vpermil.ps.512(<16 x float> %x0, i32 22, <16 x float> zeroinitializer, i16 %x3)1707 ret <16 x float> %res1708}1709 1710declare <16 x i32> @llvm.x86.avx512.mask.pshuf.d.512(<16 x i32>, i32, <16 x i32>, i16)1711 1712define <16 x i32>@test_int_x86_avx512_pshuf_d_512(<16 x i32> %x0, i32 %x1, <16 x i32> %x2) #0 {1713; CHECK-LABEL: @test_int_x86_avx512_pshuf_d_512(1714; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 81715; CHECK-NEXT: call void @llvm.donothing()1716; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> <i32 3, i32 0, i32 0, i32 0, i32 7, i32 4, i32 4, i32 4, i32 11, i32 8, i32 8, i32 8, i32 15, i32 12, i32 12, i32 12>1717; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <16 x i32> [[X0:%.*]], <16 x i32> [[X0]], <16 x i32> <i32 3, i32 0, i32 0, i32 0, i32 7, i32 4, i32 4, i32 4, i32 11, i32 8, i32 8, i32 8, i32 15, i32 12, i32 12, i32 12>1718; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 81719; CHECK-NEXT: ret <16 x i32> [[TMP2]]1720;1721 %res = call <16 x i32> @llvm.x86.avx512.mask.pshuf.d.512(<16 x i32> %x0, i32 3, <16 x i32> %x2, i16 -1)1722 ret <16 x i32> %res1723}1724 1725define <16 x i32>@test_int_x86_avx512_mask_pshuf_d_512(<16 x i32> %x0, i32 %x1, <16 x i32> %x2, i16 %x3) #0 {1726;1727; CHECK-LABEL: @test_int_x86_avx512_mask_pshuf_d_512(1728; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 81729; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 81730; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 81731; CHECK-NEXT: call void @llvm.donothing()1732; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> <i32 3, i32 0, i32 0, i32 0, i32 7, i32 4, i32 4, i32 4, i32 11, i32 8, i32 8, i32 8, i32 15, i32 12, i32 12, i32 12>1733; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <16 x i32> [[X0:%.*]], <16 x i32> [[X0]], <16 x i32> <i32 3, i32 0, i32 0, i32 0, i32 7, i32 4, i32 4, i32 4, i32 11, i32 8, i32 8, i32 8, i32 15, i32 12, i32 12, i32 12>1734; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>1735; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>1736; CHECK-NEXT: [[TMP7:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP3]]1737; CHECK-NEXT: [[TMP8:%.*]] = xor <16 x i32> [[TMP4]], [[X2:%.*]]1738; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], [[_MSPROP]]1739; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[TMP3]]1740; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[TMP10]], <16 x i32> [[TMP7]]1741; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP4]], <16 x i32> [[X2]]1742; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81743; CHECK-NEXT: ret <16 x i32> [[TMP11]]1744;1745 %res = call <16 x i32> @llvm.x86.avx512.mask.pshuf.d.512(<16 x i32> %x0, i32 3, <16 x i32> %x2, i16 %x3)1746 ret <16 x i32> %res1747}1748 1749define <16 x i32>@test_int_x86_avx512_maskz_pshuf_d_512(<16 x i32> %x0, i32 %x1, i16 %x3) #0 {1750;1751; CHECK-LABEL: @test_int_x86_avx512_maskz_pshuf_d_512(1752; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 81753; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 81754; CHECK-NEXT: call void @llvm.donothing()1755; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> <i32 3, i32 0, i32 0, i32 0, i32 7, i32 4, i32 4, i32 4, i32 11, i32 8, i32 8, i32 8, i32 15, i32 12, i32 12, i32 12>1756; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <16 x i32> [[X0:%.*]], <16 x i32> [[X0]], <16 x i32> <i32 3, i32 0, i32 0, i32 0, i32 7, i32 4, i32 4, i32 4, i32 11, i32 8, i32 8, i32 8, i32 15, i32 12, i32 12, i32 12>1757; CHECK-NEXT: [[TMP4:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>1758; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>1759; CHECK-NEXT: [[TMP6:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[_MSPROP]], <16 x i32> zeroinitializer1760; CHECK-NEXT: [[TMP7:%.*]] = xor <16 x i32> [[TMP3]], zeroinitializer1761; CHECK-NEXT: [[TMP8:%.*]] = or <16 x i32> [[TMP7]], [[_MSPROP]]1762; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], zeroinitializer1763; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP4]], <16 x i32> [[TMP9]], <16 x i32> [[TMP6]]1764; CHECK-NEXT: [[TMP10:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[TMP3]], <16 x i32> zeroinitializer1765; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81766; CHECK-NEXT: ret <16 x i32> [[TMP10]]1767;1768 %res = call <16 x i32> @llvm.x86.avx512.mask.pshuf.d.512(<16 x i32> %x0, i32 3, <16 x i32> zeroinitializer, i16 %x3)1769 ret <16 x i32> %res1770}1771 1772define i16 @test_pcmpeq_d(<16 x i32> %a, <16 x i32> %b) #0 {1773; CHECK-LABEL: @test_pcmpeq_d(1774; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 81775; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81776; CHECK-NEXT: call void @llvm.donothing()1777; CHECK-NEXT: [[TMP3:%.*]] = xor <16 x i32> [[A:%.*]], [[B:%.*]]1778; CHECK-NEXT: [[TMP4:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]1779; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <16 x i32> [[TMP4]], zeroinitializer1780; CHECK-NEXT: [[TMP6:%.*]] = xor <16 x i32> [[TMP4]], splat (i32 -1)1781; CHECK-NEXT: [[TMP7:%.*]] = and <16 x i32> [[TMP6]], [[TMP3]]1782; CHECK-NEXT: [[TMP8:%.*]] = icmp eq <16 x i32> [[TMP7]], zeroinitializer1783; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <16 x i1> [[TMP5]], [[TMP8]]1784; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <16 x i32> [[A]], [[B]]1785; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i1> [[_MSPROP_ICMP]] to i161786; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i1> [[TMP9]] to i161787; CHECK-NEXT: store i16 [[TMP10]], ptr @__msan_retval_tls, align 81788; CHECK-NEXT: ret i16 [[TMP11]]1789;1790 %res = call i16 @llvm.x86.avx512.mask.pcmpeq.d.512(<16 x i32> %a, <16 x i32> %b, i16 -1)1791 ret i16 %res1792}1793 1794define i16 @test_mask_pcmpeq_d(<16 x i32> %a, <16 x i32> %b, i16 %mask) #0 {1795;1796; CHECK-LABEL: @test_mask_pcmpeq_d(1797; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 81798; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81799; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 81800; CHECK-NEXT: call void @llvm.donothing()1801; CHECK-NEXT: [[TMP4:%.*]] = xor <16 x i32> [[A:%.*]], [[B:%.*]]1802; CHECK-NEXT: [[TMP5:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]1803; CHECK-NEXT: [[TMP6:%.*]] = icmp ne <16 x i32> [[TMP5]], zeroinitializer1804; CHECK-NEXT: [[TMP7:%.*]] = xor <16 x i32> [[TMP5]], splat (i32 -1)1805; CHECK-NEXT: [[TMP8:%.*]] = and <16 x i32> [[TMP7]], [[TMP4]]1806; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <16 x i32> [[TMP8]], zeroinitializer1807; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <16 x i1> [[TMP6]], [[TMP9]]1808; CHECK-NEXT: [[TMP10:%.*]] = icmp eq <16 x i32> [[A]], [[B]]1809; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>1810; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>1811; CHECK-NEXT: [[TMP13:%.*]] = and <16 x i1> [[_MSPROP_ICMP]], [[TMP11]]1812; CHECK-NEXT: [[TMP14:%.*]] = and <16 x i1> [[TMP10]], [[TMP11]]1813; CHECK-NEXT: [[TMP15:%.*]] = and <16 x i1> [[_MSPROP_ICMP]], [[TMP12]]1814; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i1> [[TMP13]], [[TMP14]]1815; CHECK-NEXT: [[TMP17:%.*]] = or <16 x i1> [[TMP16]], [[TMP15]]1816; CHECK-NEXT: [[TMP18:%.*]] = and <16 x i1> [[TMP10]], [[TMP12]]1817; CHECK-NEXT: [[TMP19:%.*]] = bitcast <16 x i1> [[TMP17]] to i161818; CHECK-NEXT: [[TMP20:%.*]] = bitcast <16 x i1> [[TMP18]] to i161819; CHECK-NEXT: store i16 [[TMP19]], ptr @__msan_retval_tls, align 81820; CHECK-NEXT: ret i16 [[TMP20]]1821;1822 %res = call i16 @llvm.x86.avx512.mask.pcmpeq.d.512(<16 x i32> %a, <16 x i32> %b, i16 %mask)1823 ret i16 %res1824}1825 1826declare i16 @llvm.x86.avx512.mask.pcmpeq.d.512(<16 x i32>, <16 x i32>, i16)1827 1828define i8 @test_pcmpeq_q(<8 x i64> %a, <8 x i64> %b) #0 {1829; CHECK-LABEL: @test_pcmpeq_q(1830; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 81831; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81832; CHECK-NEXT: call void @llvm.donothing()1833; CHECK-NEXT: [[TMP3:%.*]] = xor <8 x i64> [[A:%.*]], [[B:%.*]]1834; CHECK-NEXT: [[TMP4:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]1835; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <8 x i64> [[TMP4]], zeroinitializer1836; CHECK-NEXT: [[TMP6:%.*]] = xor <8 x i64> [[TMP4]], splat (i64 -1)1837; CHECK-NEXT: [[TMP7:%.*]] = and <8 x i64> [[TMP6]], [[TMP3]]1838; CHECK-NEXT: [[TMP8:%.*]] = icmp eq <8 x i64> [[TMP7]], zeroinitializer1839; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <8 x i1> [[TMP5]], [[TMP8]]1840; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <8 x i64> [[A]], [[B]]1841; CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x i1> [[_MSPROP_ICMP]] to i81842; CHECK-NEXT: [[TMP11:%.*]] = bitcast <8 x i1> [[TMP9]] to i81843; CHECK-NEXT: store i8 [[TMP10]], ptr @__msan_retval_tls, align 81844; CHECK-NEXT: ret i8 [[TMP11]]1845;1846 %res = call i8 @llvm.x86.avx512.mask.pcmpeq.q.512(<8 x i64> %a, <8 x i64> %b, i8 -1)1847 ret i8 %res1848}1849 1850define i8 @test_mask_pcmpeq_q(<8 x i64> %a, <8 x i64> %b, i8 %mask) #0 {1851;1852; CHECK-LABEL: @test_mask_pcmpeq_q(1853; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 81854; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81855; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 81856; CHECK-NEXT: call void @llvm.donothing()1857; CHECK-NEXT: [[TMP4:%.*]] = xor <8 x i64> [[A:%.*]], [[B:%.*]]1858; CHECK-NEXT: [[TMP5:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]1859; CHECK-NEXT: [[TMP6:%.*]] = icmp ne <8 x i64> [[TMP5]], zeroinitializer1860; CHECK-NEXT: [[TMP7:%.*]] = xor <8 x i64> [[TMP5]], splat (i64 -1)1861; CHECK-NEXT: [[TMP8:%.*]] = and <8 x i64> [[TMP7]], [[TMP4]]1862; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <8 x i64> [[TMP8]], zeroinitializer1863; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <8 x i1> [[TMP6]], [[TMP9]]1864; CHECK-NEXT: [[TMP10:%.*]] = icmp eq <8 x i64> [[A]], [[B]]1865; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>1866; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>1867; CHECK-NEXT: [[TMP13:%.*]] = and <8 x i1> [[_MSPROP_ICMP]], [[TMP11]]1868; CHECK-NEXT: [[TMP14:%.*]] = and <8 x i1> [[TMP10]], [[TMP11]]1869; CHECK-NEXT: [[TMP15:%.*]] = and <8 x i1> [[_MSPROP_ICMP]], [[TMP12]]1870; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i1> [[TMP13]], [[TMP14]]1871; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i1> [[TMP16]], [[TMP15]]1872; CHECK-NEXT: [[TMP18:%.*]] = and <8 x i1> [[TMP10]], [[TMP12]]1873; CHECK-NEXT: [[TMP19:%.*]] = bitcast <8 x i1> [[TMP17]] to i81874; CHECK-NEXT: [[TMP20:%.*]] = bitcast <8 x i1> [[TMP18]] to i81875; CHECK-NEXT: store i8 [[TMP19]], ptr @__msan_retval_tls, align 81876; CHECK-NEXT: ret i8 [[TMP20]]1877;1878 %res = call i8 @llvm.x86.avx512.mask.pcmpeq.q.512(<8 x i64> %a, <8 x i64> %b, i8 %mask)1879 ret i8 %res1880}1881 1882declare i8 @llvm.x86.avx512.mask.pcmpeq.q.512(<8 x i64>, <8 x i64>, i8)1883 1884define i16 @test_pcmpgt_d(<16 x i32> %a, <16 x i32> %b) #0 {1885; CHECK-LABEL: @test_pcmpgt_d(1886; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 81887; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81888; CHECK-NEXT: call void @llvm.donothing()1889; CHECK-NEXT: [[TMP3:%.*]] = xor <16 x i32> [[A:%.*]], splat (i32 -2147483648)1890; CHECK-NEXT: [[TMP4:%.*]] = xor <16 x i32> [[TMP1]], splat (i32 -1)1891; CHECK-NEXT: [[TMP5:%.*]] = and <16 x i32> [[TMP3]], [[TMP4]]1892; CHECK-NEXT: [[TMP6:%.*]] = or <16 x i32> [[TMP3]], [[TMP1]]1893; CHECK-NEXT: [[TMP7:%.*]] = xor <16 x i32> [[B:%.*]], splat (i32 -2147483648)1894; CHECK-NEXT: [[TMP8:%.*]] = xor <16 x i32> [[TMP2]], splat (i32 -1)1895; CHECK-NEXT: [[TMP9:%.*]] = and <16 x i32> [[TMP7]], [[TMP8]]1896; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP7]], [[TMP2]]1897; CHECK-NEXT: [[TMP11:%.*]] = icmp ugt <16 x i32> [[TMP5]], [[TMP10]]1898; CHECK-NEXT: [[TMP12:%.*]] = icmp ugt <16 x i32> [[TMP6]], [[TMP9]]1899; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i1> [[TMP11]], [[TMP12]]1900; CHECK-NEXT: [[TMP14:%.*]] = icmp sgt <16 x i32> [[A]], [[B]]1901; CHECK-NEXT: [[TMP15:%.*]] = bitcast <16 x i1> [[TMP13]] to i161902; CHECK-NEXT: [[TMP16:%.*]] = bitcast <16 x i1> [[TMP14]] to i161903; CHECK-NEXT: store i16 [[TMP15]], ptr @__msan_retval_tls, align 81904; CHECK-NEXT: ret i16 [[TMP16]]1905;1906 %res = call i16 @llvm.x86.avx512.mask.pcmpgt.d.512(<16 x i32> %a, <16 x i32> %b, i16 -1)1907 ret i16 %res1908}1909 1910define i16 @test_mask_pcmpgt_d(<16 x i32> %a, <16 x i32> %b, i16 %mask) #0 {1911;1912; CHECK-LABEL: @test_mask_pcmpgt_d(1913; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 81914; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81915; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 81916; CHECK-NEXT: call void @llvm.donothing()1917; CHECK-NEXT: [[TMP4:%.*]] = xor <16 x i32> [[A:%.*]], splat (i32 -2147483648)1918; CHECK-NEXT: [[TMP5:%.*]] = xor <16 x i32> [[TMP1]], splat (i32 -1)1919; CHECK-NEXT: [[TMP6:%.*]] = and <16 x i32> [[TMP4]], [[TMP5]]1920; CHECK-NEXT: [[TMP7:%.*]] = or <16 x i32> [[TMP4]], [[TMP1]]1921; CHECK-NEXT: [[TMP8:%.*]] = xor <16 x i32> [[B:%.*]], splat (i32 -2147483648)1922; CHECK-NEXT: [[TMP9:%.*]] = xor <16 x i32> [[TMP2]], splat (i32 -1)1923; CHECK-NEXT: [[TMP10:%.*]] = and <16 x i32> [[TMP8]], [[TMP9]]1924; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP8]], [[TMP2]]1925; CHECK-NEXT: [[TMP12:%.*]] = icmp ugt <16 x i32> [[TMP6]], [[TMP11]]1926; CHECK-NEXT: [[TMP13:%.*]] = icmp ugt <16 x i32> [[TMP7]], [[TMP10]]1927; CHECK-NEXT: [[TMP14:%.*]] = xor <16 x i1> [[TMP12]], [[TMP13]]1928; CHECK-NEXT: [[TMP15:%.*]] = icmp sgt <16 x i32> [[A]], [[B]]1929; CHECK-NEXT: [[TMP16:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>1930; CHECK-NEXT: [[TMP17:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>1931; CHECK-NEXT: [[TMP18:%.*]] = and <16 x i1> [[TMP14]], [[TMP16]]1932; CHECK-NEXT: [[TMP19:%.*]] = and <16 x i1> [[TMP15]], [[TMP16]]1933; CHECK-NEXT: [[TMP20:%.*]] = and <16 x i1> [[TMP14]], [[TMP17]]1934; CHECK-NEXT: [[TMP21:%.*]] = or <16 x i1> [[TMP18]], [[TMP19]]1935; CHECK-NEXT: [[TMP22:%.*]] = or <16 x i1> [[TMP21]], [[TMP20]]1936; CHECK-NEXT: [[TMP23:%.*]] = and <16 x i1> [[TMP15]], [[TMP17]]1937; CHECK-NEXT: [[TMP24:%.*]] = bitcast <16 x i1> [[TMP22]] to i161938; CHECK-NEXT: [[TMP25:%.*]] = bitcast <16 x i1> [[TMP23]] to i161939; CHECK-NEXT: store i16 [[TMP24]], ptr @__msan_retval_tls, align 81940; CHECK-NEXT: ret i16 [[TMP25]]1941;1942 %res = call i16 @llvm.x86.avx512.mask.pcmpgt.d.512(<16 x i32> %a, <16 x i32> %b, i16 %mask)1943 ret i16 %res1944}1945 1946declare i16 @llvm.x86.avx512.mask.pcmpgt.d.512(<16 x i32>, <16 x i32>, i16)1947 1948define i8 @test_pcmpgt_q(<8 x i64> %a, <8 x i64> %b) #0 {1949; CHECK-LABEL: @test_pcmpgt_q(1950; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 81951; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81952; CHECK-NEXT: call void @llvm.donothing()1953; CHECK-NEXT: [[TMP3:%.*]] = xor <8 x i64> [[A:%.*]], splat (i64 -9223372036854775808)1954; CHECK-NEXT: [[TMP4:%.*]] = xor <8 x i64> [[TMP1]], splat (i64 -1)1955; CHECK-NEXT: [[TMP5:%.*]] = and <8 x i64> [[TMP3]], [[TMP4]]1956; CHECK-NEXT: [[TMP6:%.*]] = or <8 x i64> [[TMP3]], [[TMP1]]1957; CHECK-NEXT: [[TMP7:%.*]] = xor <8 x i64> [[B:%.*]], splat (i64 -9223372036854775808)1958; CHECK-NEXT: [[TMP8:%.*]] = xor <8 x i64> [[TMP2]], splat (i64 -1)1959; CHECK-NEXT: [[TMP9:%.*]] = and <8 x i64> [[TMP7]], [[TMP8]]1960; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP7]], [[TMP2]]1961; CHECK-NEXT: [[TMP11:%.*]] = icmp ugt <8 x i64> [[TMP5]], [[TMP10]]1962; CHECK-NEXT: [[TMP12:%.*]] = icmp ugt <8 x i64> [[TMP6]], [[TMP9]]1963; CHECK-NEXT: [[TMP13:%.*]] = xor <8 x i1> [[TMP11]], [[TMP12]]1964; CHECK-NEXT: [[TMP14:%.*]] = icmp sgt <8 x i64> [[A]], [[B]]1965; CHECK-NEXT: [[TMP15:%.*]] = bitcast <8 x i1> [[TMP13]] to i81966; CHECK-NEXT: [[TMP16:%.*]] = bitcast <8 x i1> [[TMP14]] to i81967; CHECK-NEXT: store i8 [[TMP15]], ptr @__msan_retval_tls, align 81968; CHECK-NEXT: ret i8 [[TMP16]]1969;1970 %res = call i8 @llvm.x86.avx512.mask.pcmpgt.q.512(<8 x i64> %a, <8 x i64> %b, i8 -1)1971 ret i8 %res1972}1973 1974define i8 @test_mask_pcmpgt_q(<8 x i64> %a, <8 x i64> %b, i8 %mask) #0 {1975;1976; CHECK-LABEL: @test_mask_pcmpgt_q(1977; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 81978; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81979; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 81980; CHECK-NEXT: call void @llvm.donothing()1981; CHECK-NEXT: [[TMP4:%.*]] = xor <8 x i64> [[A:%.*]], splat (i64 -9223372036854775808)1982; CHECK-NEXT: [[TMP5:%.*]] = xor <8 x i64> [[TMP1]], splat (i64 -1)1983; CHECK-NEXT: [[TMP6:%.*]] = and <8 x i64> [[TMP4]], [[TMP5]]1984; CHECK-NEXT: [[TMP7:%.*]] = or <8 x i64> [[TMP4]], [[TMP1]]1985; CHECK-NEXT: [[TMP8:%.*]] = xor <8 x i64> [[B:%.*]], splat (i64 -9223372036854775808)1986; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP2]], splat (i64 -1)1987; CHECK-NEXT: [[TMP10:%.*]] = and <8 x i64> [[TMP8]], [[TMP9]]1988; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP8]], [[TMP2]]1989; CHECK-NEXT: [[TMP12:%.*]] = icmp ugt <8 x i64> [[TMP6]], [[TMP11]]1990; CHECK-NEXT: [[TMP13:%.*]] = icmp ugt <8 x i64> [[TMP7]], [[TMP10]]1991; CHECK-NEXT: [[TMP14:%.*]] = xor <8 x i1> [[TMP12]], [[TMP13]]1992; CHECK-NEXT: [[TMP15:%.*]] = icmp sgt <8 x i64> [[A]], [[B]]1993; CHECK-NEXT: [[TMP16:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>1994; CHECK-NEXT: [[TMP17:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>1995; CHECK-NEXT: [[TMP18:%.*]] = and <8 x i1> [[TMP14]], [[TMP16]]1996; CHECK-NEXT: [[TMP19:%.*]] = and <8 x i1> [[TMP15]], [[TMP16]]1997; CHECK-NEXT: [[TMP20:%.*]] = and <8 x i1> [[TMP14]], [[TMP17]]1998; CHECK-NEXT: [[TMP21:%.*]] = or <8 x i1> [[TMP18]], [[TMP19]]1999; CHECK-NEXT: [[TMP22:%.*]] = or <8 x i1> [[TMP21]], [[TMP20]]2000; CHECK-NEXT: [[TMP23:%.*]] = and <8 x i1> [[TMP15]], [[TMP17]]2001; CHECK-NEXT: [[TMP24:%.*]] = bitcast <8 x i1> [[TMP22]] to i82002; CHECK-NEXT: [[TMP25:%.*]] = bitcast <8 x i1> [[TMP23]] to i82003; CHECK-NEXT: store i8 [[TMP24]], ptr @__msan_retval_tls, align 82004; CHECK-NEXT: ret i8 [[TMP25]]2005;2006 %res = call i8 @llvm.x86.avx512.mask.pcmpgt.q.512(<8 x i64> %a, <8 x i64> %b, i8 %mask)2007 ret i8 %res2008}2009 2010declare i8 @llvm.x86.avx512.mask.pcmpgt.q.512(<8 x i64>, <8 x i64>, i8)2011 2012declare <8 x double> @llvm.x86.avx512.mask.unpckh.pd.512(<8 x double>, <8 x double>, <8 x double>, i8)2013 2014define <8 x double>@test_int_x86_avx512_unpckh_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2) #0 {2015; CHECK-LABEL: @test_int_x86_avx512_unpckh_pd_512(2016; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 82017; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82018; CHECK-NEXT: call void @llvm.donothing()2019; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP2]], <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>2020; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x double> [[X0:%.*]], <8 x double> [[X1:%.*]], <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>2021; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 82022; CHECK-NEXT: ret <8 x double> [[TMP3]]2023;2024 %res = call <8 x double> @llvm.x86.avx512.mask.unpckh.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 -1)2025 ret <8 x double> %res2026}2027 2028define <8 x double>@test_int_x86_avx512_mask_unpckh_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3) #0 {2029;2030; CHECK-LABEL: @test_int_x86_avx512_mask_unpckh_pd_512(2031; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 82032; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82033; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 82034; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82035; CHECK-NEXT: call void @llvm.donothing()2036; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP2]], <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>2037; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <8 x double> [[X0:%.*]], <8 x double> [[X1:%.*]], <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>2038; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>2039; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>2040; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]2041; CHECK-NEXT: [[TMP9:%.*]] = bitcast <8 x double> [[TMP5]] to <8 x i64>2042; CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x double> [[X2:%.*]] to <8 x i64>2043; CHECK-NEXT: [[TMP11:%.*]] = xor <8 x i64> [[TMP9]], [[TMP10]]2044; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], [[_MSPROP]]2045; CHECK-NEXT: [[TMP13:%.*]] = or <8 x i64> [[TMP12]], [[TMP4]]2046; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP13]], <8 x i64> [[TMP8]]2047; CHECK-NEXT: [[TMP14:%.*]] = select <8 x i1> [[TMP7]], <8 x double> [[TMP5]], <8 x double> [[X2]]2048; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82049; CHECK-NEXT: ret <8 x double> [[TMP14]]2050;2051 %res = call <8 x double> @llvm.x86.avx512.mask.unpckh.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3)2052 ret <8 x double> %res2053}2054 2055declare <16 x float> @llvm.x86.avx512.mask.unpckh.ps.512(<16 x float>, <16 x float>, <16 x float>, i16)2056 2057define <16 x float>@test_int_x86_avx512_unpckh_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2) #0 {2058; CHECK-LABEL: @test_int_x86_avx512_unpckh_ps_512(2059; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82060; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82061; CHECK-NEXT: call void @llvm.donothing()2062; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP2]], <16 x i32> <i32 2, i32 18, i32 3, i32 19, i32 6, i32 22, i32 7, i32 23, i32 10, i32 26, i32 11, i32 27, i32 14, i32 30, i32 15, i32 31>2063; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <16 x float> [[X0:%.*]], <16 x float> [[X1:%.*]], <16 x i32> <i32 2, i32 18, i32 3, i32 19, i32 6, i32 22, i32 7, i32 23, i32 10, i32 26, i32 11, i32 27, i32 14, i32 30, i32 15, i32 31>2064; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 82065; CHECK-NEXT: ret <16 x float> [[TMP3]]2066;2067 %res = call <16 x float> @llvm.x86.avx512.mask.unpckh.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 -1)2068 ret <16 x float> %res2069}2070 2071define <16 x float>@test_int_x86_avx512_mask_unpckh_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3) #0 {2072;2073; CHECK-LABEL: @test_int_x86_avx512_mask_unpckh_ps_512(2074; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82075; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82076; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 82077; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82078; CHECK-NEXT: call void @llvm.donothing()2079; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP2]], <16 x i32> <i32 2, i32 18, i32 3, i32 19, i32 6, i32 22, i32 7, i32 23, i32 10, i32 26, i32 11, i32 27, i32 14, i32 30, i32 15, i32 31>2080; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <16 x float> [[X0:%.*]], <16 x float> [[X1:%.*]], <16 x i32> <i32 2, i32 18, i32 3, i32 19, i32 6, i32 22, i32 7, i32 23, i32 10, i32 26, i32 11, i32 27, i32 14, i32 30, i32 15, i32 31>2081; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>2082; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>2083; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP4]]2084; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x float> [[TMP5]] to <16 x i32>2085; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x float> [[X2:%.*]] to <16 x i32>2086; CHECK-NEXT: [[TMP11:%.*]] = xor <16 x i32> [[TMP9]], [[TMP10]]2087; CHECK-NEXT: [[TMP12:%.*]] = or <16 x i32> [[TMP11]], [[_MSPROP]]2088; CHECK-NEXT: [[TMP13:%.*]] = or <16 x i32> [[TMP12]], [[TMP4]]2089; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP13]], <16 x i32> [[TMP8]]2090; CHECK-NEXT: [[TMP14:%.*]] = select <16 x i1> [[TMP7]], <16 x float> [[TMP5]], <16 x float> [[X2]]2091; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82092; CHECK-NEXT: ret <16 x float> [[TMP14]]2093;2094 %res = call <16 x float> @llvm.x86.avx512.mask.unpckh.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3)2095 ret <16 x float> %res2096}2097 2098declare <8 x double> @llvm.x86.avx512.mask.unpckl.pd.512(<8 x double>, <8 x double>, <8 x double>, i8)2099 2100define <8 x double>@test_int_x86_avx512_unpckl_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2) #0 {2101; CHECK-LABEL: @test_int_x86_avx512_unpckl_pd_512(2102; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 82103; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82104; CHECK-NEXT: call void @llvm.donothing()2105; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP2]], <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>2106; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x double> [[X0:%.*]], <8 x double> [[X1:%.*]], <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>2107; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 82108; CHECK-NEXT: ret <8 x double> [[TMP3]]2109;2110 %res = call <8 x double> @llvm.x86.avx512.mask.unpckl.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 -1)2111 ret <8 x double> %res2112}2113 2114define <8 x double>@test_int_x86_avx512_mask_unpckl_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3) #0 {2115;2116; CHECK-LABEL: @test_int_x86_avx512_mask_unpckl_pd_512(2117; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 82118; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82119; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 82120; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82121; CHECK-NEXT: call void @llvm.donothing()2122; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP2]], <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>2123; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <8 x double> [[X0:%.*]], <8 x double> [[X1:%.*]], <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>2124; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>2125; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>2126; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]2127; CHECK-NEXT: [[TMP9:%.*]] = bitcast <8 x double> [[TMP5]] to <8 x i64>2128; CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x double> [[X2:%.*]] to <8 x i64>2129; CHECK-NEXT: [[TMP11:%.*]] = xor <8 x i64> [[TMP9]], [[TMP10]]2130; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], [[_MSPROP]]2131; CHECK-NEXT: [[TMP13:%.*]] = or <8 x i64> [[TMP12]], [[TMP4]]2132; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP13]], <8 x i64> [[TMP8]]2133; CHECK-NEXT: [[TMP14:%.*]] = select <8 x i1> [[TMP7]], <8 x double> [[TMP5]], <8 x double> [[X2]]2134; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82135; CHECK-NEXT: ret <8 x double> [[TMP14]]2136;2137 %res = call <8 x double> @llvm.x86.avx512.mask.unpckl.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3)2138 ret <8 x double> %res2139}2140 2141declare <16 x float> @llvm.x86.avx512.mask.unpckl.ps.512(<16 x float>, <16 x float>, <16 x float>, i16)2142 2143define <16 x float>@test_int_x86_avx512_unpckl_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2) #0 {2144; CHECK-LABEL: @test_int_x86_avx512_unpckl_ps_512(2145; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82146; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82147; CHECK-NEXT: call void @llvm.donothing()2148; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP2]], <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 4, i32 20, i32 5, i32 21, i32 8, i32 24, i32 9, i32 25, i32 12, i32 28, i32 13, i32 29>2149; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <16 x float> [[X0:%.*]], <16 x float> [[X1:%.*]], <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 4, i32 20, i32 5, i32 21, i32 8, i32 24, i32 9, i32 25, i32 12, i32 28, i32 13, i32 29>2150; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 82151; CHECK-NEXT: ret <16 x float> [[TMP3]]2152;2153 %res = call <16 x float> @llvm.x86.avx512.mask.unpckl.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 -1)2154 ret <16 x float> %res2155}2156 2157define <16 x float>@test_int_x86_avx512_mask_unpckl_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3) #0 {2158;2159; CHECK-LABEL: @test_int_x86_avx512_mask_unpckl_ps_512(2160; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82161; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82162; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 82163; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82164; CHECK-NEXT: call void @llvm.donothing()2165; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP2]], <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 4, i32 20, i32 5, i32 21, i32 8, i32 24, i32 9, i32 25, i32 12, i32 28, i32 13, i32 29>2166; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <16 x float> [[X0:%.*]], <16 x float> [[X1:%.*]], <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 4, i32 20, i32 5, i32 21, i32 8, i32 24, i32 9, i32 25, i32 12, i32 28, i32 13, i32 29>2167; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>2168; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>2169; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP4]]2170; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x float> [[TMP5]] to <16 x i32>2171; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x float> [[X2:%.*]] to <16 x i32>2172; CHECK-NEXT: [[TMP11:%.*]] = xor <16 x i32> [[TMP9]], [[TMP10]]2173; CHECK-NEXT: [[TMP12:%.*]] = or <16 x i32> [[TMP11]], [[_MSPROP]]2174; CHECK-NEXT: [[TMP13:%.*]] = or <16 x i32> [[TMP12]], [[TMP4]]2175; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP13]], <16 x i32> [[TMP8]]2176; CHECK-NEXT: [[TMP14:%.*]] = select <16 x i1> [[TMP7]], <16 x float> [[TMP5]], <16 x float> [[X2]]2177; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82178; CHECK-NEXT: ret <16 x float> [[TMP14]]2179;2180 %res = call <16 x float> @llvm.x86.avx512.mask.unpckl.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3)2181 ret <16 x float> %res2182}2183 2184declare <8 x i64> @llvm.x86.avx512.mask.punpcklqd.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)2185 2186define <8 x i64>@test_int_x86_avx512_punpcklqd_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2) #0 {2187; CHECK-LABEL: @test_int_x86_avx512_punpcklqd_q_512(2188; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 82189; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82190; CHECK-NEXT: call void @llvm.donothing()2191; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP2]], <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>2192; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x i64> [[X0:%.*]], <8 x i64> [[X1:%.*]], <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>2193; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 82194; CHECK-NEXT: ret <8 x i64> [[TMP3]]2195;2196 %res = call <8 x i64> @llvm.x86.avx512.mask.punpcklqd.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)2197 ret <8 x i64> %res2198}2199 2200define <8 x i64>@test_int_x86_avx512_mask_punpcklqd_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) #0 {2201;2202; CHECK-LABEL: @test_int_x86_avx512_mask_punpcklqd_q_512(2203; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 82204; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82205; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 82206; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82207; CHECK-NEXT: call void @llvm.donothing()2208; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP2]], <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>2209; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <8 x i64> [[X0:%.*]], <8 x i64> [[X1:%.*]], <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>2210; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>2211; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>2212; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]2213; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP5]], [[X2:%.*]]2214; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[_MSPROP]]2215; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP4]]2216; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP11]], <8 x i64> [[TMP8]]2217; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP5]], <8 x i64> [[X2]]2218; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82219; CHECK-NEXT: ret <8 x i64> [[TMP12]]2220;2221 %res = call <8 x i64> @llvm.x86.avx512.mask.punpcklqd.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)2222 ret <8 x i64> %res2223}2224 2225define <8 x i64>@test_int_x86_avx512_maskz_punpcklqd_q_512(<8 x i64> %x0, <8 x i64> %x1, i8 %x3) #0 {2226;2227; CHECK-LABEL: @test_int_x86_avx512_maskz_punpcklqd_q_512(2228; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 82229; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82230; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82231; CHECK-NEXT: call void @llvm.donothing()2232; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP2]], <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>2233; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <8 x i64> [[X0:%.*]], <8 x i64> [[X1:%.*]], <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>2234; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>2235; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>2236; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer2237; CHECK-NEXT: [[TMP8:%.*]] = xor <8 x i64> [[TMP4]], zeroinitializer2238; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[_MSPROP]]2239; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], zeroinitializer2240; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP10]], <8 x i64> [[TMP7]]2241; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP4]], <8 x i64> zeroinitializer2242; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82243; CHECK-NEXT: ret <8 x i64> [[TMP11]]2244;2245 %res = call <8 x i64> @llvm.x86.avx512.mask.punpcklqd.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> zeroinitializer,i8 %x3)2246 ret <8 x i64> %res2247}2248 2249declare <8 x i64> @llvm.x86.avx512.mask.punpckhqd.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)2250 2251define <8 x i64>@test_int_x86_avx512_punpckhqd_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2) #0 {2252; CHECK-LABEL: @test_int_x86_avx512_punpckhqd_q_512(2253; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 82254; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82255; CHECK-NEXT: call void @llvm.donothing()2256; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP2]], <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>2257; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x i64> [[X0:%.*]], <8 x i64> [[X1:%.*]], <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>2258; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 82259; CHECK-NEXT: ret <8 x i64> [[TMP3]]2260;2261 %res = call <8 x i64> @llvm.x86.avx512.mask.punpckhqd.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)2262 ret <8 x i64> %res2263}2264 2265define <8 x i64>@test_int_x86_avx512_mask_punpckhqd_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) #0 {2266;2267; CHECK-LABEL: @test_int_x86_avx512_mask_punpckhqd_q_512(2268; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 82269; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82270; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 82271; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82272; CHECK-NEXT: call void @llvm.donothing()2273; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP2]], <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>2274; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <8 x i64> [[X0:%.*]], <8 x i64> [[X1:%.*]], <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>2275; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>2276; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>2277; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]2278; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP5]], [[X2:%.*]]2279; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[_MSPROP]]2280; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP4]]2281; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP11]], <8 x i64> [[TMP8]]2282; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP5]], <8 x i64> [[X2]]2283; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82284; CHECK-NEXT: ret <8 x i64> [[TMP12]]2285;2286 %res = call <8 x i64> @llvm.x86.avx512.mask.punpckhqd.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)2287 ret <8 x i64> %res2288}2289 2290declare <16 x i32> @llvm.x86.avx512.mask.punpckhd.q.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)2291 2292define <16 x i32>@test_int_x86_avx512_punpckhd_q_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) #0 {2293; CHECK-LABEL: @test_int_x86_avx512_punpckhd_q_512(2294; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82295; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82296; CHECK-NEXT: call void @llvm.donothing()2297; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP2]], <16 x i32> <i32 2, i32 18, i32 3, i32 19, i32 6, i32 22, i32 7, i32 23, i32 10, i32 26, i32 11, i32 27, i32 14, i32 30, i32 15, i32 31>2298; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <16 x i32> [[X0:%.*]], <16 x i32> [[X1:%.*]], <16 x i32> <i32 2, i32 18, i32 3, i32 19, i32 6, i32 22, i32 7, i32 23, i32 10, i32 26, i32 11, i32 27, i32 14, i32 30, i32 15, i32 31>2299; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 82300; CHECK-NEXT: ret <16 x i32> [[TMP3]]2301;2302 %res = call <16 x i32> @llvm.x86.avx512.mask.punpckhd.q.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)2303 ret <16 x i32> %res2304}2305 2306define <16 x i32>@test_int_x86_avx512_mask_punpckhd_q_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) #0 {2307;2308; CHECK-LABEL: @test_int_x86_avx512_mask_punpckhd_q_512(2309; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82310; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82311; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 82312; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82313; CHECK-NEXT: call void @llvm.donothing()2314; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP2]], <16 x i32> <i32 2, i32 18, i32 3, i32 19, i32 6, i32 22, i32 7, i32 23, i32 10, i32 26, i32 11, i32 27, i32 14, i32 30, i32 15, i32 31>2315; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <16 x i32> [[X0:%.*]], <16 x i32> [[X1:%.*]], <16 x i32> <i32 2, i32 18, i32 3, i32 19, i32 6, i32 22, i32 7, i32 23, i32 10, i32 26, i32 11, i32 27, i32 14, i32 30, i32 15, i32 31>2316; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>2317; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>2318; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP4]]2319; CHECK-NEXT: [[TMP9:%.*]] = xor <16 x i32> [[TMP5]], [[X2:%.*]]2320; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[_MSPROP]]2321; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP4]]2322; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP11]], <16 x i32> [[TMP8]]2323; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP5]], <16 x i32> [[X2]]2324; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82325; CHECK-NEXT: ret <16 x i32> [[TMP12]]2326;2327 %res = call <16 x i32> @llvm.x86.avx512.mask.punpckhd.q.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)2328 ret <16 x i32> %res2329}2330 2331declare <16 x i32> @llvm.x86.avx512.mask.punpckld.q.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)2332 2333define <16 x i32>@test_int_x86_avx512_punpckld_q_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) #0 {2334; CHECK-LABEL: @test_int_x86_avx512_punpckld_q_512(2335; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82336; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82337; CHECK-NEXT: call void @llvm.donothing()2338; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP2]], <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 4, i32 20, i32 5, i32 21, i32 8, i32 24, i32 9, i32 25, i32 12, i32 28, i32 13, i32 29>2339; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <16 x i32> [[X0:%.*]], <16 x i32> [[X1:%.*]], <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 4, i32 20, i32 5, i32 21, i32 8, i32 24, i32 9, i32 25, i32 12, i32 28, i32 13, i32 29>2340; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 82341; CHECK-NEXT: ret <16 x i32> [[TMP3]]2342;2343 %res = call <16 x i32> @llvm.x86.avx512.mask.punpckld.q.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)2344 ret <16 x i32> %res2345}2346 2347define <16 x i32>@test_int_x86_avx512_mask_punpckld_q_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) #0 {2348;2349; CHECK-LABEL: @test_int_x86_avx512_mask_punpckld_q_512(2350; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82351; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82352; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 82353; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82354; CHECK-NEXT: call void @llvm.donothing()2355; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP2]], <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 4, i32 20, i32 5, i32 21, i32 8, i32 24, i32 9, i32 25, i32 12, i32 28, i32 13, i32 29>2356; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <16 x i32> [[X0:%.*]], <16 x i32> [[X1:%.*]], <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 4, i32 20, i32 5, i32 21, i32 8, i32 24, i32 9, i32 25, i32 12, i32 28, i32 13, i32 29>2357; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>2358; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>2359; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP4]]2360; CHECK-NEXT: [[TMP9:%.*]] = xor <16 x i32> [[TMP5]], [[X2:%.*]]2361; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[_MSPROP]]2362; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP4]]2363; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP11]], <16 x i32> [[TMP8]]2364; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP5]], <16 x i32> [[X2]]2365; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82366; CHECK-NEXT: ret <16 x i32> [[TMP12]]2367;2368 %res = call <16 x i32> @llvm.x86.avx512.mask.punpckld.q.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)2369 ret <16 x i32> %res2370}2371 2372define <16 x i32> @test_x86_avx512_pslli_d(<16 x i32> %a0) #0 {2373; CHECK-LABEL: @test_x86_avx512_pslli_d(2374; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82375; CHECK-NEXT: call void @llvm.donothing()2376; CHECK-NEXT: [[TMP2:%.*]] = call <16 x i32> @llvm.x86.avx512.pslli.d.512(<16 x i32> [[TMP1]], i32 7)2377; CHECK-NEXT: [[TMP3:%.*]] = or <16 x i32> [[TMP2]], zeroinitializer2378; CHECK-NEXT: [[TMP4:%.*]] = call <16 x i32> @llvm.x86.avx512.pslli.d.512(<16 x i32> [[A0:%.*]], i32 7)2379; CHECK-NEXT: store <16 x i32> [[TMP3]], ptr @__msan_retval_tls, align 82380; CHECK-NEXT: ret <16 x i32> [[TMP4]]2381;2382 %res = call <16 x i32> @llvm.x86.avx512.mask.pslli.d(<16 x i32> %a0, i32 7, <16 x i32> zeroinitializer, i16 -1)2383 ret <16 x i32> %res2384}2385 2386define <16 x i32> @test_x86_avx512_mask_pslli_d(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) #0 {2387;2388; CHECK-LABEL: @test_x86_avx512_mask_pslli_d(2389; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82390; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82391; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82392; CHECK-NEXT: call void @llvm.donothing()2393; CHECK-NEXT: [[TMP4:%.*]] = call <16 x i32> @llvm.x86.avx512.pslli.d.512(<16 x i32> [[TMP1]], i32 7)2394; CHECK-NEXT: [[TMP5:%.*]] = or <16 x i32> [[TMP4]], zeroinitializer2395; CHECK-NEXT: [[TMP6:%.*]] = call <16 x i32> @llvm.x86.avx512.pslli.d.512(<16 x i32> [[A0:%.*]], i32 7)2396; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>2397; CHECK-NEXT: [[TMP8:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>2398; CHECK-NEXT: [[TMP9:%.*]] = select <16 x i1> [[TMP8]], <16 x i32> [[TMP5]], <16 x i32> [[TMP3]]2399; CHECK-NEXT: [[TMP10:%.*]] = xor <16 x i32> [[TMP6]], [[A1:%.*]]2400; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP5]]2401; CHECK-NEXT: [[TMP12:%.*]] = or <16 x i32> [[TMP11]], [[TMP3]]2402; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP12]], <16 x i32> [[TMP9]]2403; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP8]], <16 x i32> [[TMP6]], <16 x i32> [[A1]]2404; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82405; CHECK-NEXT: ret <16 x i32> [[TMP13]]2406;2407 %res = call <16 x i32> @llvm.x86.avx512.mask.pslli.d(<16 x i32> %a0, i32 7, <16 x i32> %a1, i16 %mask)2408 ret <16 x i32> %res2409}2410 2411define <16 x i32> @test_x86_avx512_maskz_pslli_d(<16 x i32> %a0, i16 %mask) #0 {2412;2413; CHECK-LABEL: @test_x86_avx512_maskz_pslli_d(2414; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82415; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82416; CHECK-NEXT: call void @llvm.donothing()2417; CHECK-NEXT: [[TMP3:%.*]] = call <16 x i32> @llvm.x86.avx512.pslli.d.512(<16 x i32> [[TMP1]], i32 7)2418; CHECK-NEXT: [[TMP4:%.*]] = or <16 x i32> [[TMP3]], zeroinitializer2419; CHECK-NEXT: [[TMP5:%.*]] = call <16 x i32> @llvm.x86.avx512.pslli.d.512(<16 x i32> [[A0:%.*]], i32 7)2420; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>2421; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>2422; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP4]], <16 x i32> zeroinitializer2423; CHECK-NEXT: [[TMP9:%.*]] = xor <16 x i32> [[TMP5]], zeroinitializer2424; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[TMP4]]2425; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], zeroinitializer2426; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP11]], <16 x i32> [[TMP8]]2427; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP5]], <16 x i32> zeroinitializer2428; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82429; CHECK-NEXT: ret <16 x i32> [[TMP12]]2430;2431 %res = call <16 x i32> @llvm.x86.avx512.mask.pslli.d(<16 x i32> %a0, i32 7, <16 x i32> zeroinitializer, i16 %mask)2432 ret <16 x i32> %res2433}2434 2435declare <16 x i32> @llvm.x86.avx512.mask.pslli.d(<16 x i32>, i32, <16 x i32>, i16) nounwind readnone2436 2437define <8 x i64> @test_x86_avx512_pslli_q(<8 x i64> %a0) #0 {2438; CHECK-LABEL: @test_x86_avx512_pslli_q(2439; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 82440; CHECK-NEXT: call void @llvm.donothing()2441; CHECK-NEXT: [[TMP2:%.*]] = call <8 x i64> @llvm.x86.avx512.pslli.q.512(<8 x i64> [[TMP1]], i32 7)2442; CHECK-NEXT: [[TMP3:%.*]] = or <8 x i64> [[TMP2]], zeroinitializer2443; CHECK-NEXT: [[TMP4:%.*]] = call <8 x i64> @llvm.x86.avx512.pslli.q.512(<8 x i64> [[A0:%.*]], i32 7)2444; CHECK-NEXT: store <8 x i64> [[TMP3]], ptr @__msan_retval_tls, align 82445; CHECK-NEXT: ret <8 x i64> [[TMP4]]2446;2447 %res = call <8 x i64> @llvm.x86.avx512.mask.pslli.q(<8 x i64> %a0, i32 7, <8 x i64> zeroinitializer, i8 -1)2448 ret <8 x i64> %res2449}2450 2451define <8 x i64> @test_x86_avx512_mask_pslli_q(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) #0 {2452;2453; CHECK-LABEL: @test_x86_avx512_mask_pslli_q(2454; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 82455; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82456; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82457; CHECK-NEXT: call void @llvm.donothing()2458; CHECK-NEXT: [[TMP4:%.*]] = call <8 x i64> @llvm.x86.avx512.pslli.q.512(<8 x i64> [[TMP1]], i32 7)2459; CHECK-NEXT: [[TMP5:%.*]] = or <8 x i64> [[TMP4]], zeroinitializer2460; CHECK-NEXT: [[TMP6:%.*]] = call <8 x i64> @llvm.x86.avx512.pslli.q.512(<8 x i64> [[A0:%.*]], i32 7)2461; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>2462; CHECK-NEXT: [[TMP8:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>2463; CHECK-NEXT: [[TMP9:%.*]] = select <8 x i1> [[TMP8]], <8 x i64> [[TMP5]], <8 x i64> [[TMP3]]2464; CHECK-NEXT: [[TMP10:%.*]] = xor <8 x i64> [[TMP6]], [[A1:%.*]]2465; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP5]]2466; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], [[TMP3]]2467; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP12]], <8 x i64> [[TMP9]]2468; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP8]], <8 x i64> [[TMP6]], <8 x i64> [[A1]]2469; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82470; CHECK-NEXT: ret <8 x i64> [[TMP13]]2471;2472 %res = call <8 x i64> @llvm.x86.avx512.mask.pslli.q(<8 x i64> %a0, i32 7, <8 x i64> %a1, i8 %mask)2473 ret <8 x i64> %res2474}2475 2476define <8 x i64> @test_x86_avx512_maskz_pslli_q(<8 x i64> %a0, i8 %mask) #0 {2477;2478; CHECK-LABEL: @test_x86_avx512_maskz_pslli_q(2479; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 82480; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82481; CHECK-NEXT: call void @llvm.donothing()2482; CHECK-NEXT: [[TMP3:%.*]] = call <8 x i64> @llvm.x86.avx512.pslli.q.512(<8 x i64> [[TMP1]], i32 7)2483; CHECK-NEXT: [[TMP4:%.*]] = or <8 x i64> [[TMP3]], zeroinitializer2484; CHECK-NEXT: [[TMP5:%.*]] = call <8 x i64> @llvm.x86.avx512.pslli.q.512(<8 x i64> [[A0:%.*]], i32 7)2485; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>2486; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>2487; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP4]], <8 x i64> zeroinitializer2488; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP5]], zeroinitializer2489; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[TMP4]]2490; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], zeroinitializer2491; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP11]], <8 x i64> [[TMP8]]2492; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP5]], <8 x i64> zeroinitializer2493; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82494; CHECK-NEXT: ret <8 x i64> [[TMP12]]2495;2496 %res = call <8 x i64> @llvm.x86.avx512.mask.pslli.q(<8 x i64> %a0, i32 7, <8 x i64> zeroinitializer, i8 %mask)2497 ret <8 x i64> %res2498}2499 2500declare <8 x i64> @llvm.x86.avx512.mask.pslli.q(<8 x i64>, i32, <8 x i64>, i8) nounwind readnone2501 2502define <16 x i32> @test_x86_avx512_psrli_d(<16 x i32> %a0) #0 {2503; CHECK-LABEL: @test_x86_avx512_psrli_d(2504; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82505; CHECK-NEXT: call void @llvm.donothing()2506; CHECK-NEXT: [[TMP2:%.*]] = call <16 x i32> @llvm.x86.avx512.psrli.d.512(<16 x i32> [[TMP1]], i32 7)2507; CHECK-NEXT: [[TMP3:%.*]] = or <16 x i32> [[TMP2]], zeroinitializer2508; CHECK-NEXT: [[TMP4:%.*]] = call <16 x i32> @llvm.x86.avx512.psrli.d.512(<16 x i32> [[A0:%.*]], i32 7)2509; CHECK-NEXT: store <16 x i32> [[TMP3]], ptr @__msan_retval_tls, align 82510; CHECK-NEXT: ret <16 x i32> [[TMP4]]2511;2512 %res = call <16 x i32> @llvm.x86.avx512.mask.psrli.d(<16 x i32> %a0, i32 7, <16 x i32> zeroinitializer, i16 -1)2513 ret <16 x i32> %res2514}2515 2516define <16 x i32> @test_x86_avx512_mask_psrli_d(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) #0 {2517;2518; CHECK-LABEL: @test_x86_avx512_mask_psrli_d(2519; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82520; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82521; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82522; CHECK-NEXT: call void @llvm.donothing()2523; CHECK-NEXT: [[TMP4:%.*]] = call <16 x i32> @llvm.x86.avx512.psrli.d.512(<16 x i32> [[TMP1]], i32 7)2524; CHECK-NEXT: [[TMP5:%.*]] = or <16 x i32> [[TMP4]], zeroinitializer2525; CHECK-NEXT: [[TMP6:%.*]] = call <16 x i32> @llvm.x86.avx512.psrli.d.512(<16 x i32> [[A0:%.*]], i32 7)2526; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>2527; CHECK-NEXT: [[TMP8:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>2528; CHECK-NEXT: [[TMP9:%.*]] = select <16 x i1> [[TMP8]], <16 x i32> [[TMP5]], <16 x i32> [[TMP3]]2529; CHECK-NEXT: [[TMP10:%.*]] = xor <16 x i32> [[TMP6]], [[A1:%.*]]2530; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP5]]2531; CHECK-NEXT: [[TMP12:%.*]] = or <16 x i32> [[TMP11]], [[TMP3]]2532; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP12]], <16 x i32> [[TMP9]]2533; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP8]], <16 x i32> [[TMP6]], <16 x i32> [[A1]]2534; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82535; CHECK-NEXT: ret <16 x i32> [[TMP13]]2536;2537 %res = call <16 x i32> @llvm.x86.avx512.mask.psrli.d(<16 x i32> %a0, i32 7, <16 x i32> %a1, i16 %mask)2538 ret <16 x i32> %res2539}2540 2541define <16 x i32> @test_x86_avx512_maskz_psrli_d(<16 x i32> %a0, i16 %mask) #0 {2542;2543; CHECK-LABEL: @test_x86_avx512_maskz_psrli_d(2544; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82545; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82546; CHECK-NEXT: call void @llvm.donothing()2547; CHECK-NEXT: [[TMP3:%.*]] = call <16 x i32> @llvm.x86.avx512.psrli.d.512(<16 x i32> [[TMP1]], i32 7)2548; CHECK-NEXT: [[TMP4:%.*]] = or <16 x i32> [[TMP3]], zeroinitializer2549; CHECK-NEXT: [[TMP5:%.*]] = call <16 x i32> @llvm.x86.avx512.psrli.d.512(<16 x i32> [[A0:%.*]], i32 7)2550; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>2551; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>2552; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP4]], <16 x i32> zeroinitializer2553; CHECK-NEXT: [[TMP9:%.*]] = xor <16 x i32> [[TMP5]], zeroinitializer2554; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[TMP4]]2555; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], zeroinitializer2556; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP11]], <16 x i32> [[TMP8]]2557; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP5]], <16 x i32> zeroinitializer2558; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82559; CHECK-NEXT: ret <16 x i32> [[TMP12]]2560;2561 %res = call <16 x i32> @llvm.x86.avx512.mask.psrli.d(<16 x i32> %a0, i32 7, <16 x i32> zeroinitializer, i16 %mask)2562 ret <16 x i32> %res2563}2564 2565declare <16 x i32> @llvm.x86.avx512.mask.psrli.d(<16 x i32>, i32, <16 x i32>, i16) nounwind readnone2566 2567define <8 x i64> @test_x86_avx512_psrli_q(<8 x i64> %a0) #0 {2568; CHECK-LABEL: @test_x86_avx512_psrli_q(2569; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 82570; CHECK-NEXT: call void @llvm.donothing()2571; CHECK-NEXT: [[TMP2:%.*]] = call <8 x i64> @llvm.x86.avx512.psrli.q.512(<8 x i64> [[TMP1]], i32 7)2572; CHECK-NEXT: [[TMP3:%.*]] = or <8 x i64> [[TMP2]], zeroinitializer2573; CHECK-NEXT: [[TMP4:%.*]] = call <8 x i64> @llvm.x86.avx512.psrli.q.512(<8 x i64> [[A0:%.*]], i32 7)2574; CHECK-NEXT: store <8 x i64> [[TMP3]], ptr @__msan_retval_tls, align 82575; CHECK-NEXT: ret <8 x i64> [[TMP4]]2576;2577 %res = call <8 x i64> @llvm.x86.avx512.mask.psrli.q(<8 x i64> %a0, i32 7, <8 x i64> zeroinitializer, i8 -1)2578 ret <8 x i64> %res2579}2580 2581define <8 x i64> @test_x86_avx512_mask_psrli_q(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) #0 {2582;2583; CHECK-LABEL: @test_x86_avx512_mask_psrli_q(2584; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 82585; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82586; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82587; CHECK-NEXT: call void @llvm.donothing()2588; CHECK-NEXT: [[TMP4:%.*]] = call <8 x i64> @llvm.x86.avx512.psrli.q.512(<8 x i64> [[TMP1]], i32 7)2589; CHECK-NEXT: [[TMP5:%.*]] = or <8 x i64> [[TMP4]], zeroinitializer2590; CHECK-NEXT: [[TMP6:%.*]] = call <8 x i64> @llvm.x86.avx512.psrli.q.512(<8 x i64> [[A0:%.*]], i32 7)2591; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>2592; CHECK-NEXT: [[TMP8:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>2593; CHECK-NEXT: [[TMP9:%.*]] = select <8 x i1> [[TMP8]], <8 x i64> [[TMP5]], <8 x i64> [[TMP3]]2594; CHECK-NEXT: [[TMP10:%.*]] = xor <8 x i64> [[TMP6]], [[A1:%.*]]2595; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP5]]2596; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], [[TMP3]]2597; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP12]], <8 x i64> [[TMP9]]2598; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP8]], <8 x i64> [[TMP6]], <8 x i64> [[A1]]2599; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82600; CHECK-NEXT: ret <8 x i64> [[TMP13]]2601;2602 %res = call <8 x i64> @llvm.x86.avx512.mask.psrli.q(<8 x i64> %a0, i32 7, <8 x i64> %a1, i8 %mask)2603 ret <8 x i64> %res2604}2605 2606define <8 x i64> @test_x86_avx512_maskz_psrli_q(<8 x i64> %a0, i8 %mask) #0 {2607;2608; CHECK-LABEL: @test_x86_avx512_maskz_psrli_q(2609; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 82610; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82611; CHECK-NEXT: call void @llvm.donothing()2612; CHECK-NEXT: [[TMP3:%.*]] = call <8 x i64> @llvm.x86.avx512.psrli.q.512(<8 x i64> [[TMP1]], i32 7)2613; CHECK-NEXT: [[TMP4:%.*]] = or <8 x i64> [[TMP3]], zeroinitializer2614; CHECK-NEXT: [[TMP5:%.*]] = call <8 x i64> @llvm.x86.avx512.psrli.q.512(<8 x i64> [[A0:%.*]], i32 7)2615; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>2616; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>2617; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP4]], <8 x i64> zeroinitializer2618; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP5]], zeroinitializer2619; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[TMP4]]2620; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], zeroinitializer2621; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP11]], <8 x i64> [[TMP8]]2622; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP5]], <8 x i64> zeroinitializer2623; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82624; CHECK-NEXT: ret <8 x i64> [[TMP12]]2625;2626 %res = call <8 x i64> @llvm.x86.avx512.mask.psrli.q(<8 x i64> %a0, i32 7, <8 x i64> zeroinitializer, i8 %mask)2627 ret <8 x i64> %res2628}2629 2630declare <8 x i64> @llvm.x86.avx512.mask.psrli.q(<8 x i64>, i32, <8 x i64>, i8) nounwind readnone2631 2632define <16 x i32> @test_x86_avx512_psrai_d(<16 x i32> %a0) #0 {2633; CHECK-LABEL: @test_x86_avx512_psrai_d(2634; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82635; CHECK-NEXT: call void @llvm.donothing()2636; CHECK-NEXT: [[TMP2:%.*]] = call <16 x i32> @llvm.x86.avx512.psrai.d.512(<16 x i32> [[TMP1]], i32 7)2637; CHECK-NEXT: [[TMP3:%.*]] = or <16 x i32> [[TMP2]], zeroinitializer2638; CHECK-NEXT: [[TMP4:%.*]] = call <16 x i32> @llvm.x86.avx512.psrai.d.512(<16 x i32> [[A0:%.*]], i32 7)2639; CHECK-NEXT: store <16 x i32> [[TMP3]], ptr @__msan_retval_tls, align 82640; CHECK-NEXT: ret <16 x i32> [[TMP4]]2641;2642 %res = call <16 x i32> @llvm.x86.avx512.mask.psrai.d(<16 x i32> %a0, i32 7, <16 x i32> zeroinitializer, i16 -1)2643 ret <16 x i32> %res2644}2645 2646define <16 x i32> @test_x86_avx512_mask_psrai_d(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) #0 {2647;2648; CHECK-LABEL: @test_x86_avx512_mask_psrai_d(2649; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82650; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82651; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82652; CHECK-NEXT: call void @llvm.donothing()2653; CHECK-NEXT: [[TMP4:%.*]] = call <16 x i32> @llvm.x86.avx512.psrai.d.512(<16 x i32> [[TMP1]], i32 7)2654; CHECK-NEXT: [[TMP5:%.*]] = or <16 x i32> [[TMP4]], zeroinitializer2655; CHECK-NEXT: [[TMP6:%.*]] = call <16 x i32> @llvm.x86.avx512.psrai.d.512(<16 x i32> [[A0:%.*]], i32 7)2656; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>2657; CHECK-NEXT: [[TMP8:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>2658; CHECK-NEXT: [[TMP9:%.*]] = select <16 x i1> [[TMP8]], <16 x i32> [[TMP5]], <16 x i32> [[TMP3]]2659; CHECK-NEXT: [[TMP10:%.*]] = xor <16 x i32> [[TMP6]], [[A1:%.*]]2660; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP5]]2661; CHECK-NEXT: [[TMP12:%.*]] = or <16 x i32> [[TMP11]], [[TMP3]]2662; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP12]], <16 x i32> [[TMP9]]2663; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP8]], <16 x i32> [[TMP6]], <16 x i32> [[A1]]2664; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82665; CHECK-NEXT: ret <16 x i32> [[TMP13]]2666;2667 %res = call <16 x i32> @llvm.x86.avx512.mask.psrai.d(<16 x i32> %a0, i32 7, <16 x i32> %a1, i16 %mask)2668 ret <16 x i32> %res2669}2670 2671define <16 x i32> @test_x86_avx512_maskz_psrai_d(<16 x i32> %a0, i16 %mask) #0 {2672;2673; CHECK-LABEL: @test_x86_avx512_maskz_psrai_d(2674; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82675; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82676; CHECK-NEXT: call void @llvm.donothing()2677; CHECK-NEXT: [[TMP3:%.*]] = call <16 x i32> @llvm.x86.avx512.psrai.d.512(<16 x i32> [[TMP1]], i32 7)2678; CHECK-NEXT: [[TMP4:%.*]] = or <16 x i32> [[TMP3]], zeroinitializer2679; CHECK-NEXT: [[TMP5:%.*]] = call <16 x i32> @llvm.x86.avx512.psrai.d.512(<16 x i32> [[A0:%.*]], i32 7)2680; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>2681; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>2682; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP4]], <16 x i32> zeroinitializer2683; CHECK-NEXT: [[TMP9:%.*]] = xor <16 x i32> [[TMP5]], zeroinitializer2684; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[TMP4]]2685; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], zeroinitializer2686; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP11]], <16 x i32> [[TMP8]]2687; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP5]], <16 x i32> zeroinitializer2688; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82689; CHECK-NEXT: ret <16 x i32> [[TMP12]]2690;2691 %res = call <16 x i32> @llvm.x86.avx512.mask.psrai.d(<16 x i32> %a0, i32 7, <16 x i32> zeroinitializer, i16 %mask)2692 ret <16 x i32> %res2693}2694 2695declare <16 x i32> @llvm.x86.avx512.mask.psrai.d(<16 x i32>, i32, <16 x i32>, i16) nounwind readnone2696 2697define <8 x i64> @test_x86_avx512_psrai_q(<8 x i64> %a0) #0 {2698; CHECK-LABEL: @test_x86_avx512_psrai_q(2699; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 82700; CHECK-NEXT: call void @llvm.donothing()2701; CHECK-NEXT: [[TMP2:%.*]] = call <8 x i64> @llvm.x86.avx512.psrai.q.512(<8 x i64> [[TMP1]], i32 7)2702; CHECK-NEXT: [[TMP3:%.*]] = or <8 x i64> [[TMP2]], zeroinitializer2703; CHECK-NEXT: [[TMP4:%.*]] = call <8 x i64> @llvm.x86.avx512.psrai.q.512(<8 x i64> [[A0:%.*]], i32 7)2704; CHECK-NEXT: store <8 x i64> [[TMP3]], ptr @__msan_retval_tls, align 82705; CHECK-NEXT: ret <8 x i64> [[TMP4]]2706;2707 %res = call <8 x i64> @llvm.x86.avx512.mask.psrai.q(<8 x i64> %a0, i32 7, <8 x i64> zeroinitializer, i8 -1)2708 ret <8 x i64> %res2709}2710 2711define <8 x i64> @test_x86_avx512_mask_psrai_q(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) #0 {2712;2713; CHECK-LABEL: @test_x86_avx512_mask_psrai_q(2714; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 82715; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82716; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82717; CHECK-NEXT: call void @llvm.donothing()2718; CHECK-NEXT: [[TMP4:%.*]] = call <8 x i64> @llvm.x86.avx512.psrai.q.512(<8 x i64> [[TMP1]], i32 7)2719; CHECK-NEXT: [[TMP5:%.*]] = or <8 x i64> [[TMP4]], zeroinitializer2720; CHECK-NEXT: [[TMP6:%.*]] = call <8 x i64> @llvm.x86.avx512.psrai.q.512(<8 x i64> [[A0:%.*]], i32 7)2721; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>2722; CHECK-NEXT: [[TMP8:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>2723; CHECK-NEXT: [[TMP9:%.*]] = select <8 x i1> [[TMP8]], <8 x i64> [[TMP5]], <8 x i64> [[TMP3]]2724; CHECK-NEXT: [[TMP10:%.*]] = xor <8 x i64> [[TMP6]], [[A1:%.*]]2725; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP5]]2726; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], [[TMP3]]2727; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP12]], <8 x i64> [[TMP9]]2728; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP8]], <8 x i64> [[TMP6]], <8 x i64> [[A1]]2729; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82730; CHECK-NEXT: ret <8 x i64> [[TMP13]]2731;2732 %res = call <8 x i64> @llvm.x86.avx512.mask.psrai.q(<8 x i64> %a0, i32 7, <8 x i64> %a1, i8 %mask)2733 ret <8 x i64> %res2734}2735 2736define <8 x i64> @test_x86_avx512_maskz_psrai_q(<8 x i64> %a0, i8 %mask) #0 {2737;2738; CHECK-LABEL: @test_x86_avx512_maskz_psrai_q(2739; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 82740; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82741; CHECK-NEXT: call void @llvm.donothing()2742; CHECK-NEXT: [[TMP3:%.*]] = call <8 x i64> @llvm.x86.avx512.psrai.q.512(<8 x i64> [[TMP1]], i32 7)2743; CHECK-NEXT: [[TMP4:%.*]] = or <8 x i64> [[TMP3]], zeroinitializer2744; CHECK-NEXT: [[TMP5:%.*]] = call <8 x i64> @llvm.x86.avx512.psrai.q.512(<8 x i64> [[A0:%.*]], i32 7)2745; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>2746; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>2747; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP4]], <8 x i64> zeroinitializer2748; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP5]], zeroinitializer2749; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[TMP4]]2750; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], zeroinitializer2751; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP11]], <8 x i64> [[TMP8]]2752; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP5]], <8 x i64> zeroinitializer2753; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82754; CHECK-NEXT: ret <8 x i64> [[TMP12]]2755;2756 %res = call <8 x i64> @llvm.x86.avx512.mask.psrai.q(<8 x i64> %a0, i32 7, <8 x i64> zeroinitializer, i8 %mask)2757 ret <8 x i64> %res2758}2759 2760declare <8 x i64> @llvm.x86.avx512.mask.psrai.q(<8 x i64>, i32, <8 x i64>, i8) nounwind readnone2761 2762declare void @llvm.x86.avx512.storent.q.512(ptr, <8 x i64>)2763 2764define void@test_storent_q_512(<8 x i64> %data, ptr %ptr) #0 {2765;2766; CHECK-LABEL: @test_storent_q_512(2767; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82768; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 82769; CHECK-NEXT: call void @llvm.donothing()2770; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 02771; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]2772; CHECK: 3:2773; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]2774; CHECK-NEXT: unreachable2775; CHECK: 4:2776; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR:%.*]] to i642777; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220802778; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr2779; CHECK-NEXT: store <8 x i64> [[TMP2]], ptr [[TMP7]], align 642780; CHECK-NEXT: store <8 x i64> [[DATA:%.*]], ptr [[PTR]], align 64, !nontemporal [[META2:![0-9]+]]2781; CHECK-NEXT: ret void2782;2783 call void @llvm.x86.avx512.storent.q.512(ptr %ptr, <8 x i64> %data)2784 ret void2785}2786 2787declare void @llvm.x86.avx512.storent.pd.512(ptr, <8 x double>)2788 2789define void @test_storent_pd_512(<8 x double> %data, ptr %ptr) #0 {2790;2791; CHECK-LABEL: @test_storent_pd_512(2792; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82793; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 82794; CHECK-NEXT: call void @llvm.donothing()2795; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 02796; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]2797; CHECK: 3:2798; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]2799; CHECK-NEXT: unreachable2800; CHECK: 4:2801; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR:%.*]] to i642802; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220802803; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr2804; CHECK-NEXT: store <8 x i64> [[TMP2]], ptr [[TMP7]], align 642805; CHECK-NEXT: store <8 x double> [[DATA:%.*]], ptr [[PTR]], align 64, !nontemporal [[META2]]2806; CHECK-NEXT: ret void2807;2808 call void @llvm.x86.avx512.storent.pd.512(ptr %ptr, <8 x double> %data)2809 ret void2810}2811 2812declare void @llvm.x86.avx512.storent.ps.512(ptr, <16 x float>)2813 2814define void @test_storent_ps_512(<16 x float> %data, ptr %ptr) #0 {2815;2816; CHECK-LABEL: @test_storent_ps_512(2817; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82818; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82819; CHECK-NEXT: call void @llvm.donothing()2820; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 02821; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]2822; CHECK: 3:2823; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]2824; CHECK-NEXT: unreachable2825; CHECK: 4:2826; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR:%.*]] to i642827; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220802828; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr2829; CHECK-NEXT: store <16 x i32> [[TMP2]], ptr [[TMP7]], align 642830; CHECK-NEXT: store <16 x float> [[DATA:%.*]], ptr [[PTR]], align 64, !nontemporal [[META2]]2831; CHECK-NEXT: ret void2832;2833 call void @llvm.x86.avx512.storent.ps.512(ptr %ptr, <16 x float> %data)2834 ret void2835}2836 2837define <16 x i32> @test_xor_epi32(<16 x i32> %a, <16 x i32> %b) #0 {2838; CHECK-LABEL: @test_xor_epi32(2839; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82840; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82841; CHECK-NEXT: call void @llvm.donothing()2842; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]2843; CHECK-NEXT: [[TMP3:%.*]] = xor <16 x i32> [[A:%.*]], [[B:%.*]]2844; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 82845; CHECK-NEXT: ret <16 x i32> [[TMP3]]2846;2847 %res = call <16 x i32> @llvm.x86.avx512.mask.pxor.d.512(<16 x i32> %a,<16 x i32> %b, <16 x i32>zeroinitializer, i16 -1)2848 ret < 16 x i32> %res2849}2850 2851define <16 x i32> @test_mask_xor_epi32(<16 x i32> %a,<16 x i32> %b, <16 x i32> %passThru, i16 %mask) #0 {2852;2853; CHECK-LABEL: @test_mask_xor_epi32(2854; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82855; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82856; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 82857; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82858; CHECK-NEXT: call void @llvm.donothing()2859; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]2860; CHECK-NEXT: [[TMP5:%.*]] = xor <16 x i32> [[A:%.*]], [[B:%.*]]2861; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>2862; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>2863; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP4]]2864; CHECK-NEXT: [[TMP9:%.*]] = xor <16 x i32> [[TMP5]], [[PASSTHRU:%.*]]2865; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[_MSPROP]]2866; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP4]]2867; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP11]], <16 x i32> [[TMP8]]2868; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP5]], <16 x i32> [[PASSTHRU]]2869; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82870; CHECK-NEXT: ret <16 x i32> [[TMP12]]2871;2872 %res = call <16 x i32> @llvm.x86.avx512.mask.pxor.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)2873 ret < 16 x i32> %res2874}2875 2876declare <16 x i32> @llvm.x86.avx512.mask.pxor.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)2877 2878define <16 x i32> @test_or_epi32(<16 x i32> %a, <16 x i32> %b) #0 {2879; CHECK-LABEL: @test_or_epi32(2880; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82881; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82882; CHECK-NEXT: call void @llvm.donothing()2883; CHECK-NEXT: [[TMP3:%.*]] = xor <16 x i32> [[A:%.*]], splat (i32 -1)2884; CHECK-NEXT: [[TMP4:%.*]] = xor <16 x i32> [[B:%.*]], splat (i32 -1)2885; CHECK-NEXT: [[TMP5:%.*]] = and <16 x i32> [[TMP1]], [[TMP2]]2886; CHECK-NEXT: [[TMP6:%.*]] = and <16 x i32> [[TMP3]], [[TMP2]]2887; CHECK-NEXT: [[TMP7:%.*]] = and <16 x i32> [[TMP1]], [[TMP4]]2888; CHECK-NEXT: [[TMP8:%.*]] = or <16 x i32> [[TMP5]], [[TMP6]]2889; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], [[TMP7]]2890; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[A]], [[B]]2891; CHECK-NEXT: store <16 x i32> [[TMP9]], ptr @__msan_retval_tls, align 82892; CHECK-NEXT: ret <16 x i32> [[TMP10]]2893;2894 %res = call <16 x i32> @llvm.x86.avx512.mask.por.d.512(<16 x i32> %a,<16 x i32> %b, <16 x i32>zeroinitializer, i16 -1)2895 ret < 16 x i32> %res2896}2897 2898define <16 x i32> @test_mask_or_epi32(<16 x i32> %a,<16 x i32> %b, <16 x i32> %passThru, i16 %mask) #0 {2899;2900; CHECK-LABEL: @test_mask_or_epi32(2901; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82902; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82903; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 82904; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82905; CHECK-NEXT: call void @llvm.donothing()2906; CHECK-NEXT: [[TMP5:%.*]] = xor <16 x i32> [[A:%.*]], splat (i32 -1)2907; CHECK-NEXT: [[TMP6:%.*]] = xor <16 x i32> [[B:%.*]], splat (i32 -1)2908; CHECK-NEXT: [[TMP7:%.*]] = and <16 x i32> [[TMP1]], [[TMP2]]2909; CHECK-NEXT: [[TMP8:%.*]] = and <16 x i32> [[TMP5]], [[TMP2]]2910; CHECK-NEXT: [[TMP9:%.*]] = and <16 x i32> [[TMP1]], [[TMP6]]2911; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP7]], [[TMP8]]2912; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP9]]2913; CHECK-NEXT: [[TMP12:%.*]] = or <16 x i32> [[A]], [[B]]2914; CHECK-NEXT: [[TMP13:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>2915; CHECK-NEXT: [[TMP14:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>2916; CHECK-NEXT: [[TMP15:%.*]] = select <16 x i1> [[TMP14]], <16 x i32> [[TMP11]], <16 x i32> [[TMP4]]2917; CHECK-NEXT: [[TMP16:%.*]] = xor <16 x i32> [[TMP12]], [[PASSTHRU:%.*]]2918; CHECK-NEXT: [[TMP17:%.*]] = or <16 x i32> [[TMP16]], [[TMP11]]2919; CHECK-NEXT: [[TMP18:%.*]] = or <16 x i32> [[TMP17]], [[TMP4]]2920; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP13]], <16 x i32> [[TMP18]], <16 x i32> [[TMP15]]2921; CHECK-NEXT: [[TMP19:%.*]] = select <16 x i1> [[TMP14]], <16 x i32> [[TMP12]], <16 x i32> [[PASSTHRU]]2922; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82923; CHECK-NEXT: ret <16 x i32> [[TMP19]]2924;2925 %res = call <16 x i32> @llvm.x86.avx512.mask.por.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)2926 ret < 16 x i32> %res2927}2928 2929declare <16 x i32> @llvm.x86.avx512.mask.por.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)2930 2931define <16 x i32> @test_and_epi32(<16 x i32> %a, <16 x i32> %b) #0 {2932; CHECK-LABEL: @test_and_epi32(2933; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82934; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82935; CHECK-NEXT: call void @llvm.donothing()2936; CHECK-NEXT: [[TMP3:%.*]] = and <16 x i32> [[TMP1]], [[TMP2]]2937; CHECK-NEXT: [[TMP4:%.*]] = and <16 x i32> [[A:%.*]], [[TMP2]]2938; CHECK-NEXT: [[TMP5:%.*]] = and <16 x i32> [[TMP1]], [[B:%.*]]2939; CHECK-NEXT: [[TMP6:%.*]] = or <16 x i32> [[TMP3]], [[TMP4]]2940; CHECK-NEXT: [[TMP7:%.*]] = or <16 x i32> [[TMP6]], [[TMP5]]2941; CHECK-NEXT: [[TMP8:%.*]] = and <16 x i32> [[A]], [[B]]2942; CHECK-NEXT: store <16 x i32> [[TMP7]], ptr @__msan_retval_tls, align 82943; CHECK-NEXT: ret <16 x i32> [[TMP8]]2944;2945 %res = call <16 x i32> @llvm.x86.avx512.mask.pand.d.512(<16 x i32> %a,<16 x i32> %b, <16 x i32>zeroinitializer, i16 -1)2946 ret < 16 x i32> %res2947}2948 2949define <16 x i32> @test_mask_and_epi32(<16 x i32> %a,<16 x i32> %b, <16 x i32> %passThru, i16 %mask) #0 {2950;2951; CHECK-LABEL: @test_mask_and_epi32(2952; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82953; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82954; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 82955; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82956; CHECK-NEXT: call void @llvm.donothing()2957; CHECK-NEXT: [[TMP5:%.*]] = and <16 x i32> [[TMP1]], [[TMP2]]2958; CHECK-NEXT: [[TMP6:%.*]] = and <16 x i32> [[A:%.*]], [[TMP2]]2959; CHECK-NEXT: [[TMP7:%.*]] = and <16 x i32> [[TMP1]], [[B:%.*]]2960; CHECK-NEXT: [[TMP8:%.*]] = or <16 x i32> [[TMP5]], [[TMP6]]2961; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], [[TMP7]]2962; CHECK-NEXT: [[TMP10:%.*]] = and <16 x i32> [[A]], [[B]]2963; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>2964; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>2965; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[TMP9]], <16 x i32> [[TMP4]]2966; CHECK-NEXT: [[TMP14:%.*]] = xor <16 x i32> [[TMP10]], [[PASSTHRU:%.*]]2967; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], [[TMP9]]2968; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i32> [[TMP15]], [[TMP4]]2969; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP16]], <16 x i32> [[TMP13]]2970; CHECK-NEXT: [[TMP17:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[TMP10]], <16 x i32> [[PASSTHRU]]2971; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82972; CHECK-NEXT: ret <16 x i32> [[TMP17]]2973;2974 %res = call <16 x i32> @llvm.x86.avx512.mask.pand.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)2975 ret < 16 x i32> %res2976}2977 2978declare <16 x i32> @llvm.x86.avx512.mask.pand.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)2979 2980define <8 x i64> @test_xor_epi64(<8 x i64> %a, <8 x i64> %b) #0 {2981; CHECK-LABEL: @test_xor_epi64(2982; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 82983; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82984; CHECK-NEXT: call void @llvm.donothing()2985; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]2986; CHECK-NEXT: [[TMP3:%.*]] = xor <8 x i64> [[A:%.*]], [[B:%.*]]2987; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 82988; CHECK-NEXT: ret <8 x i64> [[TMP3]]2989;2990 %res = call <8 x i64> @llvm.x86.avx512.mask.pxor.q.512(<8 x i64> %a,<8 x i64> %b, <8 x i64>zeroinitializer, i8 -1)2991 ret < 8 x i64> %res2992}2993 2994define <8 x i64> @test_mask_xor_epi64(<8 x i64> %a,<8 x i64> %b, <8 x i64> %passThru, i8 %mask) #0 {2995;2996; CHECK-LABEL: @test_mask_xor_epi64(2997; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 82998; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82999; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 83000; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 83001; CHECK-NEXT: call void @llvm.donothing()3002; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]3003; CHECK-NEXT: [[TMP5:%.*]] = xor <8 x i64> [[A:%.*]], [[B:%.*]]3004; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>3005; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>3006; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]3007; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP5]], [[PASSTHRU:%.*]]3008; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[_MSPROP]]3009; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP4]]3010; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP11]], <8 x i64> [[TMP8]]3011; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP5]], <8 x i64> [[PASSTHRU]]3012; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 83013; CHECK-NEXT: ret <8 x i64> [[TMP12]]3014;3015 %res = call <8 x i64> @llvm.x86.avx512.mask.pxor.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)3016 ret < 8 x i64> %res3017}3018 3019declare <8 x i64> @llvm.x86.avx512.mask.pxor.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)3020 3021define <8 x i64> @test_or_epi64(<8 x i64> %a, <8 x i64> %b) #0 {3022; CHECK-LABEL: @test_or_epi64(3023; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 83024; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83025; CHECK-NEXT: call void @llvm.donothing()3026; CHECK-NEXT: [[TMP3:%.*]] = xor <8 x i64> [[A:%.*]], splat (i64 -1)3027; CHECK-NEXT: [[TMP4:%.*]] = xor <8 x i64> [[B:%.*]], splat (i64 -1)3028; CHECK-NEXT: [[TMP5:%.*]] = and <8 x i64> [[TMP1]], [[TMP2]]3029; CHECK-NEXT: [[TMP6:%.*]] = and <8 x i64> [[TMP3]], [[TMP2]]3030; CHECK-NEXT: [[TMP7:%.*]] = and <8 x i64> [[TMP1]], [[TMP4]]3031; CHECK-NEXT: [[TMP8:%.*]] = or <8 x i64> [[TMP5]], [[TMP6]]3032; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[TMP7]]3033; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[A]], [[B]]3034; CHECK-NEXT: store <8 x i64> [[TMP9]], ptr @__msan_retval_tls, align 83035; CHECK-NEXT: ret <8 x i64> [[TMP10]]3036;3037 %res = call <8 x i64> @llvm.x86.avx512.mask.por.q.512(<8 x i64> %a,<8 x i64> %b, <8 x i64>zeroinitializer, i8 -1)3038 ret < 8 x i64> %res3039}3040 3041define <8 x i64> @test_mask_or_epi64(<8 x i64> %a,<8 x i64> %b, <8 x i64> %passThru, i8 %mask) #0 {3042;3043; CHECK-LABEL: @test_mask_or_epi64(3044; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 83045; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83046; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 83047; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 83048; CHECK-NEXT: call void @llvm.donothing()3049; CHECK-NEXT: [[TMP5:%.*]] = xor <8 x i64> [[A:%.*]], splat (i64 -1)3050; CHECK-NEXT: [[TMP6:%.*]] = xor <8 x i64> [[B:%.*]], splat (i64 -1)3051; CHECK-NEXT: [[TMP7:%.*]] = and <8 x i64> [[TMP1]], [[TMP2]]3052; CHECK-NEXT: [[TMP8:%.*]] = and <8 x i64> [[TMP5]], [[TMP2]]3053; CHECK-NEXT: [[TMP9:%.*]] = and <8 x i64> [[TMP1]], [[TMP6]]3054; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP7]], [[TMP8]]3055; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP9]]3056; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[A]], [[B]]3057; CHECK-NEXT: [[TMP13:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>3058; CHECK-NEXT: [[TMP14:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>3059; CHECK-NEXT: [[TMP15:%.*]] = select <8 x i1> [[TMP14]], <8 x i64> [[TMP11]], <8 x i64> [[TMP4]]3060; CHECK-NEXT: [[TMP16:%.*]] = xor <8 x i64> [[TMP12]], [[PASSTHRU:%.*]]3061; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP16]], [[TMP11]]3062; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i64> [[TMP17]], [[TMP4]]3063; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP13]], <8 x i64> [[TMP18]], <8 x i64> [[TMP15]]3064; CHECK-NEXT: [[TMP19:%.*]] = select <8 x i1> [[TMP14]], <8 x i64> [[TMP12]], <8 x i64> [[PASSTHRU]]3065; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 83066; CHECK-NEXT: ret <8 x i64> [[TMP19]]3067;3068 %res = call <8 x i64> @llvm.x86.avx512.mask.por.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)3069 ret < 8 x i64> %res3070}3071 3072declare <8 x i64> @llvm.x86.avx512.mask.por.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)3073 3074define <8 x i64> @test_and_epi64(<8 x i64> %a, <8 x i64> %b) #0 {3075; CHECK-LABEL: @test_and_epi64(3076; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 83077; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83078; CHECK-NEXT: call void @llvm.donothing()3079; CHECK-NEXT: [[TMP3:%.*]] = and <8 x i64> [[TMP1]], [[TMP2]]3080; CHECK-NEXT: [[TMP4:%.*]] = and <8 x i64> [[A:%.*]], [[TMP2]]3081; CHECK-NEXT: [[TMP5:%.*]] = and <8 x i64> [[TMP1]], [[B:%.*]]3082; CHECK-NEXT: [[TMP6:%.*]] = or <8 x i64> [[TMP3]], [[TMP4]]3083; CHECK-NEXT: [[TMP7:%.*]] = or <8 x i64> [[TMP6]], [[TMP5]]3084; CHECK-NEXT: [[TMP8:%.*]] = and <8 x i64> [[A]], [[B]]3085; CHECK-NEXT: store <8 x i64> [[TMP7]], ptr @__msan_retval_tls, align 83086; CHECK-NEXT: ret <8 x i64> [[TMP8]]3087;3088 %res = call <8 x i64> @llvm.x86.avx512.mask.pand.q.512(<8 x i64> %a,<8 x i64> %b, <8 x i64>zeroinitializer, i8 -1)3089 ret < 8 x i64> %res3090}3091 3092define <8 x i64> @test_mask_and_epi64(<8 x i64> %a,<8 x i64> %b, <8 x i64> %passThru, i8 %mask) #0 {3093;3094; CHECK-LABEL: @test_mask_and_epi64(3095; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 83096; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83097; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 83098; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 83099; CHECK-NEXT: call void @llvm.donothing()3100; CHECK-NEXT: [[TMP5:%.*]] = and <8 x i64> [[TMP1]], [[TMP2]]3101; CHECK-NEXT: [[TMP6:%.*]] = and <8 x i64> [[A:%.*]], [[TMP2]]3102; CHECK-NEXT: [[TMP7:%.*]] = and <8 x i64> [[TMP1]], [[B:%.*]]3103; CHECK-NEXT: [[TMP8:%.*]] = or <8 x i64> [[TMP5]], [[TMP6]]3104; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[TMP7]]3105; CHECK-NEXT: [[TMP10:%.*]] = and <8 x i64> [[A]], [[B]]3106; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>3107; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>3108; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP12]], <8 x i64> [[TMP9]], <8 x i64> [[TMP4]]3109; CHECK-NEXT: [[TMP14:%.*]] = xor <8 x i64> [[TMP10]], [[PASSTHRU:%.*]]3110; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], [[TMP9]]3111; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP15]], [[TMP4]]3112; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP16]], <8 x i64> [[TMP13]]3113; CHECK-NEXT: [[TMP17:%.*]] = select <8 x i1> [[TMP12]], <8 x i64> [[TMP10]], <8 x i64> [[PASSTHRU]]3114; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 83115; CHECK-NEXT: ret <8 x i64> [[TMP17]]3116;3117 %res = call <8 x i64> @llvm.x86.avx512.mask.pand.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)3118 ret < 8 x i64> %res3119}3120 3121declare <8 x i64> @llvm.x86.avx512.mask.pand.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)3122 3123define <16 x i32> @test_mask_add_epi32_rr(<16 x i32> %a, <16 x i32> %b) #0 {3124; CHECK-LABEL: @test_mask_add_epi32_rr(3125; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 83126; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83127; CHECK-NEXT: call void @llvm.donothing()3128; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]3129; CHECK-NEXT: [[TMP3:%.*]] = add <16 x i32> [[A:%.*]], [[B:%.*]]3130; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 83131; CHECK-NEXT: ret <16 x i32> [[TMP3]]3132;3133 %res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)3134 ret < 16 x i32> %res3135}3136 3137define <16 x i32> @test_mask_add_epi32_rrk(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask) #0 {3138;3139; CHECK-LABEL: @test_mask_add_epi32_rrk(3140; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 83141; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83142; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 83143; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 83144; CHECK-NEXT: call void @llvm.donothing()3145; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]3146; CHECK-NEXT: [[TMP5:%.*]] = add <16 x i32> [[A:%.*]], [[B:%.*]]3147; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>3148; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>3149; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP4]]3150; CHECK-NEXT: [[TMP9:%.*]] = xor <16 x i32> [[TMP5]], [[PASSTHRU:%.*]]3151; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[_MSPROP]]3152; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP4]]3153; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP11]], <16 x i32> [[TMP8]]3154; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP5]], <16 x i32> [[PASSTHRU]]3155; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 83156; CHECK-NEXT: ret <16 x i32> [[TMP12]]3157;3158 %res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)3159 ret < 16 x i32> %res3160}3161 3162define <16 x i32> @test_mask_add_epi32_rrkz(<16 x i32> %a, <16 x i32> %b, i16 %mask) #0 {3163;3164; CHECK-LABEL: @test_mask_add_epi32_rrkz(3165; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 83166; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83167; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 83168; CHECK-NEXT: call void @llvm.donothing()3169; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]3170; CHECK-NEXT: [[TMP4:%.*]] = add <16 x i32> [[A:%.*]], [[B:%.*]]3171; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>3172; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>3173; CHECK-NEXT: [[TMP7:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[_MSPROP]], <16 x i32> zeroinitializer3174; CHECK-NEXT: [[TMP8:%.*]] = xor <16 x i32> [[TMP4]], zeroinitializer3175; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], [[_MSPROP]]3176; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], zeroinitializer3177; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[TMP10]], <16 x i32> [[TMP7]]3178; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP4]], <16 x i32> zeroinitializer3179; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 83180; CHECK-NEXT: ret <16 x i32> [[TMP11]]3181;3182 %res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)3183 ret < 16 x i32> %res3184}3185 3186define <16 x i32> @test_mask_add_epi32_rm(<16 x i32> %a, ptr %ptr_b) #0 {3187;3188; CHECK-LABEL: @test_mask_add_epi32_rm(3189; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83190; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 83191; CHECK-NEXT: call void @llvm.donothing()3192; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 03193; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]3194; CHECK: 3:3195; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]3196; CHECK-NEXT: unreachable3197; CHECK: 4:3198; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 643199; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i643200; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220803201; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr3202; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP7]], align 643203; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP2]], [[_MSLD]]3204; CHECK-NEXT: [[TMP8:%.*]] = add <16 x i32> [[A:%.*]], [[B]]3205; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 83206; CHECK-NEXT: ret <16 x i32> [[TMP8]]3207;3208 %b = load <16 x i32>, ptr %ptr_b3209 %res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)3210 ret < 16 x i32> %res3211}3212 3213define <16 x i32> @test_mask_add_epi32_rmk(<16 x i32> %a, ptr %ptr_b, <16 x i32> %passThru, i16 %mask) #0 {3214;3215; CHECK-LABEL: @test_mask_add_epi32_rmk(3216; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83217; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 83218; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 83219; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 83220; CHECK-NEXT: call void @llvm.donothing()3221; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 03222; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]3223; CHECK: 5:3224; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]3225; CHECK-NEXT: unreachable3226; CHECK: 6:3227; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 643228; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i643229; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220803230; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr3231; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP9]], align 643232; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP2]], [[_MSLD]]3233; CHECK-NEXT: [[TMP10:%.*]] = add <16 x i32> [[A:%.*]], [[B]]3234; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>3235; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>3236; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP4]]3237; CHECK-NEXT: [[TMP14:%.*]] = xor <16 x i32> [[TMP10]], [[PASSTHRU:%.*]]3238; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], [[_MSPROP]]3239; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i32> [[TMP15]], [[TMP4]]3240; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP16]], <16 x i32> [[TMP13]]3241; CHECK-NEXT: [[TMP17:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[TMP10]], <16 x i32> [[PASSTHRU]]3242; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 83243; CHECK-NEXT: ret <16 x i32> [[TMP17]]3244;3245 %b = load <16 x i32>, ptr %ptr_b3246 %res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)3247 ret < 16 x i32> %res3248}3249 3250define <16 x i32> @test_mask_add_epi32_rmkz(<16 x i32> %a, ptr %ptr_b, i16 %mask) #0 {3251;3252; CHECK-LABEL: @test_mask_add_epi32_rmkz(3253; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83254; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 83255; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 83256; CHECK-NEXT: call void @llvm.donothing()3257; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 03258; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]3259; CHECK: 4:3260; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]3261; CHECK-NEXT: unreachable3262; CHECK: 5:3263; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 643264; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i643265; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220803266; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr3267; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP8]], align 643268; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP2]], [[_MSLD]]3269; CHECK-NEXT: [[TMP9:%.*]] = add <16 x i32> [[A:%.*]], [[B]]3270; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>3271; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>3272; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[_MSPROP]], <16 x i32> zeroinitializer3273; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i32> [[TMP9]], zeroinitializer3274; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], [[_MSPROP]]3275; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], zeroinitializer3276; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP15]], <16 x i32> [[TMP12]]3277; CHECK-NEXT: [[TMP16:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP9]], <16 x i32> zeroinitializer3278; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 83279; CHECK-NEXT: ret <16 x i32> [[TMP16]]3280;3281 %b = load <16 x i32>, ptr %ptr_b3282 %res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)3283 ret < 16 x i32> %res3284}3285 3286define <16 x i32> @test_mask_add_epi32_rmb(<16 x i32> %a, ptr %ptr_b, <16 x i32> %extra_param, <16 x i32> %extra_param2) #0 {3287;3288; CHECK-LABEL: @test_mask_add_epi32_rmb(3289; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83290; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 83291; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 83292; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 83293; CHECK-NEXT: call void @llvm.donothing()3294; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 03295; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF1]]3296; CHECK: 5:3297; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]3298; CHECK-NEXT: unreachable3299; CHECK: 6:3300; CHECK-NEXT: [[Q:%.*]] = load i32, ptr [[PTR_B:%.*]], align 43301; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i643302; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220803303; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr3304; CHECK-NEXT: [[_MSLD:%.*]] = load i32, ptr [[TMP7]], align 43305; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <16 x i32> [[TMP3]], i32 [[_MSLD]], i32 03306; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i32> [[EXTRA_PARAM:%.*]], i32 [[Q]], i32 03307; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <16 x i32> [[_MSPROP]], <16 x i32> [[TMP4]], <16 x i32> zeroinitializer3308; CHECK-NEXT: [[B:%.*]] = shufflevector <16 x i32> [[VECINIT_I]], <16 x i32> [[EXTRA_PARAM2:%.*]], <16 x i32> zeroinitializer3309; CHECK-NEXT: [[_MSPROP2:%.*]] = or <16 x i32> [[TMP2]], [[_MSPROP1]]3310; CHECK-NEXT: [[TMP8:%.*]] = add <16 x i32> [[A:%.*]], [[B]]3311; CHECK-NEXT: store <16 x i32> [[_MSPROP2]], ptr @__msan_retval_tls, align 83312; CHECK-NEXT: ret <16 x i32> [[TMP8]]3313;3314 %q = load i32, ptr %ptr_b3315 %vecinit.i = insertelement <16 x i32> %extra_param, i32 %q, i32 03316 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> %extra_param2, <16 x i32> zeroinitializer3317 %res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)3318 ret < 16 x i32> %res3319}3320 3321define <16 x i32> @test_mask_add_epi32_rmbk(<16 x i32> %a, ptr %ptr_b, <16 x i32> %passThru, i16 %mask, <16 x i32> %extra_param, <16 x i32> %extra_param2) #0 {3322;3323; CHECK-LABEL: @test_mask_add_epi32_rmbk(3324; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83325; CHECK-NEXT: [[TMP5:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 83326; CHECK-NEXT: [[TMP6:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 208), align 83327; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 83328; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 83329; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 83330; CHECK-NEXT: call void @llvm.donothing()3331; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 03332; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP18:%.*]], label [[TMP19:%.*]], !prof [[PROF1]]3333; CHECK: 7:3334; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]3335; CHECK-NEXT: unreachable3336; CHECK: 8:3337; CHECK-NEXT: [[Q:%.*]] = load i32, ptr [[PTR_B:%.*]], align 43338; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i643339; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220803340; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr3341; CHECK-NEXT: [[_MSLD:%.*]] = load i32, ptr [[TMP9]], align 43342; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <16 x i32> [[TMP5]], i32 [[_MSLD]], i32 03343; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i32> [[EXTRA_PARAM:%.*]], i32 [[Q]], i32 03344; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <16 x i32> [[_MSPROP]], <16 x i32> [[TMP6]], <16 x i32> zeroinitializer3345; CHECK-NEXT: [[B:%.*]] = shufflevector <16 x i32> [[VECINIT_I]], <16 x i32> [[EXTRA_PARAM2:%.*]], <16 x i32> zeroinitializer3346; CHECK-NEXT: [[_MSPROP2:%.*]] = or <16 x i32> [[TMP2]], [[_MSPROP1]]3347; CHECK-NEXT: [[TMP10:%.*]] = add <16 x i32> [[A:%.*]], [[B]]3348; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>3349; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>3350; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[_MSPROP2]], <16 x i32> [[TMP4]]3351; CHECK-NEXT: [[TMP14:%.*]] = xor <16 x i32> [[TMP10]], [[PASSTHRU:%.*]]3352; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], [[_MSPROP2]]3353; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i32> [[TMP15]], [[TMP4]]3354; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP16]], <16 x i32> [[TMP13]]3355; CHECK-NEXT: [[TMP17:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[TMP10]], <16 x i32> [[PASSTHRU]]3356; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 83357; CHECK-NEXT: ret <16 x i32> [[TMP17]]3358;3359 %q = load i32, ptr %ptr_b3360 %vecinit.i = insertelement <16 x i32> %extra_param, i32 %q, i32 03361 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> %extra_param2, <16 x i32> zeroinitializer3362 %res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)3363 ret < 16 x i32> %res3364}3365 3366define <16 x i32> @test_mask_add_epi32_rmbkz(<16 x i32> %a, ptr %ptr_b, i16 %mask, <16 x i32> %extra_param, <16 x i32> %extra_param2) #0 {3367;3368; CHECK-LABEL: @test_mask_add_epi32_rmbkz(3369; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83370; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 83371; CHECK-NEXT: [[TMP5:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 83372; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 83373; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 83374; CHECK-NEXT: call void @llvm.donothing()3375; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 03376; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP17:%.*]], label [[TMP18:%.*]], !prof [[PROF1]]3377; CHECK: 6:3378; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]3379; CHECK-NEXT: unreachable3380; CHECK: 7:3381; CHECK-NEXT: [[Q:%.*]] = load i32, ptr [[PTR_B:%.*]], align 43382; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i643383; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220803384; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr3385; CHECK-NEXT: [[_MSLD:%.*]] = load i32, ptr [[TMP8]], align 43386; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <16 x i32> [[TMP4]], i32 [[_MSLD]], i32 03387; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i32> [[EXTRA_PARAM:%.*]], i32 [[Q]], i32 03388; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <16 x i32> [[_MSPROP]], <16 x i32> [[TMP5]], <16 x i32> zeroinitializer3389; CHECK-NEXT: [[B:%.*]] = shufflevector <16 x i32> [[VECINIT_I]], <16 x i32> [[EXTRA_PARAM2:%.*]], <16 x i32> zeroinitializer3390; CHECK-NEXT: [[_MSPROP2:%.*]] = or <16 x i32> [[TMP2]], [[_MSPROP1]]3391; CHECK-NEXT: [[TMP9:%.*]] = add <16 x i32> [[A:%.*]], [[B]]3392; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>3393; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>3394; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[_MSPROP2]], <16 x i32> zeroinitializer3395; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i32> [[TMP9]], zeroinitializer3396; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], [[_MSPROP2]]3397; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], zeroinitializer3398; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP15]], <16 x i32> [[TMP12]]3399; CHECK-NEXT: [[TMP16:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP9]], <16 x i32> zeroinitializer3400; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 83401; CHECK-NEXT: ret <16 x i32> [[TMP16]]3402;3403 %q = load i32, ptr %ptr_b3404 %vecinit.i = insertelement <16 x i32> %extra_param, i32 %q, i32 03405 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> %extra_param2, <16 x i32> zeroinitializer3406 %res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)3407 ret < 16 x i32> %res3408}3409 3410declare <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)3411 3412define <16 x i32> @test_mask_sub_epi32_rr(<16 x i32> %a, <16 x i32> %b) #0 {3413; CHECK-LABEL: @test_mask_sub_epi32_rr(3414; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 83415; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83416; CHECK-NEXT: call void @llvm.donothing()3417; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]3418; CHECK-NEXT: [[TMP3:%.*]] = sub <16 x i32> [[A:%.*]], [[B:%.*]]3419; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 83420; CHECK-NEXT: ret <16 x i32> [[TMP3]]3421;3422 %res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)3423 ret < 16 x i32> %res3424}3425 3426define <16 x i32> @test_mask_sub_epi32_rrk(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask) #0 {3427;3428; CHECK-LABEL: @test_mask_sub_epi32_rrk(3429; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 83430; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83431; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 83432; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 83433; CHECK-NEXT: call void @llvm.donothing()3434; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]3435; CHECK-NEXT: [[TMP5:%.*]] = sub <16 x i32> [[A:%.*]], [[B:%.*]]3436; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>3437; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>3438; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP4]]3439; CHECK-NEXT: [[TMP9:%.*]] = xor <16 x i32> [[TMP5]], [[PASSTHRU:%.*]]3440; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[_MSPROP]]3441; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP4]]3442; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP11]], <16 x i32> [[TMP8]]3443; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP5]], <16 x i32> [[PASSTHRU]]3444; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 83445; CHECK-NEXT: ret <16 x i32> [[TMP12]]3446;3447 %res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)3448 ret < 16 x i32> %res3449}3450 3451define <16 x i32> @test_mask_sub_epi32_rrkz(<16 x i32> %a, <16 x i32> %b, i16 %mask) #0 {3452;3453; CHECK-LABEL: @test_mask_sub_epi32_rrkz(3454; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 83455; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83456; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 83457; CHECK-NEXT: call void @llvm.donothing()3458; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]3459; CHECK-NEXT: [[TMP4:%.*]] = sub <16 x i32> [[A:%.*]], [[B:%.*]]3460; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>3461; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>3462; CHECK-NEXT: [[TMP7:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[_MSPROP]], <16 x i32> zeroinitializer3463; CHECK-NEXT: [[TMP8:%.*]] = xor <16 x i32> [[TMP4]], zeroinitializer3464; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], [[_MSPROP]]3465; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], zeroinitializer3466; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[TMP10]], <16 x i32> [[TMP7]]3467; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP4]], <16 x i32> zeroinitializer3468; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 83469; CHECK-NEXT: ret <16 x i32> [[TMP11]]3470;3471 %res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)3472 ret < 16 x i32> %res3473}3474 3475define <16 x i32> @test_mask_sub_epi32_rm(<16 x i32> %a, ptr %ptr_b) #0 {3476;3477; CHECK-LABEL: @test_mask_sub_epi32_rm(3478; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83479; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 83480; CHECK-NEXT: call void @llvm.donothing()3481; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 03482; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]3483; CHECK: 3:3484; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]3485; CHECK-NEXT: unreachable3486; CHECK: 4:3487; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 643488; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i643489; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220803490; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr3491; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP7]], align 643492; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP2]], [[_MSLD]]3493; CHECK-NEXT: [[TMP8:%.*]] = sub <16 x i32> [[A:%.*]], [[B]]3494; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 83495; CHECK-NEXT: ret <16 x i32> [[TMP8]]3496;3497 %b = load <16 x i32>, ptr %ptr_b3498 %res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)3499 ret < 16 x i32> %res3500}3501 3502define <16 x i32> @test_mask_sub_epi32_rmk(<16 x i32> %a, ptr %ptr_b, <16 x i32> %passThru, i16 %mask) #0 {3503;3504; CHECK-LABEL: @test_mask_sub_epi32_rmk(3505; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83506; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 83507; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 83508; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 83509; CHECK-NEXT: call void @llvm.donothing()3510; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 03511; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]3512; CHECK: 5:3513; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]3514; CHECK-NEXT: unreachable3515; CHECK: 6:3516; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 643517; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i643518; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220803519; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr3520; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP9]], align 643521; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP2]], [[_MSLD]]3522; CHECK-NEXT: [[TMP10:%.*]] = sub <16 x i32> [[A:%.*]], [[B]]3523; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>3524; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>3525; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP4]]3526; CHECK-NEXT: [[TMP14:%.*]] = xor <16 x i32> [[TMP10]], [[PASSTHRU:%.*]]3527; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], [[_MSPROP]]3528; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i32> [[TMP15]], [[TMP4]]3529; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP16]], <16 x i32> [[TMP13]]3530; CHECK-NEXT: [[TMP17:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[TMP10]], <16 x i32> [[PASSTHRU]]3531; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 83532; CHECK-NEXT: ret <16 x i32> [[TMP17]]3533;3534 %b = load <16 x i32>, ptr %ptr_b3535 %res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)3536 ret < 16 x i32> %res3537}3538 3539define <16 x i32> @test_mask_sub_epi32_rmkz(<16 x i32> %a, ptr %ptr_b, i16 %mask) #0 {3540;3541; CHECK-LABEL: @test_mask_sub_epi32_rmkz(3542; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83543; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 83544; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 83545; CHECK-NEXT: call void @llvm.donothing()3546; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 03547; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]3548; CHECK: 4:3549; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]3550; CHECK-NEXT: unreachable3551; CHECK: 5:3552; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 643553; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i643554; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220803555; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr3556; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP8]], align 643557; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP2]], [[_MSLD]]3558; CHECK-NEXT: [[TMP9:%.*]] = sub <16 x i32> [[A:%.*]], [[B]]3559; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>3560; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>3561; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[_MSPROP]], <16 x i32> zeroinitializer3562; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i32> [[TMP9]], zeroinitializer3563; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], [[_MSPROP]]3564; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], zeroinitializer3565; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP15]], <16 x i32> [[TMP12]]3566; CHECK-NEXT: [[TMP16:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP9]], <16 x i32> zeroinitializer3567; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 83568; CHECK-NEXT: ret <16 x i32> [[TMP16]]3569;3570 %b = load <16 x i32>, ptr %ptr_b3571 %res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)3572 ret < 16 x i32> %res3573}3574 3575define <16 x i32> @test_mask_sub_epi32_rmb(<16 x i32> %a, ptr %ptr_b, <16 x i32> %extra_param, <16 x i32> %extra_param2) #0 {3576;3577; CHECK-LABEL: @test_mask_sub_epi32_rmb(3578; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83579; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 83580; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 83581; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 83582; CHECK-NEXT: call void @llvm.donothing()3583; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 03584; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF1]]3585; CHECK: 5:3586; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]3587; CHECK-NEXT: unreachable3588; CHECK: 6:3589; CHECK-NEXT: [[Q:%.*]] = load i32, ptr [[PTR_B:%.*]], align 43590; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i643591; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220803592; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr3593; CHECK-NEXT: [[_MSLD:%.*]] = load i32, ptr [[TMP7]], align 43594; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <16 x i32> [[TMP3]], i32 [[_MSLD]], i32 03595; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i32> [[EXTRA_PARAM:%.*]], i32 [[Q]], i32 03596; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <16 x i32> [[_MSPROP]], <16 x i32> [[TMP4]], <16 x i32> zeroinitializer3597; CHECK-NEXT: [[B:%.*]] = shufflevector <16 x i32> [[VECINIT_I]], <16 x i32> [[EXTRA_PARAM2:%.*]], <16 x i32> zeroinitializer3598; CHECK-NEXT: [[_MSPROP2:%.*]] = or <16 x i32> [[TMP2]], [[_MSPROP1]]3599; CHECK-NEXT: [[TMP8:%.*]] = sub <16 x i32> [[A:%.*]], [[B]]3600; CHECK-NEXT: store <16 x i32> [[_MSPROP2]], ptr @__msan_retval_tls, align 83601; CHECK-NEXT: ret <16 x i32> [[TMP8]]3602;3603 %q = load i32, ptr %ptr_b3604 %vecinit.i = insertelement <16 x i32> %extra_param, i32 %q, i32 03605 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> %extra_param2, <16 x i32> zeroinitializer3606 %res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)3607 ret < 16 x i32> %res3608}3609 3610define <16 x i32> @test_mask_sub_epi32_rmbk(<16 x i32> %a, ptr %ptr_b, <16 x i32> %passThru, i16 %mask, <16 x i32> %extra_param, <16 x i32> %extra_param2) #0 {3611;3612; CHECK-LABEL: @test_mask_sub_epi32_rmbk(3613; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83614; CHECK-NEXT: [[TMP5:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 83615; CHECK-NEXT: [[TMP6:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 208), align 83616; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 83617; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 83618; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 83619; CHECK-NEXT: call void @llvm.donothing()3620; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 03621; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP18:%.*]], label [[TMP19:%.*]], !prof [[PROF1]]3622; CHECK: 7:3623; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]3624; CHECK-NEXT: unreachable3625; CHECK: 8:3626; CHECK-NEXT: [[Q:%.*]] = load i32, ptr [[PTR_B:%.*]], align 43627; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i643628; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220803629; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr3630; CHECK-NEXT: [[_MSLD:%.*]] = load i32, ptr [[TMP9]], align 43631; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <16 x i32> [[TMP5]], i32 [[_MSLD]], i32 03632; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i32> [[EXTRA_PARAM:%.*]], i32 [[Q]], i32 03633; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <16 x i32> [[_MSPROP]], <16 x i32> [[TMP6]], <16 x i32> zeroinitializer3634; CHECK-NEXT: [[B:%.*]] = shufflevector <16 x i32> [[VECINIT_I]], <16 x i32> [[EXTRA_PARAM2:%.*]], <16 x i32> zeroinitializer3635; CHECK-NEXT: [[_MSPROP2:%.*]] = or <16 x i32> [[TMP2]], [[_MSPROP1]]3636; CHECK-NEXT: [[TMP10:%.*]] = sub <16 x i32> [[A:%.*]], [[B]]3637; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>3638; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>3639; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[_MSPROP2]], <16 x i32> [[TMP4]]3640; CHECK-NEXT: [[TMP14:%.*]] = xor <16 x i32> [[TMP10]], [[PASSTHRU:%.*]]3641; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], [[_MSPROP2]]3642; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i32> [[TMP15]], [[TMP4]]3643; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP16]], <16 x i32> [[TMP13]]3644; CHECK-NEXT: [[TMP17:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[TMP10]], <16 x i32> [[PASSTHRU]]3645; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 83646; CHECK-NEXT: ret <16 x i32> [[TMP17]]3647;3648 %q = load i32, ptr %ptr_b3649 %vecinit.i = insertelement <16 x i32> %extra_param, i32 %q, i32 03650 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> %extra_param2, <16 x i32> zeroinitializer3651 %res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)3652 ret < 16 x i32> %res3653}3654 3655define <16 x i32> @test_mask_sub_epi32_rmbkz(<16 x i32> %a, ptr %ptr_b, i16 %mask, <16 x i32> %extra_param) #0 {3656;3657; CHECK-LABEL: @test_mask_sub_epi32_rmbkz(3658; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83659; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 83660; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 83661; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 83662; CHECK-NEXT: call void @llvm.donothing()3663; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 03664; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP17:%.*]], !prof [[PROF1]]3665; CHECK: 5:3666; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]3667; CHECK-NEXT: unreachable3668; CHECK: 6:3669; CHECK-NEXT: [[Q:%.*]] = load i32, ptr [[PTR_B:%.*]], align 43670; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i643671; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220803672; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr3673; CHECK-NEXT: [[_MSLD:%.*]] = load i32, ptr [[TMP8]], align 43674; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <16 x i32> [[TMP4]], i32 [[_MSLD]], i32 03675; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i32> [[EXTRA_PARAM:%.*]], i32 [[Q]], i32 03676; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <16 x i32> [[_MSPROP]], <16 x i32> [[TMP4]], <16 x i32> zeroinitializer3677; CHECK-NEXT: [[B:%.*]] = shufflevector <16 x i32> [[VECINIT_I]], <16 x i32> [[EXTRA_PARAM]], <16 x i32> zeroinitializer3678; CHECK-NEXT: [[_MSPROP2:%.*]] = or <16 x i32> [[TMP2]], [[_MSPROP1]]3679; CHECK-NEXT: [[TMP9:%.*]] = sub <16 x i32> [[A:%.*]], [[B]]3680; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>3681; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>3682; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[_MSPROP2]], <16 x i32> zeroinitializer3683; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i32> [[TMP9]], zeroinitializer3684; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], [[_MSPROP2]]3685; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], zeroinitializer3686; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP15]], <16 x i32> [[TMP12]]3687; CHECK-NEXT: [[TMP16:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP9]], <16 x i32> zeroinitializer3688; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 83689; CHECK-NEXT: ret <16 x i32> [[TMP16]]3690;3691 %q = load i32, ptr %ptr_b3692 %vecinit.i = insertelement <16 x i32> %extra_param, i32 %q, i32 03693 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> %extra_param, <16 x i32> zeroinitializer3694 %res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)3695 ret < 16 x i32> %res3696}3697 3698declare <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)3699 3700define <8 x i64> @test_mask_add_epi64_rr(<8 x i64> %a, <8 x i64> %b) #0 {3701; CHECK-LABEL: @test_mask_add_epi64_rr(3702; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 83703; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83704; CHECK-NEXT: call void @llvm.donothing()3705; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]3706; CHECK-NEXT: [[TMP3:%.*]] = add <8 x i64> [[A:%.*]], [[B:%.*]]3707; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 83708; CHECK-NEXT: ret <8 x i64> [[TMP3]]3709;3710 %res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)3711 ret < 8 x i64> %res3712}3713 3714define <8 x i64> @test_mask_add_epi64_rrk(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask) #0 {3715;3716; CHECK-LABEL: @test_mask_add_epi64_rrk(3717; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 83718; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83719; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 83720; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 83721; CHECK-NEXT: call void @llvm.donothing()3722; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]3723; CHECK-NEXT: [[TMP5:%.*]] = add <8 x i64> [[A:%.*]], [[B:%.*]]3724; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>3725; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>3726; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]3727; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP5]], [[PASSTHRU:%.*]]3728; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[_MSPROP]]3729; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP4]]3730; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP11]], <8 x i64> [[TMP8]]3731; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP5]], <8 x i64> [[PASSTHRU]]3732; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 83733; CHECK-NEXT: ret <8 x i64> [[TMP12]]3734;3735 %res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)3736 ret < 8 x i64> %res3737}3738 3739define <8 x i64> @test_mask_add_epi64_rrkz(<8 x i64> %a, <8 x i64> %b, i8 %mask) #0 {3740;3741; CHECK-LABEL: @test_mask_add_epi64_rrkz(3742; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 83743; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83744; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 83745; CHECK-NEXT: call void @llvm.donothing()3746; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]3747; CHECK-NEXT: [[TMP4:%.*]] = add <8 x i64> [[A:%.*]], [[B:%.*]]3748; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>3749; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>3750; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer3751; CHECK-NEXT: [[TMP8:%.*]] = xor <8 x i64> [[TMP4]], zeroinitializer3752; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[_MSPROP]]3753; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], zeroinitializer3754; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP10]], <8 x i64> [[TMP7]]3755; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP4]], <8 x i64> zeroinitializer3756; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 83757; CHECK-NEXT: ret <8 x i64> [[TMP11]]3758;3759 %res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 %mask)3760 ret < 8 x i64> %res3761}3762 3763define <8 x i64> @test_mask_add_epi64_rm(<8 x i64> %a, ptr %ptr_b) #0 {3764;3765; CHECK-LABEL: @test_mask_add_epi64_rm(3766; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83767; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 83768; CHECK-NEXT: call void @llvm.donothing()3769; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 03770; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]3771; CHECK: 3:3772; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]3773; CHECK-NEXT: unreachable3774; CHECK: 4:3775; CHECK-NEXT: [[B:%.*]] = load <8 x i64>, ptr [[PTR_B:%.*]], align 643776; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i643777; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220803778; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr3779; CHECK-NEXT: [[_MSLD:%.*]] = load <8 x i64>, ptr [[TMP7]], align 643780; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP2]], [[_MSLD]]3781; CHECK-NEXT: [[TMP8:%.*]] = add <8 x i64> [[A:%.*]], [[B]]3782; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 83783; CHECK-NEXT: ret <8 x i64> [[TMP8]]3784;3785 %b = load <8 x i64>, ptr %ptr_b3786 %res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)3787 ret < 8 x i64> %res3788}3789 3790define <8 x i64> @test_mask_add_epi64_rmk(<8 x i64> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask) #0 {3791;3792; CHECK-LABEL: @test_mask_add_epi64_rmk(3793; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83794; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 83795; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 83796; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 83797; CHECK-NEXT: call void @llvm.donothing()3798; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 03799; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]3800; CHECK: 5:3801; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]3802; CHECK-NEXT: unreachable3803; CHECK: 6:3804; CHECK-NEXT: [[B:%.*]] = load <8 x i64>, ptr [[PTR_B:%.*]], align 643805; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i643806; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220803807; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr3808; CHECK-NEXT: [[_MSLD:%.*]] = load <8 x i64>, ptr [[TMP9]], align 643809; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP2]], [[_MSLD]]3810; CHECK-NEXT: [[TMP10:%.*]] = add <8 x i64> [[A:%.*]], [[B]]3811; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>3812; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>3813; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP12]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]3814; CHECK-NEXT: [[TMP14:%.*]] = xor <8 x i64> [[TMP10]], [[PASSTHRU:%.*]]3815; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], [[_MSPROP]]3816; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP15]], [[TMP4]]3817; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP16]], <8 x i64> [[TMP13]]3818; CHECK-NEXT: [[TMP17:%.*]] = select <8 x i1> [[TMP12]], <8 x i64> [[TMP10]], <8 x i64> [[PASSTHRU]]3819; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 83820; CHECK-NEXT: ret <8 x i64> [[TMP17]]3821;3822 %b = load <8 x i64>, ptr %ptr_b3823 %res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)3824 ret < 8 x i64> %res3825}3826 3827define <8 x i64> @test_mask_add_epi64_rmkz(<8 x i64> %a, ptr %ptr_b, i8 %mask) #0 {3828;3829; CHECK-LABEL: @test_mask_add_epi64_rmkz(3830; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83831; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 83832; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 83833; CHECK-NEXT: call void @llvm.donothing()3834; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 03835; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]3836; CHECK: 4:3837; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]3838; CHECK-NEXT: unreachable3839; CHECK: 5:3840; CHECK-NEXT: [[B:%.*]] = load <8 x i64>, ptr [[PTR_B:%.*]], align 643841; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i643842; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220803843; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr3844; CHECK-NEXT: [[_MSLD:%.*]] = load <8 x i64>, ptr [[TMP8]], align 643845; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP2]], [[_MSLD]]3846; CHECK-NEXT: [[TMP9:%.*]] = add <8 x i64> [[A:%.*]], [[B]]3847; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>3848; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>3849; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer3850; CHECK-NEXT: [[TMP13:%.*]] = xor <8 x i64> [[TMP9]], zeroinitializer3851; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], [[_MSPROP]]3852; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], zeroinitializer3853; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP15]], <8 x i64> [[TMP12]]3854; CHECK-NEXT: [[TMP16:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP9]], <8 x i64> zeroinitializer3855; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 83856; CHECK-NEXT: ret <8 x i64> [[TMP16]]3857;3858 %b = load <8 x i64>, ptr %ptr_b3859 %res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 %mask)3860 ret < 8 x i64> %res3861}3862 3863define <8 x i64> @test_mask_add_epi64_rmb(<8 x i64> %a, ptr %ptr_b, <8 x i64> %extra_param, <8 x i64> %extra_param2) #0 {3864;3865; CHECK-LABEL: @test_mask_add_epi64_rmb(3866; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83867; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 83868; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 83869; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 83870; CHECK-NEXT: call void @llvm.donothing()3871; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 03872; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF1]]3873; CHECK: 5:3874; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]3875; CHECK-NEXT: unreachable3876; CHECK: 6:3877; CHECK-NEXT: [[Q:%.*]] = load i64, ptr [[PTR_B:%.*]], align 83878; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i643879; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220803880; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr3881; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP7]], align 83882; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i64> [[TMP3]], i64 [[_MSLD]], i32 03883; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i64> [[EXTRA_PARAM:%.*]], i64 [[Q]], i32 03884; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]], <8 x i32> zeroinitializer3885; CHECK-NEXT: [[B:%.*]] = shufflevector <8 x i64> [[VECINIT_I]], <8 x i64> [[EXTRA_PARAM2:%.*]], <8 x i32> zeroinitializer3886; CHECK-NEXT: [[_MSPROP2:%.*]] = or <8 x i64> [[TMP2]], [[_MSPROP1]]3887; CHECK-NEXT: [[TMP8:%.*]] = add <8 x i64> [[A:%.*]], [[B]]3888; CHECK-NEXT: store <8 x i64> [[_MSPROP2]], ptr @__msan_retval_tls, align 83889; CHECK-NEXT: ret <8 x i64> [[TMP8]]3890;3891 %q = load i64, ptr %ptr_b3892 %vecinit.i = insertelement <8 x i64> %extra_param, i64 %q, i32 03893 %b = shufflevector <8 x i64> %vecinit.i, <8 x i64> %extra_param2, <8 x i32> zeroinitializer3894 %res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)3895 ret < 8 x i64> %res3896}3897 3898define <8 x i64> @test_mask_add_epi64_rmbk(<8 x i64> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask, <8 x i64> %extra_param, <8 x i64> %extra_param2) #0 {3899;3900; CHECK-LABEL: @test_mask_add_epi64_rmbk(3901; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83902; CHECK-NEXT: [[TMP5:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 83903; CHECK-NEXT: [[TMP6:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 208), align 83904; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 83905; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 83906; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 83907; CHECK-NEXT: call void @llvm.donothing()3908; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 03909; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP18:%.*]], label [[TMP19:%.*]], !prof [[PROF1]]3910; CHECK: 7:3911; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]3912; CHECK-NEXT: unreachable3913; CHECK: 8:3914; CHECK-NEXT: [[Q:%.*]] = load i64, ptr [[PTR_B:%.*]], align 83915; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i643916; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220803917; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr3918; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP9]], align 83919; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i64> [[TMP5]], i64 [[_MSLD]], i32 03920; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i64> [[EXTRA_PARAM:%.*]], i64 [[Q]], i32 03921; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[_MSPROP]], <8 x i64> [[TMP6]], <8 x i32> zeroinitializer3922; CHECK-NEXT: [[B:%.*]] = shufflevector <8 x i64> [[VECINIT_I]], <8 x i64> [[EXTRA_PARAM2:%.*]], <8 x i32> zeroinitializer3923; CHECK-NEXT: [[_MSPROP2:%.*]] = or <8 x i64> [[TMP2]], [[_MSPROP1]]3924; CHECK-NEXT: [[TMP10:%.*]] = add <8 x i64> [[A:%.*]], [[B]]3925; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>3926; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>3927; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP12]], <8 x i64> [[_MSPROP2]], <8 x i64> [[TMP4]]3928; CHECK-NEXT: [[TMP14:%.*]] = xor <8 x i64> [[TMP10]], [[PASSTHRU:%.*]]3929; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], [[_MSPROP2]]3930; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP15]], [[TMP4]]3931; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP16]], <8 x i64> [[TMP13]]3932; CHECK-NEXT: [[TMP17:%.*]] = select <8 x i1> [[TMP12]], <8 x i64> [[TMP10]], <8 x i64> [[PASSTHRU]]3933; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 83934; CHECK-NEXT: ret <8 x i64> [[TMP17]]3935;3936 %q = load i64, ptr %ptr_b3937 %vecinit.i = insertelement <8 x i64> %extra_param, i64 %q, i32 03938 %b = shufflevector <8 x i64> %vecinit.i, <8 x i64> %extra_param2, <8 x i32> zeroinitializer3939 %res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)3940 ret < 8 x i64> %res3941}3942 3943define <8 x i64> @test_mask_add_epi64_rmbkz(<8 x i64> %a, ptr %ptr_b, i8 %mask, <8 x i64> %extra_param, <8 x i64> %extra_param2) #0 {3944;3945; CHECK-LABEL: @test_mask_add_epi64_rmbkz(3946; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83947; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 83948; CHECK-NEXT: [[TMP5:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 83949; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 83950; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 83951; CHECK-NEXT: call void @llvm.donothing()3952; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 03953; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP17:%.*]], label [[TMP18:%.*]], !prof [[PROF1]]3954; CHECK: 6:3955; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]3956; CHECK-NEXT: unreachable3957; CHECK: 7:3958; CHECK-NEXT: [[Q:%.*]] = load i64, ptr [[PTR_B:%.*]], align 83959; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i643960; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220803961; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr3962; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP8]], align 83963; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i64> [[TMP4]], i64 [[_MSLD]], i32 03964; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i64> [[EXTRA_PARAM:%.*]], i64 [[Q]], i32 03965; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[_MSPROP]], <8 x i64> [[TMP5]], <8 x i32> zeroinitializer3966; CHECK-NEXT: [[B:%.*]] = shufflevector <8 x i64> [[VECINIT_I]], <8 x i64> [[EXTRA_PARAM2:%.*]], <8 x i32> zeroinitializer3967; CHECK-NEXT: [[_MSPROP2:%.*]] = or <8 x i64> [[TMP2]], [[_MSPROP1]]3968; CHECK-NEXT: [[TMP9:%.*]] = add <8 x i64> [[A:%.*]], [[B]]3969; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>3970; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>3971; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[_MSPROP2]], <8 x i64> zeroinitializer3972; CHECK-NEXT: [[TMP13:%.*]] = xor <8 x i64> [[TMP9]], zeroinitializer3973; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], [[_MSPROP2]]3974; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], zeroinitializer3975; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP15]], <8 x i64> [[TMP12]]3976; CHECK-NEXT: [[TMP16:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP9]], <8 x i64> zeroinitializer3977; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 83978; CHECK-NEXT: ret <8 x i64> [[TMP16]]3979;3980 %q = load i64, ptr %ptr_b3981 %vecinit.i = insertelement <8 x i64> %extra_param, i64 %q, i32 03982 %b = shufflevector <8 x i64> %vecinit.i, <8 x i64> %extra_param2, <8 x i32> zeroinitializer3983 %res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 %mask)3984 ret < 8 x i64> %res3985}3986 3987declare <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)3988 3989define <8 x i64> @test_mask_sub_epi64_rr(<8 x i64> %a, <8 x i64> %b) #0 {3990; CHECK-LABEL: @test_mask_sub_epi64_rr(3991; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 83992; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83993; CHECK-NEXT: call void @llvm.donothing()3994; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]3995; CHECK-NEXT: [[TMP3:%.*]] = sub <8 x i64> [[A:%.*]], [[B:%.*]]3996; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 83997; CHECK-NEXT: ret <8 x i64> [[TMP3]]3998;3999 %res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)4000 ret < 8 x i64> %res4001}4002 4003define <8 x i64> @test_mask_sub_epi64_rrk(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask) #0 {4004;4005; CHECK-LABEL: @test_mask_sub_epi64_rrk(4006; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 84007; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84008; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 84009; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84010; CHECK-NEXT: call void @llvm.donothing()4011; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]4012; CHECK-NEXT: [[TMP5:%.*]] = sub <8 x i64> [[A:%.*]], [[B:%.*]]4013; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>4014; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>4015; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]4016; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP5]], [[PASSTHRU:%.*]]4017; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[_MSPROP]]4018; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP4]]4019; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP11]], <8 x i64> [[TMP8]]4020; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP5]], <8 x i64> [[PASSTHRU]]4021; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84022; CHECK-NEXT: ret <8 x i64> [[TMP12]]4023;4024 %res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)4025 ret < 8 x i64> %res4026}4027 4028define <8 x i64> @test_mask_sub_epi64_rrkz(<8 x i64> %a, <8 x i64> %b, i8 %mask) #0 {4029;4030; CHECK-LABEL: @test_mask_sub_epi64_rrkz(4031; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 84032; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84033; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84034; CHECK-NEXT: call void @llvm.donothing()4035; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]4036; CHECK-NEXT: [[TMP4:%.*]] = sub <8 x i64> [[A:%.*]], [[B:%.*]]4037; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>4038; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>4039; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer4040; CHECK-NEXT: [[TMP8:%.*]] = xor <8 x i64> [[TMP4]], zeroinitializer4041; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[_MSPROP]]4042; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], zeroinitializer4043; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP10]], <8 x i64> [[TMP7]]4044; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP4]], <8 x i64> zeroinitializer4045; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84046; CHECK-NEXT: ret <8 x i64> [[TMP11]]4047;4048 %res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 %mask)4049 ret < 8 x i64> %res4050}4051 4052define <8 x i64> @test_mask_sub_epi64_rm(<8 x i64> %a, ptr %ptr_b) #0 {4053;4054; CHECK-LABEL: @test_mask_sub_epi64_rm(4055; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84056; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 84057; CHECK-NEXT: call void @llvm.donothing()4058; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 04059; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]4060; CHECK: 3:4061; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]4062; CHECK-NEXT: unreachable4063; CHECK: 4:4064; CHECK-NEXT: [[B:%.*]] = load <8 x i64>, ptr [[PTR_B:%.*]], align 644065; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i644066; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220804067; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr4068; CHECK-NEXT: [[_MSLD:%.*]] = load <8 x i64>, ptr [[TMP7]], align 644069; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP2]], [[_MSLD]]4070; CHECK-NEXT: [[TMP8:%.*]] = sub <8 x i64> [[A:%.*]], [[B]]4071; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 84072; CHECK-NEXT: ret <8 x i64> [[TMP8]]4073;4074 %b = load <8 x i64>, ptr %ptr_b4075 %res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)4076 ret < 8 x i64> %res4077}4078 4079define <8 x i64> @test_mask_sub_epi64_rmk(<8 x i64> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask) #0 {4080;4081; CHECK-LABEL: @test_mask_sub_epi64_rmk(4082; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84083; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 84084; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 84085; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 84086; CHECK-NEXT: call void @llvm.donothing()4087; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 04088; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]4089; CHECK: 5:4090; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]4091; CHECK-NEXT: unreachable4092; CHECK: 6:4093; CHECK-NEXT: [[B:%.*]] = load <8 x i64>, ptr [[PTR_B:%.*]], align 644094; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i644095; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220804096; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr4097; CHECK-NEXT: [[_MSLD:%.*]] = load <8 x i64>, ptr [[TMP9]], align 644098; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP2]], [[_MSLD]]4099; CHECK-NEXT: [[TMP10:%.*]] = sub <8 x i64> [[A:%.*]], [[B]]4100; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>4101; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>4102; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP12]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]4103; CHECK-NEXT: [[TMP14:%.*]] = xor <8 x i64> [[TMP10]], [[PASSTHRU:%.*]]4104; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], [[_MSPROP]]4105; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP15]], [[TMP4]]4106; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP16]], <8 x i64> [[TMP13]]4107; CHECK-NEXT: [[TMP17:%.*]] = select <8 x i1> [[TMP12]], <8 x i64> [[TMP10]], <8 x i64> [[PASSTHRU]]4108; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84109; CHECK-NEXT: ret <8 x i64> [[TMP17]]4110;4111 %b = load <8 x i64>, ptr %ptr_b4112 %res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)4113 ret < 8 x i64> %res4114}4115 4116define <8 x i64> @test_mask_sub_epi64_rmkz(<8 x i64> %a, ptr %ptr_b, i8 %mask) #0 {4117;4118; CHECK-LABEL: @test_mask_sub_epi64_rmkz(4119; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84120; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 84121; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 84122; CHECK-NEXT: call void @llvm.donothing()4123; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 04124; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]4125; CHECK: 4:4126; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]4127; CHECK-NEXT: unreachable4128; CHECK: 5:4129; CHECK-NEXT: [[B:%.*]] = load <8 x i64>, ptr [[PTR_B:%.*]], align 644130; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i644131; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220804132; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr4133; CHECK-NEXT: [[_MSLD:%.*]] = load <8 x i64>, ptr [[TMP8]], align 644134; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP2]], [[_MSLD]]4135; CHECK-NEXT: [[TMP9:%.*]] = sub <8 x i64> [[A:%.*]], [[B]]4136; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>4137; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>4138; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer4139; CHECK-NEXT: [[TMP13:%.*]] = xor <8 x i64> [[TMP9]], zeroinitializer4140; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], [[_MSPROP]]4141; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], zeroinitializer4142; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP15]], <8 x i64> [[TMP12]]4143; CHECK-NEXT: [[TMP16:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP9]], <8 x i64> zeroinitializer4144; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84145; CHECK-NEXT: ret <8 x i64> [[TMP16]]4146;4147 %b = load <8 x i64>, ptr %ptr_b4148 %res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 %mask)4149 ret < 8 x i64> %res4150}4151 4152define <8 x i64> @test_mask_sub_epi64_rmb(<8 x i64> %a, ptr %ptr_b, <8 x i64> %extra_param, <8 x i64> %extra_param2) #0 {4153;4154; CHECK-LABEL: @test_mask_sub_epi64_rmb(4155; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84156; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 84157; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 84158; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 84159; CHECK-NEXT: call void @llvm.donothing()4160; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 04161; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF1]]4162; CHECK: 5:4163; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]4164; CHECK-NEXT: unreachable4165; CHECK: 6:4166; CHECK-NEXT: [[Q:%.*]] = load i64, ptr [[PTR_B:%.*]], align 84167; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i644168; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220804169; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr4170; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP7]], align 84171; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i64> [[TMP3]], i64 [[_MSLD]], i32 04172; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i64> [[EXTRA_PARAM:%.*]], i64 [[Q]], i32 04173; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]], <8 x i32> zeroinitializer4174; CHECK-NEXT: [[B:%.*]] = shufflevector <8 x i64> [[VECINIT_I]], <8 x i64> [[EXTRA_PARAM2:%.*]], <8 x i32> zeroinitializer4175; CHECK-NEXT: [[_MSPROP2:%.*]] = or <8 x i64> [[TMP2]], [[_MSPROP1]]4176; CHECK-NEXT: [[TMP8:%.*]] = sub <8 x i64> [[A:%.*]], [[B]]4177; CHECK-NEXT: store <8 x i64> [[_MSPROP2]], ptr @__msan_retval_tls, align 84178; CHECK-NEXT: ret <8 x i64> [[TMP8]]4179;4180 %q = load i64, ptr %ptr_b4181 %vecinit.i = insertelement <8 x i64> %extra_param, i64 %q, i32 04182 %b = shufflevector <8 x i64> %vecinit.i, <8 x i64> %extra_param2, <8 x i32> zeroinitializer4183 %res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)4184 ret < 8 x i64> %res4185}4186 4187define <8 x i64> @test_mask_sub_epi64_rmbk(<8 x i64> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask, <8 x i64> %extra_param, <8 x i64> %extra_param2) #0 {4188;4189; CHECK-LABEL: @test_mask_sub_epi64_rmbk(4190; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84191; CHECK-NEXT: [[TMP5:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 84192; CHECK-NEXT: [[TMP6:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 208), align 84193; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 84194; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 84195; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 84196; CHECK-NEXT: call void @llvm.donothing()4197; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 04198; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP18:%.*]], label [[TMP19:%.*]], !prof [[PROF1]]4199; CHECK: 7:4200; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]4201; CHECK-NEXT: unreachable4202; CHECK: 8:4203; CHECK-NEXT: [[Q:%.*]] = load i64, ptr [[PTR_B:%.*]], align 84204; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i644205; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220804206; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr4207; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP9]], align 84208; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i64> [[TMP5]], i64 [[_MSLD]], i32 04209; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i64> [[EXTRA_PARAM:%.*]], i64 [[Q]], i32 04210; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[_MSPROP]], <8 x i64> [[TMP6]], <8 x i32> zeroinitializer4211; CHECK-NEXT: [[B:%.*]] = shufflevector <8 x i64> [[VECINIT_I]], <8 x i64> [[EXTRA_PARAM2:%.*]], <8 x i32> zeroinitializer4212; CHECK-NEXT: [[_MSPROP2:%.*]] = or <8 x i64> [[TMP2]], [[_MSPROP1]]4213; CHECK-NEXT: [[TMP10:%.*]] = sub <8 x i64> [[A:%.*]], [[B]]4214; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>4215; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>4216; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP12]], <8 x i64> [[_MSPROP2]], <8 x i64> [[TMP4]]4217; CHECK-NEXT: [[TMP14:%.*]] = xor <8 x i64> [[TMP10]], [[PASSTHRU:%.*]]4218; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], [[_MSPROP2]]4219; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP15]], [[TMP4]]4220; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP16]], <8 x i64> [[TMP13]]4221; CHECK-NEXT: [[TMP17:%.*]] = select <8 x i1> [[TMP12]], <8 x i64> [[TMP10]], <8 x i64> [[PASSTHRU]]4222; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84223; CHECK-NEXT: ret <8 x i64> [[TMP17]]4224;4225 %q = load i64, ptr %ptr_b4226 %vecinit.i = insertelement <8 x i64> %extra_param, i64 %q, i32 04227 %b = shufflevector <8 x i64> %vecinit.i, <8 x i64> %extra_param2, <8 x i32> zeroinitializer4228 %res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)4229 ret < 8 x i64> %res4230}4231 4232define <8 x i64> @test_mask_sub_epi64_rmbkz(<8 x i64> %a, ptr %ptr_b, i8 %mask, <8 x i64> %extra_param, <8 x i64> %extra_param2) #0 {4233;4234; CHECK-LABEL: @test_mask_sub_epi64_rmbkz(4235; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84236; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 84237; CHECK-NEXT: [[TMP5:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 84238; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 84239; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 84240; CHECK-NEXT: call void @llvm.donothing()4241; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 04242; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP17:%.*]], label [[TMP18:%.*]], !prof [[PROF1]]4243; CHECK: 6:4244; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]4245; CHECK-NEXT: unreachable4246; CHECK: 7:4247; CHECK-NEXT: [[Q:%.*]] = load i64, ptr [[PTR_B:%.*]], align 84248; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i644249; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220804250; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr4251; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP8]], align 84252; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i64> [[TMP4]], i64 [[_MSLD]], i32 04253; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i64> [[EXTRA_PARAM:%.*]], i64 [[Q]], i32 04254; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[_MSPROP]], <8 x i64> [[TMP5]], <8 x i32> zeroinitializer4255; CHECK-NEXT: [[B:%.*]] = shufflevector <8 x i64> [[VECINIT_I]], <8 x i64> [[EXTRA_PARAM2:%.*]], <8 x i32> zeroinitializer4256; CHECK-NEXT: [[_MSPROP2:%.*]] = or <8 x i64> [[TMP2]], [[_MSPROP1]]4257; CHECK-NEXT: [[TMP9:%.*]] = sub <8 x i64> [[A:%.*]], [[B]]4258; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>4259; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>4260; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[_MSPROP2]], <8 x i64> zeroinitializer4261; CHECK-NEXT: [[TMP13:%.*]] = xor <8 x i64> [[TMP9]], zeroinitializer4262; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], [[_MSPROP2]]4263; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], zeroinitializer4264; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP15]], <8 x i64> [[TMP12]]4265; CHECK-NEXT: [[TMP16:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP9]], <8 x i64> zeroinitializer4266; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84267; CHECK-NEXT: ret <8 x i64> [[TMP16]]4268;4269 %q = load i64, ptr %ptr_b4270 %vecinit.i = insertelement <8 x i64> %extra_param, i64 %q, i32 04271 %b = shufflevector <8 x i64> %vecinit.i, <8 x i64> %extra_param2, <8 x i32> zeroinitializer4272 %res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 %mask)4273 ret < 8 x i64> %res4274}4275 4276declare <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)4277 4278define <16 x i32> @test_mask_mullo_epi32_rr_512(<16 x i32> %a, <16 x i32> %b) #0 {4279; CHECK-LABEL: @test_mask_mullo_epi32_rr_512(4280; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 84281; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84282; CHECK-NEXT: call void @llvm.donothing()4283; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]4284; CHECK-NEXT: [[TMP3:%.*]] = mul <16 x i32> [[A:%.*]], [[B:%.*]]4285; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 84286; CHECK-NEXT: ret <16 x i32> [[TMP3]]4287;4288 %res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)4289 ret <16 x i32> %res4290}4291 4292define <16 x i32> @test_mask_mullo_epi32_rrk_512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask) #0 {4293;4294; CHECK-LABEL: @test_mask_mullo_epi32_rrk_512(4295; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 84296; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84297; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 84298; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84299; CHECK-NEXT: call void @llvm.donothing()4300; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]4301; CHECK-NEXT: [[TMP5:%.*]] = mul <16 x i32> [[A:%.*]], [[B:%.*]]4302; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>4303; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>4304; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP4]]4305; CHECK-NEXT: [[TMP9:%.*]] = xor <16 x i32> [[TMP5]], [[PASSTHRU:%.*]]4306; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[_MSPROP]]4307; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP4]]4308; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP11]], <16 x i32> [[TMP8]]4309; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP5]], <16 x i32> [[PASSTHRU]]4310; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84311; CHECK-NEXT: ret <16 x i32> [[TMP12]]4312;4313 %res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)4314 ret < 16 x i32> %res4315}4316 4317define <16 x i32> @test_mask_mullo_epi32_rrkz_512(<16 x i32> %a, <16 x i32> %b, i16 %mask) #0 {4318;4319; CHECK-LABEL: @test_mask_mullo_epi32_rrkz_512(4320; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 84321; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84322; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84323; CHECK-NEXT: call void @llvm.donothing()4324; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]4325; CHECK-NEXT: [[TMP4:%.*]] = mul <16 x i32> [[A:%.*]], [[B:%.*]]4326; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>4327; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>4328; CHECK-NEXT: [[TMP7:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[_MSPROP]], <16 x i32> zeroinitializer4329; CHECK-NEXT: [[TMP8:%.*]] = xor <16 x i32> [[TMP4]], zeroinitializer4330; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], [[_MSPROP]]4331; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], zeroinitializer4332; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[TMP10]], <16 x i32> [[TMP7]]4333; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP4]], <16 x i32> zeroinitializer4334; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84335; CHECK-NEXT: ret <16 x i32> [[TMP11]]4336;4337 %res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)4338 ret < 16 x i32> %res4339}4340 4341define <16 x i32> @test_mask_mullo_epi32_rm_512(<16 x i32> %a, ptr %ptr_b) #0 {4342;4343; CHECK-LABEL: @test_mask_mullo_epi32_rm_512(4344; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84345; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 84346; CHECK-NEXT: call void @llvm.donothing()4347; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 04348; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]4349; CHECK: 3:4350; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]4351; CHECK-NEXT: unreachable4352; CHECK: 4:4353; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 644354; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i644355; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220804356; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr4357; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP7]], align 644358; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP2]], [[_MSLD]]4359; CHECK-NEXT: [[TMP8:%.*]] = mul <16 x i32> [[A:%.*]], [[B]]4360; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 84361; CHECK-NEXT: ret <16 x i32> [[TMP8]]4362;4363 %b = load <16 x i32>, ptr %ptr_b4364 %res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)4365 ret < 16 x i32> %res4366}4367 4368define <16 x i32> @test_mask_mullo_epi32_rmk_512(<16 x i32> %a, ptr %ptr_b, <16 x i32> %passThru, i16 %mask) #0 {4369;4370; CHECK-LABEL: @test_mask_mullo_epi32_rmk_512(4371; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84372; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 84373; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 84374; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 84375; CHECK-NEXT: call void @llvm.donothing()4376; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 04377; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]4378; CHECK: 5:4379; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]4380; CHECK-NEXT: unreachable4381; CHECK: 6:4382; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 644383; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i644384; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220804385; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr4386; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP9]], align 644387; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP2]], [[_MSLD]]4388; CHECK-NEXT: [[TMP10:%.*]] = mul <16 x i32> [[A:%.*]], [[B]]4389; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>4390; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>4391; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP4]]4392; CHECK-NEXT: [[TMP14:%.*]] = xor <16 x i32> [[TMP10]], [[PASSTHRU:%.*]]4393; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], [[_MSPROP]]4394; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i32> [[TMP15]], [[TMP4]]4395; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP16]], <16 x i32> [[TMP13]]4396; CHECK-NEXT: [[TMP17:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[TMP10]], <16 x i32> [[PASSTHRU]]4397; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84398; CHECK-NEXT: ret <16 x i32> [[TMP17]]4399;4400 %b = load <16 x i32>, ptr %ptr_b4401 %res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)4402 ret < 16 x i32> %res4403}4404 4405define <16 x i32> @test_mask_mullo_epi32_rmkz_512(<16 x i32> %a, ptr %ptr_b, i16 %mask) #0 {4406;4407; CHECK-LABEL: @test_mask_mullo_epi32_rmkz_512(4408; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84409; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 84410; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 84411; CHECK-NEXT: call void @llvm.donothing()4412; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 04413; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]4414; CHECK: 4:4415; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]4416; CHECK-NEXT: unreachable4417; CHECK: 5:4418; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 644419; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i644420; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220804421; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr4422; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP8]], align 644423; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP2]], [[_MSLD]]4424; CHECK-NEXT: [[TMP9:%.*]] = mul <16 x i32> [[A:%.*]], [[B]]4425; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>4426; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>4427; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[_MSPROP]], <16 x i32> zeroinitializer4428; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i32> [[TMP9]], zeroinitializer4429; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], [[_MSPROP]]4430; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], zeroinitializer4431; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP15]], <16 x i32> [[TMP12]]4432; CHECK-NEXT: [[TMP16:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP9]], <16 x i32> zeroinitializer4433; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84434; CHECK-NEXT: ret <16 x i32> [[TMP16]]4435;4436 %b = load <16 x i32>, ptr %ptr_b4437 %res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)4438 ret < 16 x i32> %res4439}4440 4441define <16 x i32> @test_mask_mullo_epi32_rmb_512(<16 x i32> %a, ptr %ptr_b, <16 x i32> %extra_param, <16 x i32> %extra_param2) #0 {4442;4443; CHECK-LABEL: @test_mask_mullo_epi32_rmb_512(4444; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84445; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 84446; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 84447; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 84448; CHECK-NEXT: call void @llvm.donothing()4449; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 04450; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF1]]4451; CHECK: 5:4452; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]4453; CHECK-NEXT: unreachable4454; CHECK: 6:4455; CHECK-NEXT: [[Q:%.*]] = load i32, ptr [[PTR_B:%.*]], align 44456; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i644457; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220804458; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr4459; CHECK-NEXT: [[_MSLD:%.*]] = load i32, ptr [[TMP7]], align 44460; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <16 x i32> [[TMP3]], i32 [[_MSLD]], i32 04461; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i32> [[EXTRA_PARAM:%.*]], i32 [[Q]], i32 04462; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <16 x i32> [[_MSPROP]], <16 x i32> [[TMP4]], <16 x i32> zeroinitializer4463; CHECK-NEXT: [[B:%.*]] = shufflevector <16 x i32> [[VECINIT_I]], <16 x i32> [[EXTRA_PARAM2:%.*]], <16 x i32> zeroinitializer4464; CHECK-NEXT: [[_MSPROP2:%.*]] = or <16 x i32> [[TMP2]], [[_MSPROP1]]4465; CHECK-NEXT: [[TMP8:%.*]] = mul <16 x i32> [[A:%.*]], [[B]]4466; CHECK-NEXT: store <16 x i32> [[_MSPROP2]], ptr @__msan_retval_tls, align 84467; CHECK-NEXT: ret <16 x i32> [[TMP8]]4468;4469 %q = load i32, ptr %ptr_b4470 %vecinit.i = insertelement <16 x i32> %extra_param, i32 %q, i32 04471 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> %extra_param2, <16 x i32> zeroinitializer4472 %res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)4473 ret < 16 x i32> %res4474}4475 4476define <16 x i32> @test_mask_mullo_epi32_rmbk_512(<16 x i32> %a, ptr %ptr_b, <16 x i32> %passThru, i16 %mask, <16 x i32> %extra_param, <16 x i32> %extra_param2) #0 {4477;4478; CHECK-LABEL: @test_mask_mullo_epi32_rmbk_512(4479; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84480; CHECK-NEXT: [[TMP5:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 84481; CHECK-NEXT: [[TMP6:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 208), align 84482; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 84483; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 84484; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 84485; CHECK-NEXT: call void @llvm.donothing()4486; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 04487; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP18:%.*]], label [[TMP19:%.*]], !prof [[PROF1]]4488; CHECK: 7:4489; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]4490; CHECK-NEXT: unreachable4491; CHECK: 8:4492; CHECK-NEXT: [[Q:%.*]] = load i32, ptr [[PTR_B:%.*]], align 44493; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i644494; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220804495; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr4496; CHECK-NEXT: [[_MSLD:%.*]] = load i32, ptr [[TMP9]], align 44497; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <16 x i32> [[TMP5]], i32 [[_MSLD]], i32 04498; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i32> [[EXTRA_PARAM:%.*]], i32 [[Q]], i32 04499; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <16 x i32> [[_MSPROP]], <16 x i32> [[TMP6]], <16 x i32> zeroinitializer4500; CHECK-NEXT: [[B:%.*]] = shufflevector <16 x i32> [[VECINIT_I]], <16 x i32> [[EXTRA_PARAM2:%.*]], <16 x i32> zeroinitializer4501; CHECK-NEXT: [[_MSPROP2:%.*]] = or <16 x i32> [[TMP2]], [[_MSPROP1]]4502; CHECK-NEXT: [[TMP10:%.*]] = mul <16 x i32> [[A:%.*]], [[B]]4503; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>4504; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>4505; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[_MSPROP2]], <16 x i32> [[TMP4]]4506; CHECK-NEXT: [[TMP14:%.*]] = xor <16 x i32> [[TMP10]], [[PASSTHRU:%.*]]4507; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], [[_MSPROP2]]4508; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i32> [[TMP15]], [[TMP4]]4509; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP16]], <16 x i32> [[TMP13]]4510; CHECK-NEXT: [[TMP17:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[TMP10]], <16 x i32> [[PASSTHRU]]4511; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84512; CHECK-NEXT: ret <16 x i32> [[TMP17]]4513;4514 %q = load i32, ptr %ptr_b4515 %vecinit.i = insertelement <16 x i32> %extra_param, i32 %q, i32 04516 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> %extra_param2, <16 x i32> zeroinitializer4517 %res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)4518 ret < 16 x i32> %res4519}4520 4521define <16 x i32> @test_mask_mullo_epi32_rmbkz_512(<16 x i32> %a, ptr %ptr_b, i16 %mask, <16 x i32> %extra_param, <16 x i32> %extra_param2) #0 {4522;4523; CHECK-LABEL: @test_mask_mullo_epi32_rmbkz_512(4524; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84525; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 84526; CHECK-NEXT: [[TMP5:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 84527; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 84528; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 84529; CHECK-NEXT: call void @llvm.donothing()4530; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 04531; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP17:%.*]], label [[TMP18:%.*]], !prof [[PROF1]]4532; CHECK: 6:4533; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]4534; CHECK-NEXT: unreachable4535; CHECK: 7:4536; CHECK-NEXT: [[Q:%.*]] = load i32, ptr [[PTR_B:%.*]], align 44537; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i644538; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220804539; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr4540; CHECK-NEXT: [[_MSLD:%.*]] = load i32, ptr [[TMP8]], align 44541; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <16 x i32> [[TMP4]], i32 [[_MSLD]], i32 04542; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i32> [[EXTRA_PARAM:%.*]], i32 [[Q]], i32 04543; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <16 x i32> [[_MSPROP]], <16 x i32> [[TMP5]], <16 x i32> zeroinitializer4544; CHECK-NEXT: [[B:%.*]] = shufflevector <16 x i32> [[VECINIT_I]], <16 x i32> [[EXTRA_PARAM2:%.*]], <16 x i32> zeroinitializer4545; CHECK-NEXT: [[_MSPROP2:%.*]] = or <16 x i32> [[TMP2]], [[_MSPROP1]]4546; CHECK-NEXT: [[TMP9:%.*]] = mul <16 x i32> [[A:%.*]], [[B]]4547; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>4548; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>4549; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[_MSPROP2]], <16 x i32> zeroinitializer4550; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i32> [[TMP9]], zeroinitializer4551; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], [[_MSPROP2]]4552; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], zeroinitializer4553; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP15]], <16 x i32> [[TMP12]]4554; CHECK-NEXT: [[TMP16:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP9]], <16 x i32> zeroinitializer4555; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84556; CHECK-NEXT: ret <16 x i32> [[TMP16]]4557;4558 %q = load i32, ptr %ptr_b4559 %vecinit.i = insertelement <16 x i32> %extra_param, i32 %q, i32 04560 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> %extra_param2, <16 x i32> zeroinitializer4561 %res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)4562 ret < 16 x i32> %res4563}4564 4565declare <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)4566 4567 4568declare <16 x float> @llvm.x86.avx512.mask.shuf.f32x4(<16 x float>, <16 x float>, i32, <16 x float>, i16)4569 4570define <16 x float>@test_int_x86_avx512_shuf_f32x4(<16 x float> %x0, <16 x float> %x1, <16 x float> %x3) #0 {4571; CHECK-LABEL: @test_int_x86_avx512_shuf_f32x4(4572; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 84573; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84574; CHECK-NEXT: call void @llvm.donothing()4575; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP2]], <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23, i32 16, i32 17, i32 18, i32 19>4576; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <16 x float> [[X0:%.*]], <16 x float> [[X1:%.*]], <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23, i32 16, i32 17, i32 18, i32 19>4577; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 84578; CHECK-NEXT: ret <16 x float> [[TMP3]]4579;4580 %res = call <16 x float> @llvm.x86.avx512.mask.shuf.f32x4(<16 x float> %x0, <16 x float> %x1, i32 22, <16 x float> %x3, i16 -1)4581 ret <16 x float> %res4582}4583 4584define <16 x float>@test_int_x86_avx512_mask_shuf_f32x4(<16 x float> %x0, <16 x float> %x1, <16 x float> %x3, i16 %x4) #0 {4585;4586; CHECK-LABEL: @test_int_x86_avx512_mask_shuf_f32x4(4587; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 84588; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84589; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 84590; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84591; CHECK-NEXT: call void @llvm.donothing()4592; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP2]], <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23, i32 16, i32 17, i32 18, i32 19>4593; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <16 x float> [[X0:%.*]], <16 x float> [[X1:%.*]], <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23, i32 16, i32 17, i32 18, i32 19>4594; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>4595; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[X4:%.*]] to <16 x i1>4596; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP4]]4597; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x float> [[TMP5]] to <16 x i32>4598; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x float> [[X3:%.*]] to <16 x i32>4599; CHECK-NEXT: [[TMP11:%.*]] = xor <16 x i32> [[TMP9]], [[TMP10]]4600; CHECK-NEXT: [[TMP12:%.*]] = or <16 x i32> [[TMP11]], [[_MSPROP]]4601; CHECK-NEXT: [[TMP13:%.*]] = or <16 x i32> [[TMP12]], [[TMP4]]4602; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP13]], <16 x i32> [[TMP8]]4603; CHECK-NEXT: [[TMP14:%.*]] = select <16 x i1> [[TMP7]], <16 x float> [[TMP5]], <16 x float> [[X3]]4604; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84605; CHECK-NEXT: ret <16 x float> [[TMP14]]4606;4607 %res = call <16 x float> @llvm.x86.avx512.mask.shuf.f32x4(<16 x float> %x0, <16 x float> %x1, i32 22, <16 x float> %x3, i16 %x4)4608 ret <16 x float> %res4609}4610 4611declare <8 x double> @llvm.x86.avx512.mask.shuf.f64x2(<8 x double>, <8 x double>, i32, <8 x double>, i8)4612 4613define <8 x double>@test_int_x86_avx512_shuf_f64x2(<8 x double> %x0, <8 x double> %x1, <8 x double> %x3) #0 {4614; CHECK-LABEL: @test_int_x86_avx512_shuf_f64x2(4615; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 84616; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84617; CHECK-NEXT: call void @llvm.donothing()4618; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP2]], <8 x i32> <i32 4, i32 5, i32 2, i32 3, i32 10, i32 11, i32 8, i32 9>4619; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x double> [[X0:%.*]], <8 x double> [[X1:%.*]], <8 x i32> <i32 4, i32 5, i32 2, i32 3, i32 10, i32 11, i32 8, i32 9>4620; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 84621; CHECK-NEXT: ret <8 x double> [[TMP3]]4622;4623 %res = call <8 x double> @llvm.x86.avx512.mask.shuf.f64x2(<8 x double> %x0, <8 x double> %x1, i32 22, <8 x double> %x3, i8 -1)4624 ret <8 x double> %res4625}4626 4627define <8 x double>@test_int_x86_avx512_mask_shuf_f64x2(<8 x double> %x0, <8 x double> %x1, <8 x double> %x3, i8 %x4) #0 {4628;4629; CHECK-LABEL: @test_int_x86_avx512_mask_shuf_f64x2(4630; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 84631; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84632; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 84633; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84634; CHECK-NEXT: call void @llvm.donothing()4635; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP2]], <8 x i32> <i32 4, i32 5, i32 2, i32 3, i32 10, i32 11, i32 8, i32 9>4636; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <8 x double> [[X0:%.*]], <8 x double> [[X1:%.*]], <8 x i32> <i32 4, i32 5, i32 2, i32 3, i32 10, i32 11, i32 8, i32 9>4637; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>4638; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[X4:%.*]] to <8 x i1>4639; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]4640; CHECK-NEXT: [[TMP9:%.*]] = bitcast <8 x double> [[TMP5]] to <8 x i64>4641; CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x double> [[X3:%.*]] to <8 x i64>4642; CHECK-NEXT: [[TMP11:%.*]] = xor <8 x i64> [[TMP9]], [[TMP10]]4643; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], [[_MSPROP]]4644; CHECK-NEXT: [[TMP13:%.*]] = or <8 x i64> [[TMP12]], [[TMP4]]4645; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP13]], <8 x i64> [[TMP8]]4646; CHECK-NEXT: [[TMP14:%.*]] = select <8 x i1> [[TMP7]], <8 x double> [[TMP5]], <8 x double> [[X3]]4647; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84648; CHECK-NEXT: ret <8 x double> [[TMP14]]4649;4650 %res = call <8 x double> @llvm.x86.avx512.mask.shuf.f64x2(<8 x double> %x0, <8 x double> %x1, i32 22, <8 x double> %x3, i8 %x4)4651 ret <8 x double> %res4652}4653 4654define <8 x double>@test_int_x86_avx512_maskz_shuf_f64x2(<8 x double> %x0, <8 x double> %x1, i8 %x4) #0 {4655;4656; CHECK-LABEL: @test_int_x86_avx512_maskz_shuf_f64x2(4657; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 84658; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84659; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84660; CHECK-NEXT: call void @llvm.donothing()4661; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP2]], <8 x i32> <i32 4, i32 5, i32 2, i32 3, i32 10, i32 11, i32 8, i32 9>4662; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <8 x double> [[X0:%.*]], <8 x double> [[X1:%.*]], <8 x i32> <i32 4, i32 5, i32 2, i32 3, i32 10, i32 11, i32 8, i32 9>4663; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>4664; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[X4:%.*]] to <8 x i1>4665; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer4666; CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x double> [[TMP4]] to <8 x i64>4667; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP8]], zeroinitializer4668; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[_MSPROP]]4669; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], zeroinitializer4670; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP11]], <8 x i64> [[TMP7]]4671; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP6]], <8 x double> [[TMP4]], <8 x double> zeroinitializer4672; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84673; CHECK-NEXT: ret <8 x double> [[TMP12]]4674;4675 %res = call <8 x double> @llvm.x86.avx512.mask.shuf.f64x2(<8 x double> %x0, <8 x double> %x1, i32 22, <8 x double> zeroinitializer, i8 %x4)4676 ret <8 x double> %res4677}4678 4679declare <16 x i32> @llvm.x86.avx512.mask.shuf.i32x4(<16 x i32>, <16 x i32>, i32, <16 x i32>, i16)4680 4681define <16 x i32>@test_int_x86_avx512_shuf_i32x4(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x3) #0 {4682; CHECK-LABEL: @test_int_x86_avx512_shuf_i32x4(4683; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 84684; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84685; CHECK-NEXT: call void @llvm.donothing()4686; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP2]], <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23, i32 16, i32 17, i32 18, i32 19>4687; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <16 x i32> [[X0:%.*]], <16 x i32> [[X1:%.*]], <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23, i32 16, i32 17, i32 18, i32 19>4688; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 84689; CHECK-NEXT: ret <16 x i32> [[TMP3]]4690;4691 %res = call <16 x i32> @llvm.x86.avx512.mask.shuf.i32x4(<16 x i32> %x0, <16 x i32> %x1, i32 22, <16 x i32> %x3, i16 -1)4692 ret <16 x i32> %res4693}4694 4695define <16 x i32>@test_int_x86_avx512_mask_shuf_i32x4(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x3, i16 %x4) #0 {4696;4697; CHECK-LABEL: @test_int_x86_avx512_mask_shuf_i32x4(4698; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 84699; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84700; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 84701; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84702; CHECK-NEXT: call void @llvm.donothing()4703; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP2]], <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23, i32 16, i32 17, i32 18, i32 19>4704; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <16 x i32> [[X0:%.*]], <16 x i32> [[X1:%.*]], <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23, i32 16, i32 17, i32 18, i32 19>4705; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>4706; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[X4:%.*]] to <16 x i1>4707; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP4]]4708; CHECK-NEXT: [[TMP9:%.*]] = xor <16 x i32> [[TMP5]], [[X3:%.*]]4709; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[_MSPROP]]4710; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP4]]4711; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP11]], <16 x i32> [[TMP8]]4712; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP5]], <16 x i32> [[X3]]4713; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84714; CHECK-NEXT: ret <16 x i32> [[TMP12]]4715;4716 %res = call <16 x i32> @llvm.x86.avx512.mask.shuf.i32x4(<16 x i32> %x0, <16 x i32> %x1, i32 22, <16 x i32> %x3, i16 %x4)4717 ret <16 x i32> %res4718}4719 4720declare <8 x i64> @llvm.x86.avx512.mask.shuf.i64x2(<8 x i64>, <8 x i64>, i32, <8 x i64>, i8)4721 4722define <8 x i64>@test_int_x86_avx512_shuf_i64x2(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x3) #0 {4723; CHECK-LABEL: @test_int_x86_avx512_shuf_i64x2(4724; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 84725; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84726; CHECK-NEXT: call void @llvm.donothing()4727; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP2]], <8 x i32> <i32 4, i32 5, i32 2, i32 3, i32 10, i32 11, i32 8, i32 9>4728; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x i64> [[X0:%.*]], <8 x i64> [[X1:%.*]], <8 x i32> <i32 4, i32 5, i32 2, i32 3, i32 10, i32 11, i32 8, i32 9>4729; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 84730; CHECK-NEXT: ret <8 x i64> [[TMP3]]4731;4732 %res = call <8 x i64> @llvm.x86.avx512.mask.shuf.i64x2(<8 x i64> %x0, <8 x i64> %x1, i32 22, <8 x i64> %x3, i8 -1)4733 ret <8 x i64> %res4734}4735 4736define <8 x i64>@test_int_x86_avx512_mask_shuf_i64x2(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x3, i8 %x4) #0 {4737;4738; CHECK-LABEL: @test_int_x86_avx512_mask_shuf_i64x2(4739; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 84740; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84741; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 84742; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84743; CHECK-NEXT: call void @llvm.donothing()4744; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP2]], <8 x i32> <i32 4, i32 5, i32 2, i32 3, i32 10, i32 11, i32 8, i32 9>4745; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <8 x i64> [[X0:%.*]], <8 x i64> [[X1:%.*]], <8 x i32> <i32 4, i32 5, i32 2, i32 3, i32 10, i32 11, i32 8, i32 9>4746; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>4747; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[X4:%.*]] to <8 x i1>4748; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]4749; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP5]], [[X3:%.*]]4750; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[_MSPROP]]4751; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP4]]4752; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP11]], <8 x i64> [[TMP8]]4753; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP5]], <8 x i64> [[X3]]4754; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84755; CHECK-NEXT: ret <8 x i64> [[TMP12]]4756;4757 %res = call <8 x i64> @llvm.x86.avx512.mask.shuf.i64x2(<8 x i64> %x0, <8 x i64> %x1, i32 22, <8 x i64> %x3, i8 %x4)4758 ret <8 x i64> %res4759}4760 4761declare <8 x double> @llvm.x86.avx512.mask.shuf.pd.512(<8 x double>, <8 x double>, i32, <8 x double>, i8)4762 4763define <8 x double>@test_int_x86_avx512_shuf_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x3) #0 {4764; CHECK-LABEL: @test_int_x86_avx512_shuf_pd_512(4765; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 84766; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84767; CHECK-NEXT: call void @llvm.donothing()4768; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP2]], <8 x i32> <i32 0, i32 9, i32 3, i32 10, i32 5, i32 12, i32 6, i32 14>4769; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x double> [[X0:%.*]], <8 x double> [[X1:%.*]], <8 x i32> <i32 0, i32 9, i32 3, i32 10, i32 5, i32 12, i32 6, i32 14>4770; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 84771; CHECK-NEXT: ret <8 x double> [[TMP3]]4772;4773 %res = call <8 x double> @llvm.x86.avx512.mask.shuf.pd.512(<8 x double> %x0, <8 x double> %x1, i32 22, <8 x double> %x3, i8 -1)4774 ret <8 x double> %res4775}4776 4777define <8 x double>@test_int_x86_avx512_mask_shuf_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x3, i8 %x4) #0 {4778;4779; CHECK-LABEL: @test_int_x86_avx512_mask_shuf_pd_512(4780; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 84781; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84782; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 84783; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84784; CHECK-NEXT: call void @llvm.donothing()4785; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP2]], <8 x i32> <i32 0, i32 9, i32 3, i32 10, i32 5, i32 12, i32 6, i32 14>4786; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <8 x double> [[X0:%.*]], <8 x double> [[X1:%.*]], <8 x i32> <i32 0, i32 9, i32 3, i32 10, i32 5, i32 12, i32 6, i32 14>4787; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>4788; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[X4:%.*]] to <8 x i1>4789; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]4790; CHECK-NEXT: [[TMP9:%.*]] = bitcast <8 x double> [[TMP5]] to <8 x i64>4791; CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x double> [[X3:%.*]] to <8 x i64>4792; CHECK-NEXT: [[TMP11:%.*]] = xor <8 x i64> [[TMP9]], [[TMP10]]4793; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], [[_MSPROP]]4794; CHECK-NEXT: [[TMP13:%.*]] = or <8 x i64> [[TMP12]], [[TMP4]]4795; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP13]], <8 x i64> [[TMP8]]4796; CHECK-NEXT: [[TMP14:%.*]] = select <8 x i1> [[TMP7]], <8 x double> [[TMP5]], <8 x double> [[X3]]4797; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84798; CHECK-NEXT: ret <8 x double> [[TMP14]]4799;4800 %res = call <8 x double> @llvm.x86.avx512.mask.shuf.pd.512(<8 x double> %x0, <8 x double> %x1, i32 22, <8 x double> %x3, i8 %x4)4801 ret <8 x double> %res4802}4803 4804define <8 x double>@test_int_x86_avx512_maskz_shuf_pd_512(<8 x double> %x0, <8 x double> %x1, i8 %x4) #0 {4805;4806; CHECK-LABEL: @test_int_x86_avx512_maskz_shuf_pd_512(4807; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 84808; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84809; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84810; CHECK-NEXT: call void @llvm.donothing()4811; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP2]], <8 x i32> <i32 0, i32 9, i32 3, i32 10, i32 5, i32 12, i32 6, i32 14>4812; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <8 x double> [[X0:%.*]], <8 x double> [[X1:%.*]], <8 x i32> <i32 0, i32 9, i32 3, i32 10, i32 5, i32 12, i32 6, i32 14>4813; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>4814; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[X4:%.*]] to <8 x i1>4815; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer4816; CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x double> [[TMP4]] to <8 x i64>4817; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP8]], zeroinitializer4818; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[_MSPROP]]4819; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], zeroinitializer4820; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP11]], <8 x i64> [[TMP7]]4821; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP6]], <8 x double> [[TMP4]], <8 x double> zeroinitializer4822; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84823; CHECK-NEXT: ret <8 x double> [[TMP12]]4824;4825 %res = call <8 x double> @llvm.x86.avx512.mask.shuf.pd.512(<8 x double> %x0, <8 x double> %x1, i32 22, <8 x double> zeroinitializer, i8 %x4)4826 ret <8 x double> %res4827}4828 4829declare <16 x float> @llvm.x86.avx512.mask.shuf.ps.512(<16 x float>, <16 x float>, i32, <16 x float>, i16)4830 4831define <16 x float>@test_int_x86_avx512_shuf_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x3) #0 {4832; CHECK-LABEL: @test_int_x86_avx512_shuf_ps_512(4833; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 84834; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84835; CHECK-NEXT: call void @llvm.donothing()4836; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP2]], <16 x i32> <i32 2, i32 1, i32 17, i32 16, i32 6, i32 5, i32 21, i32 20, i32 10, i32 9, i32 25, i32 24, i32 14, i32 13, i32 29, i32 28>4837; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <16 x float> [[X0:%.*]], <16 x float> [[X1:%.*]], <16 x i32> <i32 2, i32 1, i32 17, i32 16, i32 6, i32 5, i32 21, i32 20, i32 10, i32 9, i32 25, i32 24, i32 14, i32 13, i32 29, i32 28>4838; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 84839; CHECK-NEXT: ret <16 x float> [[TMP3]]4840;4841 %res = call <16 x float> @llvm.x86.avx512.mask.shuf.ps.512(<16 x float> %x0, <16 x float> %x1, i32 22, <16 x float> %x3, i16 -1)4842 ret <16 x float> %res4843}4844 4845define <16 x float>@test_int_x86_avx512_mask_shuf_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x3, i16 %x4) #0 {4846;4847; CHECK-LABEL: @test_int_x86_avx512_mask_shuf_ps_512(4848; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 84849; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84850; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 84851; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84852; CHECK-NEXT: call void @llvm.donothing()4853; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP2]], <16 x i32> <i32 2, i32 1, i32 17, i32 16, i32 6, i32 5, i32 21, i32 20, i32 10, i32 9, i32 25, i32 24, i32 14, i32 13, i32 29, i32 28>4854; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <16 x float> [[X0:%.*]], <16 x float> [[X1:%.*]], <16 x i32> <i32 2, i32 1, i32 17, i32 16, i32 6, i32 5, i32 21, i32 20, i32 10, i32 9, i32 25, i32 24, i32 14, i32 13, i32 29, i32 28>4855; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>4856; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[X4:%.*]] to <16 x i1>4857; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP4]]4858; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x float> [[TMP5]] to <16 x i32>4859; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x float> [[X3:%.*]] to <16 x i32>4860; CHECK-NEXT: [[TMP11:%.*]] = xor <16 x i32> [[TMP9]], [[TMP10]]4861; CHECK-NEXT: [[TMP12:%.*]] = or <16 x i32> [[TMP11]], [[_MSPROP]]4862; CHECK-NEXT: [[TMP13:%.*]] = or <16 x i32> [[TMP12]], [[TMP4]]4863; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP13]], <16 x i32> [[TMP8]]4864; CHECK-NEXT: [[TMP14:%.*]] = select <16 x i1> [[TMP7]], <16 x float> [[TMP5]], <16 x float> [[X3]]4865; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84866; CHECK-NEXT: ret <16 x float> [[TMP14]]4867;4868 %res = call <16 x float> @llvm.x86.avx512.mask.shuf.ps.512(<16 x float> %x0, <16 x float> %x1, i32 22, <16 x float> %x3, i16 %x4)4869 ret <16 x float> %res4870}4871 4872declare <16 x i32> @llvm.x86.avx512.mask.pmaxs.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)4873 4874define <16 x i32>@test_int_x86_avx512_pmaxs_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) #0 {4875; CHECK-LABEL: @test_int_x86_avx512_pmaxs_d_512(4876; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 84877; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84878; CHECK-NEXT: call void @llvm.donothing()4879; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]4880; CHECK-NEXT: [[TMP3:%.*]] = call <16 x i32> @llvm.smax.v16i32(<16 x i32> [[X0:%.*]], <16 x i32> [[X1:%.*]])4881; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 84882; CHECK-NEXT: ret <16 x i32> [[TMP3]]4883;4884 %res = call <16 x i32> @llvm.x86.avx512.mask.pmaxs.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)4885 ret <16 x i32> %res4886}4887 4888define <16 x i32>@test_int_x86_avx512_mask_pmaxs_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) #0 {4889;4890; CHECK-LABEL: @test_int_x86_avx512_mask_pmaxs_d_512(4891; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 84892; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84893; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 84894; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84895; CHECK-NEXT: call void @llvm.donothing()4896; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]4897; CHECK-NEXT: [[TMP5:%.*]] = call <16 x i32> @llvm.smax.v16i32(<16 x i32> [[X0:%.*]], <16 x i32> [[X1:%.*]])4898; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>4899; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>4900; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP4]]4901; CHECK-NEXT: [[TMP9:%.*]] = xor <16 x i32> [[TMP5]], [[X2:%.*]]4902; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[_MSPROP]]4903; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP4]]4904; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP11]], <16 x i32> [[TMP8]]4905; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP5]], <16 x i32> [[X2]]4906; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84907; CHECK-NEXT: ret <16 x i32> [[TMP12]]4908;4909 %res = call <16 x i32> @llvm.x86.avx512.mask.pmaxs.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)4910 ret <16 x i32> %res4911}4912 4913declare <8 x i64> @llvm.x86.avx512.mask.pmaxs.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)4914 4915define <8 x i64>@test_int_x86_avx512_pmaxs_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2) #0 {4916; CHECK-LABEL: @test_int_x86_avx512_pmaxs_q_512(4917; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 84918; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84919; CHECK-NEXT: call void @llvm.donothing()4920; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]4921; CHECK-NEXT: [[TMP3:%.*]] = call <8 x i64> @llvm.smax.v8i64(<8 x i64> [[X0:%.*]], <8 x i64> [[X1:%.*]])4922; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 84923; CHECK-NEXT: ret <8 x i64> [[TMP3]]4924;4925 %res = call <8 x i64> @llvm.x86.avx512.mask.pmaxs.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)4926 ret <8 x i64> %res4927}4928 4929define <8 x i64>@test_int_x86_avx512_mask_pmaxs_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) #0 {4930;4931; CHECK-LABEL: @test_int_x86_avx512_mask_pmaxs_q_512(4932; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 84933; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84934; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 84935; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84936; CHECK-NEXT: call void @llvm.donothing()4937; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]4938; CHECK-NEXT: [[TMP5:%.*]] = call <8 x i64> @llvm.smax.v8i64(<8 x i64> [[X0:%.*]], <8 x i64> [[X1:%.*]])4939; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>4940; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>4941; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]4942; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP5]], [[X2:%.*]]4943; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[_MSPROP]]4944; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP4]]4945; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP11]], <8 x i64> [[TMP8]]4946; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP5]], <8 x i64> [[X2]]4947; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84948; CHECK-NEXT: ret <8 x i64> [[TMP12]]4949;4950 %res = call <8 x i64> @llvm.x86.avx512.mask.pmaxs.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)4951 ret <8 x i64> %res4952}4953 4954declare <16 x i32> @llvm.x86.avx512.mask.pmaxu.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)4955 4956define <16 x i32>@test_int_x86_avx512_pmaxu_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) #0 {4957; CHECK-LABEL: @test_int_x86_avx512_pmaxu_d_512(4958; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 84959; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84960; CHECK-NEXT: call void @llvm.donothing()4961; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]4962; CHECK-NEXT: [[TMP3:%.*]] = call <16 x i32> @llvm.umax.v16i32(<16 x i32> [[X0:%.*]], <16 x i32> [[X1:%.*]])4963; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 84964; CHECK-NEXT: ret <16 x i32> [[TMP3]]4965;4966 %res = call <16 x i32> @llvm.x86.avx512.mask.pmaxu.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)4967 ret <16 x i32> %res4968}4969 4970define <16 x i32>@test_int_x86_avx512_mask_pmaxu_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) #0 {4971;4972; CHECK-LABEL: @test_int_x86_avx512_mask_pmaxu_d_512(4973; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 84974; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84975; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 84976; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84977; CHECK-NEXT: call void @llvm.donothing()4978; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]4979; CHECK-NEXT: [[TMP5:%.*]] = call <16 x i32> @llvm.umax.v16i32(<16 x i32> [[X0:%.*]], <16 x i32> [[X1:%.*]])4980; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>4981; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>4982; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP4]]4983; CHECK-NEXT: [[TMP9:%.*]] = xor <16 x i32> [[TMP5]], [[X2:%.*]]4984; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[_MSPROP]]4985; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP4]]4986; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP11]], <16 x i32> [[TMP8]]4987; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP5]], <16 x i32> [[X2]]4988; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84989; CHECK-NEXT: ret <16 x i32> [[TMP12]]4990;4991 %res = call <16 x i32> @llvm.x86.avx512.mask.pmaxu.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)4992 ret <16 x i32> %res4993}4994 4995declare <8 x i64> @llvm.x86.avx512.mask.pmaxu.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)4996 4997define <8 x i64>@test_int_x86_avx512_pmaxu_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2) #0 {4998; CHECK-LABEL: @test_int_x86_avx512_pmaxu_q_512(4999; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 85000; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85001; CHECK-NEXT: call void @llvm.donothing()5002; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]5003; CHECK-NEXT: [[TMP3:%.*]] = call <8 x i64> @llvm.umax.v8i64(<8 x i64> [[X0:%.*]], <8 x i64> [[X1:%.*]])5004; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 85005; CHECK-NEXT: ret <8 x i64> [[TMP3]]5006;5007 %res = call <8 x i64> @llvm.x86.avx512.mask.pmaxu.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)5008 ret <8 x i64> %res5009}5010 5011define <8 x i64>@test_int_x86_avx512_mask_pmaxu_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) #0 {5012;5013; CHECK-LABEL: @test_int_x86_avx512_mask_pmaxu_q_512(5014; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 85015; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85016; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 85017; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 85018; CHECK-NEXT: call void @llvm.donothing()5019; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]5020; CHECK-NEXT: [[TMP5:%.*]] = call <8 x i64> @llvm.umax.v8i64(<8 x i64> [[X0:%.*]], <8 x i64> [[X1:%.*]])5021; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>5022; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>5023; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]5024; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP5]], [[X2:%.*]]5025; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[_MSPROP]]5026; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP4]]5027; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP11]], <8 x i64> [[TMP8]]5028; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP5]], <8 x i64> [[X2]]5029; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85030; CHECK-NEXT: ret <8 x i64> [[TMP12]]5031;5032 %res = call <8 x i64> @llvm.x86.avx512.mask.pmaxu.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)5033 ret <8 x i64> %res5034}5035 5036declare <16 x i32> @llvm.x86.avx512.mask.pmins.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)5037 5038define <16 x i32>@test_int_x86_avx512_pmins_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) #0 {5039; CHECK-LABEL: @test_int_x86_avx512_pmins_d_512(5040; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 85041; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85042; CHECK-NEXT: call void @llvm.donothing()5043; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]5044; CHECK-NEXT: [[TMP3:%.*]] = call <16 x i32> @llvm.smin.v16i32(<16 x i32> [[X0:%.*]], <16 x i32> [[X1:%.*]])5045; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 85046; CHECK-NEXT: ret <16 x i32> [[TMP3]]5047;5048 %res = call <16 x i32> @llvm.x86.avx512.mask.pmins.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)5049 ret <16 x i32> %res5050}5051 5052define <16 x i32>@test_int_x86_avx512_mask_pmins_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) #0 {5053;5054; CHECK-LABEL: @test_int_x86_avx512_mask_pmins_d_512(5055; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 85056; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85057; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 85058; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 85059; CHECK-NEXT: call void @llvm.donothing()5060; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]5061; CHECK-NEXT: [[TMP5:%.*]] = call <16 x i32> @llvm.smin.v16i32(<16 x i32> [[X0:%.*]], <16 x i32> [[X1:%.*]])5062; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>5063; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>5064; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP4]]5065; CHECK-NEXT: [[TMP9:%.*]] = xor <16 x i32> [[TMP5]], [[X2:%.*]]5066; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[_MSPROP]]5067; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP4]]5068; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP11]], <16 x i32> [[TMP8]]5069; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP5]], <16 x i32> [[X2]]5070; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85071; CHECK-NEXT: ret <16 x i32> [[TMP12]]5072;5073 %res = call <16 x i32> @llvm.x86.avx512.mask.pmins.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)5074 ret <16 x i32> %res5075}5076 5077declare <8 x i64> @llvm.x86.avx512.mask.pmins.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)5078 5079define <8 x i64>@test_int_x86_avx512_pmins_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2) #0 {5080; CHECK-LABEL: @test_int_x86_avx512_pmins_q_512(5081; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 85082; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85083; CHECK-NEXT: call void @llvm.donothing()5084; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]5085; CHECK-NEXT: [[TMP3:%.*]] = call <8 x i64> @llvm.smin.v8i64(<8 x i64> [[X0:%.*]], <8 x i64> [[X1:%.*]])5086; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 85087; CHECK-NEXT: ret <8 x i64> [[TMP3]]5088;5089 %res = call <8 x i64> @llvm.x86.avx512.mask.pmins.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)5090 ret <8 x i64> %res5091}5092 5093define <8 x i64>@test_int_x86_avx512_mask_pmins_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) #0 {5094;5095; CHECK-LABEL: @test_int_x86_avx512_mask_pmins_q_512(5096; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 85097; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85098; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 85099; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 85100; CHECK-NEXT: call void @llvm.donothing()5101; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]5102; CHECK-NEXT: [[TMP5:%.*]] = call <8 x i64> @llvm.smin.v8i64(<8 x i64> [[X0:%.*]], <8 x i64> [[X1:%.*]])5103; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>5104; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>5105; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]5106; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP5]], [[X2:%.*]]5107; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[_MSPROP]]5108; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP4]]5109; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP11]], <8 x i64> [[TMP8]]5110; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP5]], <8 x i64> [[X2]]5111; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85112; CHECK-NEXT: ret <8 x i64> [[TMP12]]5113;5114 %res = call <8 x i64> @llvm.x86.avx512.mask.pmins.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)5115 ret <8 x i64> %res5116}5117 5118declare <16 x i32> @llvm.x86.avx512.mask.pminu.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)5119 5120define <16 x i32>@test_int_x86_avx512_pminu_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) #0 {5121; CHECK-LABEL: @test_int_x86_avx512_pminu_d_512(5122; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 85123; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85124; CHECK-NEXT: call void @llvm.donothing()5125; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]5126; CHECK-NEXT: [[TMP3:%.*]] = call <16 x i32> @llvm.umin.v16i32(<16 x i32> [[X0:%.*]], <16 x i32> [[X1:%.*]])5127; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 85128; CHECK-NEXT: ret <16 x i32> [[TMP3]]5129;5130 %res = call <16 x i32> @llvm.x86.avx512.mask.pminu.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)5131 ret <16 x i32> %res5132}5133 5134define <16 x i32>@test_int_x86_avx512_mask_pminu_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) #0 {5135;5136; CHECK-LABEL: @test_int_x86_avx512_mask_pminu_d_512(5137; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 85138; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85139; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 85140; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 85141; CHECK-NEXT: call void @llvm.donothing()5142; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]5143; CHECK-NEXT: [[TMP5:%.*]] = call <16 x i32> @llvm.umin.v16i32(<16 x i32> [[X0:%.*]], <16 x i32> [[X1:%.*]])5144; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>5145; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>5146; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP4]]5147; CHECK-NEXT: [[TMP9:%.*]] = xor <16 x i32> [[TMP5]], [[X2:%.*]]5148; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[_MSPROP]]5149; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP4]]5150; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP11]], <16 x i32> [[TMP8]]5151; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP5]], <16 x i32> [[X2]]5152; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85153; CHECK-NEXT: ret <16 x i32> [[TMP12]]5154;5155 %res = call <16 x i32> @llvm.x86.avx512.mask.pminu.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)5156 ret <16 x i32> %res5157}5158 5159declare <8 x i64> @llvm.x86.avx512.mask.pminu.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)5160 5161define <8 x i64>@test_int_x86_avx512_pminu_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2) #0 {5162; CHECK-LABEL: @test_int_x86_avx512_pminu_q_512(5163; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 85164; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85165; CHECK-NEXT: call void @llvm.donothing()5166; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]5167; CHECK-NEXT: [[TMP3:%.*]] = call <8 x i64> @llvm.umin.v8i64(<8 x i64> [[X0:%.*]], <8 x i64> [[X1:%.*]])5168; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 85169; CHECK-NEXT: ret <8 x i64> [[TMP3]]5170;5171 %res = call <8 x i64> @llvm.x86.avx512.mask.pminu.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)5172 ret <8 x i64> %res5173}5174 5175define <8 x i64>@test_int_x86_avx512_mask_pminu_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) #0 {5176;5177; CHECK-LABEL: @test_int_x86_avx512_mask_pminu_q_512(5178; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 85179; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85180; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 85181; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 85182; CHECK-NEXT: call void @llvm.donothing()5183; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]5184; CHECK-NEXT: [[TMP5:%.*]] = call <8 x i64> @llvm.umin.v8i64(<8 x i64> [[X0:%.*]], <8 x i64> [[X1:%.*]])5185; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>5186; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>5187; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]5188; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP5]], [[X2:%.*]]5189; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[_MSPROP]]5190; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP4]]5191; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP11]], <8 x i64> [[TMP8]]5192; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP5]], <8 x i64> [[X2]]5193; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85194; CHECK-NEXT: ret <8 x i64> [[TMP12]]5195;5196 %res = call <8 x i64> @llvm.x86.avx512.mask.pminu.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)5197 ret <8 x i64> %res5198}5199 5200define <4 x float> @test_mm_mask_move_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) #0 {5201;5202; CHECK-LABEL: @test_mm_mask_move_ss(5203; CHECK-NEXT: entry:5204; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 85205; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 40), align 85206; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 85207; CHECK-NEXT: [[TMP3:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 85208; CHECK-NEXT: call void @llvm.donothing()5209; CHECK-NEXT: [[TMP4:%.*]] = and i8 [[TMP0]], 05210; CHECK-NEXT: [[TMP5:%.*]] = and i8 [[__U:%.*]], 05211; CHECK-NEXT: [[TMP6:%.*]] = and i8 [[TMP0]], 15212; CHECK-NEXT: [[TMP7:%.*]] = or i8 [[TMP4]], [[TMP5]]5213; CHECK-NEXT: [[TMP8:%.*]] = or i8 [[TMP7]], [[TMP6]]5214; CHECK-NEXT: [[TMP9:%.*]] = and i8 [[__U]], 15215; CHECK-NEXT: [[TMP10:%.*]] = xor i8 [[TMP9]], 05216; CHECK-NEXT: [[TMP11:%.*]] = or i8 [[TMP8]], 05217; CHECK-NEXT: [[TMP12:%.*]] = icmp ne i8 [[TMP11]], 05218; CHECK-NEXT: [[TMP13:%.*]] = xor i8 [[TMP11]], -15219; CHECK-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], [[TMP10]]5220; CHECK-NEXT: [[TMP15:%.*]] = icmp eq i8 [[TMP14]], 05221; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and i1 [[TMP12]], [[TMP15]]5222; CHECK-NEXT: [[TMP16:%.*]] = icmp ne i8 [[TMP9]], 05223; CHECK-NEXT: [[_MSPROP:%.*]] = extractelement <4 x i32> [[TMP1]], i64 05224; CHECK-NEXT: [[TMP17:%.*]] = extractelement <4 x float> [[__B:%.*]], i64 05225; CHECK-NEXT: [[_MSPROP1:%.*]] = extractelement <4 x i32> [[TMP2]], i64 05226; CHECK-NEXT: [[TMP18:%.*]] = extractelement <4 x float> [[__W:%.*]], i64 05227; CHECK-NEXT: [[TMP19:%.*]] = select i1 [[TMP16]], i32 [[_MSPROP]], i32 [[_MSPROP1]]5228; CHECK-NEXT: [[TMP20:%.*]] = bitcast float [[TMP17]] to i325229; CHECK-NEXT: [[TMP21:%.*]] = bitcast float [[TMP18]] to i325230; CHECK-NEXT: [[TMP22:%.*]] = xor i32 [[TMP20]], [[TMP21]]5231; CHECK-NEXT: [[TMP23:%.*]] = or i32 [[TMP22]], [[_MSPROP]]5232; CHECK-NEXT: [[TMP24:%.*]] = or i32 [[TMP23]], [[_MSPROP1]]5233; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select i1 [[_MSPROP_ICMP]], i32 [[TMP24]], i32 [[TMP19]]5234; CHECK-NEXT: [[TMP25:%.*]] = select i1 [[TMP16]], float [[TMP17]], float [[TMP18]]5235; CHECK-NEXT: [[_MSPROP2:%.*]] = insertelement <4 x i32> [[TMP3]], i32 [[_MSPROP_SELECT]], i64 05236; CHECK-NEXT: [[TMP26:%.*]] = insertelement <4 x float> [[__A:%.*]], float [[TMP25]], i64 05237; CHECK-NEXT: store <4 x i32> [[_MSPROP2]], ptr @__msan_retval_tls, align 85238; CHECK-NEXT: ret <4 x float> [[TMP26]]5239;5240entry:5241 %res = call <4 x float> @llvm.x86.avx512.mask.move.ss(<4 x float> %__A, <4 x float> %__B, <4 x float> %__W, i8 %__U)5242 ret <4 x float> %res5243}5244 5245 5246define <4 x float> @test_mm_maskz_move_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) #0 {5247;5248; CHECK-LABEL: @test_mm_maskz_move_ss(5249; CHECK-NEXT: entry:5250; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr @__msan_param_tls, align 85251; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 85252; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 85253; CHECK-NEXT: call void @llvm.donothing()5254; CHECK-NEXT: [[TMP3:%.*]] = and i8 [[TMP0]], 05255; CHECK-NEXT: [[TMP4:%.*]] = and i8 [[__U:%.*]], 05256; CHECK-NEXT: [[TMP5:%.*]] = and i8 [[TMP0]], 15257; CHECK-NEXT: [[TMP6:%.*]] = or i8 [[TMP3]], [[TMP4]]5258; CHECK-NEXT: [[TMP7:%.*]] = or i8 [[TMP6]], [[TMP5]]5259; CHECK-NEXT: [[TMP8:%.*]] = and i8 [[__U]], 15260; CHECK-NEXT: [[TMP9:%.*]] = xor i8 [[TMP8]], 05261; CHECK-NEXT: [[TMP10:%.*]] = or i8 [[TMP7]], 05262; CHECK-NEXT: [[TMP11:%.*]] = icmp ne i8 [[TMP10]], 05263; CHECK-NEXT: [[TMP12:%.*]] = xor i8 [[TMP10]], -15264; CHECK-NEXT: [[TMP13:%.*]] = and i8 [[TMP12]], [[TMP9]]5265; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i8 [[TMP13]], 05266; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and i1 [[TMP11]], [[TMP14]]5267; CHECK-NEXT: [[TMP15:%.*]] = icmp ne i8 [[TMP8]], 05268; CHECK-NEXT: [[_MSPROP:%.*]] = extractelement <4 x i32> [[TMP1]], i64 05269; CHECK-NEXT: [[TMP16:%.*]] = extractelement <4 x float> [[__B:%.*]], i64 05270; CHECK-NEXT: [[TMP17:%.*]] = select i1 [[TMP15]], i32 [[_MSPROP]], i32 05271; CHECK-NEXT: [[TMP18:%.*]] = bitcast float [[TMP16]] to i325272; CHECK-NEXT: [[TMP19:%.*]] = xor i32 [[TMP18]], 05273; CHECK-NEXT: [[TMP20:%.*]] = or i32 [[TMP19]], [[_MSPROP]]5274; CHECK-NEXT: [[TMP21:%.*]] = or i32 [[TMP20]], 05275; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select i1 [[_MSPROP_ICMP]], i32 [[TMP21]], i32 [[TMP17]]5276; CHECK-NEXT: [[TMP22:%.*]] = select i1 [[TMP15]], float [[TMP16]], float 0.000000e+005277; CHECK-NEXT: [[_MSPROP1:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[_MSPROP_SELECT]], i64 05278; CHECK-NEXT: [[TMP23:%.*]] = insertelement <4 x float> [[__A:%.*]], float [[TMP22]], i64 05279; CHECK-NEXT: store <4 x i32> [[_MSPROP1]], ptr @__msan_retval_tls, align 85280; CHECK-NEXT: ret <4 x float> [[TMP23]]5281;5282entry:5283 %res = call <4 x float> @llvm.x86.avx512.mask.move.ss(<4 x float> %__A, <4 x float> %__B, <4 x float> zeroinitializer, i8 %__U)5284 ret <4 x float> %res5285}5286 5287define <2 x double> @test_mm_mask_move_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) #0 {5288;5289; CHECK-LABEL: @test_mm_mask_move_sd(5290; CHECK-NEXT: entry:5291; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 85292; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 40), align 85293; CHECK-NEXT: [[TMP2:%.*]] = load <2 x i64>, ptr @__msan_param_tls, align 85294; CHECK-NEXT: [[TMP3:%.*]] = load <2 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 85295; CHECK-NEXT: call void @llvm.donothing()5296; CHECK-NEXT: [[TMP4:%.*]] = and i8 [[TMP0]], 05297; CHECK-NEXT: [[TMP5:%.*]] = and i8 [[__U:%.*]], 05298; CHECK-NEXT: [[TMP6:%.*]] = and i8 [[TMP0]], 15299; CHECK-NEXT: [[TMP7:%.*]] = or i8 [[TMP4]], [[TMP5]]5300; CHECK-NEXT: [[TMP8:%.*]] = or i8 [[TMP7]], [[TMP6]]5301; CHECK-NEXT: [[TMP9:%.*]] = and i8 [[__U]], 15302; CHECK-NEXT: [[TMP10:%.*]] = xor i8 [[TMP9]], 05303; CHECK-NEXT: [[TMP11:%.*]] = or i8 [[TMP8]], 05304; CHECK-NEXT: [[TMP12:%.*]] = icmp ne i8 [[TMP11]], 05305; CHECK-NEXT: [[TMP13:%.*]] = xor i8 [[TMP11]], -15306; CHECK-NEXT: [[TMP14:%.*]] = and i8 [[TMP13]], [[TMP10]]5307; CHECK-NEXT: [[TMP15:%.*]] = icmp eq i8 [[TMP14]], 05308; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and i1 [[TMP12]], [[TMP15]]5309; CHECK-NEXT: [[TMP16:%.*]] = icmp ne i8 [[TMP9]], 05310; CHECK-NEXT: [[_MSPROP:%.*]] = extractelement <2 x i64> [[TMP1]], i64 05311; CHECK-NEXT: [[TMP17:%.*]] = extractelement <2 x double> [[__B:%.*]], i64 05312; CHECK-NEXT: [[_MSPROP1:%.*]] = extractelement <2 x i64> [[TMP2]], i64 05313; CHECK-NEXT: [[TMP18:%.*]] = extractelement <2 x double> [[__W:%.*]], i64 05314; CHECK-NEXT: [[TMP19:%.*]] = select i1 [[TMP16]], i64 [[_MSPROP]], i64 [[_MSPROP1]]5315; CHECK-NEXT: [[TMP20:%.*]] = bitcast double [[TMP17]] to i645316; CHECK-NEXT: [[TMP21:%.*]] = bitcast double [[TMP18]] to i645317; CHECK-NEXT: [[TMP22:%.*]] = xor i64 [[TMP20]], [[TMP21]]5318; CHECK-NEXT: [[TMP23:%.*]] = or i64 [[TMP22]], [[_MSPROP]]5319; CHECK-NEXT: [[TMP24:%.*]] = or i64 [[TMP23]], [[_MSPROP1]]5320; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select i1 [[_MSPROP_ICMP]], i64 [[TMP24]], i64 [[TMP19]]5321; CHECK-NEXT: [[TMP25:%.*]] = select i1 [[TMP16]], double [[TMP17]], double [[TMP18]]5322; CHECK-NEXT: [[_MSPROP2:%.*]] = insertelement <2 x i64> [[TMP3]], i64 [[_MSPROP_SELECT]], i64 05323; CHECK-NEXT: [[TMP26:%.*]] = insertelement <2 x double> [[__A:%.*]], double [[TMP25]], i64 05324; CHECK-NEXT: store <2 x i64> [[_MSPROP2]], ptr @__msan_retval_tls, align 85325; CHECK-NEXT: ret <2 x double> [[TMP26]]5326;5327entry:5328 %res = call <2 x double> @llvm.x86.avx512.mask.move.sd(<2 x double> %__A, <2 x double> %__B, <2 x double> %__W, i8 %__U)5329 ret <2 x double> %res5330}5331 5332define <2 x double> @test_mm_maskz_move_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) #0 {5333;5334; CHECK-LABEL: @test_mm_maskz_move_sd(5335; CHECK-NEXT: entry:5336; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr @__msan_param_tls, align 85337; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 85338; CHECK-NEXT: [[TMP2:%.*]] = load <2 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 85339; CHECK-NEXT: call void @llvm.donothing()5340; CHECK-NEXT: [[TMP3:%.*]] = and i8 [[TMP0]], 05341; CHECK-NEXT: [[TMP4:%.*]] = and i8 [[__U:%.*]], 05342; CHECK-NEXT: [[TMP5:%.*]] = and i8 [[TMP0]], 15343; CHECK-NEXT: [[TMP6:%.*]] = or i8 [[TMP3]], [[TMP4]]5344; CHECK-NEXT: [[TMP7:%.*]] = or i8 [[TMP6]], [[TMP5]]5345; CHECK-NEXT: [[TMP8:%.*]] = and i8 [[__U]], 15346; CHECK-NEXT: [[TMP9:%.*]] = xor i8 [[TMP8]], 05347; CHECK-NEXT: [[TMP10:%.*]] = or i8 [[TMP7]], 05348; CHECK-NEXT: [[TMP11:%.*]] = icmp ne i8 [[TMP10]], 05349; CHECK-NEXT: [[TMP12:%.*]] = xor i8 [[TMP10]], -15350; CHECK-NEXT: [[TMP13:%.*]] = and i8 [[TMP12]], [[TMP9]]5351; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i8 [[TMP13]], 05352; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and i1 [[TMP11]], [[TMP14]]5353; CHECK-NEXT: [[TMP15:%.*]] = icmp ne i8 [[TMP8]], 05354; CHECK-NEXT: [[_MSPROP:%.*]] = extractelement <2 x i64> [[TMP1]], i64 05355; CHECK-NEXT: [[TMP16:%.*]] = extractelement <2 x double> [[__B:%.*]], i64 05356; CHECK-NEXT: [[TMP17:%.*]] = select i1 [[TMP15]], i64 [[_MSPROP]], i64 05357; CHECK-NEXT: [[TMP18:%.*]] = bitcast double [[TMP16]] to i645358; CHECK-NEXT: [[TMP19:%.*]] = xor i64 [[TMP18]], 05359; CHECK-NEXT: [[TMP20:%.*]] = or i64 [[TMP19]], [[_MSPROP]]5360; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[TMP20]], 05361; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select i1 [[_MSPROP_ICMP]], i64 [[TMP21]], i64 [[TMP17]]5362; CHECK-NEXT: [[TMP22:%.*]] = select i1 [[TMP15]], double [[TMP16]], double 0.000000e+005363; CHECK-NEXT: [[_MSPROP1:%.*]] = insertelement <2 x i64> [[TMP2]], i64 [[_MSPROP_SELECT]], i64 05364; CHECK-NEXT: [[TMP23:%.*]] = insertelement <2 x double> [[__A:%.*]], double [[TMP22]], i64 05365; CHECK-NEXT: store <2 x i64> [[_MSPROP1]], ptr @__msan_retval_tls, align 85366; CHECK-NEXT: ret <2 x double> [[TMP23]]5367;5368entry:5369 %res = call <2 x double> @llvm.x86.avx512.mask.move.sd(<2 x double> %__A, <2 x double> %__B, <2 x double> zeroinitializer, i8 %__U)5370 ret <2 x double> %res5371}5372 5373declare <4 x float> @llvm.x86.avx512.mask.move.ss(<4 x float>, <4 x float>, <4 x float>, i8)5374declare <2 x double> @llvm.x86.avx512.mask.move.sd(<2 x double>, <2 x double>, <2 x double>, i8)5375 5376declare <16 x i32> @llvm.x86.avx512.mask.pmovzxb.d.512(<16 x i8>, <16 x i32>, i16)5377 5378define <16 x i32>@test_int_x86_avx512_pmovzxb_d_512(<16 x i8> %x0, <16 x i32> %x1) #0 {5379; CHECK-LABEL: @test_int_x86_avx512_pmovzxb_d_512(5380; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, ptr @__msan_param_tls, align 85381; CHECK-NEXT: call void @llvm.donothing()5382; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> splat (i8 -1), <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5383; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <16 x i8> [[X0:%.*]], <16 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5384; CHECK-NEXT: [[_MSPROP1:%.*]] = zext <16 x i8> [[_MSPROP]] to <16 x i32>5385; CHECK-NEXT: [[TMP3:%.*]] = zext <16 x i8> [[TMP2]] to <16 x i32>5386; CHECK-NEXT: store <16 x i32> [[_MSPROP1]], ptr @__msan_retval_tls, align 85387; CHECK-NEXT: ret <16 x i32> [[TMP3]]5388;5389 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovzxb.d.512(<16 x i8> %x0, <16 x i32> %x1, i16 -1)5390 ret <16 x i32> %res5391}5392 5393define <16 x i32>@test_int_x86_avx512_mask_pmovzxb_d_512(<16 x i8> %x0, <16 x i32> %x1, i16 %x2) #0 {5394;5395; CHECK-LABEL: @test_int_x86_avx512_mask_pmovzxb_d_512(5396; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, ptr @__msan_param_tls, align 85397; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 85398; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 85399; CHECK-NEXT: call void @llvm.donothing()5400; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> splat (i8 -1), <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5401; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <16 x i8> [[X0:%.*]], <16 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5402; CHECK-NEXT: [[_MSPROP1:%.*]] = zext <16 x i8> [[_MSPROP]] to <16 x i32>5403; CHECK-NEXT: [[TMP5:%.*]] = zext <16 x i8> [[TMP4]] to <16 x i32>5404; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>5405; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[X2:%.*]] to <16 x i1>5406; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP1]], <16 x i32> [[TMP3]]5407; CHECK-NEXT: [[TMP9:%.*]] = xor <16 x i32> [[TMP5]], [[X1:%.*]]5408; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[_MSPROP1]]5409; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP3]]5410; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP11]], <16 x i32> [[TMP8]]5411; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP5]], <16 x i32> [[X1]]5412; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85413; CHECK-NEXT: ret <16 x i32> [[TMP12]]5414;5415 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovzxb.d.512(<16 x i8> %x0, <16 x i32> %x1, i16 %x2)5416 ret <16 x i32> %res5417}5418 5419define <16 x i32>@test_int_x86_avx512_maskz_pmovzxb_d_512(<16 x i8> %x0, i16 %x2) #0 {5420;5421; CHECK-LABEL: @test_int_x86_avx512_maskz_pmovzxb_d_512(5422; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, ptr @__msan_param_tls, align 85423; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 85424; CHECK-NEXT: call void @llvm.donothing()5425; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> splat (i8 -1), <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5426; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <16 x i8> [[X0:%.*]], <16 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5427; CHECK-NEXT: [[_MSPROP1:%.*]] = zext <16 x i8> [[_MSPROP]] to <16 x i32>5428; CHECK-NEXT: [[TMP4:%.*]] = zext <16 x i8> [[TMP3]] to <16 x i32>5429; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>5430; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[X2:%.*]] to <16 x i1>5431; CHECK-NEXT: [[TMP7:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[_MSPROP1]], <16 x i32> zeroinitializer5432; CHECK-NEXT: [[TMP8:%.*]] = xor <16 x i32> [[TMP4]], zeroinitializer5433; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], [[_MSPROP1]]5434; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], zeroinitializer5435; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[TMP10]], <16 x i32> [[TMP7]]5436; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP4]], <16 x i32> zeroinitializer5437; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85438; CHECK-NEXT: ret <16 x i32> [[TMP11]]5439;5440 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovzxb.d.512(<16 x i8> %x0, <16 x i32> zeroinitializer, i16 %x2)5441 ret <16 x i32> %res5442}5443 5444declare <8 x i64> @llvm.x86.avx512.mask.pmovzxb.q.512(<16 x i8>, <8 x i64>, i8)5445 5446define <8 x i64>@test_int_x86_avx512_pmovzxb_q_512(<16 x i8> %x0, <8 x i64> %x1) #0 {5447; CHECK-LABEL: @test_int_x86_avx512_pmovzxb_q_512(5448; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, ptr @__msan_param_tls, align 85449; CHECK-NEXT: call void @llvm.donothing()5450; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> splat (i8 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5451; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <16 x i8> [[X0:%.*]], <16 x i8> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5452; CHECK-NEXT: [[_MSPROP1:%.*]] = zext <8 x i8> [[_MSPROP]] to <8 x i64>5453; CHECK-NEXT: [[TMP3:%.*]] = zext <8 x i8> [[TMP2]] to <8 x i64>5454; CHECK-NEXT: store <8 x i64> [[_MSPROP1]], ptr @__msan_retval_tls, align 85455; CHECK-NEXT: ret <8 x i64> [[TMP3]]5456;5457 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovzxb.q.512(<16 x i8> %x0, <8 x i64> %x1, i8 -1)5458 ret <8 x i64> %res5459}5460 5461define <8 x i64>@test_int_x86_avx512_mask_pmovzxb_q_512(<16 x i8> %x0, <8 x i64> %x1, i8 %x2) #0 {5462;5463; CHECK-LABEL: @test_int_x86_avx512_mask_pmovzxb_q_512(5464; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, ptr @__msan_param_tls, align 85465; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 85466; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 85467; CHECK-NEXT: call void @llvm.donothing()5468; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> splat (i8 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5469; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <16 x i8> [[X0:%.*]], <16 x i8> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5470; CHECK-NEXT: [[_MSPROP1:%.*]] = zext <8 x i8> [[_MSPROP]] to <8 x i64>5471; CHECK-NEXT: [[TMP5:%.*]] = zext <8 x i8> [[TMP4]] to <8 x i64>5472; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>5473; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[X2:%.*]] to <8 x i1>5474; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP1]], <8 x i64> [[TMP3]]5475; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP5]], [[X1:%.*]]5476; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[_MSPROP1]]5477; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP3]]5478; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP11]], <8 x i64> [[TMP8]]5479; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP5]], <8 x i64> [[X1]]5480; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85481; CHECK-NEXT: ret <8 x i64> [[TMP12]]5482;5483 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovzxb.q.512(<16 x i8> %x0, <8 x i64> %x1, i8 %x2)5484 ret <8 x i64> %res5485}5486 5487define <8 x i64>@test_int_x86_avx512_maskz_pmovzxb_q_512(<16 x i8> %x0, i8 %x2) #0 {5488;5489; CHECK-LABEL: @test_int_x86_avx512_maskz_pmovzxb_q_512(5490; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, ptr @__msan_param_tls, align 85491; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 85492; CHECK-NEXT: call void @llvm.donothing()5493; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> splat (i8 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5494; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <16 x i8> [[X0:%.*]], <16 x i8> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5495; CHECK-NEXT: [[_MSPROP1:%.*]] = zext <8 x i8> [[_MSPROP]] to <8 x i64>5496; CHECK-NEXT: [[TMP4:%.*]] = zext <8 x i8> [[TMP3]] to <8 x i64>5497; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>5498; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[X2:%.*]] to <8 x i1>5499; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[_MSPROP1]], <8 x i64> zeroinitializer5500; CHECK-NEXT: [[TMP8:%.*]] = xor <8 x i64> [[TMP4]], zeroinitializer5501; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[_MSPROP1]]5502; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], zeroinitializer5503; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP10]], <8 x i64> [[TMP7]]5504; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP4]], <8 x i64> zeroinitializer5505; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85506; CHECK-NEXT: ret <8 x i64> [[TMP11]]5507;5508 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovzxb.q.512(<16 x i8> %x0, <8 x i64> zeroinitializer, i8 %x2)5509 ret <8 x i64> %res5510}5511 5512declare <8 x i64> @llvm.x86.avx512.mask.pmovzxd.q.512(<8 x i32>, <8 x i64>, i8)5513 5514define <8 x i64>@test_int_x86_avx512_pmovzxd_q_512(<8 x i32> %x0, <8 x i64> %x1) #0 {5515; CHECK-LABEL: @test_int_x86_avx512_pmovzxd_q_512(5516; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 85517; CHECK-NEXT: call void @llvm.donothing()5518; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i32> [[TMP1]], <8 x i32> splat (i32 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5519; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x i32> [[X0:%.*]], <8 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5520; CHECK-NEXT: [[_MSPROP1:%.*]] = zext <8 x i32> [[_MSPROP]] to <8 x i64>5521; CHECK-NEXT: [[TMP3:%.*]] = zext <8 x i32> [[TMP2]] to <8 x i64>5522; CHECK-NEXT: store <8 x i64> [[_MSPROP1]], ptr @__msan_retval_tls, align 85523; CHECK-NEXT: ret <8 x i64> [[TMP3]]5524;5525 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovzxd.q.512(<8 x i32> %x0, <8 x i64> %x1, i8 -1)5526 ret <8 x i64> %res5527}5528 5529define <8 x i64>@test_int_x86_avx512_mask_pmovzxd_q_512(<8 x i32> %x0, <8 x i64> %x1, i8 %x2) #0 {5530;5531; CHECK-LABEL: @test_int_x86_avx512_mask_pmovzxd_q_512(5532; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 85533; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 96), align 85534; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 85535; CHECK-NEXT: call void @llvm.donothing()5536; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i32> [[TMP1]], <8 x i32> splat (i32 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5537; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <8 x i32> [[X0:%.*]], <8 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5538; CHECK-NEXT: [[_MSPROP1:%.*]] = zext <8 x i32> [[_MSPROP]] to <8 x i64>5539; CHECK-NEXT: [[TMP5:%.*]] = zext <8 x i32> [[TMP4]] to <8 x i64>5540; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>5541; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[X2:%.*]] to <8 x i1>5542; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP1]], <8 x i64> [[TMP3]]5543; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP5]], [[X1:%.*]]5544; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[_MSPROP1]]5545; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP3]]5546; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP11]], <8 x i64> [[TMP8]]5547; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP5]], <8 x i64> [[X1]]5548; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85549; CHECK-NEXT: ret <8 x i64> [[TMP12]]5550;5551 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovzxd.q.512(<8 x i32> %x0, <8 x i64> %x1, i8 %x2)5552 ret <8 x i64> %res5553}5554 5555define <8 x i64>@test_int_x86_avx512_maskz_pmovzxd_q_512(<8 x i32> %x0, i8 %x2) #0 {5556;5557; CHECK-LABEL: @test_int_x86_avx512_maskz_pmovzxd_q_512(5558; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 85559; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 85560; CHECK-NEXT: call void @llvm.donothing()5561; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i32> [[TMP1]], <8 x i32> splat (i32 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5562; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x i32> [[X0:%.*]], <8 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5563; CHECK-NEXT: [[_MSPROP1:%.*]] = zext <8 x i32> [[_MSPROP]] to <8 x i64>5564; CHECK-NEXT: [[TMP4:%.*]] = zext <8 x i32> [[TMP3]] to <8 x i64>5565; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>5566; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[X2:%.*]] to <8 x i1>5567; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[_MSPROP1]], <8 x i64> zeroinitializer5568; CHECK-NEXT: [[TMP8:%.*]] = xor <8 x i64> [[TMP4]], zeroinitializer5569; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[_MSPROP1]]5570; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], zeroinitializer5571; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP10]], <8 x i64> [[TMP7]]5572; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP4]], <8 x i64> zeroinitializer5573; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85574; CHECK-NEXT: ret <8 x i64> [[TMP11]]5575;5576 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovzxd.q.512(<8 x i32> %x0, <8 x i64> zeroinitializer, i8 %x2)5577 ret <8 x i64> %res5578}5579 5580declare <16 x i32> @llvm.x86.avx512.mask.pmovzxw.d.512(<16 x i16>, <16 x i32>, i16)5581 5582define <16 x i32>@test_int_x86_avx512_pmovzxw_d_512(<16 x i16> %x0, <16 x i32> %x1) #0 {5583; CHECK-LABEL: @test_int_x86_avx512_pmovzxw_d_512(5584; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i16>, ptr @__msan_param_tls, align 85585; CHECK-NEXT: call void @llvm.donothing()5586; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i16> [[TMP1]], <16 x i16> splat (i16 -1), <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5587; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <16 x i16> [[X0:%.*]], <16 x i16> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5588; CHECK-NEXT: [[_MSPROP1:%.*]] = zext <16 x i16> [[_MSPROP]] to <16 x i32>5589; CHECK-NEXT: [[TMP3:%.*]] = zext <16 x i16> [[TMP2]] to <16 x i32>5590; CHECK-NEXT: store <16 x i32> [[_MSPROP1]], ptr @__msan_retval_tls, align 85591; CHECK-NEXT: ret <16 x i32> [[TMP3]]5592;5593 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovzxw.d.512(<16 x i16> %x0, <16 x i32> %x1, i16 -1)5594 ret <16 x i32> %res5595}5596 5597define <16 x i32>@test_int_x86_avx512_mask_pmovzxw_d_512(<16 x i16> %x0, <16 x i32> %x1, i16 %x2) #0 {5598;5599; CHECK-LABEL: @test_int_x86_avx512_mask_pmovzxw_d_512(5600; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i16>, ptr @__msan_param_tls, align 85601; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 96), align 85602; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 85603; CHECK-NEXT: call void @llvm.donothing()5604; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i16> [[TMP1]], <16 x i16> splat (i16 -1), <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5605; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <16 x i16> [[X0:%.*]], <16 x i16> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5606; CHECK-NEXT: [[_MSPROP1:%.*]] = zext <16 x i16> [[_MSPROP]] to <16 x i32>5607; CHECK-NEXT: [[TMP5:%.*]] = zext <16 x i16> [[TMP4]] to <16 x i32>5608; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>5609; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[X2:%.*]] to <16 x i1>5610; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP1]], <16 x i32> [[TMP3]]5611; CHECK-NEXT: [[TMP9:%.*]] = xor <16 x i32> [[TMP5]], [[X1:%.*]]5612; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[_MSPROP1]]5613; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP3]]5614; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP11]], <16 x i32> [[TMP8]]5615; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP5]], <16 x i32> [[X1]]5616; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85617; CHECK-NEXT: ret <16 x i32> [[TMP12]]5618;5619 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovzxw.d.512(<16 x i16> %x0, <16 x i32> %x1, i16 %x2)5620 ret <16 x i32> %res5621}5622 5623define <16 x i32>@test_int_x86_avx512_maskz_pmovzxw_d_512(<16 x i16> %x0, i16 %x2) #0 {5624;5625; CHECK-LABEL: @test_int_x86_avx512_maskz_pmovzxw_d_512(5626; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i16>, ptr @__msan_param_tls, align 85627; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 85628; CHECK-NEXT: call void @llvm.donothing()5629; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i16> [[TMP1]], <16 x i16> splat (i16 -1), <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5630; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <16 x i16> [[X0:%.*]], <16 x i16> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5631; CHECK-NEXT: [[_MSPROP1:%.*]] = zext <16 x i16> [[_MSPROP]] to <16 x i32>5632; CHECK-NEXT: [[TMP4:%.*]] = zext <16 x i16> [[TMP3]] to <16 x i32>5633; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>5634; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[X2:%.*]] to <16 x i1>5635; CHECK-NEXT: [[TMP7:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[_MSPROP1]], <16 x i32> zeroinitializer5636; CHECK-NEXT: [[TMP8:%.*]] = xor <16 x i32> [[TMP4]], zeroinitializer5637; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], [[_MSPROP1]]5638; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], zeroinitializer5639; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[TMP10]], <16 x i32> [[TMP7]]5640; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP4]], <16 x i32> zeroinitializer5641; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85642; CHECK-NEXT: ret <16 x i32> [[TMP11]]5643;5644 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovzxw.d.512(<16 x i16> %x0, <16 x i32> zeroinitializer, i16 %x2)5645 ret <16 x i32> %res5646}5647 5648declare <8 x i64> @llvm.x86.avx512.mask.pmovzxw.q.512(<8 x i16>, <8 x i64>, i8)5649 5650define <8 x i64>@test_int_x86_avx512_pmovzxw_q_512(<8 x i16> %x0, <8 x i64> %x1) #0 {5651; CHECK-LABEL: @test_int_x86_avx512_pmovzxw_q_512(5652; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr @__msan_param_tls, align 85653; CHECK-NEXT: call void @llvm.donothing()5654; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i16> [[TMP1]], <8 x i16> splat (i16 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5655; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x i16> [[X0:%.*]], <8 x i16> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5656; CHECK-NEXT: [[_MSPROP1:%.*]] = zext <8 x i16> [[_MSPROP]] to <8 x i64>5657; CHECK-NEXT: [[TMP3:%.*]] = zext <8 x i16> [[TMP2]] to <8 x i64>5658; CHECK-NEXT: store <8 x i64> [[_MSPROP1]], ptr @__msan_retval_tls, align 85659; CHECK-NEXT: ret <8 x i64> [[TMP3]]5660;5661 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovzxw.q.512(<8 x i16> %x0, <8 x i64> %x1, i8 -1)5662 ret <8 x i64> %res5663}5664 5665define <8 x i64>@test_int_x86_avx512_mask_pmovzxw_q_512(<8 x i16> %x0, <8 x i64> %x1, i8 %x2) #0 {5666;5667; CHECK-LABEL: @test_int_x86_avx512_mask_pmovzxw_q_512(5668; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr @__msan_param_tls, align 85669; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 85670; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 85671; CHECK-NEXT: call void @llvm.donothing()5672; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i16> [[TMP1]], <8 x i16> splat (i16 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5673; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <8 x i16> [[X0:%.*]], <8 x i16> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5674; CHECK-NEXT: [[_MSPROP1:%.*]] = zext <8 x i16> [[_MSPROP]] to <8 x i64>5675; CHECK-NEXT: [[TMP5:%.*]] = zext <8 x i16> [[TMP4]] to <8 x i64>5676; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>5677; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[X2:%.*]] to <8 x i1>5678; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP1]], <8 x i64> [[TMP3]]5679; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP5]], [[X1:%.*]]5680; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[_MSPROP1]]5681; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP3]]5682; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP11]], <8 x i64> [[TMP8]]5683; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP5]], <8 x i64> [[X1]]5684; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85685; CHECK-NEXT: ret <8 x i64> [[TMP12]]5686;5687 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovzxw.q.512(<8 x i16> %x0, <8 x i64> %x1, i8 %x2)5688 ret <8 x i64> %res5689}5690 5691define <8 x i64>@test_int_x86_avx512_maskz_pmovzxw_q_512(<8 x i16> %x0, i8 %x2) #0 {5692;5693; CHECK-LABEL: @test_int_x86_avx512_maskz_pmovzxw_q_512(5694; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr @__msan_param_tls, align 85695; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 85696; CHECK-NEXT: call void @llvm.donothing()5697; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i16> [[TMP1]], <8 x i16> splat (i16 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5698; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x i16> [[X0:%.*]], <8 x i16> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5699; CHECK-NEXT: [[_MSPROP1:%.*]] = zext <8 x i16> [[_MSPROP]] to <8 x i64>5700; CHECK-NEXT: [[TMP4:%.*]] = zext <8 x i16> [[TMP3]] to <8 x i64>5701; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>5702; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[X2:%.*]] to <8 x i1>5703; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[_MSPROP1]], <8 x i64> zeroinitializer5704; CHECK-NEXT: [[TMP8:%.*]] = xor <8 x i64> [[TMP4]], zeroinitializer5705; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[_MSPROP1]]5706; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], zeroinitializer5707; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP10]], <8 x i64> [[TMP7]]5708; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP4]], <8 x i64> zeroinitializer5709; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85710; CHECK-NEXT: ret <8 x i64> [[TMP11]]5711;5712 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovzxw.q.512(<8 x i16> %x0, <8 x i64> zeroinitializer, i8 %x2)5713 ret <8 x i64> %res5714}5715 5716declare <16 x i32> @llvm.x86.avx512.mask.pmovsxb.d.512(<16 x i8>, <16 x i32>, i16)5717 5718define <16 x i32>@test_int_x86_avx512_pmovsxb_d_512(<16 x i8> %x0, <16 x i32> %x1) #0 {5719; CHECK-LABEL: @test_int_x86_avx512_pmovsxb_d_512(5720; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, ptr @__msan_param_tls, align 85721; CHECK-NEXT: call void @llvm.donothing()5722; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> splat (i8 -1), <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5723; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <16 x i8> [[X0:%.*]], <16 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5724; CHECK-NEXT: [[_MSPROP1:%.*]] = sext <16 x i8> [[_MSPROP]] to <16 x i32>5725; CHECK-NEXT: [[TMP3:%.*]] = sext <16 x i8> [[TMP2]] to <16 x i32>5726; CHECK-NEXT: store <16 x i32> [[_MSPROP1]], ptr @__msan_retval_tls, align 85727; CHECK-NEXT: ret <16 x i32> [[TMP3]]5728;5729 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovsxb.d.512(<16 x i8> %x0, <16 x i32> %x1, i16 -1)5730 ret <16 x i32> %res5731}5732 5733define <16 x i32>@test_int_x86_avx512_mask_pmovsxb_d_512(<16 x i8> %x0, <16 x i32> %x1, i16 %x2) #0 {5734;5735; CHECK-LABEL: @test_int_x86_avx512_mask_pmovsxb_d_512(5736; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, ptr @__msan_param_tls, align 85737; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 85738; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 85739; CHECK-NEXT: call void @llvm.donothing()5740; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> splat (i8 -1), <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5741; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <16 x i8> [[X0:%.*]], <16 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5742; CHECK-NEXT: [[_MSPROP1:%.*]] = sext <16 x i8> [[_MSPROP]] to <16 x i32>5743; CHECK-NEXT: [[TMP5:%.*]] = sext <16 x i8> [[TMP4]] to <16 x i32>5744; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>5745; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[X2:%.*]] to <16 x i1>5746; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP1]], <16 x i32> [[TMP3]]5747; CHECK-NEXT: [[TMP9:%.*]] = xor <16 x i32> [[TMP5]], [[X1:%.*]]5748; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[_MSPROP1]]5749; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP3]]5750; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP11]], <16 x i32> [[TMP8]]5751; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP5]], <16 x i32> [[X1]]5752; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85753; CHECK-NEXT: ret <16 x i32> [[TMP12]]5754;5755 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovsxb.d.512(<16 x i8> %x0, <16 x i32> %x1, i16 %x2)5756 ret <16 x i32> %res5757}5758 5759define <16 x i32>@test_int_x86_avx512_maskz_pmovsxb_d_512(<16 x i8> %x0, i16 %x2) #0 {5760;5761; CHECK-LABEL: @test_int_x86_avx512_maskz_pmovsxb_d_512(5762; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, ptr @__msan_param_tls, align 85763; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 85764; CHECK-NEXT: call void @llvm.donothing()5765; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> splat (i8 -1), <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5766; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <16 x i8> [[X0:%.*]], <16 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5767; CHECK-NEXT: [[_MSPROP1:%.*]] = sext <16 x i8> [[_MSPROP]] to <16 x i32>5768; CHECK-NEXT: [[TMP4:%.*]] = sext <16 x i8> [[TMP3]] to <16 x i32>5769; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>5770; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[X2:%.*]] to <16 x i1>5771; CHECK-NEXT: [[TMP7:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[_MSPROP1]], <16 x i32> zeroinitializer5772; CHECK-NEXT: [[TMP8:%.*]] = xor <16 x i32> [[TMP4]], zeroinitializer5773; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], [[_MSPROP1]]5774; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], zeroinitializer5775; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[TMP10]], <16 x i32> [[TMP7]]5776; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP4]], <16 x i32> zeroinitializer5777; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85778; CHECK-NEXT: ret <16 x i32> [[TMP11]]5779;5780 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovsxb.d.512(<16 x i8> %x0, <16 x i32> zeroinitializer, i16 %x2)5781 ret <16 x i32> %res5782}5783 5784declare <8 x i64> @llvm.x86.avx512.mask.pmovsxb.q.512(<16 x i8>, <8 x i64>, i8)5785 5786define <8 x i64>@test_int_x86_avx512_pmovsxb_q_512(<16 x i8> %x0, <8 x i64> %x1) #0 {5787; CHECK-LABEL: @test_int_x86_avx512_pmovsxb_q_512(5788; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, ptr @__msan_param_tls, align 85789; CHECK-NEXT: call void @llvm.donothing()5790; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> splat (i8 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5791; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <16 x i8> [[X0:%.*]], <16 x i8> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5792; CHECK-NEXT: [[_MSPROP1:%.*]] = sext <8 x i8> [[_MSPROP]] to <8 x i64>5793; CHECK-NEXT: [[TMP3:%.*]] = sext <8 x i8> [[TMP2]] to <8 x i64>5794; CHECK-NEXT: store <8 x i64> [[_MSPROP1]], ptr @__msan_retval_tls, align 85795; CHECK-NEXT: ret <8 x i64> [[TMP3]]5796;5797 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovsxb.q.512(<16 x i8> %x0, <8 x i64> %x1, i8 -1)5798 ret <8 x i64> %res5799}5800 5801define <8 x i64>@test_int_x86_avx512_mask_pmovsxb_q_512(<16 x i8> %x0, <8 x i64> %x1, i8 %x2) #0 {5802;5803; CHECK-LABEL: @test_int_x86_avx512_mask_pmovsxb_q_512(5804; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, ptr @__msan_param_tls, align 85805; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 85806; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 85807; CHECK-NEXT: call void @llvm.donothing()5808; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> splat (i8 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5809; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <16 x i8> [[X0:%.*]], <16 x i8> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5810; CHECK-NEXT: [[_MSPROP1:%.*]] = sext <8 x i8> [[_MSPROP]] to <8 x i64>5811; CHECK-NEXT: [[TMP5:%.*]] = sext <8 x i8> [[TMP4]] to <8 x i64>5812; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>5813; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[X2:%.*]] to <8 x i1>5814; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP1]], <8 x i64> [[TMP3]]5815; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP5]], [[X1:%.*]]5816; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[_MSPROP1]]5817; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP3]]5818; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP11]], <8 x i64> [[TMP8]]5819; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP5]], <8 x i64> [[X1]]5820; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85821; CHECK-NEXT: ret <8 x i64> [[TMP12]]5822;5823 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovsxb.q.512(<16 x i8> %x0, <8 x i64> %x1, i8 %x2)5824 ret <8 x i64> %res5825}5826 5827define <8 x i64>@test_int_x86_avx512_maskz_pmovsxb_q_512(<16 x i8> %x0, i8 %x2) #0 {5828;5829; CHECK-LABEL: @test_int_x86_avx512_maskz_pmovsxb_q_512(5830; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, ptr @__msan_param_tls, align 85831; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 85832; CHECK-NEXT: call void @llvm.donothing()5833; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> splat (i8 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5834; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <16 x i8> [[X0:%.*]], <16 x i8> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5835; CHECK-NEXT: [[_MSPROP1:%.*]] = sext <8 x i8> [[_MSPROP]] to <8 x i64>5836; CHECK-NEXT: [[TMP4:%.*]] = sext <8 x i8> [[TMP3]] to <8 x i64>5837; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>5838; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[X2:%.*]] to <8 x i1>5839; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[_MSPROP1]], <8 x i64> zeroinitializer5840; CHECK-NEXT: [[TMP8:%.*]] = xor <8 x i64> [[TMP4]], zeroinitializer5841; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[_MSPROP1]]5842; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], zeroinitializer5843; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP10]], <8 x i64> [[TMP7]]5844; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP4]], <8 x i64> zeroinitializer5845; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85846; CHECK-NEXT: ret <8 x i64> [[TMP11]]5847;5848 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovsxb.q.512(<16 x i8> %x0, <8 x i64> zeroinitializer, i8 %x2)5849 ret <8 x i64> %res5850}5851 5852declare <8 x i64> @llvm.x86.avx512.mask.pmovsxd.q.512(<8 x i32>, <8 x i64>, i8)5853 5854define <8 x i64>@test_int_x86_avx512_pmovsxd_q_512(<8 x i32> %x0, <8 x i64> %x1) #0 {5855; CHECK-LABEL: @test_int_x86_avx512_pmovsxd_q_512(5856; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 85857; CHECK-NEXT: call void @llvm.donothing()5858; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i32> [[TMP1]], <8 x i32> splat (i32 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5859; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x i32> [[X0:%.*]], <8 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5860; CHECK-NEXT: [[_MSPROP1:%.*]] = sext <8 x i32> [[_MSPROP]] to <8 x i64>5861; CHECK-NEXT: [[TMP3:%.*]] = sext <8 x i32> [[TMP2]] to <8 x i64>5862; CHECK-NEXT: store <8 x i64> [[_MSPROP1]], ptr @__msan_retval_tls, align 85863; CHECK-NEXT: ret <8 x i64> [[TMP3]]5864;5865 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovsxd.q.512(<8 x i32> %x0, <8 x i64> %x1, i8 -1)5866 ret <8 x i64> %res5867}5868 5869define <8 x i64>@test_int_x86_avx512_mask_pmovsxd_q_512(<8 x i32> %x0, <8 x i64> %x1, i8 %x2) #0 {5870;5871; CHECK-LABEL: @test_int_x86_avx512_mask_pmovsxd_q_512(5872; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 85873; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 96), align 85874; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 85875; CHECK-NEXT: call void @llvm.donothing()5876; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i32> [[TMP1]], <8 x i32> splat (i32 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5877; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <8 x i32> [[X0:%.*]], <8 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5878; CHECK-NEXT: [[_MSPROP1:%.*]] = sext <8 x i32> [[_MSPROP]] to <8 x i64>5879; CHECK-NEXT: [[TMP5:%.*]] = sext <8 x i32> [[TMP4]] to <8 x i64>5880; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>5881; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[X2:%.*]] to <8 x i1>5882; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP1]], <8 x i64> [[TMP3]]5883; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP5]], [[X1:%.*]]5884; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[_MSPROP1]]5885; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP3]]5886; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP11]], <8 x i64> [[TMP8]]5887; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP5]], <8 x i64> [[X1]]5888; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85889; CHECK-NEXT: ret <8 x i64> [[TMP12]]5890;5891 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovsxd.q.512(<8 x i32> %x0, <8 x i64> %x1, i8 %x2)5892 ret <8 x i64> %res5893}5894 5895define <8 x i64>@test_int_x86_avx512_maskz_pmovsxd_q_512(<8 x i32> %x0, i8 %x2) #0 {5896;5897; CHECK-LABEL: @test_int_x86_avx512_maskz_pmovsxd_q_512(5898; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 85899; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 85900; CHECK-NEXT: call void @llvm.donothing()5901; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i32> [[TMP1]], <8 x i32> splat (i32 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5902; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x i32> [[X0:%.*]], <8 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5903; CHECK-NEXT: [[_MSPROP1:%.*]] = sext <8 x i32> [[_MSPROP]] to <8 x i64>5904; CHECK-NEXT: [[TMP4:%.*]] = sext <8 x i32> [[TMP3]] to <8 x i64>5905; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>5906; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[X2:%.*]] to <8 x i1>5907; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[_MSPROP1]], <8 x i64> zeroinitializer5908; CHECK-NEXT: [[TMP8:%.*]] = xor <8 x i64> [[TMP4]], zeroinitializer5909; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[_MSPROP1]]5910; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], zeroinitializer5911; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP10]], <8 x i64> [[TMP7]]5912; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP4]], <8 x i64> zeroinitializer5913; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85914; CHECK-NEXT: ret <8 x i64> [[TMP11]]5915;5916 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovsxd.q.512(<8 x i32> %x0, <8 x i64> zeroinitializer, i8 %x2)5917 ret <8 x i64> %res5918}5919 5920declare <16 x i32> @llvm.x86.avx512.mask.pmovsxw.d.512(<16 x i16>, <16 x i32>, i16)5921 5922define <16 x i32>@test_int_x86_avx512_pmovsxw_d_512(<16 x i16> %x0, <16 x i32> %x1) #0 {5923; CHECK-LABEL: @test_int_x86_avx512_pmovsxw_d_512(5924; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i16>, ptr @__msan_param_tls, align 85925; CHECK-NEXT: call void @llvm.donothing()5926; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i16> [[TMP1]], <16 x i16> splat (i16 -1), <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5927; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <16 x i16> [[X0:%.*]], <16 x i16> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5928; CHECK-NEXT: [[_MSPROP1:%.*]] = sext <16 x i16> [[_MSPROP]] to <16 x i32>5929; CHECK-NEXT: [[TMP3:%.*]] = sext <16 x i16> [[TMP2]] to <16 x i32>5930; CHECK-NEXT: store <16 x i32> [[_MSPROP1]], ptr @__msan_retval_tls, align 85931; CHECK-NEXT: ret <16 x i32> [[TMP3]]5932;5933 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovsxw.d.512(<16 x i16> %x0, <16 x i32> %x1, i16 -1)5934 ret <16 x i32> %res5935}5936 5937define <16 x i32>@test_int_x86_avx512_mask_pmovsxw_d_512(<16 x i16> %x0, <16 x i32> %x1, i16 %x2) #0 {5938;5939; CHECK-LABEL: @test_int_x86_avx512_mask_pmovsxw_d_512(5940; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i16>, ptr @__msan_param_tls, align 85941; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 96), align 85942; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 85943; CHECK-NEXT: call void @llvm.donothing()5944; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i16> [[TMP1]], <16 x i16> splat (i16 -1), <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5945; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <16 x i16> [[X0:%.*]], <16 x i16> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5946; CHECK-NEXT: [[_MSPROP1:%.*]] = sext <16 x i16> [[_MSPROP]] to <16 x i32>5947; CHECK-NEXT: [[TMP5:%.*]] = sext <16 x i16> [[TMP4]] to <16 x i32>5948; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>5949; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[X2:%.*]] to <16 x i1>5950; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP1]], <16 x i32> [[TMP3]]5951; CHECK-NEXT: [[TMP9:%.*]] = xor <16 x i32> [[TMP5]], [[X1:%.*]]5952; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[_MSPROP1]]5953; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP3]]5954; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP11]], <16 x i32> [[TMP8]]5955; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP5]], <16 x i32> [[X1]]5956; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85957; CHECK-NEXT: ret <16 x i32> [[TMP12]]5958;5959 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovsxw.d.512(<16 x i16> %x0, <16 x i32> %x1, i16 %x2)5960 ret <16 x i32> %res5961}5962 5963define <16 x i32>@test_int_x86_avx512_maskz_pmovsxw_d_512(<16 x i16> %x0, i16 %x2) #0 {5964;5965; CHECK-LABEL: @test_int_x86_avx512_maskz_pmovsxw_d_512(5966; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i16>, ptr @__msan_param_tls, align 85967; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 85968; CHECK-NEXT: call void @llvm.donothing()5969; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i16> [[TMP1]], <16 x i16> splat (i16 -1), <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5970; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <16 x i16> [[X0:%.*]], <16 x i16> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>5971; CHECK-NEXT: [[_MSPROP1:%.*]] = sext <16 x i16> [[_MSPROP]] to <16 x i32>5972; CHECK-NEXT: [[TMP4:%.*]] = sext <16 x i16> [[TMP3]] to <16 x i32>5973; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>5974; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[X2:%.*]] to <16 x i1>5975; CHECK-NEXT: [[TMP7:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[_MSPROP1]], <16 x i32> zeroinitializer5976; CHECK-NEXT: [[TMP8:%.*]] = xor <16 x i32> [[TMP4]], zeroinitializer5977; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], [[_MSPROP1]]5978; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], zeroinitializer5979; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[TMP10]], <16 x i32> [[TMP7]]5980; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP4]], <16 x i32> zeroinitializer5981; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85982; CHECK-NEXT: ret <16 x i32> [[TMP11]]5983;5984 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovsxw.d.512(<16 x i16> %x0, <16 x i32> zeroinitializer, i16 %x2)5985 ret <16 x i32> %res5986}5987 5988declare <8 x i64> @llvm.x86.avx512.mask.pmovsxw.q.512(<8 x i16>, <8 x i64>, i8)5989 5990define <8 x i64>@test_int_x86_avx512_pmovsxw_q_512(<8 x i16> %x0, <8 x i64> %x1) #0 {5991; CHECK-LABEL: @test_int_x86_avx512_pmovsxw_q_512(5992; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr @__msan_param_tls, align 85993; CHECK-NEXT: call void @llvm.donothing()5994; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i16> [[TMP1]], <8 x i16> splat (i16 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5995; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x i16> [[X0:%.*]], <8 x i16> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>5996; CHECK-NEXT: [[_MSPROP1:%.*]] = sext <8 x i16> [[_MSPROP]] to <8 x i64>5997; CHECK-NEXT: [[TMP3:%.*]] = sext <8 x i16> [[TMP2]] to <8 x i64>5998; CHECK-NEXT: store <8 x i64> [[_MSPROP1]], ptr @__msan_retval_tls, align 85999; CHECK-NEXT: ret <8 x i64> [[TMP3]]6000;6001 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovsxw.q.512(<8 x i16> %x0, <8 x i64> %x1, i8 -1)6002 ret <8 x i64> %res6003}6004 6005define <8 x i64>@test_int_x86_avx512_mask_pmovsxw_q_512(<8 x i16> %x0, <8 x i64> %x1, i8 %x2) #0 {6006;6007; CHECK-LABEL: @test_int_x86_avx512_mask_pmovsxw_q_512(6008; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr @__msan_param_tls, align 86009; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 86010; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 86011; CHECK-NEXT: call void @llvm.donothing()6012; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i16> [[TMP1]], <8 x i16> splat (i16 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>6013; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <8 x i16> [[X0:%.*]], <8 x i16> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>6014; CHECK-NEXT: [[_MSPROP1:%.*]] = sext <8 x i16> [[_MSPROP]] to <8 x i64>6015; CHECK-NEXT: [[TMP5:%.*]] = sext <8 x i16> [[TMP4]] to <8 x i64>6016; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>6017; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[X2:%.*]] to <8 x i1>6018; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP1]], <8 x i64> [[TMP3]]6019; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP5]], [[X1:%.*]]6020; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[_MSPROP1]]6021; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP3]]6022; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP11]], <8 x i64> [[TMP8]]6023; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP5]], <8 x i64> [[X1]]6024; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86025; CHECK-NEXT: ret <8 x i64> [[TMP12]]6026;6027 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovsxw.q.512(<8 x i16> %x0, <8 x i64> %x1, i8 %x2)6028 ret <8 x i64> %res6029}6030 6031define <8 x i64>@test_int_x86_avx512_maskz_pmovsxw_q_512(<8 x i16> %x0, i8 %x2) #0 {6032;6033; CHECK-LABEL: @test_int_x86_avx512_maskz_pmovsxw_q_512(6034; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr @__msan_param_tls, align 86035; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 86036; CHECK-NEXT: call void @llvm.donothing()6037; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i16> [[TMP1]], <8 x i16> splat (i16 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>6038; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x i16> [[X0:%.*]], <8 x i16> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>6039; CHECK-NEXT: [[_MSPROP1:%.*]] = sext <8 x i16> [[_MSPROP]] to <8 x i64>6040; CHECK-NEXT: [[TMP4:%.*]] = sext <8 x i16> [[TMP3]] to <8 x i64>6041; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>6042; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[X2:%.*]] to <8 x i1>6043; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[_MSPROP1]], <8 x i64> zeroinitializer6044; CHECK-NEXT: [[TMP8:%.*]] = xor <8 x i64> [[TMP4]], zeroinitializer6045; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[_MSPROP1]]6046; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], zeroinitializer6047; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP10]], <8 x i64> [[TMP7]]6048; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP4]], <8 x i64> zeroinitializer6049; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86050; CHECK-NEXT: ret <8 x i64> [[TMP11]]6051;6052 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovsxw.q.512(<8 x i16> %x0, <8 x i64> zeroinitializer, i8 %x2)6053 ret <8 x i64> %res6054}6055 6056declare <16 x i32> @llvm.x86.avx512.prolv.d.512(<16 x i32>, <16 x i32>)6057 6058define <16 x i32>@test_int_x86_avx512_prolv_d_512(<16 x i32> %x0, <16 x i32> %x1) #0 {6059; CHECK-LABEL: @test_int_x86_avx512_prolv_d_512(6060; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 86061; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86062; CHECK-NEXT: call void @llvm.donothing()6063; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer6064; CHECK-NEXT: [[TMP4:%.*]] = sext <16 x i1> [[TMP3]] to <16 x i32>6065; CHECK-NEXT: [[TMP5:%.*]] = call <16 x i32> @llvm.fshl.v16i32(<16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> [[X1:%.*]])6066; CHECK-NEXT: [[TMP6:%.*]] = or <16 x i32> [[TMP5]], [[TMP4]]6067; CHECK-NEXT: [[TMP7:%.*]] = call <16 x i32> @llvm.fshl.v16i32(<16 x i32> [[X0:%.*]], <16 x i32> [[X0]], <16 x i32> [[X1]])6068; CHECK-NEXT: store <16 x i32> [[TMP6]], ptr @__msan_retval_tls, align 86069; CHECK-NEXT: ret <16 x i32> [[TMP7]]6070;6071 %1 = call <16 x i32> @llvm.x86.avx512.prolv.d.512(<16 x i32> %x0, <16 x i32> %x1)6072 ret <16 x i32> %16073}6074 6075define <16 x i32>@test_int_x86_avx512_mask_prolv_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) #0 {6076;6077; CHECK-LABEL: @test_int_x86_avx512_mask_prolv_d_512(6078; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 86079; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86080; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 86081; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86082; CHECK-NEXT: call void @llvm.donothing()6083; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer6084; CHECK-NEXT: [[TMP6:%.*]] = sext <16 x i1> [[TMP5]] to <16 x i32>6085; CHECK-NEXT: [[TMP7:%.*]] = call <16 x i32> @llvm.fshl.v16i32(<16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> [[X1:%.*]])6086; CHECK-NEXT: [[TMP8:%.*]] = or <16 x i32> [[TMP7]], [[TMP6]]6087; CHECK-NEXT: [[TMP9:%.*]] = call <16 x i32> @llvm.fshl.v16i32(<16 x i32> [[X0:%.*]], <16 x i32> [[X0]], <16 x i32> [[X1]])6088; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>6089; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>6090; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP8]], <16 x i32> [[TMP4]]6091; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i32> [[TMP9]], [[X2:%.*]]6092; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], [[TMP8]]6093; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], [[TMP4]]6094; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP15]], <16 x i32> [[TMP12]]6095; CHECK-NEXT: [[TMP16:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP9]], <16 x i32> [[X2]]6096; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86097; CHECK-NEXT: ret <16 x i32> [[TMP16]]6098;6099 %1 = call <16 x i32> @llvm.x86.avx512.prolv.d.512(<16 x i32> %x0, <16 x i32> %x1)6100 %2 = bitcast i16 %x3 to <16 x i1>6101 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x26102 ret <16 x i32> %36103}6104 6105define <16 x i32>@test_int_x86_avx512_maskz_prolv_d_512(<16 x i32> %x0, <16 x i32> %x1, i16 %x3) #0 {6106;6107; CHECK-LABEL: @test_int_x86_avx512_maskz_prolv_d_512(6108; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 86109; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86110; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86111; CHECK-NEXT: call void @llvm.donothing()6112; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer6113; CHECK-NEXT: [[TMP5:%.*]] = sext <16 x i1> [[TMP4]] to <16 x i32>6114; CHECK-NEXT: [[TMP6:%.*]] = call <16 x i32> @llvm.fshl.v16i32(<16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> [[X1:%.*]])6115; CHECK-NEXT: [[TMP7:%.*]] = or <16 x i32> [[TMP6]], [[TMP5]]6116; CHECK-NEXT: [[TMP8:%.*]] = call <16 x i32> @llvm.fshl.v16i32(<16 x i32> [[X0:%.*]], <16 x i32> [[X0]], <16 x i32> [[X1]])6117; CHECK-NEXT: [[TMP9:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>6118; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>6119; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP7]], <16 x i32> zeroinitializer6120; CHECK-NEXT: [[TMP12:%.*]] = xor <16 x i32> [[TMP8]], zeroinitializer6121; CHECK-NEXT: [[TMP13:%.*]] = or <16 x i32> [[TMP12]], [[TMP7]]6122; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], zeroinitializer6123; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP9]], <16 x i32> [[TMP14]], <16 x i32> [[TMP11]]6124; CHECK-NEXT: [[TMP15:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP8]], <16 x i32> zeroinitializer6125; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86126; CHECK-NEXT: ret <16 x i32> [[TMP15]]6127;6128 %1 = call <16 x i32> @llvm.x86.avx512.prolv.d.512(<16 x i32> %x0, <16 x i32> %x1)6129 %2 = bitcast i16 %x3 to <16 x i1>6130 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer6131 ret <16 x i32> %36132}6133 6134declare <8 x i64> @llvm.x86.avx512.prolv.q.512(<8 x i64>, <8 x i64>)6135 6136define <8 x i64>@test_int_x86_avx512_prolv_q_512(<8 x i64> %x0, <8 x i64> %x1) #0 {6137; CHECK-LABEL: @test_int_x86_avx512_prolv_q_512(6138; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 86139; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86140; CHECK-NEXT: call void @llvm.donothing()6141; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <8 x i64> [[TMP2]], zeroinitializer6142; CHECK-NEXT: [[TMP4:%.*]] = sext <8 x i1> [[TMP3]] to <8 x i64>6143; CHECK-NEXT: [[TMP5:%.*]] = call <8 x i64> @llvm.fshl.v8i64(<8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i64> [[X1:%.*]])6144; CHECK-NEXT: [[TMP6:%.*]] = or <8 x i64> [[TMP5]], [[TMP4]]6145; CHECK-NEXT: [[TMP7:%.*]] = call <8 x i64> @llvm.fshl.v8i64(<8 x i64> [[X0:%.*]], <8 x i64> [[X0]], <8 x i64> [[X1]])6146; CHECK-NEXT: store <8 x i64> [[TMP6]], ptr @__msan_retval_tls, align 86147; CHECK-NEXT: ret <8 x i64> [[TMP7]]6148;6149 %1 = call <8 x i64> @llvm.x86.avx512.prolv.q.512(<8 x i64> %x0, <8 x i64> %x1)6150 ret <8 x i64> %16151}6152 6153define <8 x i64>@test_int_x86_avx512_mask_prolv_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) #0 {6154;6155; CHECK-LABEL: @test_int_x86_avx512_mask_prolv_q_512(6156; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 86157; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86158; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 86159; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86160; CHECK-NEXT: call void @llvm.donothing()6161; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <8 x i64> [[TMP2]], zeroinitializer6162; CHECK-NEXT: [[TMP6:%.*]] = sext <8 x i1> [[TMP5]] to <8 x i64>6163; CHECK-NEXT: [[TMP7:%.*]] = call <8 x i64> @llvm.fshl.v8i64(<8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i64> [[X1:%.*]])6164; CHECK-NEXT: [[TMP8:%.*]] = or <8 x i64> [[TMP7]], [[TMP6]]6165; CHECK-NEXT: [[TMP9:%.*]] = call <8 x i64> @llvm.fshl.v8i64(<8 x i64> [[X0:%.*]], <8 x i64> [[X0]], <8 x i64> [[X1]])6166; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>6167; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>6168; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP8]], <8 x i64> [[TMP4]]6169; CHECK-NEXT: [[TMP13:%.*]] = xor <8 x i64> [[TMP9]], [[X2:%.*]]6170; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], [[TMP8]]6171; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], [[TMP4]]6172; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP15]], <8 x i64> [[TMP12]]6173; CHECK-NEXT: [[TMP16:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP9]], <8 x i64> [[X2]]6174; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86175; CHECK-NEXT: ret <8 x i64> [[TMP16]]6176;6177 %1 = call <8 x i64> @llvm.x86.avx512.prolv.q.512(<8 x i64> %x0, <8 x i64> %x1)6178 %2 = bitcast i8 %x3 to <8 x i1>6179 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %x26180 ret <8 x i64> %36181}6182 6183define <8 x i64>@test_int_x86_avx512_maskz_prolv_q_512(<8 x i64> %x0, <8 x i64> %x1, i8 %x3) #0 {6184;6185; CHECK-LABEL: @test_int_x86_avx512_maskz_prolv_q_512(6186; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 86187; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86188; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86189; CHECK-NEXT: call void @llvm.donothing()6190; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <8 x i64> [[TMP2]], zeroinitializer6191; CHECK-NEXT: [[TMP5:%.*]] = sext <8 x i1> [[TMP4]] to <8 x i64>6192; CHECK-NEXT: [[TMP6:%.*]] = call <8 x i64> @llvm.fshl.v8i64(<8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i64> [[X1:%.*]])6193; CHECK-NEXT: [[TMP7:%.*]] = or <8 x i64> [[TMP6]], [[TMP5]]6194; CHECK-NEXT: [[TMP8:%.*]] = call <8 x i64> @llvm.fshl.v8i64(<8 x i64> [[X0:%.*]], <8 x i64> [[X0]], <8 x i64> [[X1]])6195; CHECK-NEXT: [[TMP9:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>6196; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>6197; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP7]], <8 x i64> zeroinitializer6198; CHECK-NEXT: [[TMP12:%.*]] = xor <8 x i64> [[TMP8]], zeroinitializer6199; CHECK-NEXT: [[TMP13:%.*]] = or <8 x i64> [[TMP12]], [[TMP7]]6200; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], zeroinitializer6201; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP9]], <8 x i64> [[TMP14]], <8 x i64> [[TMP11]]6202; CHECK-NEXT: [[TMP15:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP8]], <8 x i64> zeroinitializer6203; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86204; CHECK-NEXT: ret <8 x i64> [[TMP15]]6205;6206 %1 = call <8 x i64> @llvm.x86.avx512.prolv.q.512(<8 x i64> %x0, <8 x i64> %x1)6207 %2 = bitcast i8 %x3 to <8 x i1>6208 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> zeroinitializer6209 ret <8 x i64> %36210}6211 6212declare <16 x i32> @llvm.x86.avx512.prorv.d.512(<16 x i32>, <16 x i32>)6213 6214define <16 x i32>@test_int_x86_avx512_prorv_d_512(<16 x i32> %x0, <16 x i32> %x1) #0 {6215; CHECK-LABEL: @test_int_x86_avx512_prorv_d_512(6216; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 86217; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86218; CHECK-NEXT: call void @llvm.donothing()6219; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer6220; CHECK-NEXT: [[TMP4:%.*]] = sext <16 x i1> [[TMP3]] to <16 x i32>6221; CHECK-NEXT: [[TMP5:%.*]] = call <16 x i32> @llvm.fshr.v16i32(<16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> [[X1:%.*]])6222; CHECK-NEXT: [[TMP6:%.*]] = or <16 x i32> [[TMP5]], [[TMP4]]6223; CHECK-NEXT: [[TMP7:%.*]] = call <16 x i32> @llvm.fshr.v16i32(<16 x i32> [[X0:%.*]], <16 x i32> [[X0]], <16 x i32> [[X1]])6224; CHECK-NEXT: store <16 x i32> [[TMP6]], ptr @__msan_retval_tls, align 86225; CHECK-NEXT: ret <16 x i32> [[TMP7]]6226;6227 %1 = call <16 x i32> @llvm.x86.avx512.prorv.d.512(<16 x i32> %x0, <16 x i32> %x1)6228 ret <16 x i32> %16229}6230 6231define <16 x i32>@test_int_x86_avx512_mask_prorv_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) #0 {6232;6233; CHECK-LABEL: @test_int_x86_avx512_mask_prorv_d_512(6234; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 86235; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86236; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 86237; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86238; CHECK-NEXT: call void @llvm.donothing()6239; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer6240; CHECK-NEXT: [[TMP6:%.*]] = sext <16 x i1> [[TMP5]] to <16 x i32>6241; CHECK-NEXT: [[TMP7:%.*]] = call <16 x i32> @llvm.fshr.v16i32(<16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> [[X1:%.*]])6242; CHECK-NEXT: [[TMP8:%.*]] = or <16 x i32> [[TMP7]], [[TMP6]]6243; CHECK-NEXT: [[TMP9:%.*]] = call <16 x i32> @llvm.fshr.v16i32(<16 x i32> [[X0:%.*]], <16 x i32> [[X0]], <16 x i32> [[X1]])6244; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>6245; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>6246; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP8]], <16 x i32> [[TMP4]]6247; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i32> [[TMP9]], [[X2:%.*]]6248; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], [[TMP8]]6249; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], [[TMP4]]6250; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP15]], <16 x i32> [[TMP12]]6251; CHECK-NEXT: [[TMP16:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP9]], <16 x i32> [[X2]]6252; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86253; CHECK-NEXT: ret <16 x i32> [[TMP16]]6254;6255 %1 = call <16 x i32> @llvm.x86.avx512.prorv.d.512(<16 x i32> %x0, <16 x i32> %x1)6256 %2 = bitcast i16 %x3 to <16 x i1>6257 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x26258 ret <16 x i32> %36259}6260 6261define <16 x i32>@test_int_x86_avx512_maskz_prorv_d_512(<16 x i32> %x0, <16 x i32> %x1, i16 %x3) #0 {6262;6263; CHECK-LABEL: @test_int_x86_avx512_maskz_prorv_d_512(6264; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 86265; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86266; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86267; CHECK-NEXT: call void @llvm.donothing()6268; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer6269; CHECK-NEXT: [[TMP5:%.*]] = sext <16 x i1> [[TMP4]] to <16 x i32>6270; CHECK-NEXT: [[TMP6:%.*]] = call <16 x i32> @llvm.fshr.v16i32(<16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> [[X1:%.*]])6271; CHECK-NEXT: [[TMP7:%.*]] = or <16 x i32> [[TMP6]], [[TMP5]]6272; CHECK-NEXT: [[TMP8:%.*]] = call <16 x i32> @llvm.fshr.v16i32(<16 x i32> [[X0:%.*]], <16 x i32> [[X0]], <16 x i32> [[X1]])6273; CHECK-NEXT: [[TMP9:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>6274; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>6275; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP7]], <16 x i32> zeroinitializer6276; CHECK-NEXT: [[TMP12:%.*]] = xor <16 x i32> [[TMP8]], zeroinitializer6277; CHECK-NEXT: [[TMP13:%.*]] = or <16 x i32> [[TMP12]], [[TMP7]]6278; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], zeroinitializer6279; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP9]], <16 x i32> [[TMP14]], <16 x i32> [[TMP11]]6280; CHECK-NEXT: [[TMP15:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP8]], <16 x i32> zeroinitializer6281; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86282; CHECK-NEXT: ret <16 x i32> [[TMP15]]6283;6284 %1 = call <16 x i32> @llvm.x86.avx512.prorv.d.512(<16 x i32> %x0, <16 x i32> %x1)6285 %2 = bitcast i16 %x3 to <16 x i1>6286 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer6287 ret <16 x i32> %36288}6289 6290declare <8 x i64> @llvm.x86.avx512.prorv.q.512(<8 x i64>, <8 x i64>)6291 6292define <8 x i64>@test_int_x86_avx512_prorv_q_512(<8 x i64> %x0, <8 x i64> %x1) #0 {6293; CHECK-LABEL: @test_int_x86_avx512_prorv_q_512(6294; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 86295; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86296; CHECK-NEXT: call void @llvm.donothing()6297; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <8 x i64> [[TMP2]], zeroinitializer6298; CHECK-NEXT: [[TMP4:%.*]] = sext <8 x i1> [[TMP3]] to <8 x i64>6299; CHECK-NEXT: [[TMP5:%.*]] = call <8 x i64> @llvm.fshr.v8i64(<8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i64> [[X1:%.*]])6300; CHECK-NEXT: [[TMP6:%.*]] = or <8 x i64> [[TMP5]], [[TMP4]]6301; CHECK-NEXT: [[TMP7:%.*]] = call <8 x i64> @llvm.fshr.v8i64(<8 x i64> [[X0:%.*]], <8 x i64> [[X0]], <8 x i64> [[X1]])6302; CHECK-NEXT: store <8 x i64> [[TMP6]], ptr @__msan_retval_tls, align 86303; CHECK-NEXT: ret <8 x i64> [[TMP7]]6304;6305 %1 = call <8 x i64> @llvm.x86.avx512.prorv.q.512(<8 x i64> %x0, <8 x i64> %x1)6306 ret <8 x i64> %16307}6308 6309define <8 x i64>@test_int_x86_avx512_mask_prorv_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) #0 {6310;6311; CHECK-LABEL: @test_int_x86_avx512_mask_prorv_q_512(6312; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 86313; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86314; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 86315; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86316; CHECK-NEXT: call void @llvm.donothing()6317; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <8 x i64> [[TMP2]], zeroinitializer6318; CHECK-NEXT: [[TMP6:%.*]] = sext <8 x i1> [[TMP5]] to <8 x i64>6319; CHECK-NEXT: [[TMP7:%.*]] = call <8 x i64> @llvm.fshr.v8i64(<8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i64> [[X1:%.*]])6320; CHECK-NEXT: [[TMP8:%.*]] = or <8 x i64> [[TMP7]], [[TMP6]]6321; CHECK-NEXT: [[TMP9:%.*]] = call <8 x i64> @llvm.fshr.v8i64(<8 x i64> [[X0:%.*]], <8 x i64> [[X0]], <8 x i64> [[X1]])6322; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>6323; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>6324; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP8]], <8 x i64> [[TMP4]]6325; CHECK-NEXT: [[TMP13:%.*]] = xor <8 x i64> [[TMP9]], [[X2:%.*]]6326; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], [[TMP8]]6327; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], [[TMP4]]6328; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP15]], <8 x i64> [[TMP12]]6329; CHECK-NEXT: [[TMP16:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP9]], <8 x i64> [[X2]]6330; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86331; CHECK-NEXT: ret <8 x i64> [[TMP16]]6332;6333 %1 = call <8 x i64> @llvm.x86.avx512.prorv.q.512(<8 x i64> %x0, <8 x i64> %x1)6334 %2 = bitcast i8 %x3 to <8 x i1>6335 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %x26336 ret <8 x i64> %36337}6338 6339define <8 x i64>@test_int_x86_avx512_maskz_prorv_q_512(<8 x i64> %x0, <8 x i64> %x1, i8 %x3) #0 {6340;6341; CHECK-LABEL: @test_int_x86_avx512_maskz_prorv_q_512(6342; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 86343; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86344; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86345; CHECK-NEXT: call void @llvm.donothing()6346; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <8 x i64> [[TMP2]], zeroinitializer6347; CHECK-NEXT: [[TMP5:%.*]] = sext <8 x i1> [[TMP4]] to <8 x i64>6348; CHECK-NEXT: [[TMP6:%.*]] = call <8 x i64> @llvm.fshr.v8i64(<8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i64> [[X1:%.*]])6349; CHECK-NEXT: [[TMP7:%.*]] = or <8 x i64> [[TMP6]], [[TMP5]]6350; CHECK-NEXT: [[TMP8:%.*]] = call <8 x i64> @llvm.fshr.v8i64(<8 x i64> [[X0:%.*]], <8 x i64> [[X0]], <8 x i64> [[X1]])6351; CHECK-NEXT: [[TMP9:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>6352; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>6353; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP7]], <8 x i64> zeroinitializer6354; CHECK-NEXT: [[TMP12:%.*]] = xor <8 x i64> [[TMP8]], zeroinitializer6355; CHECK-NEXT: [[TMP13:%.*]] = or <8 x i64> [[TMP12]], [[TMP7]]6356; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], zeroinitializer6357; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP9]], <8 x i64> [[TMP14]], <8 x i64> [[TMP11]]6358; CHECK-NEXT: [[TMP15:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP8]], <8 x i64> zeroinitializer6359; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86360; CHECK-NEXT: ret <8 x i64> [[TMP15]]6361;6362 %1 = call <8 x i64> @llvm.x86.avx512.prorv.q.512(<8 x i64> %x0, <8 x i64> %x1)6363 %2 = bitcast i8 %x3 to <8 x i1>6364 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> zeroinitializer6365 ret <8 x i64> %36366}6367 6368declare <16 x i32> @llvm.x86.avx512.prol.d.512(<16 x i32>, i32)6369 6370define { <16 x i32>, <16 x i32>, <16 x i32> } @test_int_x86_avx512_prol_d_512(<16 x i32> %x0, i32 %x1, <16 x i32> %x2, i16 %x3) #0 {6371;6372; CHECK-LABEL: @test_int_x86_avx512_prol_d_512(6373; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 86374; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 86375; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 86376; CHECK-NEXT: call void @llvm.donothing()6377; CHECK-NEXT: [[TMP4:%.*]] = call <16 x i32> @llvm.fshl.v16i32(<16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> splat (i32 3))6378; CHECK-NEXT: [[TMP5:%.*]] = or <16 x i32> [[TMP4]], zeroinitializer6379; CHECK-NEXT: [[TMP6:%.*]] = call <16 x i32> @llvm.fshl.v16i32(<16 x i32> [[X0:%.*]], <16 x i32> [[X0]], <16 x i32> splat (i32 3))6380; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>6381; CHECK-NEXT: [[TMP8:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>6382; CHECK-NEXT: [[TMP9:%.*]] = select <16 x i1> [[TMP8]], <16 x i32> [[TMP5]], <16 x i32> [[TMP3]]6383; CHECK-NEXT: [[TMP10:%.*]] = xor <16 x i32> [[TMP6]], [[X2:%.*]]6384; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP5]]6385; CHECK-NEXT: [[TMP12:%.*]] = or <16 x i32> [[TMP11]], [[TMP3]]6386; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP12]], <16 x i32> [[TMP9]]6387; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP8]], <16 x i32> [[TMP6]], <16 x i32> [[X2]]6388; CHECK-NEXT: [[TMP14:%.*]] = call <16 x i32> @llvm.fshl.v16i32(<16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> splat (i32 4))6389; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], zeroinitializer6390; CHECK-NEXT: [[TMP16:%.*]] = call <16 x i32> @llvm.fshl.v16i32(<16 x i32> [[X0]], <16 x i32> [[X0]], <16 x i32> splat (i32 4))6391; CHECK-NEXT: [[TMP17:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>6392; CHECK-NEXT: [[TMP18:%.*]] = bitcast i16 [[X3]] to <16 x i1>6393; CHECK-NEXT: [[TMP19:%.*]] = select <16 x i1> [[TMP18]], <16 x i32> [[TMP15]], <16 x i32> zeroinitializer6394; CHECK-NEXT: [[TMP20:%.*]] = xor <16 x i32> [[TMP16]], zeroinitializer6395; CHECK-NEXT: [[TMP21:%.*]] = or <16 x i32> [[TMP20]], [[TMP15]]6396; CHECK-NEXT: [[TMP22:%.*]] = or <16 x i32> [[TMP21]], zeroinitializer6397; CHECK-NEXT: [[_MSPROP_SELECT1:%.*]] = select <16 x i1> [[TMP17]], <16 x i32> [[TMP22]], <16 x i32> [[TMP19]]6398; CHECK-NEXT: [[TMP23:%.*]] = select <16 x i1> [[TMP18]], <16 x i32> [[TMP16]], <16 x i32> zeroinitializer6399; CHECK-NEXT: [[TMP24:%.*]] = call <16 x i32> @llvm.fshl.v16i32(<16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> splat (i32 5))6400; CHECK-NEXT: [[TMP25:%.*]] = or <16 x i32> [[TMP24]], zeroinitializer6401; CHECK-NEXT: [[TMP26:%.*]] = call <16 x i32> @llvm.fshl.v16i32(<16 x i32> [[X0]], <16 x i32> [[X0]], <16 x i32> splat (i32 5))6402; CHECK-NEXT: [[TMP27:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } { <16 x i32> splat (i32 -1), <16 x i32> splat (i32 -1), <16 x i32> splat (i32 -1) }, <16 x i32> [[_MSPROP_SELECT]], 06403; CHECK-NEXT: [[RES3:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> [[TMP13]], 06404; CHECK-NEXT: [[TMP28:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[TMP27]], <16 x i32> [[_MSPROP_SELECT1]], 16405; CHECK-NEXT: [[RES4:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[RES3]], <16 x i32> [[TMP23]], 16406; CHECK-NEXT: [[TMP29:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[TMP28]], <16 x i32> [[TMP25]], 26407; CHECK-NEXT: [[RES5:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[RES4]], <16 x i32> [[TMP26]], 26408; CHECK-NEXT: store { <16 x i32>, <16 x i32>, <16 x i32> } [[TMP29]], ptr @__msan_retval_tls, align 86409; CHECK-NEXT: ret { <16 x i32>, <16 x i32>, <16 x i32> } [[RES5]]6410;6411 %1 = call <16 x i32> @llvm.x86.avx512.prol.d.512(<16 x i32> %x0, i32 3)6412 %2 = bitcast i16 %x3 to <16 x i1>6413 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x26414 %4 = call <16 x i32> @llvm.x86.avx512.prol.d.512(<16 x i32> %x0, i32 4)6415 %5 = bitcast i16 %x3 to <16 x i1>6416 %6 = select <16 x i1> %5, <16 x i32> %4, <16 x i32> zeroinitializer6417 %7 = call <16 x i32> @llvm.x86.avx512.prol.d.512(<16 x i32> %x0, i32 5)6418 %res3 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> %3, 06419 %res4 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res3, <16 x i32> %6, 16420 %res5 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res4, <16 x i32> %7, 26421 ret { <16 x i32>, <16 x i32>, <16 x i32> } %res56422}6423 6424declare <8 x i64> @llvm.x86.avx512.prol.q.512(<8 x i64>, i32)6425 6426define { <8 x i64>, <8 x i64>, <8 x i64> } @test_int_x86_avx512_prol_q_512(<8 x i64> %x0, i32 %x1, <8 x i64> %x2, i8 %x3) #0 {6427;6428; CHECK-LABEL: @test_int_x86_avx512_prol_q_512(6429; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 86430; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 86431; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 86432; CHECK-NEXT: call void @llvm.donothing()6433; CHECK-NEXT: [[TMP4:%.*]] = call <8 x i64> @llvm.fshl.v8i64(<8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i64> splat (i64 3))6434; CHECK-NEXT: [[TMP5:%.*]] = or <8 x i64> [[TMP4]], zeroinitializer6435; CHECK-NEXT: [[TMP6:%.*]] = call <8 x i64> @llvm.fshl.v8i64(<8 x i64> [[X0:%.*]], <8 x i64> [[X0]], <8 x i64> splat (i64 3))6436; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>6437; CHECK-NEXT: [[TMP8:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>6438; CHECK-NEXT: [[TMP9:%.*]] = select <8 x i1> [[TMP8]], <8 x i64> [[TMP5]], <8 x i64> [[TMP3]]6439; CHECK-NEXT: [[TMP10:%.*]] = xor <8 x i64> [[TMP6]], [[X2:%.*]]6440; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP5]]6441; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], [[TMP3]]6442; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP12]], <8 x i64> [[TMP9]]6443; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP8]], <8 x i64> [[TMP6]], <8 x i64> [[X2]]6444; CHECK-NEXT: [[TMP14:%.*]] = call <8 x i64> @llvm.fshl.v8i64(<8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i64> splat (i64 4))6445; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], zeroinitializer6446; CHECK-NEXT: [[TMP16:%.*]] = call <8 x i64> @llvm.fshl.v8i64(<8 x i64> [[X0]], <8 x i64> [[X0]], <8 x i64> splat (i64 4))6447; CHECK-NEXT: [[TMP17:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>6448; CHECK-NEXT: [[TMP18:%.*]] = bitcast i8 [[X3]] to <8 x i1>6449; CHECK-NEXT: [[TMP19:%.*]] = select <8 x i1> [[TMP18]], <8 x i64> [[TMP15]], <8 x i64> zeroinitializer6450; CHECK-NEXT: [[TMP20:%.*]] = xor <8 x i64> [[TMP16]], zeroinitializer6451; CHECK-NEXT: [[TMP21:%.*]] = or <8 x i64> [[TMP20]], [[TMP15]]6452; CHECK-NEXT: [[TMP22:%.*]] = or <8 x i64> [[TMP21]], zeroinitializer6453; CHECK-NEXT: [[_MSPROP_SELECT1:%.*]] = select <8 x i1> [[TMP17]], <8 x i64> [[TMP22]], <8 x i64> [[TMP19]]6454; CHECK-NEXT: [[TMP23:%.*]] = select <8 x i1> [[TMP18]], <8 x i64> [[TMP16]], <8 x i64> zeroinitializer6455; CHECK-NEXT: [[TMP24:%.*]] = call <8 x i64> @llvm.fshl.v8i64(<8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i64> splat (i64 5))6456; CHECK-NEXT: [[TMP25:%.*]] = or <8 x i64> [[TMP24]], zeroinitializer6457; CHECK-NEXT: [[TMP26:%.*]] = call <8 x i64> @llvm.fshl.v8i64(<8 x i64> [[X0]], <8 x i64> [[X0]], <8 x i64> splat (i64 5))6458; CHECK-NEXT: [[TMP27:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } { <8 x i64> splat (i64 -1), <8 x i64> splat (i64 -1), <8 x i64> splat (i64 -1) }, <8 x i64> [[_MSPROP_SELECT]], 06459; CHECK-NEXT: [[RES3:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> [[TMP13]], 06460; CHECK-NEXT: [[TMP28:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[TMP27]], <8 x i64> [[_MSPROP_SELECT1]], 16461; CHECK-NEXT: [[RES4:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[RES3]], <8 x i64> [[TMP23]], 16462; CHECK-NEXT: [[TMP29:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[TMP28]], <8 x i64> [[TMP25]], 26463; CHECK-NEXT: [[RES5:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[RES4]], <8 x i64> [[TMP26]], 26464; CHECK-NEXT: store { <8 x i64>, <8 x i64>, <8 x i64> } [[TMP29]], ptr @__msan_retval_tls, align 86465; CHECK-NEXT: ret { <8 x i64>, <8 x i64>, <8 x i64> } [[RES5]]6466;6467 %1 = call <8 x i64> @llvm.x86.avx512.prol.q.512(<8 x i64> %x0, i32 3)6468 %2 = bitcast i8 %x3 to <8 x i1>6469 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %x26470 %4 = call <8 x i64> @llvm.x86.avx512.prol.q.512(<8 x i64> %x0, i32 4)6471 %5 = bitcast i8 %x3 to <8 x i1>6472 %6 = select <8 x i1> %5, <8 x i64> %4, <8 x i64> zeroinitializer6473 %7 = call <8 x i64> @llvm.x86.avx512.prol.q.512(<8 x i64> %x0, i32 5)6474 %res3 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> %3, 06475 %res4 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res3, <8 x i64> %6, 16476 %res5 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res4, <8 x i64> %7, 26477 ret { <8 x i64>, <8 x i64>, <8 x i64> } %res56478}6479 6480declare <16 x i32> @llvm.x86.avx512.pror.d.512(<16 x i32>, i32)6481 6482define { <16 x i32>, <16 x i32>, <16 x i32> } @test_int_x86_avx512_pror_d_512(<16 x i32> %x0, i32 %x1, <16 x i32> %x2, i16 %x3) #0 {6483;6484; CHECK-LABEL: @test_int_x86_avx512_pror_d_512(6485; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 86486; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 86487; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 86488; CHECK-NEXT: call void @llvm.donothing()6489; CHECK-NEXT: [[TMP4:%.*]] = call <16 x i32> @llvm.fshr.v16i32(<16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> splat (i32 3))6490; CHECK-NEXT: [[TMP5:%.*]] = or <16 x i32> [[TMP4]], zeroinitializer6491; CHECK-NEXT: [[TMP6:%.*]] = call <16 x i32> @llvm.fshr.v16i32(<16 x i32> [[X0:%.*]], <16 x i32> [[X0]], <16 x i32> splat (i32 3))6492; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>6493; CHECK-NEXT: [[TMP8:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>6494; CHECK-NEXT: [[TMP9:%.*]] = select <16 x i1> [[TMP8]], <16 x i32> [[TMP5]], <16 x i32> [[TMP3]]6495; CHECK-NEXT: [[TMP10:%.*]] = xor <16 x i32> [[TMP6]], [[X2:%.*]]6496; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP5]]6497; CHECK-NEXT: [[TMP12:%.*]] = or <16 x i32> [[TMP11]], [[TMP3]]6498; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP12]], <16 x i32> [[TMP9]]6499; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP8]], <16 x i32> [[TMP6]], <16 x i32> [[X2]]6500; CHECK-NEXT: [[TMP14:%.*]] = call <16 x i32> @llvm.fshr.v16i32(<16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> splat (i32 4))6501; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], zeroinitializer6502; CHECK-NEXT: [[TMP16:%.*]] = call <16 x i32> @llvm.fshr.v16i32(<16 x i32> [[X0]], <16 x i32> [[X0]], <16 x i32> splat (i32 4))6503; CHECK-NEXT: [[TMP17:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>6504; CHECK-NEXT: [[TMP18:%.*]] = bitcast i16 [[X3]] to <16 x i1>6505; CHECK-NEXT: [[TMP19:%.*]] = select <16 x i1> [[TMP18]], <16 x i32> [[TMP15]], <16 x i32> zeroinitializer6506; CHECK-NEXT: [[TMP20:%.*]] = xor <16 x i32> [[TMP16]], zeroinitializer6507; CHECK-NEXT: [[TMP21:%.*]] = or <16 x i32> [[TMP20]], [[TMP15]]6508; CHECK-NEXT: [[TMP22:%.*]] = or <16 x i32> [[TMP21]], zeroinitializer6509; CHECK-NEXT: [[_MSPROP_SELECT1:%.*]] = select <16 x i1> [[TMP17]], <16 x i32> [[TMP22]], <16 x i32> [[TMP19]]6510; CHECK-NEXT: [[TMP23:%.*]] = select <16 x i1> [[TMP18]], <16 x i32> [[TMP16]], <16 x i32> zeroinitializer6511; CHECK-NEXT: [[TMP24:%.*]] = call <16 x i32> @llvm.fshr.v16i32(<16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <16 x i32> splat (i32 5))6512; CHECK-NEXT: [[TMP25:%.*]] = or <16 x i32> [[TMP24]], zeroinitializer6513; CHECK-NEXT: [[TMP26:%.*]] = call <16 x i32> @llvm.fshr.v16i32(<16 x i32> [[X0]], <16 x i32> [[X0]], <16 x i32> splat (i32 5))6514; CHECK-NEXT: [[TMP27:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } { <16 x i32> splat (i32 -1), <16 x i32> splat (i32 -1), <16 x i32> splat (i32 -1) }, <16 x i32> [[_MSPROP_SELECT]], 06515; CHECK-NEXT: [[RES3:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> [[TMP13]], 06516; CHECK-NEXT: [[TMP28:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[TMP27]], <16 x i32> [[_MSPROP_SELECT1]], 16517; CHECK-NEXT: [[RES4:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[RES3]], <16 x i32> [[TMP23]], 16518; CHECK-NEXT: [[TMP29:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[TMP28]], <16 x i32> [[TMP25]], 26519; CHECK-NEXT: [[RES5:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[RES4]], <16 x i32> [[TMP26]], 26520; CHECK-NEXT: store { <16 x i32>, <16 x i32>, <16 x i32> } [[TMP29]], ptr @__msan_retval_tls, align 86521; CHECK-NEXT: ret { <16 x i32>, <16 x i32>, <16 x i32> } [[RES5]]6522;6523 %1 = call <16 x i32> @llvm.x86.avx512.pror.d.512(<16 x i32> %x0, i32 3)6524 %2 = bitcast i16 %x3 to <16 x i1>6525 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x26526 %4 = call <16 x i32> @llvm.x86.avx512.pror.d.512(<16 x i32> %x0, i32 4)6527 %5 = bitcast i16 %x3 to <16 x i1>6528 %6 = select <16 x i1> %5, <16 x i32> %4, <16 x i32> zeroinitializer6529 %7 = call <16 x i32> @llvm.x86.avx512.pror.d.512(<16 x i32> %x0, i32 5)6530 %res3 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> %3, 06531 %res4 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res3, <16 x i32> %6, 16532 %res5 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res4, <16 x i32> %7, 26533 ret { <16 x i32>, <16 x i32>, <16 x i32> } %res56534}6535 6536declare <8 x i64> @llvm.x86.avx512.pror.q.512(<8 x i64>, i32)6537 6538define { <8 x i64>, <8 x i64>, <8 x i64> } @test_int_x86_avx512_pror_q_512(<8 x i64> %x0, i32 %x1, <8 x i64> %x2, i8 %x3) #0 {6539;6540; CHECK-LABEL: @test_int_x86_avx512_pror_q_512(6541; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 86542; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 86543; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 86544; CHECK-NEXT: call void @llvm.donothing()6545; CHECK-NEXT: [[TMP4:%.*]] = call <8 x i64> @llvm.fshr.v8i64(<8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i64> splat (i64 3))6546; CHECK-NEXT: [[TMP5:%.*]] = or <8 x i64> [[TMP4]], zeroinitializer6547; CHECK-NEXT: [[TMP6:%.*]] = call <8 x i64> @llvm.fshr.v8i64(<8 x i64> [[X0:%.*]], <8 x i64> [[X0]], <8 x i64> splat (i64 3))6548; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>6549; CHECK-NEXT: [[TMP8:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>6550; CHECK-NEXT: [[TMP9:%.*]] = select <8 x i1> [[TMP8]], <8 x i64> [[TMP5]], <8 x i64> [[TMP3]]6551; CHECK-NEXT: [[TMP10:%.*]] = xor <8 x i64> [[TMP6]], [[X2:%.*]]6552; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP5]]6553; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], [[TMP3]]6554; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP12]], <8 x i64> [[TMP9]]6555; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP8]], <8 x i64> [[TMP6]], <8 x i64> [[X2]]6556; CHECK-NEXT: [[TMP14:%.*]] = call <8 x i64> @llvm.fshr.v8i64(<8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i64> splat (i64 4))6557; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], zeroinitializer6558; CHECK-NEXT: [[TMP16:%.*]] = call <8 x i64> @llvm.fshr.v8i64(<8 x i64> [[X0]], <8 x i64> [[X0]], <8 x i64> splat (i64 4))6559; CHECK-NEXT: [[TMP17:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>6560; CHECK-NEXT: [[TMP18:%.*]] = bitcast i8 [[X3]] to <8 x i1>6561; CHECK-NEXT: [[TMP19:%.*]] = select <8 x i1> [[TMP18]], <8 x i64> [[TMP15]], <8 x i64> zeroinitializer6562; CHECK-NEXT: [[TMP20:%.*]] = xor <8 x i64> [[TMP16]], zeroinitializer6563; CHECK-NEXT: [[TMP21:%.*]] = or <8 x i64> [[TMP20]], [[TMP15]]6564; CHECK-NEXT: [[TMP22:%.*]] = or <8 x i64> [[TMP21]], zeroinitializer6565; CHECK-NEXT: [[_MSPROP_SELECT1:%.*]] = select <8 x i1> [[TMP17]], <8 x i64> [[TMP22]], <8 x i64> [[TMP19]]6566; CHECK-NEXT: [[TMP23:%.*]] = select <8 x i1> [[TMP18]], <8 x i64> [[TMP16]], <8 x i64> zeroinitializer6567; CHECK-NEXT: [[TMP24:%.*]] = call <8 x i64> @llvm.fshr.v8i64(<8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <8 x i64> splat (i64 5))6568; CHECK-NEXT: [[TMP25:%.*]] = or <8 x i64> [[TMP24]], zeroinitializer6569; CHECK-NEXT: [[TMP26:%.*]] = call <8 x i64> @llvm.fshr.v8i64(<8 x i64> [[X0]], <8 x i64> [[X0]], <8 x i64> splat (i64 5))6570; CHECK-NEXT: [[TMP27:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } { <8 x i64> splat (i64 -1), <8 x i64> splat (i64 -1), <8 x i64> splat (i64 -1) }, <8 x i64> [[_MSPROP_SELECT]], 06571; CHECK-NEXT: [[RES3:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> [[TMP13]], 06572; CHECK-NEXT: [[TMP28:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[TMP27]], <8 x i64> [[_MSPROP_SELECT1]], 16573; CHECK-NEXT: [[RES4:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[RES3]], <8 x i64> [[TMP23]], 16574; CHECK-NEXT: [[TMP29:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[TMP28]], <8 x i64> [[TMP25]], 26575; CHECK-NEXT: [[RES5:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[RES4]], <8 x i64> [[TMP26]], 26576; CHECK-NEXT: store { <8 x i64>, <8 x i64>, <8 x i64> } [[TMP29]], ptr @__msan_retval_tls, align 86577; CHECK-NEXT: ret { <8 x i64>, <8 x i64>, <8 x i64> } [[RES5]]6578;6579 %1 = call <8 x i64> @llvm.x86.avx512.pror.q.512(<8 x i64> %x0, i32 3)6580 %2 = bitcast i8 %x3 to <8 x i1>6581 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %x26582 %4 = call <8 x i64> @llvm.x86.avx512.pror.q.512(<8 x i64> %x0, i32 4)6583 %5 = bitcast i8 %x3 to <8 x i1>6584 %6 = select <8 x i1> %5, <8 x i64> %4, <8 x i64> zeroinitializer6585 %7 = call <8 x i64> @llvm.x86.avx512.pror.q.512(<8 x i64> %x0, i32 5)6586 %res3 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> %3, 06587 %res4 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res3, <8 x i64> %6, 16588 %res5 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res4, <8 x i64> %7, 26589 ret { <8 x i64>, <8 x i64>, <8 x i64> } %res56590}6591 6592declare <8 x i64> @llvm.x86.avx512.mask.psrl.qi.512(<8 x i64>, i32, <8 x i64>, i8)6593 6594define { <8 x i64>, <8 x i64>, <8 x i64> } @test_int_x86_avx512_mask_psrl_qi_512(<8 x i64> %x0, i32 %x1, <8 x i64> %x2, i8 %x3) #0 {6595;6596; CHECK-LABEL: @test_int_x86_avx512_mask_psrl_qi_512(6597; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 86598; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 86599; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 86600; CHECK-NEXT: call void @llvm.donothing()6601; CHECK-NEXT: [[TMP4:%.*]] = call <8 x i64> @llvm.x86.avx512.psrli.q.512(<8 x i64> [[TMP1]], i32 4)6602; CHECK-NEXT: [[TMP5:%.*]] = or <8 x i64> [[TMP4]], zeroinitializer6603; CHECK-NEXT: [[TMP6:%.*]] = call <8 x i64> @llvm.x86.avx512.psrli.q.512(<8 x i64> [[X0:%.*]], i32 4)6604; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>6605; CHECK-NEXT: [[TMP8:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>6606; CHECK-NEXT: [[TMP9:%.*]] = select <8 x i1> [[TMP8]], <8 x i64> [[TMP5]], <8 x i64> [[TMP3]]6607; CHECK-NEXT: [[TMP10:%.*]] = xor <8 x i64> [[TMP6]], [[X2:%.*]]6608; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP5]]6609; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], [[TMP3]]6610; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP12]], <8 x i64> [[TMP9]]6611; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP8]], <8 x i64> [[TMP6]], <8 x i64> [[X2]]6612; CHECK-NEXT: [[TMP14:%.*]] = call <8 x i64> @llvm.x86.avx512.psrli.q.512(<8 x i64> [[TMP1]], i32 5)6613; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], zeroinitializer6614; CHECK-NEXT: [[TMP16:%.*]] = call <8 x i64> @llvm.x86.avx512.psrli.q.512(<8 x i64> [[X0]], i32 5)6615; CHECK-NEXT: [[TMP17:%.*]] = call <8 x i64> @llvm.x86.avx512.psrli.q.512(<8 x i64> [[TMP1]], i32 6)6616; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i64> [[TMP17]], zeroinitializer6617; CHECK-NEXT: [[TMP19:%.*]] = call <8 x i64> @llvm.x86.avx512.psrli.q.512(<8 x i64> [[X0]], i32 6)6618; CHECK-NEXT: [[TMP20:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>6619; CHECK-NEXT: [[TMP21:%.*]] = bitcast i8 [[X3]] to <8 x i1>6620; CHECK-NEXT: [[TMP22:%.*]] = select <8 x i1> [[TMP21]], <8 x i64> [[TMP18]], <8 x i64> zeroinitializer6621; CHECK-NEXT: [[TMP23:%.*]] = xor <8 x i64> [[TMP19]], zeroinitializer6622; CHECK-NEXT: [[TMP24:%.*]] = or <8 x i64> [[TMP23]], [[TMP18]]6623; CHECK-NEXT: [[TMP25:%.*]] = or <8 x i64> [[TMP24]], zeroinitializer6624; CHECK-NEXT: [[_MSPROP_SELECT1:%.*]] = select <8 x i1> [[TMP20]], <8 x i64> [[TMP25]], <8 x i64> [[TMP22]]6625; CHECK-NEXT: [[TMP26:%.*]] = select <8 x i1> [[TMP21]], <8 x i64> [[TMP19]], <8 x i64> zeroinitializer6626; CHECK-NEXT: [[TMP27:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } { <8 x i64> splat (i64 -1), <8 x i64> splat (i64 -1), <8 x i64> splat (i64 -1) }, <8 x i64> [[_MSPROP_SELECT]], 06627; CHECK-NEXT: [[RES3:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> [[TMP13]], 06628; CHECK-NEXT: [[TMP28:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[TMP27]], <8 x i64> [[TMP15]], 16629; CHECK-NEXT: [[RES4:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[RES3]], <8 x i64> [[TMP16]], 16630; CHECK-NEXT: [[TMP29:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[TMP28]], <8 x i64> [[_MSPROP_SELECT1]], 26631; CHECK-NEXT: [[RES5:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[RES4]], <8 x i64> [[TMP26]], 26632; CHECK-NEXT: store { <8 x i64>, <8 x i64>, <8 x i64> } [[TMP29]], ptr @__msan_retval_tls, align 86633; CHECK-NEXT: ret { <8 x i64>, <8 x i64>, <8 x i64> } [[RES5]]6634;6635 %res0 = call <8 x i64> @llvm.x86.avx512.mask.psrl.qi.512(<8 x i64> %x0, i32 4, <8 x i64> %x2, i8 %x3)6636 %res1 = call <8 x i64> @llvm.x86.avx512.mask.psrl.qi.512(<8 x i64> %x0, i32 5, <8 x i64> %x2, i8 -1)6637 %res2 = call <8 x i64> @llvm.x86.avx512.mask.psrl.qi.512(<8 x i64> %x0, i32 6, <8 x i64> zeroinitializer, i8 %x3)6638 %res3 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> %res0, 06639 %res4 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res3, <8 x i64> %res1, 16640 %res5 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res4, <8 x i64> %res2, 26641 ret { <8 x i64>, <8 x i64>, <8 x i64> } %res56642}6643 6644declare <16 x i32>@llvm.x86.avx512.mask.psrl.di.512(<16 x i32>, i32, <16 x i32>, i16)6645 6646define { <16 x i32>, <16 x i32>, <16 x i32> } @test_int_x86_avx512_mask_psrl_di_512(<16 x i32> %x0, i32 %x1, <16 x i32> %x2, i16 %x3) #0 {6647;6648; CHECK-LABEL: @test_int_x86_avx512_mask_psrl_di_512(6649; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 86650; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 86651; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 86652; CHECK-NEXT: call void @llvm.donothing()6653; CHECK-NEXT: [[TMP4:%.*]] = call <16 x i32> @llvm.x86.avx512.psrli.d.512(<16 x i32> [[TMP1]], i32 4)6654; CHECK-NEXT: [[TMP5:%.*]] = or <16 x i32> [[TMP4]], zeroinitializer6655; CHECK-NEXT: [[TMP6:%.*]] = call <16 x i32> @llvm.x86.avx512.psrli.d.512(<16 x i32> [[X0:%.*]], i32 4)6656; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>6657; CHECK-NEXT: [[TMP8:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>6658; CHECK-NEXT: [[TMP9:%.*]] = select <16 x i1> [[TMP8]], <16 x i32> [[TMP5]], <16 x i32> [[TMP3]]6659; CHECK-NEXT: [[TMP10:%.*]] = xor <16 x i32> [[TMP6]], [[X2:%.*]]6660; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP5]]6661; CHECK-NEXT: [[TMP12:%.*]] = or <16 x i32> [[TMP11]], [[TMP3]]6662; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP12]], <16 x i32> [[TMP9]]6663; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP8]], <16 x i32> [[TMP6]], <16 x i32> [[X2]]6664; CHECK-NEXT: [[TMP14:%.*]] = call <16 x i32> @llvm.x86.avx512.psrli.d.512(<16 x i32> [[TMP1]], i32 5)6665; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], zeroinitializer6666; CHECK-NEXT: [[TMP16:%.*]] = call <16 x i32> @llvm.x86.avx512.psrli.d.512(<16 x i32> [[X0]], i32 5)6667; CHECK-NEXT: [[TMP17:%.*]] = call <16 x i32> @llvm.x86.avx512.psrli.d.512(<16 x i32> [[TMP1]], i32 6)6668; CHECK-NEXT: [[TMP18:%.*]] = or <16 x i32> [[TMP17]], zeroinitializer6669; CHECK-NEXT: [[TMP19:%.*]] = call <16 x i32> @llvm.x86.avx512.psrli.d.512(<16 x i32> [[X0]], i32 6)6670; CHECK-NEXT: [[TMP20:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>6671; CHECK-NEXT: [[TMP21:%.*]] = bitcast i16 [[X3]] to <16 x i1>6672; CHECK-NEXT: [[TMP22:%.*]] = select <16 x i1> [[TMP21]], <16 x i32> [[TMP18]], <16 x i32> zeroinitializer6673; CHECK-NEXT: [[TMP23:%.*]] = xor <16 x i32> [[TMP19]], zeroinitializer6674; CHECK-NEXT: [[TMP24:%.*]] = or <16 x i32> [[TMP23]], [[TMP18]]6675; CHECK-NEXT: [[TMP25:%.*]] = or <16 x i32> [[TMP24]], zeroinitializer6676; CHECK-NEXT: [[_MSPROP_SELECT1:%.*]] = select <16 x i1> [[TMP20]], <16 x i32> [[TMP25]], <16 x i32> [[TMP22]]6677; CHECK-NEXT: [[TMP26:%.*]] = select <16 x i1> [[TMP21]], <16 x i32> [[TMP19]], <16 x i32> zeroinitializer6678; CHECK-NEXT: [[TMP27:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } { <16 x i32> splat (i32 -1), <16 x i32> splat (i32 -1), <16 x i32> splat (i32 -1) }, <16 x i32> [[_MSPROP_SELECT]], 06679; CHECK-NEXT: [[RES3:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> [[TMP13]], 06680; CHECK-NEXT: [[TMP28:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[TMP27]], <16 x i32> [[TMP15]], 16681; CHECK-NEXT: [[RES4:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[RES3]], <16 x i32> [[TMP16]], 16682; CHECK-NEXT: [[TMP29:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[TMP28]], <16 x i32> [[_MSPROP_SELECT1]], 26683; CHECK-NEXT: [[RES5:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[RES4]], <16 x i32> [[TMP26]], 26684; CHECK-NEXT: store { <16 x i32>, <16 x i32>, <16 x i32> } [[TMP29]], ptr @__msan_retval_tls, align 86685; CHECK-NEXT: ret { <16 x i32>, <16 x i32>, <16 x i32> } [[RES5]]6686;6687 %res0 = call <16 x i32> @llvm.x86.avx512.mask.psrl.di.512(<16 x i32> %x0, i32 4, <16 x i32> %x2, i16 %x3)6688 %res1 = call <16 x i32> @llvm.x86.avx512.mask.psrl.di.512(<16 x i32> %x0, i32 5, <16 x i32> %x2, i16 -1)6689 %res2 = call <16 x i32> @llvm.x86.avx512.mask.psrl.di.512(<16 x i32> %x0, i32 6, <16 x i32> zeroinitializer, i16 %x3)6690 %res3 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> %res0, 06691 %res4 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res3, <16 x i32> %res1, 16692 %res5 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res4, <16 x i32> %res2, 26693 ret { <16 x i32>, <16 x i32>, <16 x i32> } %res56694}6695 6696declare <16 x i32> @llvm.x86.avx512.mask.psra.di.512(<16 x i32>, i32, <16 x i32>, i16)6697 6698define { <16 x i32>, <16 x i32>, <16 x i32> } @test_int_x86_avx512_mask_psra_di_512(<16 x i32> %x0, i32 %x1, <16 x i32> %x2, i16 %x3) #0 {6699;6700; CHECK-LABEL: @test_int_x86_avx512_mask_psra_di_512(6701; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 86702; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 86703; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 86704; CHECK-NEXT: call void @llvm.donothing()6705; CHECK-NEXT: [[TMP4:%.*]] = call <16 x i32> @llvm.x86.avx512.psrai.d.512(<16 x i32> [[TMP1]], i32 3)6706; CHECK-NEXT: [[TMP5:%.*]] = or <16 x i32> [[TMP4]], zeroinitializer6707; CHECK-NEXT: [[TMP6:%.*]] = call <16 x i32> @llvm.x86.avx512.psrai.d.512(<16 x i32> [[X0:%.*]], i32 3)6708; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>6709; CHECK-NEXT: [[TMP8:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>6710; CHECK-NEXT: [[TMP9:%.*]] = select <16 x i1> [[TMP8]], <16 x i32> [[TMP5]], <16 x i32> [[TMP3]]6711; CHECK-NEXT: [[TMP10:%.*]] = xor <16 x i32> [[TMP6]], [[X2:%.*]]6712; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP5]]6713; CHECK-NEXT: [[TMP12:%.*]] = or <16 x i32> [[TMP11]], [[TMP3]]6714; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP12]], <16 x i32> [[TMP9]]6715; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP8]], <16 x i32> [[TMP6]], <16 x i32> [[X2]]6716; CHECK-NEXT: [[TMP14:%.*]] = call <16 x i32> @llvm.x86.avx512.psrai.d.512(<16 x i32> [[TMP1]], i32 4)6717; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], zeroinitializer6718; CHECK-NEXT: [[TMP16:%.*]] = call <16 x i32> @llvm.x86.avx512.psrai.d.512(<16 x i32> [[X0]], i32 4)6719; CHECK-NEXT: [[TMP17:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>6720; CHECK-NEXT: [[TMP18:%.*]] = bitcast i16 [[X3]] to <16 x i1>6721; CHECK-NEXT: [[TMP19:%.*]] = select <16 x i1> [[TMP18]], <16 x i32> [[TMP15]], <16 x i32> zeroinitializer6722; CHECK-NEXT: [[TMP20:%.*]] = xor <16 x i32> [[TMP16]], zeroinitializer6723; CHECK-NEXT: [[TMP21:%.*]] = or <16 x i32> [[TMP20]], [[TMP15]]6724; CHECK-NEXT: [[TMP22:%.*]] = or <16 x i32> [[TMP21]], zeroinitializer6725; CHECK-NEXT: [[_MSPROP_SELECT1:%.*]] = select <16 x i1> [[TMP17]], <16 x i32> [[TMP22]], <16 x i32> [[TMP19]]6726; CHECK-NEXT: [[TMP23:%.*]] = select <16 x i1> [[TMP18]], <16 x i32> [[TMP16]], <16 x i32> zeroinitializer6727; CHECK-NEXT: [[TMP24:%.*]] = call <16 x i32> @llvm.x86.avx512.psrai.d.512(<16 x i32> [[TMP1]], i32 5)6728; CHECK-NEXT: [[TMP25:%.*]] = or <16 x i32> [[TMP24]], zeroinitializer6729; CHECK-NEXT: [[TMP26:%.*]] = call <16 x i32> @llvm.x86.avx512.psrai.d.512(<16 x i32> [[X0]], i32 5)6730; CHECK-NEXT: [[TMP27:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } { <16 x i32> splat (i32 -1), <16 x i32> splat (i32 -1), <16 x i32> splat (i32 -1) }, <16 x i32> [[_MSPROP_SELECT]], 06731; CHECK-NEXT: [[RES3:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> [[TMP13]], 06732; CHECK-NEXT: [[TMP28:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[TMP27]], <16 x i32> [[_MSPROP_SELECT1]], 16733; CHECK-NEXT: [[RES4:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[RES3]], <16 x i32> [[TMP23]], 16734; CHECK-NEXT: [[TMP29:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[TMP28]], <16 x i32> [[TMP25]], 26735; CHECK-NEXT: [[RES5:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[RES4]], <16 x i32> [[TMP26]], 26736; CHECK-NEXT: store { <16 x i32>, <16 x i32>, <16 x i32> } [[TMP29]], ptr @__msan_retval_tls, align 86737; CHECK-NEXT: ret { <16 x i32>, <16 x i32>, <16 x i32> } [[RES5]]6738;6739 %res0 = call <16 x i32> @llvm.x86.avx512.mask.psra.di.512(<16 x i32> %x0, i32 3, <16 x i32> %x2, i16 %x3)6740 %res1 = call <16 x i32> @llvm.x86.avx512.mask.psra.di.512(<16 x i32> %x0, i32 4, <16 x i32> zeroinitializer, i16 %x3)6741 %res2 = call <16 x i32> @llvm.x86.avx512.mask.psra.di.512(<16 x i32> %x0, i32 5, <16 x i32> %x2, i16 -1)6742 %res3 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> %res0, 06743 %res4 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res3, <16 x i32> %res1, 16744 %res5 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res4, <16 x i32> %res2, 26745 ret { <16 x i32>, <16 x i32>, <16 x i32> } %res56746}6747 6748declare <8 x i64> @llvm.x86.avx512.mask.psra.qi.512(<8 x i64>, i32, <8 x i64>, i8)6749 6750define { <8 x i64>, <8 x i64>, <8 x i64> } @test_int_x86_avx512_mask_psra_qi_512(<8 x i64> %x0, i32 %x1, <8 x i64> %x2, i8 %x3) #0 {6751;6752; CHECK-LABEL: @test_int_x86_avx512_mask_psra_qi_512(6753; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 86754; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 86755; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 86756; CHECK-NEXT: call void @llvm.donothing()6757; CHECK-NEXT: [[TMP4:%.*]] = call <8 x i64> @llvm.x86.avx512.psrai.q.512(<8 x i64> [[TMP1]], i32 3)6758; CHECK-NEXT: [[TMP5:%.*]] = or <8 x i64> [[TMP4]], zeroinitializer6759; CHECK-NEXT: [[TMP6:%.*]] = call <8 x i64> @llvm.x86.avx512.psrai.q.512(<8 x i64> [[X0:%.*]], i32 3)6760; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>6761; CHECK-NEXT: [[TMP8:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>6762; CHECK-NEXT: [[TMP9:%.*]] = select <8 x i1> [[TMP8]], <8 x i64> [[TMP5]], <8 x i64> [[TMP3]]6763; CHECK-NEXT: [[TMP10:%.*]] = xor <8 x i64> [[TMP6]], [[X2:%.*]]6764; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP5]]6765; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], [[TMP3]]6766; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP12]], <8 x i64> [[TMP9]]6767; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP8]], <8 x i64> [[TMP6]], <8 x i64> [[X2]]6768; CHECK-NEXT: [[TMP14:%.*]] = call <8 x i64> @llvm.x86.avx512.psrai.q.512(<8 x i64> [[TMP1]], i32 4)6769; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], zeroinitializer6770; CHECK-NEXT: [[TMP16:%.*]] = call <8 x i64> @llvm.x86.avx512.psrai.q.512(<8 x i64> [[X0]], i32 4)6771; CHECK-NEXT: [[TMP17:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>6772; CHECK-NEXT: [[TMP18:%.*]] = bitcast i8 [[X3]] to <8 x i1>6773; CHECK-NEXT: [[TMP19:%.*]] = select <8 x i1> [[TMP18]], <8 x i64> [[TMP15]], <8 x i64> zeroinitializer6774; CHECK-NEXT: [[TMP20:%.*]] = xor <8 x i64> [[TMP16]], zeroinitializer6775; CHECK-NEXT: [[TMP21:%.*]] = or <8 x i64> [[TMP20]], [[TMP15]]6776; CHECK-NEXT: [[TMP22:%.*]] = or <8 x i64> [[TMP21]], zeroinitializer6777; CHECK-NEXT: [[_MSPROP_SELECT1:%.*]] = select <8 x i1> [[TMP17]], <8 x i64> [[TMP22]], <8 x i64> [[TMP19]]6778; CHECK-NEXT: [[TMP23:%.*]] = select <8 x i1> [[TMP18]], <8 x i64> [[TMP16]], <8 x i64> zeroinitializer6779; CHECK-NEXT: [[TMP24:%.*]] = call <8 x i64> @llvm.x86.avx512.psrai.q.512(<8 x i64> [[TMP1]], i32 5)6780; CHECK-NEXT: [[TMP25:%.*]] = or <8 x i64> [[TMP24]], zeroinitializer6781; CHECK-NEXT: [[TMP26:%.*]] = call <8 x i64> @llvm.x86.avx512.psrai.q.512(<8 x i64> [[X0]], i32 5)6782; CHECK-NEXT: [[TMP27:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } { <8 x i64> splat (i64 -1), <8 x i64> splat (i64 -1), <8 x i64> splat (i64 -1) }, <8 x i64> [[_MSPROP_SELECT]], 06783; CHECK-NEXT: [[RES3:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> [[TMP13]], 06784; CHECK-NEXT: [[TMP28:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[TMP27]], <8 x i64> [[_MSPROP_SELECT1]], 16785; CHECK-NEXT: [[RES4:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[RES3]], <8 x i64> [[TMP23]], 16786; CHECK-NEXT: [[TMP29:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[TMP28]], <8 x i64> [[TMP25]], 26787; CHECK-NEXT: [[RES5:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[RES4]], <8 x i64> [[TMP26]], 26788; CHECK-NEXT: store { <8 x i64>, <8 x i64>, <8 x i64> } [[TMP29]], ptr @__msan_retval_tls, align 86789; CHECK-NEXT: ret { <8 x i64>, <8 x i64>, <8 x i64> } [[RES5]]6790;6791 %res0 = call <8 x i64> @llvm.x86.avx512.mask.psra.qi.512(<8 x i64> %x0, i32 3, <8 x i64> %x2, i8 %x3)6792 %res1 = call <8 x i64> @llvm.x86.avx512.mask.psra.qi.512(<8 x i64> %x0, i32 4, <8 x i64> zeroinitializer, i8 %x3)6793 %res2 = call <8 x i64> @llvm.x86.avx512.mask.psra.qi.512(<8 x i64> %x0, i32 5, <8 x i64> %x2, i8 -1)6794 %res3 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> %res0, 06795 %res4 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res3, <8 x i64> %res1, 16796 %res5 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res4, <8 x i64> %res2, 26797 ret { <8 x i64>, <8 x i64>, <8 x i64> } %res56798}6799 6800declare <16 x i32> @llvm.x86.avx512.mask.psll.di.512(<16 x i32>, i32, <16 x i32>, i16)6801 6802define { <16 x i32>, <16 x i32>, <16 x i32> } @test_int_x86_avx512_mask_psll_di_512(<16 x i32> %x0, i32 %x1, <16 x i32> %x2, i16 %x3) #0 {6803;6804; CHECK-LABEL: @test_int_x86_avx512_mask_psll_di_512(6805; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 86806; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 86807; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 86808; CHECK-NEXT: call void @llvm.donothing()6809; CHECK-NEXT: [[TMP4:%.*]] = call <16 x i32> @llvm.x86.avx512.pslli.d.512(<16 x i32> [[TMP1]], i32 3)6810; CHECK-NEXT: [[TMP5:%.*]] = or <16 x i32> [[TMP4]], zeroinitializer6811; CHECK-NEXT: [[TMP6:%.*]] = call <16 x i32> @llvm.x86.avx512.pslli.d.512(<16 x i32> [[X0:%.*]], i32 3)6812; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>6813; CHECK-NEXT: [[TMP8:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>6814; CHECK-NEXT: [[TMP9:%.*]] = select <16 x i1> [[TMP8]], <16 x i32> [[TMP5]], <16 x i32> [[TMP3]]6815; CHECK-NEXT: [[TMP10:%.*]] = xor <16 x i32> [[TMP6]], [[X2:%.*]]6816; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP5]]6817; CHECK-NEXT: [[TMP12:%.*]] = or <16 x i32> [[TMP11]], [[TMP3]]6818; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP12]], <16 x i32> [[TMP9]]6819; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP8]], <16 x i32> [[TMP6]], <16 x i32> [[X2]]6820; CHECK-NEXT: [[TMP14:%.*]] = call <16 x i32> @llvm.x86.avx512.pslli.d.512(<16 x i32> [[TMP1]], i32 4)6821; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], zeroinitializer6822; CHECK-NEXT: [[TMP16:%.*]] = call <16 x i32> @llvm.x86.avx512.pslli.d.512(<16 x i32> [[X0]], i32 4)6823; CHECK-NEXT: [[TMP17:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>6824; CHECK-NEXT: [[TMP18:%.*]] = bitcast i16 [[X3]] to <16 x i1>6825; CHECK-NEXT: [[TMP19:%.*]] = select <16 x i1> [[TMP18]], <16 x i32> [[TMP15]], <16 x i32> zeroinitializer6826; CHECK-NEXT: [[TMP20:%.*]] = xor <16 x i32> [[TMP16]], zeroinitializer6827; CHECK-NEXT: [[TMP21:%.*]] = or <16 x i32> [[TMP20]], [[TMP15]]6828; CHECK-NEXT: [[TMP22:%.*]] = or <16 x i32> [[TMP21]], zeroinitializer6829; CHECK-NEXT: [[_MSPROP_SELECT1:%.*]] = select <16 x i1> [[TMP17]], <16 x i32> [[TMP22]], <16 x i32> [[TMP19]]6830; CHECK-NEXT: [[TMP23:%.*]] = select <16 x i1> [[TMP18]], <16 x i32> [[TMP16]], <16 x i32> zeroinitializer6831; CHECK-NEXT: [[TMP24:%.*]] = call <16 x i32> @llvm.x86.avx512.pslli.d.512(<16 x i32> [[TMP1]], i32 5)6832; CHECK-NEXT: [[TMP25:%.*]] = or <16 x i32> [[TMP24]], zeroinitializer6833; CHECK-NEXT: [[TMP26:%.*]] = call <16 x i32> @llvm.x86.avx512.pslli.d.512(<16 x i32> [[X0]], i32 5)6834; CHECK-NEXT: [[TMP27:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } { <16 x i32> splat (i32 -1), <16 x i32> splat (i32 -1), <16 x i32> splat (i32 -1) }, <16 x i32> [[_MSPROP_SELECT]], 06835; CHECK-NEXT: [[RES3:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> [[TMP13]], 06836; CHECK-NEXT: [[TMP28:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[TMP27]], <16 x i32> [[_MSPROP_SELECT1]], 16837; CHECK-NEXT: [[RES4:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[RES3]], <16 x i32> [[TMP23]], 16838; CHECK-NEXT: [[TMP29:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[TMP28]], <16 x i32> [[TMP25]], 26839; CHECK-NEXT: [[RES5:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[RES4]], <16 x i32> [[TMP26]], 26840; CHECK-NEXT: store { <16 x i32>, <16 x i32>, <16 x i32> } [[TMP29]], ptr @__msan_retval_tls, align 86841; CHECK-NEXT: ret { <16 x i32>, <16 x i32>, <16 x i32> } [[RES5]]6842;6843 %res0 = call <16 x i32> @llvm.x86.avx512.mask.psll.di.512(<16 x i32> %x0, i32 3, <16 x i32> %x2, i16 %x3)6844 %res1 = call <16 x i32> @llvm.x86.avx512.mask.psll.di.512(<16 x i32> %x0, i32 4, <16 x i32> zeroinitializer, i16 %x3)6845 %res2 = call <16 x i32> @llvm.x86.avx512.mask.psll.di.512(<16 x i32> %x0, i32 5, <16 x i32> %x2, i16 -1)6846 %res3 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> %res0, 06847 %res4 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res3, <16 x i32> %res1, 16848 %res5 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res4, <16 x i32> %res2, 26849 ret { <16 x i32>, <16 x i32>, <16 x i32> } %res56850}6851 6852declare <8 x i64> @llvm.x86.avx512.mask.psll.qi.512(<8 x i64>, i32, <8 x i64>, i8)6853 6854define { <8 x i64>, <8 x i64>, <8 x i64> } @test_int_x86_avx512_mask_psll_qi_512(<8 x i64> %x0, i32 %x1, <8 x i64> %x2, i8 %x3) #0 {6855;6856; CHECK-LABEL: @test_int_x86_avx512_mask_psll_qi_512(6857; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 86858; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 86859; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 86860; CHECK-NEXT: call void @llvm.donothing()6861; CHECK-NEXT: [[TMP4:%.*]] = call <8 x i64> @llvm.x86.avx512.pslli.q.512(<8 x i64> [[TMP1]], i32 3)6862; CHECK-NEXT: [[TMP5:%.*]] = or <8 x i64> [[TMP4]], zeroinitializer6863; CHECK-NEXT: [[TMP6:%.*]] = call <8 x i64> @llvm.x86.avx512.pslli.q.512(<8 x i64> [[X0:%.*]], i32 3)6864; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>6865; CHECK-NEXT: [[TMP8:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>6866; CHECK-NEXT: [[TMP9:%.*]] = select <8 x i1> [[TMP8]], <8 x i64> [[TMP5]], <8 x i64> [[TMP3]]6867; CHECK-NEXT: [[TMP10:%.*]] = xor <8 x i64> [[TMP6]], [[X2:%.*]]6868; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP5]]6869; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], [[TMP3]]6870; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP12]], <8 x i64> [[TMP9]]6871; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP8]], <8 x i64> [[TMP6]], <8 x i64> [[X2]]6872; CHECK-NEXT: [[TMP14:%.*]] = call <8 x i64> @llvm.x86.avx512.pslli.q.512(<8 x i64> [[TMP1]], i32 4)6873; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], zeroinitializer6874; CHECK-NEXT: [[TMP16:%.*]] = call <8 x i64> @llvm.x86.avx512.pslli.q.512(<8 x i64> [[X0]], i32 4)6875; CHECK-NEXT: [[TMP17:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>6876; CHECK-NEXT: [[TMP18:%.*]] = bitcast i8 [[X3]] to <8 x i1>6877; CHECK-NEXT: [[TMP19:%.*]] = select <8 x i1> [[TMP18]], <8 x i64> [[TMP15]], <8 x i64> zeroinitializer6878; CHECK-NEXT: [[TMP20:%.*]] = xor <8 x i64> [[TMP16]], zeroinitializer6879; CHECK-NEXT: [[TMP21:%.*]] = or <8 x i64> [[TMP20]], [[TMP15]]6880; CHECK-NEXT: [[TMP22:%.*]] = or <8 x i64> [[TMP21]], zeroinitializer6881; CHECK-NEXT: [[_MSPROP_SELECT1:%.*]] = select <8 x i1> [[TMP17]], <8 x i64> [[TMP22]], <8 x i64> [[TMP19]]6882; CHECK-NEXT: [[TMP23:%.*]] = select <8 x i1> [[TMP18]], <8 x i64> [[TMP16]], <8 x i64> zeroinitializer6883; CHECK-NEXT: [[TMP24:%.*]] = call <8 x i64> @llvm.x86.avx512.pslli.q.512(<8 x i64> [[TMP1]], i32 5)6884; CHECK-NEXT: [[TMP25:%.*]] = or <8 x i64> [[TMP24]], zeroinitializer6885; CHECK-NEXT: [[TMP26:%.*]] = call <8 x i64> @llvm.x86.avx512.pslli.q.512(<8 x i64> [[X0]], i32 5)6886; CHECK-NEXT: [[TMP27:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } { <8 x i64> splat (i64 -1), <8 x i64> splat (i64 -1), <8 x i64> splat (i64 -1) }, <8 x i64> [[_MSPROP_SELECT]], 06887; CHECK-NEXT: [[RES3:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> [[TMP13]], 06888; CHECK-NEXT: [[TMP28:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[TMP27]], <8 x i64> [[_MSPROP_SELECT1]], 16889; CHECK-NEXT: [[RES4:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[RES3]], <8 x i64> [[TMP23]], 16890; CHECK-NEXT: [[TMP29:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[TMP28]], <8 x i64> [[TMP25]], 26891; CHECK-NEXT: [[RES5:%.*]] = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } [[RES4]], <8 x i64> [[TMP26]], 26892; CHECK-NEXT: store { <8 x i64>, <8 x i64>, <8 x i64> } [[TMP29]], ptr @__msan_retval_tls, align 86893; CHECK-NEXT: ret { <8 x i64>, <8 x i64>, <8 x i64> } [[RES5]]6894;6895 %res0 = call <8 x i64> @llvm.x86.avx512.mask.psll.qi.512(<8 x i64> %x0, i32 3, <8 x i64> %x2, i8 %x3)6896 %res1 = call <8 x i64> @llvm.x86.avx512.mask.psll.qi.512(<8 x i64> %x0, i32 4, <8 x i64> zeroinitializer, i8 %x3)6897 %res2 = call <8 x i64> @llvm.x86.avx512.mask.psll.qi.512(<8 x i64> %x0, i32 5, <8 x i64> %x2, i8 -1)6898 %res3 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> %res0, 06899 %res4 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res3, <8 x i64> %res1, 16900 %res5 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res4, <8 x i64> %res2, 26901 ret { <8 x i64>, <8 x i64>, <8 x i64> } %res56902}6903 6904define <16 x i32> @test_x86_avx512_psll_d(<16 x i32> %a0, <4 x i32> %a1) #0 {6905; CHECK-LABEL: @test_x86_avx512_psll_d(6906; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 86907; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86908; CHECK-NEXT: call void @llvm.donothing()6909; CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i32> [[TMP2]] to i1286910; CHECK-NEXT: [[TMP4:%.*]] = trunc i128 [[TMP3]] to i646911; CHECK-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP4]], 06912; CHECK-NEXT: [[TMP6:%.*]] = sext i1 [[TMP5]] to i5126913; CHECK-NEXT: [[TMP7:%.*]] = bitcast i512 [[TMP6]] to <16 x i32>6914; CHECK-NEXT: [[TMP8:%.*]] = call <16 x i32> @llvm.x86.avx512.psll.d.512(<16 x i32> [[TMP1]], <4 x i32> [[A1:%.*]])6915; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], [[TMP7]]6916; CHECK-NEXT: [[TMP10:%.*]] = call <16 x i32> @llvm.x86.avx512.psll.d.512(<16 x i32> [[A0:%.*]], <4 x i32> [[A1]])6917; CHECK-NEXT: store <16 x i32> [[TMP9]], ptr @__msan_retval_tls, align 86918; CHECK-NEXT: ret <16 x i32> [[TMP10]]6919;6920 %res = call <16 x i32> @llvm.x86.avx512.mask.psll.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> zeroinitializer, i16 -1)6921 ret <16 x i32> %res6922}6923 6924define <16 x i32> @test_x86_avx512_mask_psll_d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> %a2, i16 %mask) #0 {6925;6926; CHECK-LABEL: @test_x86_avx512_mask_psll_d(6927; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 86928; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86929; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 86930; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 86931; CHECK-NEXT: call void @llvm.donothing()6932; CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i32> [[TMP2]] to i1286933; CHECK-NEXT: [[TMP6:%.*]] = trunc i128 [[TMP5]] to i646934; CHECK-NEXT: [[TMP7:%.*]] = icmp ne i64 [[TMP6]], 06935; CHECK-NEXT: [[TMP8:%.*]] = sext i1 [[TMP7]] to i5126936; CHECK-NEXT: [[TMP9:%.*]] = bitcast i512 [[TMP8]] to <16 x i32>6937; CHECK-NEXT: [[TMP10:%.*]] = call <16 x i32> @llvm.x86.avx512.psll.d.512(<16 x i32> [[TMP1]], <4 x i32> [[A1:%.*]])6938; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP9]]6939; CHECK-NEXT: [[TMP12:%.*]] = call <16 x i32> @llvm.x86.avx512.psll.d.512(<16 x i32> [[A0:%.*]], <4 x i32> [[A1]])6940; CHECK-NEXT: [[TMP13:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>6941; CHECK-NEXT: [[TMP14:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>6942; CHECK-NEXT: [[TMP15:%.*]] = select <16 x i1> [[TMP14]], <16 x i32> [[TMP11]], <16 x i32> [[TMP4]]6943; CHECK-NEXT: [[TMP16:%.*]] = xor <16 x i32> [[TMP12]], [[A2:%.*]]6944; CHECK-NEXT: [[TMP17:%.*]] = or <16 x i32> [[TMP16]], [[TMP11]]6945; CHECK-NEXT: [[TMP18:%.*]] = or <16 x i32> [[TMP17]], [[TMP4]]6946; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP13]], <16 x i32> [[TMP18]], <16 x i32> [[TMP15]]6947; CHECK-NEXT: [[TMP19:%.*]] = select <16 x i1> [[TMP14]], <16 x i32> [[TMP12]], <16 x i32> [[A2]]6948; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86949; CHECK-NEXT: ret <16 x i32> [[TMP19]]6950;6951 %res = call <16 x i32> @llvm.x86.avx512.mask.psll.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> %a2, i16 %mask)6952 ret <16 x i32> %res6953}6954 6955define <16 x i32> @test_x86_avx512_maskz_psll_d(<16 x i32> %a0, <4 x i32> %a1, i16 %mask) #0 {6956;6957; CHECK-LABEL: @test_x86_avx512_maskz_psll_d(6958; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 86959; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86960; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 86961; CHECK-NEXT: call void @llvm.donothing()6962; CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x i32> [[TMP2]] to i1286963; CHECK-NEXT: [[TMP5:%.*]] = trunc i128 [[TMP4]] to i646964; CHECK-NEXT: [[TMP6:%.*]] = icmp ne i64 [[TMP5]], 06965; CHECK-NEXT: [[TMP7:%.*]] = sext i1 [[TMP6]] to i5126966; CHECK-NEXT: [[TMP8:%.*]] = bitcast i512 [[TMP7]] to <16 x i32>6967; CHECK-NEXT: [[TMP9:%.*]] = call <16 x i32> @llvm.x86.avx512.psll.d.512(<16 x i32> [[TMP1]], <4 x i32> [[A1:%.*]])6968; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[TMP8]]6969; CHECK-NEXT: [[TMP11:%.*]] = call <16 x i32> @llvm.x86.avx512.psll.d.512(<16 x i32> [[A0:%.*]], <4 x i32> [[A1]])6970; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>6971; CHECK-NEXT: [[TMP13:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>6972; CHECK-NEXT: [[TMP14:%.*]] = select <16 x i1> [[TMP13]], <16 x i32> [[TMP10]], <16 x i32> zeroinitializer6973; CHECK-NEXT: [[TMP15:%.*]] = xor <16 x i32> [[TMP11]], zeroinitializer6974; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i32> [[TMP15]], [[TMP10]]6975; CHECK-NEXT: [[TMP17:%.*]] = or <16 x i32> [[TMP16]], zeroinitializer6976; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[TMP17]], <16 x i32> [[TMP14]]6977; CHECK-NEXT: [[TMP18:%.*]] = select <16 x i1> [[TMP13]], <16 x i32> [[TMP11]], <16 x i32> zeroinitializer6978; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86979; CHECK-NEXT: ret <16 x i32> [[TMP18]]6980;6981 %res = call <16 x i32> @llvm.x86.avx512.mask.psll.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> zeroinitializer, i16 %mask)6982 ret <16 x i32> %res6983}6984 6985declare <16 x i32> @llvm.x86.avx512.mask.psll.d(<16 x i32>, <4 x i32>, <16 x i32>, i16) nounwind readnone6986 6987define <8 x i64> @test_x86_avx512_psll_q(<8 x i64> %a0, <2 x i64> %a1) #0 {6988; CHECK-LABEL: @test_x86_avx512_psll_q(6989; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 86990; CHECK-NEXT: [[TMP2:%.*]] = load <2 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86991; CHECK-NEXT: call void @llvm.donothing()6992; CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i64> [[TMP2]] to i1286993; CHECK-NEXT: [[TMP4:%.*]] = trunc i128 [[TMP3]] to i646994; CHECK-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP4]], 06995; CHECK-NEXT: [[TMP6:%.*]] = sext i1 [[TMP5]] to i5126996; CHECK-NEXT: [[TMP7:%.*]] = bitcast i512 [[TMP6]] to <8 x i64>6997; CHECK-NEXT: [[TMP8:%.*]] = call <8 x i64> @llvm.x86.avx512.psll.q.512(<8 x i64> [[TMP1]], <2 x i64> [[A1:%.*]])6998; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[TMP7]]6999; CHECK-NEXT: [[TMP10:%.*]] = call <8 x i64> @llvm.x86.avx512.psll.q.512(<8 x i64> [[A0:%.*]], <2 x i64> [[A1]])7000; CHECK-NEXT: store <8 x i64> [[TMP9]], ptr @__msan_retval_tls, align 87001; CHECK-NEXT: ret <8 x i64> [[TMP10]]7002;7003 %res = call <8 x i64> @llvm.x86.avx512.mask.psll.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> zeroinitializer, i8 -1)7004 ret <8 x i64> %res7005}7006 7007define <8 x i64> @test_x86_avx512_mask_psll_q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> %a2, i8 %mask) #0 {7008;7009; CHECK-LABEL: @test_x86_avx512_mask_psll_q(7010; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 87011; CHECK-NEXT: [[TMP2:%.*]] = load <2 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87012; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 87013; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 87014; CHECK-NEXT: call void @llvm.donothing()7015; CHECK-NEXT: [[TMP5:%.*]] = bitcast <2 x i64> [[TMP2]] to i1287016; CHECK-NEXT: [[TMP6:%.*]] = trunc i128 [[TMP5]] to i647017; CHECK-NEXT: [[TMP7:%.*]] = icmp ne i64 [[TMP6]], 07018; CHECK-NEXT: [[TMP8:%.*]] = sext i1 [[TMP7]] to i5127019; CHECK-NEXT: [[TMP9:%.*]] = bitcast i512 [[TMP8]] to <8 x i64>7020; CHECK-NEXT: [[TMP10:%.*]] = call <8 x i64> @llvm.x86.avx512.psll.q.512(<8 x i64> [[TMP1]], <2 x i64> [[A1:%.*]])7021; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP9]]7022; CHECK-NEXT: [[TMP12:%.*]] = call <8 x i64> @llvm.x86.avx512.psll.q.512(<8 x i64> [[A0:%.*]], <2 x i64> [[A1]])7023; CHECK-NEXT: [[TMP13:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>7024; CHECK-NEXT: [[TMP14:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>7025; CHECK-NEXT: [[TMP15:%.*]] = select <8 x i1> [[TMP14]], <8 x i64> [[TMP11]], <8 x i64> [[TMP4]]7026; CHECK-NEXT: [[TMP16:%.*]] = xor <8 x i64> [[TMP12]], [[A2:%.*]]7027; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP16]], [[TMP11]]7028; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i64> [[TMP17]], [[TMP4]]7029; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP13]], <8 x i64> [[TMP18]], <8 x i64> [[TMP15]]7030; CHECK-NEXT: [[TMP19:%.*]] = select <8 x i1> [[TMP14]], <8 x i64> [[TMP12]], <8 x i64> [[A2]]7031; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87032; CHECK-NEXT: ret <8 x i64> [[TMP19]]7033;7034 %res = call <8 x i64> @llvm.x86.avx512.mask.psll.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> %a2, i8 %mask)7035 ret <8 x i64> %res7036}7037 7038define <8 x i64> @test_x86_avx512_maskz_psll_q(<8 x i64> %a0, <2 x i64> %a1, i8 %mask) #0 {7039;7040; CHECK-LABEL: @test_x86_avx512_maskz_psll_q(7041; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 87042; CHECK-NEXT: [[TMP2:%.*]] = load <2 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87043; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 87044; CHECK-NEXT: call void @llvm.donothing()7045; CHECK-NEXT: [[TMP4:%.*]] = bitcast <2 x i64> [[TMP2]] to i1287046; CHECK-NEXT: [[TMP5:%.*]] = trunc i128 [[TMP4]] to i647047; CHECK-NEXT: [[TMP6:%.*]] = icmp ne i64 [[TMP5]], 07048; CHECK-NEXT: [[TMP7:%.*]] = sext i1 [[TMP6]] to i5127049; CHECK-NEXT: [[TMP8:%.*]] = bitcast i512 [[TMP7]] to <8 x i64>7050; CHECK-NEXT: [[TMP9:%.*]] = call <8 x i64> @llvm.x86.avx512.psll.q.512(<8 x i64> [[TMP1]], <2 x i64> [[A1:%.*]])7051; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[TMP8]]7052; CHECK-NEXT: [[TMP11:%.*]] = call <8 x i64> @llvm.x86.avx512.psll.q.512(<8 x i64> [[A0:%.*]], <2 x i64> [[A1]])7053; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>7054; CHECK-NEXT: [[TMP13:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>7055; CHECK-NEXT: [[TMP14:%.*]] = select <8 x i1> [[TMP13]], <8 x i64> [[TMP10]], <8 x i64> zeroinitializer7056; CHECK-NEXT: [[TMP15:%.*]] = xor <8 x i64> [[TMP11]], zeroinitializer7057; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP15]], [[TMP10]]7058; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP16]], zeroinitializer7059; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP12]], <8 x i64> [[TMP17]], <8 x i64> [[TMP14]]7060; CHECK-NEXT: [[TMP18:%.*]] = select <8 x i1> [[TMP13]], <8 x i64> [[TMP11]], <8 x i64> zeroinitializer7061; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87062; CHECK-NEXT: ret <8 x i64> [[TMP18]]7063;7064 %res = call <8 x i64> @llvm.x86.avx512.mask.psll.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> zeroinitializer, i8 %mask)7065 ret <8 x i64> %res7066}7067 7068declare <8 x i64> @llvm.x86.avx512.mask.psll.q(<8 x i64>, <2 x i64>, <8 x i64>, i8) nounwind readnone7069 7070define <16 x i32> @test_x86_avx512_psrl_d(<16 x i32> %a0, <4 x i32> %a1) #0 {7071; CHECK-LABEL: @test_x86_avx512_psrl_d(7072; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 87073; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87074; CHECK-NEXT: call void @llvm.donothing()7075; CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i32> [[TMP2]] to i1287076; CHECK-NEXT: [[TMP4:%.*]] = trunc i128 [[TMP3]] to i647077; CHECK-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP4]], 07078; CHECK-NEXT: [[TMP6:%.*]] = sext i1 [[TMP5]] to i5127079; CHECK-NEXT: [[TMP7:%.*]] = bitcast i512 [[TMP6]] to <16 x i32>7080; CHECK-NEXT: [[TMP8:%.*]] = call <16 x i32> @llvm.x86.avx512.psrl.d.512(<16 x i32> [[TMP1]], <4 x i32> [[A1:%.*]])7081; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], [[TMP7]]7082; CHECK-NEXT: [[TMP10:%.*]] = call <16 x i32> @llvm.x86.avx512.psrl.d.512(<16 x i32> [[A0:%.*]], <4 x i32> [[A1]])7083; CHECK-NEXT: store <16 x i32> [[TMP9]], ptr @__msan_retval_tls, align 87084; CHECK-NEXT: ret <16 x i32> [[TMP10]]7085;7086 %res = call <16 x i32> @llvm.x86.avx512.mask.psrl.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> zeroinitializer, i16 -1)7087 ret <16 x i32> %res7088}7089 7090define <16 x i32> @test_x86_avx512_mask_psrl_d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> %a2, i16 %mask) #0 {7091;7092; CHECK-LABEL: @test_x86_avx512_mask_psrl_d(7093; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 87094; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87095; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 87096; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 87097; CHECK-NEXT: call void @llvm.donothing()7098; CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i32> [[TMP2]] to i1287099; CHECK-NEXT: [[TMP6:%.*]] = trunc i128 [[TMP5]] to i647100; CHECK-NEXT: [[TMP7:%.*]] = icmp ne i64 [[TMP6]], 07101; CHECK-NEXT: [[TMP8:%.*]] = sext i1 [[TMP7]] to i5127102; CHECK-NEXT: [[TMP9:%.*]] = bitcast i512 [[TMP8]] to <16 x i32>7103; CHECK-NEXT: [[TMP10:%.*]] = call <16 x i32> @llvm.x86.avx512.psrl.d.512(<16 x i32> [[TMP1]], <4 x i32> [[A1:%.*]])7104; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP9]]7105; CHECK-NEXT: [[TMP12:%.*]] = call <16 x i32> @llvm.x86.avx512.psrl.d.512(<16 x i32> [[A0:%.*]], <4 x i32> [[A1]])7106; CHECK-NEXT: [[TMP13:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>7107; CHECK-NEXT: [[TMP14:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>7108; CHECK-NEXT: [[TMP15:%.*]] = select <16 x i1> [[TMP14]], <16 x i32> [[TMP11]], <16 x i32> [[TMP4]]7109; CHECK-NEXT: [[TMP16:%.*]] = xor <16 x i32> [[TMP12]], [[A2:%.*]]7110; CHECK-NEXT: [[TMP17:%.*]] = or <16 x i32> [[TMP16]], [[TMP11]]7111; CHECK-NEXT: [[TMP18:%.*]] = or <16 x i32> [[TMP17]], [[TMP4]]7112; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP13]], <16 x i32> [[TMP18]], <16 x i32> [[TMP15]]7113; CHECK-NEXT: [[TMP19:%.*]] = select <16 x i1> [[TMP14]], <16 x i32> [[TMP12]], <16 x i32> [[A2]]7114; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87115; CHECK-NEXT: ret <16 x i32> [[TMP19]]7116;7117 %res = call <16 x i32> @llvm.x86.avx512.mask.psrl.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> %a2, i16 %mask)7118 ret <16 x i32> %res7119}7120 7121define <16 x i32> @test_x86_avx512_maskz_psrl_d(<16 x i32> %a0, <4 x i32> %a1, i16 %mask) #0 {7122;7123; CHECK-LABEL: @test_x86_avx512_maskz_psrl_d(7124; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 87125; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87126; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 87127; CHECK-NEXT: call void @llvm.donothing()7128; CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x i32> [[TMP2]] to i1287129; CHECK-NEXT: [[TMP5:%.*]] = trunc i128 [[TMP4]] to i647130; CHECK-NEXT: [[TMP6:%.*]] = icmp ne i64 [[TMP5]], 07131; CHECK-NEXT: [[TMP7:%.*]] = sext i1 [[TMP6]] to i5127132; CHECK-NEXT: [[TMP8:%.*]] = bitcast i512 [[TMP7]] to <16 x i32>7133; CHECK-NEXT: [[TMP9:%.*]] = call <16 x i32> @llvm.x86.avx512.psrl.d.512(<16 x i32> [[TMP1]], <4 x i32> [[A1:%.*]])7134; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[TMP8]]7135; CHECK-NEXT: [[TMP11:%.*]] = call <16 x i32> @llvm.x86.avx512.psrl.d.512(<16 x i32> [[A0:%.*]], <4 x i32> [[A1]])7136; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>7137; CHECK-NEXT: [[TMP13:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>7138; CHECK-NEXT: [[TMP14:%.*]] = select <16 x i1> [[TMP13]], <16 x i32> [[TMP10]], <16 x i32> zeroinitializer7139; CHECK-NEXT: [[TMP15:%.*]] = xor <16 x i32> [[TMP11]], zeroinitializer7140; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i32> [[TMP15]], [[TMP10]]7141; CHECK-NEXT: [[TMP17:%.*]] = or <16 x i32> [[TMP16]], zeroinitializer7142; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[TMP17]], <16 x i32> [[TMP14]]7143; CHECK-NEXT: [[TMP18:%.*]] = select <16 x i1> [[TMP13]], <16 x i32> [[TMP11]], <16 x i32> zeroinitializer7144; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87145; CHECK-NEXT: ret <16 x i32> [[TMP18]]7146;7147 %res = call <16 x i32> @llvm.x86.avx512.mask.psrl.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> zeroinitializer, i16 %mask)7148 ret <16 x i32> %res7149}7150 7151declare <16 x i32> @llvm.x86.avx512.mask.psrl.d(<16 x i32>, <4 x i32>, <16 x i32>, i16) nounwind readnone7152 7153define <8 x i64> @test_x86_avx512_psrl_q(<8 x i64> %a0, <2 x i64> %a1) #0 {7154; CHECK-LABEL: @test_x86_avx512_psrl_q(7155; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 87156; CHECK-NEXT: [[TMP2:%.*]] = load <2 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87157; CHECK-NEXT: call void @llvm.donothing()7158; CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i64> [[TMP2]] to i1287159; CHECK-NEXT: [[TMP4:%.*]] = trunc i128 [[TMP3]] to i647160; CHECK-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP4]], 07161; CHECK-NEXT: [[TMP6:%.*]] = sext i1 [[TMP5]] to i5127162; CHECK-NEXT: [[TMP7:%.*]] = bitcast i512 [[TMP6]] to <8 x i64>7163; CHECK-NEXT: [[TMP8:%.*]] = call <8 x i64> @llvm.x86.avx512.psrl.q.512(<8 x i64> [[TMP1]], <2 x i64> [[A1:%.*]])7164; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[TMP7]]7165; CHECK-NEXT: [[TMP10:%.*]] = call <8 x i64> @llvm.x86.avx512.psrl.q.512(<8 x i64> [[A0:%.*]], <2 x i64> [[A1]])7166; CHECK-NEXT: store <8 x i64> [[TMP9]], ptr @__msan_retval_tls, align 87167; CHECK-NEXT: ret <8 x i64> [[TMP10]]7168;7169 %res = call <8 x i64> @llvm.x86.avx512.mask.psrl.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> zeroinitializer, i8 -1)7170 ret <8 x i64> %res7171}7172 7173define <8 x i64> @test_x86_avx512_mask_psrl_q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> %a2, i8 %mask) #0 {7174;7175; CHECK-LABEL: @test_x86_avx512_mask_psrl_q(7176; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 87177; CHECK-NEXT: [[TMP2:%.*]] = load <2 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87178; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 87179; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 87180; CHECK-NEXT: call void @llvm.donothing()7181; CHECK-NEXT: [[TMP5:%.*]] = bitcast <2 x i64> [[TMP2]] to i1287182; CHECK-NEXT: [[TMP6:%.*]] = trunc i128 [[TMP5]] to i647183; CHECK-NEXT: [[TMP7:%.*]] = icmp ne i64 [[TMP6]], 07184; CHECK-NEXT: [[TMP8:%.*]] = sext i1 [[TMP7]] to i5127185; CHECK-NEXT: [[TMP9:%.*]] = bitcast i512 [[TMP8]] to <8 x i64>7186; CHECK-NEXT: [[TMP10:%.*]] = call <8 x i64> @llvm.x86.avx512.psrl.q.512(<8 x i64> [[TMP1]], <2 x i64> [[A1:%.*]])7187; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP9]]7188; CHECK-NEXT: [[TMP12:%.*]] = call <8 x i64> @llvm.x86.avx512.psrl.q.512(<8 x i64> [[A0:%.*]], <2 x i64> [[A1]])7189; CHECK-NEXT: [[TMP13:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>7190; CHECK-NEXT: [[TMP14:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>7191; CHECK-NEXT: [[TMP15:%.*]] = select <8 x i1> [[TMP14]], <8 x i64> [[TMP11]], <8 x i64> [[TMP4]]7192; CHECK-NEXT: [[TMP16:%.*]] = xor <8 x i64> [[TMP12]], [[A2:%.*]]7193; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP16]], [[TMP11]]7194; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i64> [[TMP17]], [[TMP4]]7195; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP13]], <8 x i64> [[TMP18]], <8 x i64> [[TMP15]]7196; CHECK-NEXT: [[TMP19:%.*]] = select <8 x i1> [[TMP14]], <8 x i64> [[TMP12]], <8 x i64> [[A2]]7197; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87198; CHECK-NEXT: ret <8 x i64> [[TMP19]]7199;7200 %res = call <8 x i64> @llvm.x86.avx512.mask.psrl.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> %a2, i8 %mask)7201 ret <8 x i64> %res7202}7203 7204define <8 x i64> @test_x86_avx512_maskz_psrl_q(<8 x i64> %a0, <2 x i64> %a1, i8 %mask) #0 {7205;7206; CHECK-LABEL: @test_x86_avx512_maskz_psrl_q(7207; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 87208; CHECK-NEXT: [[TMP2:%.*]] = load <2 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87209; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 87210; CHECK-NEXT: call void @llvm.donothing()7211; CHECK-NEXT: [[TMP4:%.*]] = bitcast <2 x i64> [[TMP2]] to i1287212; CHECK-NEXT: [[TMP5:%.*]] = trunc i128 [[TMP4]] to i647213; CHECK-NEXT: [[TMP6:%.*]] = icmp ne i64 [[TMP5]], 07214; CHECK-NEXT: [[TMP7:%.*]] = sext i1 [[TMP6]] to i5127215; CHECK-NEXT: [[TMP8:%.*]] = bitcast i512 [[TMP7]] to <8 x i64>7216; CHECK-NEXT: [[TMP9:%.*]] = call <8 x i64> @llvm.x86.avx512.psrl.q.512(<8 x i64> [[TMP1]], <2 x i64> [[A1:%.*]])7217; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[TMP8]]7218; CHECK-NEXT: [[TMP11:%.*]] = call <8 x i64> @llvm.x86.avx512.psrl.q.512(<8 x i64> [[A0:%.*]], <2 x i64> [[A1]])7219; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>7220; CHECK-NEXT: [[TMP13:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>7221; CHECK-NEXT: [[TMP14:%.*]] = select <8 x i1> [[TMP13]], <8 x i64> [[TMP10]], <8 x i64> zeroinitializer7222; CHECK-NEXT: [[TMP15:%.*]] = xor <8 x i64> [[TMP11]], zeroinitializer7223; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP15]], [[TMP10]]7224; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP16]], zeroinitializer7225; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP12]], <8 x i64> [[TMP17]], <8 x i64> [[TMP14]]7226; CHECK-NEXT: [[TMP18:%.*]] = select <8 x i1> [[TMP13]], <8 x i64> [[TMP11]], <8 x i64> zeroinitializer7227; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87228; CHECK-NEXT: ret <8 x i64> [[TMP18]]7229;7230 %res = call <8 x i64> @llvm.x86.avx512.mask.psrl.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> zeroinitializer, i8 %mask)7231 ret <8 x i64> %res7232}7233 7234declare <8 x i64> @llvm.x86.avx512.mask.psrl.q(<8 x i64>, <2 x i64>, <8 x i64>, i8) nounwind readnone7235 7236define <16 x i32> @test_x86_avx512_psra_d(<16 x i32> %a0, <4 x i32> %a1) #0 {7237; CHECK-LABEL: @test_x86_avx512_psra_d(7238; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 87239; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87240; CHECK-NEXT: call void @llvm.donothing()7241; CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i32> [[TMP2]] to i1287242; CHECK-NEXT: [[TMP4:%.*]] = trunc i128 [[TMP3]] to i647243; CHECK-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP4]], 07244; CHECK-NEXT: [[TMP6:%.*]] = sext i1 [[TMP5]] to i5127245; CHECK-NEXT: [[TMP7:%.*]] = bitcast i512 [[TMP6]] to <16 x i32>7246; CHECK-NEXT: [[TMP8:%.*]] = call <16 x i32> @llvm.x86.avx512.psra.d.512(<16 x i32> [[TMP1]], <4 x i32> [[A1:%.*]])7247; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], [[TMP7]]7248; CHECK-NEXT: [[TMP10:%.*]] = call <16 x i32> @llvm.x86.avx512.psra.d.512(<16 x i32> [[A0:%.*]], <4 x i32> [[A1]])7249; CHECK-NEXT: store <16 x i32> [[TMP9]], ptr @__msan_retval_tls, align 87250; CHECK-NEXT: ret <16 x i32> [[TMP10]]7251;7252 %res = call <16 x i32> @llvm.x86.avx512.mask.psra.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> zeroinitializer, i16 -1)7253 ret <16 x i32> %res7254}7255 7256define <16 x i32> @test_x86_avx512_mask_psra_d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> %a2, i16 %mask) #0 {7257;7258; CHECK-LABEL: @test_x86_avx512_mask_psra_d(7259; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 87260; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87261; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 87262; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 87263; CHECK-NEXT: call void @llvm.donothing()7264; CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i32> [[TMP2]] to i1287265; CHECK-NEXT: [[TMP6:%.*]] = trunc i128 [[TMP5]] to i647266; CHECK-NEXT: [[TMP7:%.*]] = icmp ne i64 [[TMP6]], 07267; CHECK-NEXT: [[TMP8:%.*]] = sext i1 [[TMP7]] to i5127268; CHECK-NEXT: [[TMP9:%.*]] = bitcast i512 [[TMP8]] to <16 x i32>7269; CHECK-NEXT: [[TMP10:%.*]] = call <16 x i32> @llvm.x86.avx512.psra.d.512(<16 x i32> [[TMP1]], <4 x i32> [[A1:%.*]])7270; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP9]]7271; CHECK-NEXT: [[TMP12:%.*]] = call <16 x i32> @llvm.x86.avx512.psra.d.512(<16 x i32> [[A0:%.*]], <4 x i32> [[A1]])7272; CHECK-NEXT: [[TMP13:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>7273; CHECK-NEXT: [[TMP14:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>7274; CHECK-NEXT: [[TMP15:%.*]] = select <16 x i1> [[TMP14]], <16 x i32> [[TMP11]], <16 x i32> [[TMP4]]7275; CHECK-NEXT: [[TMP16:%.*]] = xor <16 x i32> [[TMP12]], [[A2:%.*]]7276; CHECK-NEXT: [[TMP17:%.*]] = or <16 x i32> [[TMP16]], [[TMP11]]7277; CHECK-NEXT: [[TMP18:%.*]] = or <16 x i32> [[TMP17]], [[TMP4]]7278; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP13]], <16 x i32> [[TMP18]], <16 x i32> [[TMP15]]7279; CHECK-NEXT: [[TMP19:%.*]] = select <16 x i1> [[TMP14]], <16 x i32> [[TMP12]], <16 x i32> [[A2]]7280; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87281; CHECK-NEXT: ret <16 x i32> [[TMP19]]7282;7283 %res = call <16 x i32> @llvm.x86.avx512.mask.psra.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> %a2, i16 %mask)7284 ret <16 x i32> %res7285}7286 7287define <16 x i32> @test_x86_avx512_maskz_psra_d(<16 x i32> %a0, <4 x i32> %a1, i16 %mask) #0 {7288;7289; CHECK-LABEL: @test_x86_avx512_maskz_psra_d(7290; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 87291; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87292; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 87293; CHECK-NEXT: call void @llvm.donothing()7294; CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x i32> [[TMP2]] to i1287295; CHECK-NEXT: [[TMP5:%.*]] = trunc i128 [[TMP4]] to i647296; CHECK-NEXT: [[TMP6:%.*]] = icmp ne i64 [[TMP5]], 07297; CHECK-NEXT: [[TMP7:%.*]] = sext i1 [[TMP6]] to i5127298; CHECK-NEXT: [[TMP8:%.*]] = bitcast i512 [[TMP7]] to <16 x i32>7299; CHECK-NEXT: [[TMP9:%.*]] = call <16 x i32> @llvm.x86.avx512.psra.d.512(<16 x i32> [[TMP1]], <4 x i32> [[A1:%.*]])7300; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[TMP8]]7301; CHECK-NEXT: [[TMP11:%.*]] = call <16 x i32> @llvm.x86.avx512.psra.d.512(<16 x i32> [[A0:%.*]], <4 x i32> [[A1]])7302; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>7303; CHECK-NEXT: [[TMP13:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>7304; CHECK-NEXT: [[TMP14:%.*]] = select <16 x i1> [[TMP13]], <16 x i32> [[TMP10]], <16 x i32> zeroinitializer7305; CHECK-NEXT: [[TMP15:%.*]] = xor <16 x i32> [[TMP11]], zeroinitializer7306; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i32> [[TMP15]], [[TMP10]]7307; CHECK-NEXT: [[TMP17:%.*]] = or <16 x i32> [[TMP16]], zeroinitializer7308; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[TMP17]], <16 x i32> [[TMP14]]7309; CHECK-NEXT: [[TMP18:%.*]] = select <16 x i1> [[TMP13]], <16 x i32> [[TMP11]], <16 x i32> zeroinitializer7310; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87311; CHECK-NEXT: ret <16 x i32> [[TMP18]]7312;7313 %res = call <16 x i32> @llvm.x86.avx512.mask.psra.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> zeroinitializer, i16 %mask)7314 ret <16 x i32> %res7315}7316 7317declare <16 x i32> @llvm.x86.avx512.mask.psra.d(<16 x i32>, <4 x i32>, <16 x i32>, i16) nounwind readnone7318 7319define <8 x i64> @test_x86_avx512_psra_q(<8 x i64> %a0, <2 x i64> %a1) #0 {7320; CHECK-LABEL: @test_x86_avx512_psra_q(7321; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 87322; CHECK-NEXT: [[TMP2:%.*]] = load <2 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87323; CHECK-NEXT: call void @llvm.donothing()7324; CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i64> [[TMP2]] to i1287325; CHECK-NEXT: [[TMP4:%.*]] = trunc i128 [[TMP3]] to i647326; CHECK-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP4]], 07327; CHECK-NEXT: [[TMP6:%.*]] = sext i1 [[TMP5]] to i5127328; CHECK-NEXT: [[TMP7:%.*]] = bitcast i512 [[TMP6]] to <8 x i64>7329; CHECK-NEXT: [[TMP8:%.*]] = call <8 x i64> @llvm.x86.avx512.psra.q.512(<8 x i64> [[TMP1]], <2 x i64> [[A1:%.*]])7330; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[TMP7]]7331; CHECK-NEXT: [[TMP10:%.*]] = call <8 x i64> @llvm.x86.avx512.psra.q.512(<8 x i64> [[A0:%.*]], <2 x i64> [[A1]])7332; CHECK-NEXT: store <8 x i64> [[TMP9]], ptr @__msan_retval_tls, align 87333; CHECK-NEXT: ret <8 x i64> [[TMP10]]7334;7335 %res = call <8 x i64> @llvm.x86.avx512.mask.psra.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> zeroinitializer, i8 -1)7336 ret <8 x i64> %res7337}7338 7339define <8 x i64> @test_x86_avx512_mask_psra_q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> %a2, i8 %mask) #0 {7340;7341; CHECK-LABEL: @test_x86_avx512_mask_psra_q(7342; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 87343; CHECK-NEXT: [[TMP2:%.*]] = load <2 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87344; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 87345; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 87346; CHECK-NEXT: call void @llvm.donothing()7347; CHECK-NEXT: [[TMP5:%.*]] = bitcast <2 x i64> [[TMP2]] to i1287348; CHECK-NEXT: [[TMP6:%.*]] = trunc i128 [[TMP5]] to i647349; CHECK-NEXT: [[TMP7:%.*]] = icmp ne i64 [[TMP6]], 07350; CHECK-NEXT: [[TMP8:%.*]] = sext i1 [[TMP7]] to i5127351; CHECK-NEXT: [[TMP9:%.*]] = bitcast i512 [[TMP8]] to <8 x i64>7352; CHECK-NEXT: [[TMP10:%.*]] = call <8 x i64> @llvm.x86.avx512.psra.q.512(<8 x i64> [[TMP1]], <2 x i64> [[A1:%.*]])7353; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP9]]7354; CHECK-NEXT: [[TMP12:%.*]] = call <8 x i64> @llvm.x86.avx512.psra.q.512(<8 x i64> [[A0:%.*]], <2 x i64> [[A1]])7355; CHECK-NEXT: [[TMP13:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>7356; CHECK-NEXT: [[TMP14:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>7357; CHECK-NEXT: [[TMP15:%.*]] = select <8 x i1> [[TMP14]], <8 x i64> [[TMP11]], <8 x i64> [[TMP4]]7358; CHECK-NEXT: [[TMP16:%.*]] = xor <8 x i64> [[TMP12]], [[A2:%.*]]7359; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP16]], [[TMP11]]7360; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i64> [[TMP17]], [[TMP4]]7361; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP13]], <8 x i64> [[TMP18]], <8 x i64> [[TMP15]]7362; CHECK-NEXT: [[TMP19:%.*]] = select <8 x i1> [[TMP14]], <8 x i64> [[TMP12]], <8 x i64> [[A2]]7363; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87364; CHECK-NEXT: ret <8 x i64> [[TMP19]]7365;7366 %res = call <8 x i64> @llvm.x86.avx512.mask.psra.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> %a2, i8 %mask)7367 ret <8 x i64> %res7368}7369 7370define <8 x i64> @test_x86_avx512_maskz_psra_q(<8 x i64> %a0, <2 x i64> %a1, i8 %mask) #0 {7371;7372; CHECK-LABEL: @test_x86_avx512_maskz_psra_q(7373; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 87374; CHECK-NEXT: [[TMP2:%.*]] = load <2 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87375; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 87376; CHECK-NEXT: call void @llvm.donothing()7377; CHECK-NEXT: [[TMP4:%.*]] = bitcast <2 x i64> [[TMP2]] to i1287378; CHECK-NEXT: [[TMP5:%.*]] = trunc i128 [[TMP4]] to i647379; CHECK-NEXT: [[TMP6:%.*]] = icmp ne i64 [[TMP5]], 07380; CHECK-NEXT: [[TMP7:%.*]] = sext i1 [[TMP6]] to i5127381; CHECK-NEXT: [[TMP8:%.*]] = bitcast i512 [[TMP7]] to <8 x i64>7382; CHECK-NEXT: [[TMP9:%.*]] = call <8 x i64> @llvm.x86.avx512.psra.q.512(<8 x i64> [[TMP1]], <2 x i64> [[A1:%.*]])7383; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[TMP8]]7384; CHECK-NEXT: [[TMP11:%.*]] = call <8 x i64> @llvm.x86.avx512.psra.q.512(<8 x i64> [[A0:%.*]], <2 x i64> [[A1]])7385; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>7386; CHECK-NEXT: [[TMP13:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>7387; CHECK-NEXT: [[TMP14:%.*]] = select <8 x i1> [[TMP13]], <8 x i64> [[TMP10]], <8 x i64> zeroinitializer7388; CHECK-NEXT: [[TMP15:%.*]] = xor <8 x i64> [[TMP11]], zeroinitializer7389; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP15]], [[TMP10]]7390; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP16]], zeroinitializer7391; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP12]], <8 x i64> [[TMP17]], <8 x i64> [[TMP14]]7392; CHECK-NEXT: [[TMP18:%.*]] = select <8 x i1> [[TMP13]], <8 x i64> [[TMP11]], <8 x i64> zeroinitializer7393; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87394; CHECK-NEXT: ret <8 x i64> [[TMP18]]7395;7396 %res = call <8 x i64> @llvm.x86.avx512.mask.psra.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> zeroinitializer, i8 %mask)7397 ret <8 x i64> %res7398}7399 7400declare <8 x i64> @llvm.x86.avx512.mask.psra.q(<8 x i64>, <2 x i64>, <8 x i64>, i8) nounwind readnone7401 7402define <16 x i32> @test_x86_avx512_psllv_d(<16 x i32> %a0, <16 x i32> %a1) #0 {7403; CHECK-LABEL: @test_x86_avx512_psllv_d(7404; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 87405; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87406; CHECK-NEXT: call void @llvm.donothing()7407; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer7408; CHECK-NEXT: [[TMP4:%.*]] = sext <16 x i1> [[TMP3]] to <16 x i32>7409; CHECK-NEXT: [[TMP5:%.*]] = call <16 x i32> @llvm.x86.avx512.psllv.d.512(<16 x i32> [[TMP1]], <16 x i32> [[A1:%.*]])7410; CHECK-NEXT: [[TMP6:%.*]] = or <16 x i32> [[TMP5]], [[TMP4]]7411; CHECK-NEXT: [[TMP7:%.*]] = call <16 x i32> @llvm.x86.avx512.psllv.d.512(<16 x i32> [[A0:%.*]], <16 x i32> [[A1]])7412; CHECK-NEXT: store <16 x i32> [[TMP6]], ptr @__msan_retval_tls, align 87413; CHECK-NEXT: ret <16 x i32> [[TMP7]]7414;7415 %res = call <16 x i32> @llvm.x86.avx512.mask.psllv.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> zeroinitializer, i16 -1)7416 ret <16 x i32> %res7417}7418 7419define <16 x i32> @test_x86_avx512_mask_psllv_d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask) #0 {7420;7421; CHECK-LABEL: @test_x86_avx512_mask_psllv_d(7422; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 87423; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87424; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 87425; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 87426; CHECK-NEXT: call void @llvm.donothing()7427; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer7428; CHECK-NEXT: [[TMP6:%.*]] = sext <16 x i1> [[TMP5]] to <16 x i32>7429; CHECK-NEXT: [[TMP7:%.*]] = call <16 x i32> @llvm.x86.avx512.psllv.d.512(<16 x i32> [[TMP1]], <16 x i32> [[A1:%.*]])7430; CHECK-NEXT: [[TMP8:%.*]] = or <16 x i32> [[TMP7]], [[TMP6]]7431; CHECK-NEXT: [[TMP9:%.*]] = call <16 x i32> @llvm.x86.avx512.psllv.d.512(<16 x i32> [[A0:%.*]], <16 x i32> [[A1]])7432; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>7433; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>7434; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP8]], <16 x i32> [[TMP4]]7435; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i32> [[TMP9]], [[A2:%.*]]7436; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], [[TMP8]]7437; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], [[TMP4]]7438; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP15]], <16 x i32> [[TMP12]]7439; CHECK-NEXT: [[TMP16:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP9]], <16 x i32> [[A2]]7440; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87441; CHECK-NEXT: ret <16 x i32> [[TMP16]]7442;7443 %res = call <16 x i32> @llvm.x86.avx512.mask.psllv.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask)7444 ret <16 x i32> %res7445}7446 7447define <16 x i32> @test_x86_avx512_maskz_psllv_d(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) #0 {7448;7449; CHECK-LABEL: @test_x86_avx512_maskz_psllv_d(7450; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 87451; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87452; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 87453; CHECK-NEXT: call void @llvm.donothing()7454; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer7455; CHECK-NEXT: [[TMP5:%.*]] = sext <16 x i1> [[TMP4]] to <16 x i32>7456; CHECK-NEXT: [[TMP6:%.*]] = call <16 x i32> @llvm.x86.avx512.psllv.d.512(<16 x i32> [[TMP1]], <16 x i32> [[A1:%.*]])7457; CHECK-NEXT: [[TMP7:%.*]] = or <16 x i32> [[TMP6]], [[TMP5]]7458; CHECK-NEXT: [[TMP8:%.*]] = call <16 x i32> @llvm.x86.avx512.psllv.d.512(<16 x i32> [[A0:%.*]], <16 x i32> [[A1]])7459; CHECK-NEXT: [[TMP9:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>7460; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>7461; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP7]], <16 x i32> zeroinitializer7462; CHECK-NEXT: [[TMP12:%.*]] = xor <16 x i32> [[TMP8]], zeroinitializer7463; CHECK-NEXT: [[TMP13:%.*]] = or <16 x i32> [[TMP12]], [[TMP7]]7464; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], zeroinitializer7465; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP9]], <16 x i32> [[TMP14]], <16 x i32> [[TMP11]]7466; CHECK-NEXT: [[TMP15:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP8]], <16 x i32> zeroinitializer7467; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87468; CHECK-NEXT: ret <16 x i32> [[TMP15]]7469;7470 %res = call <16 x i32> @llvm.x86.avx512.mask.psllv.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> zeroinitializer, i16 %mask)7471 ret <16 x i32> %res7472}7473 7474declare <16 x i32> @llvm.x86.avx512.mask.psllv.d(<16 x i32>, <16 x i32>, <16 x i32>, i16) nounwind readnone7475 7476define <8 x i64> @test_x86_avx512_psllv_q(<8 x i64> %a0, <8 x i64> %a1) #0 {7477; CHECK-LABEL: @test_x86_avx512_psllv_q(7478; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 87479; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87480; CHECK-NEXT: call void @llvm.donothing()7481; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <8 x i64> [[TMP2]], zeroinitializer7482; CHECK-NEXT: [[TMP4:%.*]] = sext <8 x i1> [[TMP3]] to <8 x i64>7483; CHECK-NEXT: [[TMP5:%.*]] = call <8 x i64> @llvm.x86.avx512.psllv.q.512(<8 x i64> [[TMP1]], <8 x i64> [[A1:%.*]])7484; CHECK-NEXT: [[TMP6:%.*]] = or <8 x i64> [[TMP5]], [[TMP4]]7485; CHECK-NEXT: [[TMP7:%.*]] = call <8 x i64> @llvm.x86.avx512.psllv.q.512(<8 x i64> [[A0:%.*]], <8 x i64> [[A1]])7486; CHECK-NEXT: store <8 x i64> [[TMP6]], ptr @__msan_retval_tls, align 87487; CHECK-NEXT: ret <8 x i64> [[TMP7]]7488;7489 %res = call <8 x i64> @llvm.x86.avx512.mask.psllv.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> zeroinitializer, i8 -1)7490 ret <8 x i64> %res7491}7492 7493define <8 x i64> @test_x86_avx512_mask_psllv_q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask) #0 {7494;7495; CHECK-LABEL: @test_x86_avx512_mask_psllv_q(7496; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 87497; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87498; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 87499; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 87500; CHECK-NEXT: call void @llvm.donothing()7501; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <8 x i64> [[TMP2]], zeroinitializer7502; CHECK-NEXT: [[TMP6:%.*]] = sext <8 x i1> [[TMP5]] to <8 x i64>7503; CHECK-NEXT: [[TMP7:%.*]] = call <8 x i64> @llvm.x86.avx512.psllv.q.512(<8 x i64> [[TMP1]], <8 x i64> [[A1:%.*]])7504; CHECK-NEXT: [[TMP8:%.*]] = or <8 x i64> [[TMP7]], [[TMP6]]7505; CHECK-NEXT: [[TMP9:%.*]] = call <8 x i64> @llvm.x86.avx512.psllv.q.512(<8 x i64> [[A0:%.*]], <8 x i64> [[A1]])7506; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>7507; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>7508; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP8]], <8 x i64> [[TMP4]]7509; CHECK-NEXT: [[TMP13:%.*]] = xor <8 x i64> [[TMP9]], [[A2:%.*]]7510; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], [[TMP8]]7511; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], [[TMP4]]7512; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP15]], <8 x i64> [[TMP12]]7513; CHECK-NEXT: [[TMP16:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP9]], <8 x i64> [[A2]]7514; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87515; CHECK-NEXT: ret <8 x i64> [[TMP16]]7516;7517 %res = call <8 x i64> @llvm.x86.avx512.mask.psllv.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask)7518 ret <8 x i64> %res7519}7520 7521define <8 x i64> @test_x86_avx512_maskz_psllv_q(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) #0 {7522;7523; CHECK-LABEL: @test_x86_avx512_maskz_psllv_q(7524; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 87525; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87526; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 87527; CHECK-NEXT: call void @llvm.donothing()7528; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <8 x i64> [[TMP2]], zeroinitializer7529; CHECK-NEXT: [[TMP5:%.*]] = sext <8 x i1> [[TMP4]] to <8 x i64>7530; CHECK-NEXT: [[TMP6:%.*]] = call <8 x i64> @llvm.x86.avx512.psllv.q.512(<8 x i64> [[TMP1]], <8 x i64> [[A1:%.*]])7531; CHECK-NEXT: [[TMP7:%.*]] = or <8 x i64> [[TMP6]], [[TMP5]]7532; CHECK-NEXT: [[TMP8:%.*]] = call <8 x i64> @llvm.x86.avx512.psllv.q.512(<8 x i64> [[A0:%.*]], <8 x i64> [[A1]])7533; CHECK-NEXT: [[TMP9:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>7534; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>7535; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP7]], <8 x i64> zeroinitializer7536; CHECK-NEXT: [[TMP12:%.*]] = xor <8 x i64> [[TMP8]], zeroinitializer7537; CHECK-NEXT: [[TMP13:%.*]] = or <8 x i64> [[TMP12]], [[TMP7]]7538; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], zeroinitializer7539; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP9]], <8 x i64> [[TMP14]], <8 x i64> [[TMP11]]7540; CHECK-NEXT: [[TMP15:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP8]], <8 x i64> zeroinitializer7541; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87542; CHECK-NEXT: ret <8 x i64> [[TMP15]]7543;7544 %res = call <8 x i64> @llvm.x86.avx512.mask.psllv.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> zeroinitializer, i8 %mask)7545 ret <8 x i64> %res7546}7547 7548declare <8 x i64> @llvm.x86.avx512.mask.psllv.q(<8 x i64>, <8 x i64>, <8 x i64>, i8) nounwind readnone7549 7550 7551define <16 x i32> @test_x86_avx512_psrav_d(<16 x i32> %a0, <16 x i32> %a1) #0 {7552; CHECK-LABEL: @test_x86_avx512_psrav_d(7553; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 87554; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87555; CHECK-NEXT: call void @llvm.donothing()7556; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer7557; CHECK-NEXT: [[TMP4:%.*]] = sext <16 x i1> [[TMP3]] to <16 x i32>7558; CHECK-NEXT: [[TMP5:%.*]] = call <16 x i32> @llvm.x86.avx512.psrav.d.512(<16 x i32> [[TMP1]], <16 x i32> [[A1:%.*]])7559; CHECK-NEXT: [[TMP6:%.*]] = or <16 x i32> [[TMP5]], [[TMP4]]7560; CHECK-NEXT: [[TMP7:%.*]] = call <16 x i32> @llvm.x86.avx512.psrav.d.512(<16 x i32> [[A0:%.*]], <16 x i32> [[A1]])7561; CHECK-NEXT: store <16 x i32> [[TMP6]], ptr @__msan_retval_tls, align 87562; CHECK-NEXT: ret <16 x i32> [[TMP7]]7563;7564 %res = call <16 x i32> @llvm.x86.avx512.mask.psrav.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> zeroinitializer, i16 -1)7565 ret <16 x i32> %res7566}7567 7568define <16 x i32> @test_x86_avx512_mask_psrav_d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask) #0 {7569;7570; CHECK-LABEL: @test_x86_avx512_mask_psrav_d(7571; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 87572; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87573; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 87574; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 87575; CHECK-NEXT: call void @llvm.donothing()7576; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer7577; CHECK-NEXT: [[TMP6:%.*]] = sext <16 x i1> [[TMP5]] to <16 x i32>7578; CHECK-NEXT: [[TMP7:%.*]] = call <16 x i32> @llvm.x86.avx512.psrav.d.512(<16 x i32> [[TMP1]], <16 x i32> [[A1:%.*]])7579; CHECK-NEXT: [[TMP8:%.*]] = or <16 x i32> [[TMP7]], [[TMP6]]7580; CHECK-NEXT: [[TMP9:%.*]] = call <16 x i32> @llvm.x86.avx512.psrav.d.512(<16 x i32> [[A0:%.*]], <16 x i32> [[A1]])7581; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>7582; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>7583; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP8]], <16 x i32> [[TMP4]]7584; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i32> [[TMP9]], [[A2:%.*]]7585; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], [[TMP8]]7586; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], [[TMP4]]7587; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP15]], <16 x i32> [[TMP12]]7588; CHECK-NEXT: [[TMP16:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP9]], <16 x i32> [[A2]]7589; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87590; CHECK-NEXT: ret <16 x i32> [[TMP16]]7591;7592 %res = call <16 x i32> @llvm.x86.avx512.mask.psrav.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask)7593 ret <16 x i32> %res7594}7595 7596define <16 x i32> @test_x86_avx512_maskz_psrav_d(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) #0 {7597;7598; CHECK-LABEL: @test_x86_avx512_maskz_psrav_d(7599; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 87600; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87601; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 87602; CHECK-NEXT: call void @llvm.donothing()7603; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer7604; CHECK-NEXT: [[TMP5:%.*]] = sext <16 x i1> [[TMP4]] to <16 x i32>7605; CHECK-NEXT: [[TMP6:%.*]] = call <16 x i32> @llvm.x86.avx512.psrav.d.512(<16 x i32> [[TMP1]], <16 x i32> [[A1:%.*]])7606; CHECK-NEXT: [[TMP7:%.*]] = or <16 x i32> [[TMP6]], [[TMP5]]7607; CHECK-NEXT: [[TMP8:%.*]] = call <16 x i32> @llvm.x86.avx512.psrav.d.512(<16 x i32> [[A0:%.*]], <16 x i32> [[A1]])7608; CHECK-NEXT: [[TMP9:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>7609; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>7610; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP7]], <16 x i32> zeroinitializer7611; CHECK-NEXT: [[TMP12:%.*]] = xor <16 x i32> [[TMP8]], zeroinitializer7612; CHECK-NEXT: [[TMP13:%.*]] = or <16 x i32> [[TMP12]], [[TMP7]]7613; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], zeroinitializer7614; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP9]], <16 x i32> [[TMP14]], <16 x i32> [[TMP11]]7615; CHECK-NEXT: [[TMP15:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP8]], <16 x i32> zeroinitializer7616; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87617; CHECK-NEXT: ret <16 x i32> [[TMP15]]7618;7619 %res = call <16 x i32> @llvm.x86.avx512.mask.psrav.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> zeroinitializer, i16 %mask)7620 ret <16 x i32> %res7621}7622 7623declare <16 x i32> @llvm.x86.avx512.mask.psrav.d(<16 x i32>, <16 x i32>, <16 x i32>, i16) nounwind readnone7624 7625define <8 x i64> @test_x86_avx512_psrav_q(<8 x i64> %a0, <8 x i64> %a1) #0 {7626; CHECK-LABEL: @test_x86_avx512_psrav_q(7627; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 87628; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87629; CHECK-NEXT: call void @llvm.donothing()7630; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <8 x i64> [[TMP2]], zeroinitializer7631; CHECK-NEXT: [[TMP4:%.*]] = sext <8 x i1> [[TMP3]] to <8 x i64>7632; CHECK-NEXT: [[TMP5:%.*]] = call <8 x i64> @llvm.x86.avx512.psrav.q.512(<8 x i64> [[TMP1]], <8 x i64> [[A1:%.*]])7633; CHECK-NEXT: [[TMP6:%.*]] = or <8 x i64> [[TMP5]], [[TMP4]]7634; CHECK-NEXT: [[TMP7:%.*]] = call <8 x i64> @llvm.x86.avx512.psrav.q.512(<8 x i64> [[A0:%.*]], <8 x i64> [[A1]])7635; CHECK-NEXT: store <8 x i64> [[TMP6]], ptr @__msan_retval_tls, align 87636; CHECK-NEXT: ret <8 x i64> [[TMP7]]7637;7638 %res = call <8 x i64> @llvm.x86.avx512.mask.psrav.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> zeroinitializer, i8 -1)7639 ret <8 x i64> %res7640}7641 7642define <8 x i64> @test_x86_avx512_mask_psrav_q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask) #0 {7643;7644; CHECK-LABEL: @test_x86_avx512_mask_psrav_q(7645; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 87646; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87647; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 87648; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 87649; CHECK-NEXT: call void @llvm.donothing()7650; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <8 x i64> [[TMP2]], zeroinitializer7651; CHECK-NEXT: [[TMP6:%.*]] = sext <8 x i1> [[TMP5]] to <8 x i64>7652; CHECK-NEXT: [[TMP7:%.*]] = call <8 x i64> @llvm.x86.avx512.psrav.q.512(<8 x i64> [[TMP1]], <8 x i64> [[A1:%.*]])7653; CHECK-NEXT: [[TMP8:%.*]] = or <8 x i64> [[TMP7]], [[TMP6]]7654; CHECK-NEXT: [[TMP9:%.*]] = call <8 x i64> @llvm.x86.avx512.psrav.q.512(<8 x i64> [[A0:%.*]], <8 x i64> [[A1]])7655; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>7656; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>7657; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP8]], <8 x i64> [[TMP4]]7658; CHECK-NEXT: [[TMP13:%.*]] = xor <8 x i64> [[TMP9]], [[A2:%.*]]7659; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], [[TMP8]]7660; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], [[TMP4]]7661; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP15]], <8 x i64> [[TMP12]]7662; CHECK-NEXT: [[TMP16:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP9]], <8 x i64> [[A2]]7663; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87664; CHECK-NEXT: ret <8 x i64> [[TMP16]]7665;7666 %res = call <8 x i64> @llvm.x86.avx512.mask.psrav.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask)7667 ret <8 x i64> %res7668}7669 7670define <8 x i64> @test_x86_avx512_maskz_psrav_q(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) #0 {7671;7672; CHECK-LABEL: @test_x86_avx512_maskz_psrav_q(7673; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 87674; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87675; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 87676; CHECK-NEXT: call void @llvm.donothing()7677; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <8 x i64> [[TMP2]], zeroinitializer7678; CHECK-NEXT: [[TMP5:%.*]] = sext <8 x i1> [[TMP4]] to <8 x i64>7679; CHECK-NEXT: [[TMP6:%.*]] = call <8 x i64> @llvm.x86.avx512.psrav.q.512(<8 x i64> [[TMP1]], <8 x i64> [[A1:%.*]])7680; CHECK-NEXT: [[TMP7:%.*]] = or <8 x i64> [[TMP6]], [[TMP5]]7681; CHECK-NEXT: [[TMP8:%.*]] = call <8 x i64> @llvm.x86.avx512.psrav.q.512(<8 x i64> [[A0:%.*]], <8 x i64> [[A1]])7682; CHECK-NEXT: [[TMP9:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>7683; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>7684; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP7]], <8 x i64> zeroinitializer7685; CHECK-NEXT: [[TMP12:%.*]] = xor <8 x i64> [[TMP8]], zeroinitializer7686; CHECK-NEXT: [[TMP13:%.*]] = or <8 x i64> [[TMP12]], [[TMP7]]7687; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], zeroinitializer7688; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP9]], <8 x i64> [[TMP14]], <8 x i64> [[TMP11]]7689; CHECK-NEXT: [[TMP15:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP8]], <8 x i64> zeroinitializer7690; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87691; CHECK-NEXT: ret <8 x i64> [[TMP15]]7692;7693 %res = call <8 x i64> @llvm.x86.avx512.mask.psrav.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> zeroinitializer, i8 %mask)7694 ret <8 x i64> %res7695}7696 7697declare <8 x i64> @llvm.x86.avx512.mask.psrav.q(<8 x i64>, <8 x i64>, <8 x i64>, i8) nounwind readnone7698 7699define <16 x i32> @test_x86_avx512_psrlv_d(<16 x i32> %a0, <16 x i32> %a1) #0 {7700; CHECK-LABEL: @test_x86_avx512_psrlv_d(7701; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 87702; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87703; CHECK-NEXT: call void @llvm.donothing()7704; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer7705; CHECK-NEXT: [[TMP4:%.*]] = sext <16 x i1> [[TMP3]] to <16 x i32>7706; CHECK-NEXT: [[TMP5:%.*]] = call <16 x i32> @llvm.x86.avx512.psrlv.d.512(<16 x i32> [[TMP1]], <16 x i32> [[A1:%.*]])7707; CHECK-NEXT: [[TMP6:%.*]] = or <16 x i32> [[TMP5]], [[TMP4]]7708; CHECK-NEXT: [[TMP7:%.*]] = call <16 x i32> @llvm.x86.avx512.psrlv.d.512(<16 x i32> [[A0:%.*]], <16 x i32> [[A1]])7709; CHECK-NEXT: store <16 x i32> [[TMP6]], ptr @__msan_retval_tls, align 87710; CHECK-NEXT: ret <16 x i32> [[TMP7]]7711;7712 %res = call <16 x i32> @llvm.x86.avx512.mask.psrlv.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> zeroinitializer, i16 -1)7713 ret <16 x i32> %res7714}7715 7716define <16 x i32> @test_x86_avx512_mask_psrlv_d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask) #0 {7717;7718; CHECK-LABEL: @test_x86_avx512_mask_psrlv_d(7719; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 87720; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87721; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 87722; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 87723; CHECK-NEXT: call void @llvm.donothing()7724; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer7725; CHECK-NEXT: [[TMP6:%.*]] = sext <16 x i1> [[TMP5]] to <16 x i32>7726; CHECK-NEXT: [[TMP7:%.*]] = call <16 x i32> @llvm.x86.avx512.psrlv.d.512(<16 x i32> [[TMP1]], <16 x i32> [[A1:%.*]])7727; CHECK-NEXT: [[TMP8:%.*]] = or <16 x i32> [[TMP7]], [[TMP6]]7728; CHECK-NEXT: [[TMP9:%.*]] = call <16 x i32> @llvm.x86.avx512.psrlv.d.512(<16 x i32> [[A0:%.*]], <16 x i32> [[A1]])7729; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>7730; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>7731; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP8]], <16 x i32> [[TMP4]]7732; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i32> [[TMP9]], [[A2:%.*]]7733; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], [[TMP8]]7734; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], [[TMP4]]7735; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP15]], <16 x i32> [[TMP12]]7736; CHECK-NEXT: [[TMP16:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP9]], <16 x i32> [[A2]]7737; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87738; CHECK-NEXT: ret <16 x i32> [[TMP16]]7739;7740 %res = call <16 x i32> @llvm.x86.avx512.mask.psrlv.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask)7741 ret <16 x i32> %res7742}7743 7744define <16 x i32> @test_x86_avx512_maskz_psrlv_d(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) #0 {7745;7746; CHECK-LABEL: @test_x86_avx512_maskz_psrlv_d(7747; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 87748; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87749; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 87750; CHECK-NEXT: call void @llvm.donothing()7751; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer7752; CHECK-NEXT: [[TMP5:%.*]] = sext <16 x i1> [[TMP4]] to <16 x i32>7753; CHECK-NEXT: [[TMP6:%.*]] = call <16 x i32> @llvm.x86.avx512.psrlv.d.512(<16 x i32> [[TMP1]], <16 x i32> [[A1:%.*]])7754; CHECK-NEXT: [[TMP7:%.*]] = or <16 x i32> [[TMP6]], [[TMP5]]7755; CHECK-NEXT: [[TMP8:%.*]] = call <16 x i32> @llvm.x86.avx512.psrlv.d.512(<16 x i32> [[A0:%.*]], <16 x i32> [[A1]])7756; CHECK-NEXT: [[TMP9:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>7757; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>7758; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP7]], <16 x i32> zeroinitializer7759; CHECK-NEXT: [[TMP12:%.*]] = xor <16 x i32> [[TMP8]], zeroinitializer7760; CHECK-NEXT: [[TMP13:%.*]] = or <16 x i32> [[TMP12]], [[TMP7]]7761; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], zeroinitializer7762; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP9]], <16 x i32> [[TMP14]], <16 x i32> [[TMP11]]7763; CHECK-NEXT: [[TMP15:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP8]], <16 x i32> zeroinitializer7764; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87765; CHECK-NEXT: ret <16 x i32> [[TMP15]]7766;7767 %res = call <16 x i32> @llvm.x86.avx512.mask.psrlv.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> zeroinitializer, i16 %mask)7768 ret <16 x i32> %res7769}7770 7771declare <16 x i32> @llvm.x86.avx512.mask.psrlv.d(<16 x i32>, <16 x i32>, <16 x i32>, i16) nounwind readnone7772 7773define <8 x i64> @test_x86_avx512_psrlv_q(<8 x i64> %a0, <8 x i64> %a1) #0 {7774; CHECK-LABEL: @test_x86_avx512_psrlv_q(7775; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 87776; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87777; CHECK-NEXT: call void @llvm.donothing()7778; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <8 x i64> [[TMP2]], zeroinitializer7779; CHECK-NEXT: [[TMP4:%.*]] = sext <8 x i1> [[TMP3]] to <8 x i64>7780; CHECK-NEXT: [[TMP5:%.*]] = call <8 x i64> @llvm.x86.avx512.psrlv.q.512(<8 x i64> [[TMP1]], <8 x i64> [[A1:%.*]])7781; CHECK-NEXT: [[TMP6:%.*]] = or <8 x i64> [[TMP5]], [[TMP4]]7782; CHECK-NEXT: [[TMP7:%.*]] = call <8 x i64> @llvm.x86.avx512.psrlv.q.512(<8 x i64> [[A0:%.*]], <8 x i64> [[A1]])7783; CHECK-NEXT: store <8 x i64> [[TMP6]], ptr @__msan_retval_tls, align 87784; CHECK-NEXT: ret <8 x i64> [[TMP7]]7785;7786 %res = call <8 x i64> @llvm.x86.avx512.mask.psrlv.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> zeroinitializer, i8 -1)7787 ret <8 x i64> %res7788}7789 7790define <8 x i64> @test_x86_avx512_mask_psrlv_q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask) #0 {7791;7792; CHECK-LABEL: @test_x86_avx512_mask_psrlv_q(7793; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 87794; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87795; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 87796; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 87797; CHECK-NEXT: call void @llvm.donothing()7798; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <8 x i64> [[TMP2]], zeroinitializer7799; CHECK-NEXT: [[TMP6:%.*]] = sext <8 x i1> [[TMP5]] to <8 x i64>7800; CHECK-NEXT: [[TMP7:%.*]] = call <8 x i64> @llvm.x86.avx512.psrlv.q.512(<8 x i64> [[TMP1]], <8 x i64> [[A1:%.*]])7801; CHECK-NEXT: [[TMP8:%.*]] = or <8 x i64> [[TMP7]], [[TMP6]]7802; CHECK-NEXT: [[TMP9:%.*]] = call <8 x i64> @llvm.x86.avx512.psrlv.q.512(<8 x i64> [[A0:%.*]], <8 x i64> [[A1]])7803; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>7804; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>7805; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP8]], <8 x i64> [[TMP4]]7806; CHECK-NEXT: [[TMP13:%.*]] = xor <8 x i64> [[TMP9]], [[A2:%.*]]7807; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], [[TMP8]]7808; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], [[TMP4]]7809; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP15]], <8 x i64> [[TMP12]]7810; CHECK-NEXT: [[TMP16:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP9]], <8 x i64> [[A2]]7811; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87812; CHECK-NEXT: ret <8 x i64> [[TMP16]]7813;7814 %res = call <8 x i64> @llvm.x86.avx512.mask.psrlv.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask)7815 ret <8 x i64> %res7816}7817 7818define <8 x i64> @test_x86_avx512_maskz_psrlv_q(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) #0 {7819;7820; CHECK-LABEL: @test_x86_avx512_maskz_psrlv_q(7821; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 87822; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87823; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 87824; CHECK-NEXT: call void @llvm.donothing()7825; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <8 x i64> [[TMP2]], zeroinitializer7826; CHECK-NEXT: [[TMP5:%.*]] = sext <8 x i1> [[TMP4]] to <8 x i64>7827; CHECK-NEXT: [[TMP6:%.*]] = call <8 x i64> @llvm.x86.avx512.psrlv.q.512(<8 x i64> [[TMP1]], <8 x i64> [[A1:%.*]])7828; CHECK-NEXT: [[TMP7:%.*]] = or <8 x i64> [[TMP6]], [[TMP5]]7829; CHECK-NEXT: [[TMP8:%.*]] = call <8 x i64> @llvm.x86.avx512.psrlv.q.512(<8 x i64> [[A0:%.*]], <8 x i64> [[A1]])7830; CHECK-NEXT: [[TMP9:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>7831; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>7832; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP7]], <8 x i64> zeroinitializer7833; CHECK-NEXT: [[TMP12:%.*]] = xor <8 x i64> [[TMP8]], zeroinitializer7834; CHECK-NEXT: [[TMP13:%.*]] = or <8 x i64> [[TMP12]], [[TMP7]]7835; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], zeroinitializer7836; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP9]], <8 x i64> [[TMP14]], <8 x i64> [[TMP11]]7837; CHECK-NEXT: [[TMP15:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP8]], <8 x i64> zeroinitializer7838; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87839; CHECK-NEXT: ret <8 x i64> [[TMP15]]7840;7841 %res = call <8 x i64> @llvm.x86.avx512.mask.psrlv.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> zeroinitializer, i8 %mask)7842 ret <8 x i64> %res7843}7844 7845declare <8 x i64> @llvm.x86.avx512.mask.psrlv.q(<8 x i64>, <8 x i64>, <8 x i64>, i8) nounwind readnone7846 7847define <8 x i64> @test_x86_avx512_psrlv_q_memop(<8 x i64> %a0, ptr %ptr) #0 {7848;7849; CHECK-LABEL: @test_x86_avx512_psrlv_q_memop(7850; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87851; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 87852; CHECK-NEXT: call void @llvm.donothing()7853; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 07854; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]7855; CHECK: 3:7856; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]7857; CHECK-NEXT: unreachable7858; CHECK: 4:7859; CHECK-NEXT: [[B:%.*]] = load <8 x i64>, ptr [[PTR:%.*]], align 647860; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR]] to i647861; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220807862; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr7863; CHECK-NEXT: [[_MSLD:%.*]] = load <8 x i64>, ptr [[TMP7]], align 647864; CHECK-NEXT: [[TMP8:%.*]] = icmp ne <8 x i64> [[_MSLD]], zeroinitializer7865; CHECK-NEXT: [[TMP9:%.*]] = sext <8 x i1> [[TMP8]] to <8 x i64>7866; CHECK-NEXT: [[TMP10:%.*]] = call <8 x i64> @llvm.x86.avx512.psrlv.q.512(<8 x i64> [[TMP2]], <8 x i64> [[B]])7867; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP9]]7868; CHECK-NEXT: [[TMP12:%.*]] = call <8 x i64> @llvm.x86.avx512.psrlv.q.512(<8 x i64> [[A0:%.*]], <8 x i64> [[B]])7869; CHECK-NEXT: store <8 x i64> [[TMP11]], ptr @__msan_retval_tls, align 87870; CHECK-NEXT: ret <8 x i64> [[TMP12]]7871;7872 %b = load <8 x i64>, ptr %ptr7873 %res = call <8 x i64> @llvm.x86.avx512.mask.psrlv.q(<8 x i64> %a0, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)7874 ret <8 x i64> %res7875}7876 7877declare <8 x double> @llvm.x86.avx512.mask.cvtdq2pd.512(<8 x i32>, <8 x double>, i8)7878 7879define <8 x double>@test_int_x86_avx512_cvt_dq2pd_512(<8 x i32> %x0, <8 x double> %x1) #0 {7880; CHECK-LABEL: @test_int_x86_avx512_cvt_dq2pd_512(7881; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 87882; CHECK-NEXT: call void @llvm.donothing()7883; CHECK-NEXT: [[TMP2:%.*]] = zext <8 x i32> [[TMP1]] to <8 x i64>7884; CHECK-NEXT: [[CVT:%.*]] = sitofp <8 x i32> [[X0:%.*]] to <8 x double>7885; CHECK-NEXT: store <8 x i64> [[TMP2]], ptr @__msan_retval_tls, align 87886; CHECK-NEXT: ret <8 x double> [[CVT]]7887;7888 %res = call <8 x double> @llvm.x86.avx512.mask.cvtdq2pd.512(<8 x i32> %x0, <8 x double> %x1, i8 -1)7889 ret <8 x double> %res7890}7891 7892define <8 x double>@test_int_x86_avx512_mask_cvt_dq2pd_512(<8 x i32> %x0, <8 x double> %x1, i8 %x2) #0 {7893;7894; CHECK-LABEL: @test_int_x86_avx512_mask_cvt_dq2pd_512(7895; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 87896; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 96), align 87897; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 87898; CHECK-NEXT: call void @llvm.donothing()7899; CHECK-NEXT: [[TMP4:%.*]] = zext <8 x i32> [[TMP1]] to <8 x i64>7900; CHECK-NEXT: [[CVT:%.*]] = sitofp <8 x i32> [[X0:%.*]] to <8 x double>7901; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>7902; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[X2:%.*]] to <8 x i1>7903; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP4]], <8 x i64> [[TMP3]]7904; CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x double> [[CVT]] to <8 x i64>7905; CHECK-NEXT: [[TMP9:%.*]] = bitcast <8 x double> [[X1:%.*]] to <8 x i64>7906; CHECK-NEXT: [[TMP10:%.*]] = xor <8 x i64> [[TMP8]], [[TMP9]]7907; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP4]]7908; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], [[TMP3]]7909; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP12]], <8 x i64> [[TMP7]]7910; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP6]], <8 x double> [[CVT]], <8 x double> [[X1]]7911; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87912; CHECK-NEXT: ret <8 x double> [[TMP13]]7913;7914 %res = call <8 x double> @llvm.x86.avx512.mask.cvtdq2pd.512(<8 x i32> %x0, <8 x double> %x1, i8 %x2)7915 ret <8 x double> %res7916}7917 7918declare <8 x double> @llvm.x86.avx512.mask.cvtudq2pd.512(<8 x i32>, <8 x double>, i8)7919 7920define <8 x double>@test_int_x86_avx512_cvt_udq2pd_512(<8 x i32> %x0, <8 x double> %x1) #0 {7921; CHECK-LABEL: @test_int_x86_avx512_cvt_udq2pd_512(7922; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 87923; CHECK-NEXT: call void @llvm.donothing()7924; CHECK-NEXT: [[TMP2:%.*]] = zext <8 x i32> [[TMP1]] to <8 x i64>7925; CHECK-NEXT: [[CVT:%.*]] = uitofp <8 x i32> [[X0:%.*]] to <8 x double>7926; CHECK-NEXT: store <8 x i64> [[TMP2]], ptr @__msan_retval_tls, align 87927; CHECK-NEXT: ret <8 x double> [[CVT]]7928;7929 %res = call <8 x double> @llvm.x86.avx512.mask.cvtudq2pd.512(<8 x i32> %x0, <8 x double> %x1, i8 -1)7930 ret <8 x double> %res7931}7932 7933define <8 x double>@test_int_x86_avx512_mask_cvt_udq2pd_512(<8 x i32> %x0, <8 x double> %x1, i8 %x2) #0 {7934;7935; CHECK-LABEL: @test_int_x86_avx512_mask_cvt_udq2pd_512(7936; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 87937; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 96), align 87938; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 87939; CHECK-NEXT: call void @llvm.donothing()7940; CHECK-NEXT: [[TMP4:%.*]] = zext <8 x i32> [[TMP1]] to <8 x i64>7941; CHECK-NEXT: [[CVT:%.*]] = uitofp <8 x i32> [[X0:%.*]] to <8 x double>7942; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>7943; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[X2:%.*]] to <8 x i1>7944; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP4]], <8 x i64> [[TMP3]]7945; CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x double> [[CVT]] to <8 x i64>7946; CHECK-NEXT: [[TMP9:%.*]] = bitcast <8 x double> [[X1:%.*]] to <8 x i64>7947; CHECK-NEXT: [[TMP10:%.*]] = xor <8 x i64> [[TMP8]], [[TMP9]]7948; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP4]]7949; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], [[TMP3]]7950; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP12]], <8 x i64> [[TMP7]]7951; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP6]], <8 x double> [[CVT]], <8 x double> [[X1]]7952; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87953; CHECK-NEXT: ret <8 x double> [[TMP13]]7954;7955 %res = call <8 x double> @llvm.x86.avx512.mask.cvtudq2pd.512(<8 x i32> %x0, <8 x double> %x1, i8 %x2)7956 ret <8 x double> %res7957}7958 7959define <16 x float> @test_x86_vcvtph2ps_512(<16 x i16> %a0) #0 {7960; CHECK-LABEL: @test_x86_vcvtph2ps_512(7961; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i16>, ptr @__msan_param_tls, align 87962; CHECK-NEXT: call void @llvm.donothing()7963; CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i16> [[TMP1]] to i2567964; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP2]], 07965; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]7966; CHECK: 3:7967; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]7968; CHECK-NEXT: unreachable7969; CHECK: 4:7970; CHECK-NEXT: [[RES:%.*]] = call <16 x float> @llvm.x86.avx512.mask.vcvtph2ps.512(<16 x i16> [[A0:%.*]], <16 x float> zeroinitializer, i16 -1, i32 4)7971; CHECK-NEXT: store <16 x i32> zeroinitializer, ptr @__msan_retval_tls, align 87972; CHECK-NEXT: ret <16 x float> [[RES]]7973;7974 %res = call <16 x float> @llvm.x86.avx512.mask.vcvtph2ps.512(<16 x i16> %a0, <16 x float> zeroinitializer, i16 -1, i32 4)7975 ret <16 x float> %res7976}7977 7978define <16 x float> @test_x86_vcvtph2ps_512_sae(<16 x i16> %a0) #0 {7979; CHECK-LABEL: @test_x86_vcvtph2ps_512_sae(7980; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i16>, ptr @__msan_param_tls, align 87981; CHECK-NEXT: call void @llvm.donothing()7982; CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i16> [[TMP1]] to i2567983; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP2]], 07984; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]7985; CHECK: 3:7986; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]7987; CHECK-NEXT: unreachable7988; CHECK: 4:7989; CHECK-NEXT: [[RES:%.*]] = call <16 x float> @llvm.x86.avx512.mask.vcvtph2ps.512(<16 x i16> [[A0:%.*]], <16 x float> zeroinitializer, i16 -1, i32 8)7990; CHECK-NEXT: store <16 x i32> zeroinitializer, ptr @__msan_retval_tls, align 87991; CHECK-NEXT: ret <16 x float> [[RES]]7992;7993 %res = call <16 x float> @llvm.x86.avx512.mask.vcvtph2ps.512(<16 x i16> %a0, <16 x float> zeroinitializer, i16 -1, i32 8)7994 ret <16 x float> %res7995}7996 7997define <16 x float> @test_x86_vcvtph2ps_512_rrk(<16 x i16> %a0,<16 x float> %a1, i16 %mask) #0 {7998;7999; CHECK-LABEL: @test_x86_vcvtph2ps_512_rrk(8000; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i16>, ptr @__msan_param_tls, align 88001; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 88002; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 96), align 88003; CHECK-NEXT: call void @llvm.donothing()8004; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i16> [[TMP1]] to i2568005; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP4]], 08006; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP2]] to i5128007; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP5]], 08008; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]8009; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i16 [[TMP3]], 08010; CHECK-NEXT: [[_MSOR3:%.*]] = or i1 [[_MSOR]], [[_MSCMP2]]8011; CHECK-NEXT: br i1 [[_MSOR3]], label [[TMP6:%.*]], label [[TMP7:%.*]], !prof [[PROF1]]8012; CHECK: 6:8013; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]8014; CHECK-NEXT: unreachable8015; CHECK: 7:8016; CHECK-NEXT: [[RES:%.*]] = call <16 x float> @llvm.x86.avx512.mask.vcvtph2ps.512(<16 x i16> [[A0:%.*]], <16 x float> [[A1:%.*]], i16 [[MASK:%.*]], i32 4)8017; CHECK-NEXT: store <16 x i32> zeroinitializer, ptr @__msan_retval_tls, align 88018; CHECK-NEXT: ret <16 x float> [[RES]]8019;8020 %res = call <16 x float> @llvm.x86.avx512.mask.vcvtph2ps.512(<16 x i16> %a0, <16 x float> %a1, i16 %mask, i32 4)8021 ret <16 x float> %res8022}8023 8024define <16 x float> @test_x86_vcvtph2ps_512_sae_rrkz(<16 x i16> %a0, i16 %mask) #0 {8025;8026; CHECK-LABEL: @test_x86_vcvtph2ps_512_sae_rrkz(8027; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i16>, ptr @__msan_param_tls, align 88028; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 88029; CHECK-NEXT: call void @llvm.donothing()8030; CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i16> [[TMP1]] to i2568031; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP3]], 08032; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i16 [[TMP2]], 08033; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]8034; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]8035; CHECK: 4:8036; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]8037; CHECK-NEXT: unreachable8038; CHECK: 5:8039; CHECK-NEXT: [[RES:%.*]] = call <16 x float> @llvm.x86.avx512.mask.vcvtph2ps.512(<16 x i16> [[A0:%.*]], <16 x float> zeroinitializer, i16 [[MASK:%.*]], i32 8)8040; CHECK-NEXT: store <16 x i32> zeroinitializer, ptr @__msan_retval_tls, align 88041; CHECK-NEXT: ret <16 x float> [[RES]]8042;8043 %res = call <16 x float> @llvm.x86.avx512.mask.vcvtph2ps.512(<16 x i16> %a0, <16 x float> zeroinitializer, i16 %mask, i32 8)8044 ret <16 x float> %res8045}8046 8047define <16 x float> @test_x86_vcvtph2ps_512_rrkz(<16 x i16> %a0, i16 %mask) #0 {8048;8049; CHECK-LABEL: @test_x86_vcvtph2ps_512_rrkz(8050; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i16>, ptr @__msan_param_tls, align 88051; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 88052; CHECK-NEXT: call void @llvm.donothing()8053; CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i16> [[TMP1]] to i2568054; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP3]], 08055; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i16 [[TMP2]], 08056; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]8057; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]8058; CHECK: 4:8059; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]8060; CHECK-NEXT: unreachable8061; CHECK: 5:8062; CHECK-NEXT: [[RES:%.*]] = call <16 x float> @llvm.x86.avx512.mask.vcvtph2ps.512(<16 x i16> [[A0:%.*]], <16 x float> zeroinitializer, i16 [[MASK:%.*]], i32 4)8063; CHECK-NEXT: store <16 x i32> zeroinitializer, ptr @__msan_retval_tls, align 88064; CHECK-NEXT: ret <16 x float> [[RES]]8065;8066 %res = call <16 x float> @llvm.x86.avx512.mask.vcvtph2ps.512(<16 x i16> %a0, <16 x float> zeroinitializer, i16 %mask, i32 4)8067 ret <16 x float> %res8068}8069 8070declare <16 x float> @llvm.x86.avx512.mask.vcvtph2ps.512(<16 x i16>, <16 x float>, i16, i32) nounwind readonly8071 8072define <8 x i64> @test_valign_q(<8 x i64> %a, <8 x i64> %b) #0 {8073; CHECK-LABEL: @test_valign_q(8074; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 88075; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 88076; CHECK-NEXT: call void @llvm.donothing()8077; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP2]], <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>8078; CHECK-NEXT: [[PALIGNR:%.*]] = shufflevector <8 x i64> [[B:%.*]], <8 x i64> [[A:%.*]], <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>8079; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 88080; CHECK-NEXT: ret <8 x i64> [[PALIGNR]]8081;8082 %res = call <8 x i64> @llvm.x86.avx512.mask.valign.q.512(<8 x i64> %a, <8 x i64> %b, i32 2, <8 x i64> zeroinitializer, i8 -1)8083 ret <8 x i64> %res8084}8085 8086define <8 x i64> @test_mask_valign_q(<8 x i64> %a, <8 x i64> %b, <8 x i64> %src, i8 %mask) #0 {8087;8088; CHECK-LABEL: @test_mask_valign_q(8089; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 88090; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 88091; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 88092; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 88093; CHECK-NEXT: call void @llvm.donothing()8094; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP2]], <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>8095; CHECK-NEXT: [[PALIGNR:%.*]] = shufflevector <8 x i64> [[B:%.*]], <8 x i64> [[A:%.*]], <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>8096; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>8097; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>8098; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]8099; CHECK-NEXT: [[TMP8:%.*]] = xor <8 x i64> [[PALIGNR]], [[SRC:%.*]]8100; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[_MSPROP]]8101; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[TMP4]]8102; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP10]], <8 x i64> [[TMP7]]8103; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[PALIGNR]], <8 x i64> [[SRC]]8104; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 88105; CHECK-NEXT: ret <8 x i64> [[TMP11]]8106;8107 %res = call <8 x i64> @llvm.x86.avx512.mask.valign.q.512(<8 x i64> %a, <8 x i64> %b, i32 2, <8 x i64> %src, i8 %mask)8108 ret <8 x i64> %res8109}8110 8111declare <8 x i64> @llvm.x86.avx512.mask.valign.q.512(<8 x i64>, <8 x i64>, i32, <8 x i64>, i8)8112 8113define <16 x i32> @test_maskz_valign_d(<16 x i32> %a, <16 x i32> %b, i16 %mask) #0 {8114;8115; CHECK-LABEL: @test_maskz_valign_d(8116; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 88117; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 88118; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 88119; CHECK-NEXT: call void @llvm.donothing()8120; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP2]], <16 x i32> <i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20>8121; CHECK-NEXT: [[PALIGNR:%.*]] = shufflevector <16 x i32> [[B:%.*]], <16 x i32> [[A:%.*]], <16 x i32> <i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20>8122; CHECK-NEXT: [[TMP4:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>8123; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>8124; CHECK-NEXT: [[TMP6:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[_MSPROP]], <16 x i32> zeroinitializer8125; CHECK-NEXT: [[TMP7:%.*]] = xor <16 x i32> [[PALIGNR]], zeroinitializer8126; CHECK-NEXT: [[TMP8:%.*]] = or <16 x i32> [[TMP7]], [[_MSPROP]]8127; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], zeroinitializer8128; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP4]], <16 x i32> [[TMP9]], <16 x i32> [[TMP6]]8129; CHECK-NEXT: [[TMP10:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[PALIGNR]], <16 x i32> zeroinitializer8130; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 88131; CHECK-NEXT: ret <16 x i32> [[TMP10]]8132;8133 %res = call <16 x i32> @llvm.x86.avx512.mask.valign.d.512(<16 x i32> %a, <16 x i32> %b, i32 5, <16 x i32> zeroinitializer, i16 %mask)8134 ret <16 x i32> %res8135}8136 8137declare <16 x i32> @llvm.x86.avx512.mask.valign.d.512(<16 x i32>, <16 x i32>, i32, <16 x i32>, i16)8138 8139declare <8 x double> @llvm.x86.avx512.mask.vpermilvar.pd.512(<8 x double>, <8 x i64>, <8 x double>, i8)8140 8141define <8 x double>@test_int_x86_avx512_vpermilvar_pd_512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2) #0 {8142; CHECK-LABEL: @test_int_x86_avx512_vpermilvar_pd_512(8143; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 88144; CHECK-NEXT: [[X1:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 88145; CHECK-NEXT: call void @llvm.donothing()8146; CHECK-NEXT: [[TMP2:%.*]] = trunc <8 x i64> [[X1]] to <8 x i3>8147; CHECK-NEXT: [[X0:%.*]] = bitcast <8 x i64> [[TMP1]] to <8 x double>8148; CHECK-NEXT: [[TMP7:%.*]] = call <8 x double> @llvm.x86.avx512.vpermilvar.pd.512(<8 x double> [[X0]], <8 x i64> [[X2:%.*]])8149; CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x double> [[TMP7]] to <8 x i64>8150; CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i3> [[TMP2]] to i248151; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i24 [[TMP6]], 08152; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF1]]8153; CHECK: 8:8154; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]8155; CHECK-NEXT: unreachable8156; CHECK: 9:8157; CHECK-NEXT: [[TMP5:%.*]] = call <8 x double> @llvm.x86.avx512.vpermilvar.pd.512(<8 x double> [[X3:%.*]], <8 x i64> [[X2]])8158; CHECK-NEXT: store <8 x i64> [[TMP4]], ptr @__msan_retval_tls, align 88159; CHECK-NEXT: ret <8 x double> [[TMP5]]8160;8161 %res = call <8 x double> @llvm.x86.avx512.mask.vpermilvar.pd.512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 -1)8162 ret <8 x double> %res8163}8164 8165define <8 x double>@test_int_x86_avx512_mask_vpermilvar_pd_512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 %x3) #0 {8166;8167; CHECK-LABEL: @test_int_x86_avx512_mask_vpermilvar_pd_512(8168; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 88169; CHECK-NEXT: [[X1:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 88170; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 88171; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 88172; CHECK-NEXT: call void @llvm.donothing()8173; CHECK-NEXT: [[TMP5:%.*]] = trunc <8 x i64> [[X1]] to <8 x i3>8174; CHECK-NEXT: [[X0:%.*]] = bitcast <8 x i64> [[TMP1]] to <8 x double>8175; CHECK-NEXT: [[TMP9:%.*]] = call <8 x double> @llvm.x86.avx512.vpermilvar.pd.512(<8 x double> [[X0]], <8 x i64> [[X4:%.*]])8176; CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x double> [[TMP9]] to <8 x i64>8177; CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x i3> [[TMP5]] to i248178; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i24 [[TMP8]], 08179; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP19:%.*]], label [[TMP20:%.*]], !prof [[PROF1]]8180; CHECK: 10:8181; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]8182; CHECK-NEXT: unreachable8183; CHECK: 11:8184; CHECK-NEXT: [[TMP7:%.*]] = call <8 x double> @llvm.x86.avx512.vpermilvar.pd.512(<8 x double> [[X5:%.*]], <8 x i64> [[X4]])8185; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>8186; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>8187; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP6]], <8 x i64> [[TMP4]]8188; CHECK-NEXT: [[TMP13:%.*]] = bitcast <8 x double> [[TMP7]] to <8 x i64>8189; CHECK-NEXT: [[TMP14:%.*]] = bitcast <8 x double> [[X2:%.*]] to <8 x i64>8190; CHECK-NEXT: [[TMP15:%.*]] = xor <8 x i64> [[TMP13]], [[TMP14]]8191; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP15]], [[TMP6]]8192; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP16]], [[TMP4]]8193; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP17]], <8 x i64> [[TMP12]]8194; CHECK-NEXT: [[TMP18:%.*]] = select <8 x i1> [[TMP11]], <8 x double> [[TMP7]], <8 x double> [[X2]]8195; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 88196; CHECK-NEXT: ret <8 x double> [[TMP18]]8197;8198 %res = call <8 x double> @llvm.x86.avx512.mask.vpermilvar.pd.512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 %x3)8199 ret <8 x double> %res8200}8201 8202define <8 x double>@test_int_x86_avx512_maskz_vpermilvar_pd_512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 %x3) #0 {8203;8204; CHECK-LABEL: @test_int_x86_avx512_maskz_vpermilvar_pd_512(8205; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 88206; CHECK-NEXT: [[X1:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 88207; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 88208; CHECK-NEXT: call void @llvm.donothing()8209; CHECK-NEXT: [[TMP4:%.*]] = trunc <8 x i64> [[X1]] to <8 x i3>8210; CHECK-NEXT: [[X0:%.*]] = bitcast <8 x i64> [[TMP1]] to <8 x double>8211; CHECK-NEXT: [[TMP8:%.*]] = call <8 x double> @llvm.x86.avx512.vpermilvar.pd.512(<8 x double> [[X0]], <8 x i64> [[X2:%.*]])8212; CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x double> [[TMP8]] to <8 x i64>8213; CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i3> [[TMP4]] to i248214; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i24 [[TMP7]], 08215; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP17:%.*]], label [[TMP18:%.*]], !prof [[PROF1]]8216; CHECK: 9:8217; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]8218; CHECK-NEXT: unreachable8219; CHECK: 10:8220; CHECK-NEXT: [[TMP6:%.*]] = call <8 x double> @llvm.x86.avx512.vpermilvar.pd.512(<8 x double> [[X4:%.*]], <8 x i64> [[X2]])8221; CHECK-NEXT: [[TMP9:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>8222; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>8223; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP5]], <8 x i64> zeroinitializer8224; CHECK-NEXT: [[TMP12:%.*]] = bitcast <8 x double> [[TMP6]] to <8 x i64>8225; CHECK-NEXT: [[TMP13:%.*]] = xor <8 x i64> [[TMP12]], zeroinitializer8226; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], [[TMP5]]8227; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], zeroinitializer8228; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP9]], <8 x i64> [[TMP15]], <8 x i64> [[TMP11]]8229; CHECK-NEXT: [[TMP16:%.*]] = select <8 x i1> [[TMP10]], <8 x double> [[TMP6]], <8 x double> zeroinitializer8230; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 88231; CHECK-NEXT: ret <8 x double> [[TMP16]]8232;8233 %res = call <8 x double> @llvm.x86.avx512.mask.vpermilvar.pd.512(<8 x double> %x0, <8 x i64> %x1, <8 x double> zeroinitializer, i8 %x3)8234 ret <8 x double> %res8235}8236 8237declare <16 x float> @llvm.x86.avx512.mask.vpermilvar.ps.512(<16 x float>, <16 x i32>, <16 x float>, i16)8238 8239define <16 x float>@test_int_x86_avx512_vpermilvar_ps_512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2) #0 {8240; CHECK-LABEL: @test_int_x86_avx512_vpermilvar_ps_512(8241; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 88242; CHECK-NEXT: [[X1:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 88243; CHECK-NEXT: call void @llvm.donothing()8244; CHECK-NEXT: [[TMP2:%.*]] = trunc <16 x i32> [[X1]] to <16 x i4>8245; CHECK-NEXT: [[X0:%.*]] = bitcast <16 x i32> [[TMP1]] to <16 x float>8246; CHECK-NEXT: [[TMP7:%.*]] = call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> [[X0]], <16 x i32> [[X2:%.*]])8247; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x float> [[TMP7]] to <16 x i32>8248; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i4> [[TMP2]] to i648249; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP6]], 08250; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF1]]8251; CHECK: 8:8252; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]8253; CHECK-NEXT: unreachable8254; CHECK: 9:8255; CHECK-NEXT: [[TMP5:%.*]] = call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> [[X3:%.*]], <16 x i32> [[X2]])8256; CHECK-NEXT: store <16 x i32> [[TMP4]], ptr @__msan_retval_tls, align 88257; CHECK-NEXT: ret <16 x float> [[TMP5]]8258;8259 %res = call <16 x float> @llvm.x86.avx512.mask.vpermilvar.ps.512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 -1)8260 ret <16 x float> %res8261}8262 8263define <16 x float>@test_int_x86_avx512_mask_vpermilvar_ps_512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 %x3) #0 {8264;8265; CHECK-LABEL: @test_int_x86_avx512_mask_vpermilvar_ps_512(8266; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 88267; CHECK-NEXT: [[X1:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 88268; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 88269; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 88270; CHECK-NEXT: call void @llvm.donothing()8271; CHECK-NEXT: [[TMP5:%.*]] = trunc <16 x i32> [[X1]] to <16 x i4>8272; CHECK-NEXT: [[X0:%.*]] = bitcast <16 x i32> [[TMP1]] to <16 x float>8273; CHECK-NEXT: [[TMP9:%.*]] = call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> [[X0]], <16 x i32> [[X4:%.*]])8274; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x float> [[TMP9]] to <16 x i32>8275; CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i4> [[TMP5]] to i648276; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP8]], 08277; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP19:%.*]], label [[TMP20:%.*]], !prof [[PROF1]]8278; CHECK: 10:8279; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]8280; CHECK-NEXT: unreachable8281; CHECK: 11:8282; CHECK-NEXT: [[TMP7:%.*]] = call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> [[X5:%.*]], <16 x i32> [[X4]])8283; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>8284; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>8285; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP6]], <16 x i32> [[TMP4]]8286; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x float> [[TMP7]] to <16 x i32>8287; CHECK-NEXT: [[TMP14:%.*]] = bitcast <16 x float> [[X2:%.*]] to <16 x i32>8288; CHECK-NEXT: [[TMP15:%.*]] = xor <16 x i32> [[TMP13]], [[TMP14]]8289; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i32> [[TMP15]], [[TMP6]]8290; CHECK-NEXT: [[TMP17:%.*]] = or <16 x i32> [[TMP16]], [[TMP4]]8291; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP17]], <16 x i32> [[TMP12]]8292; CHECK-NEXT: [[TMP18:%.*]] = select <16 x i1> [[TMP11]], <16 x float> [[TMP7]], <16 x float> [[X2]]8293; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 88294; CHECK-NEXT: ret <16 x float> [[TMP18]]8295;8296 %res = call <16 x float> @llvm.x86.avx512.mask.vpermilvar.ps.512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 %x3)8297 ret <16 x float> %res8298}8299 8300 8301define <16 x float>@test_int_x86_avx512_maskz_vpermilvar_ps_512(<16 x float> %x0, <16 x i32> %x1, i16 %x3) #0 {8302;8303; CHECK-LABEL: @test_int_x86_avx512_maskz_vpermilvar_ps_512(8304; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 88305; CHECK-NEXT: [[X1:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 88306; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 88307; CHECK-NEXT: call void @llvm.donothing()8308; CHECK-NEXT: [[TMP4:%.*]] = trunc <16 x i32> [[X1]] to <16 x i4>8309; CHECK-NEXT: [[X0:%.*]] = bitcast <16 x i32> [[TMP1]] to <16 x float>8310; CHECK-NEXT: [[TMP8:%.*]] = call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> [[X0]], <16 x i32> [[X2:%.*]])8311; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x float> [[TMP8]] to <16 x i32>8312; CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i4> [[TMP4]] to i648313; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP7]], 08314; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP17:%.*]], label [[TMP18:%.*]], !prof [[PROF1]]8315; CHECK: 9:8316; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]8317; CHECK-NEXT: unreachable8318; CHECK: 10:8319; CHECK-NEXT: [[TMP6:%.*]] = call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> [[X4:%.*]], <16 x i32> [[X2]])8320; CHECK-NEXT: [[TMP9:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>8321; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>8322; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP5]], <16 x i32> zeroinitializer8323; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x float> [[TMP6]] to <16 x i32>8324; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i32> [[TMP12]], zeroinitializer8325; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], [[TMP5]]8326; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], zeroinitializer8327; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP9]], <16 x i32> [[TMP15]], <16 x i32> [[TMP11]]8328; CHECK-NEXT: [[TMP16:%.*]] = select <16 x i1> [[TMP10]], <16 x float> [[TMP6]], <16 x float> zeroinitializer8329; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 88330; CHECK-NEXT: ret <16 x float> [[TMP16]]8331;8332 %res = call <16 x float> @llvm.x86.avx512.mask.vpermilvar.ps.512(<16 x float> %x0, <16 x i32> %x1, <16 x float> zeroinitializer, i16 %x3)8333 ret <16 x float> %res8334}8335 8336; Test case to make sure we can print shuffle decode comments for constant pool loads.8337define <16 x float>@test_int_x86_avx512_mask_vpermilvar_ps_512_constant_pool(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 %x3) #0 {8338;8339; CHECK-LABEL: @test_int_x86_avx512_mask_vpermilvar_ps_512_constant_pool(8340; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 88341; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 88342; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 88343; CHECK-NEXT: call void @llvm.donothing()8344; CHECK-NEXT: [[X0:%.*]] = bitcast <16 x i32> [[TMP1]] to <16 x float>8345; CHECK-NEXT: [[TMP7:%.*]] = call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> [[X0]], <16 x i32> <i32 2, i32 3, i32 0, i32 1, i32 3, i32 2, i32 1, i32 0, i32 1, i32 0, i32 3, i32 2, i32 0, i32 1, i32 2, i32 3>)8346; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x float> [[TMP7]] to <16 x i32>8347; CHECK-NEXT: [[TMP33:%.*]] = call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> [[X1:%.*]], <16 x i32> <i32 2, i32 3, i32 0, i32 1, i32 3, i32 2, i32 1, i32 0, i32 1, i32 0, i32 3, i32 2, i32 0, i32 1, i32 2, i32 3>)8348; CHECK-NEXT: [[TMP8:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>8349; CHECK-NEXT: [[TMP9:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>8350; CHECK-NEXT: [[TMP10:%.*]] = select <16 x i1> [[TMP9]], <16 x i32> [[TMP6]], <16 x i32> [[TMP3]]8351; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x float> [[TMP33]] to <16 x i32>8352; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x float> [[X2:%.*]] to <16 x i32>8353; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i32> [[TMP11]], [[TMP12]]8354; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], [[TMP6]]8355; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], [[TMP3]]8356; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP8]], <16 x i32> [[TMP15]], <16 x i32> [[TMP10]]8357; CHECK-NEXT: [[TMP16:%.*]] = select <16 x i1> [[TMP9]], <16 x float> [[TMP33]], <16 x float> [[X2]]8358; CHECK-NEXT: [[TMP17:%.*]] = bitcast <16 x i32> [[TMP1]] to <16 x float>8359; CHECK-NEXT: [[TMP18:%.*]] = call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> [[TMP17]], <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 0, i32 1, i32 2, i32 3, i32 1, i32 0, i32 3, i32 2, i32 0, i32 1, i32 2, i32 3>)8360; CHECK-NEXT: [[TMP19:%.*]] = bitcast <16 x float> [[TMP18]] to <16 x i32>8361; CHECK-NEXT: [[TMP20:%.*]] = call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> [[X1]], <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 0, i32 1, i32 2, i32 3, i32 1, i32 0, i32 3, i32 2, i32 0, i32 1, i32 2, i32 3>)8362; CHECK-NEXT: [[TMP21:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>8363; CHECK-NEXT: [[TMP22:%.*]] = bitcast i16 [[X3]] to <16 x i1>8364; CHECK-NEXT: [[TMP23:%.*]] = select <16 x i1> [[TMP22]], <16 x i32> [[TMP19]], <16 x i32> zeroinitializer8365; CHECK-NEXT: [[TMP24:%.*]] = bitcast <16 x float> [[TMP20]] to <16 x i32>8366; CHECK-NEXT: [[TMP25:%.*]] = xor <16 x i32> [[TMP24]], zeroinitializer8367; CHECK-NEXT: [[TMP26:%.*]] = or <16 x i32> [[TMP25]], [[TMP19]]8368; CHECK-NEXT: [[TMP27:%.*]] = or <16 x i32> [[TMP26]], zeroinitializer8369; CHECK-NEXT: [[_MSPROP_SELECT1:%.*]] = select <16 x i1> [[TMP21]], <16 x i32> [[TMP27]], <16 x i32> [[TMP23]]8370; CHECK-NEXT: [[TMP28:%.*]] = select <16 x i1> [[TMP22]], <16 x float> [[TMP20]], <16 x float> zeroinitializer8371; CHECK-NEXT: [[TMP29:%.*]] = bitcast <16 x i32> [[TMP1]] to <16 x float>8372; CHECK-NEXT: [[TMP30:%.*]] = call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> [[TMP29]], <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 0, i32 1, i32 2, i32 3, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 1, i32 0>)8373; CHECK-NEXT: [[TMP31:%.*]] = bitcast <16 x float> [[TMP30]] to <16 x i32>8374; CHECK-NEXT: [[TMP32:%.*]] = call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> [[X1]], <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 0, i32 1, i32 2, i32 3, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 1, i32 0>)8375; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[_MSPROP_SELECT]], [[_MSPROP_SELECT1]]8376; CHECK-NEXT: [[RES3:%.*]] = fadd <16 x float> [[TMP16]], [[TMP28]]8377; CHECK-NEXT: [[_MSPROP2:%.*]] = or <16 x i32> [[TMP31]], [[_MSPROP]]8378; CHECK-NEXT: [[RES4:%.*]] = fadd <16 x float> [[TMP32]], [[RES3]]8379; CHECK-NEXT: store <16 x i32> [[_MSPROP2]], ptr @__msan_retval_tls, align 88380; CHECK-NEXT: ret <16 x float> [[RES4]]8381;8382 %res = call <16 x float> @llvm.x86.avx512.mask.vpermilvar.ps.512(<16 x float> %x0, <16 x i32> <i32 2, i32 3, i32 0, i32 1, i32 3, i32 2, i32 1, i32 0, i32 1, i32 0, i32 3, i32 2, i32 0, i32 1, i32 2, i32 3>, <16 x float> %x2, i16 %x3)8383 %res1 = call <16 x float> @llvm.x86.avx512.mask.vpermilvar.ps.512(<16 x float> %x0, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 0, i32 1, i32 2, i32 3, i32 1, i32 0, i32 3, i32 2, i32 0, i32 1, i32 2, i32 3>, <16 x float> zeroinitializer, i16 %x3)8384 %res2 = call <16 x float> @llvm.x86.avx512.mask.vpermilvar.ps.512(<16 x float> %x0, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 0, i32 1, i32 2, i32 3, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 1, i32 0>, <16 x float> %x2, i16 -1)8385 %res3 = fadd <16 x float> %res, %res18386 %res4 = fadd <16 x float> %res2, %res38387 ret <16 x float> %res48388}8389 8390define <8 x i64> @test_mask_mul_epi32_rr(<16 x i32> %a, <16 x i32> %b) #0 {8391; CHECK-LABEL: @test_mask_mul_epi32_rr(8392; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 88393; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 88394; CHECK-NEXT: call void @llvm.donothing()8395; CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i32> [[TMP1]] to <8 x i64>8396; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>8397; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>8398; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i32> [[B:%.*]] to <8 x i64>8399; CHECK-NEXT: [[TMP7:%.*]] = shl <8 x i64> [[TMP3]], splat (i64 32)8400; CHECK-NEXT: [[TMP8:%.*]] = or <8 x i64> [[TMP7]], zeroinitializer8401; CHECK-NEXT: [[TMP9:%.*]] = shl <8 x i64> [[TMP4]], splat (i64 32)8402; CHECK-NEXT: [[TMP10:%.*]] = ashr <8 x i64> [[TMP8]], splat (i64 32)8403; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], zeroinitializer8404; CHECK-NEXT: [[TMP12:%.*]] = ashr <8 x i64> [[TMP9]], splat (i64 32)8405; CHECK-NEXT: [[TMP13:%.*]] = shl <8 x i64> [[TMP5]], splat (i64 32)8406; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], zeroinitializer8407; CHECK-NEXT: [[TMP15:%.*]] = shl <8 x i64> [[TMP6]], splat (i64 32)8408; CHECK-NEXT: [[TMP16:%.*]] = ashr <8 x i64> [[TMP14]], splat (i64 32)8409; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP16]], zeroinitializer8410; CHECK-NEXT: [[TMP18:%.*]] = ashr <8 x i64> [[TMP15]], splat (i64 32)8411; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP11]], [[TMP17]]8412; CHECK-NEXT: [[TMP19:%.*]] = mul <8 x i64> [[TMP12]], [[TMP18]]8413; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 88414; CHECK-NEXT: ret <8 x i64> [[TMP19]]8415;8416 %res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 -1)8417 ret < 8 x i64> %res8418}8419 8420define <8 x i64> @test_mask_mul_epi32_rrk(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask) #0 {8421;8422; CHECK-LABEL: @test_mask_mul_epi32_rrk(8423; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 88424; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 88425; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 88426; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 88427; CHECK-NEXT: call void @llvm.donothing()8428; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP1]] to <8 x i64>8429; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>8430; CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>8431; CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i32> [[B:%.*]] to <8 x i64>8432; CHECK-NEXT: [[TMP9:%.*]] = shl <8 x i64> [[TMP5]], splat (i64 32)8433; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], zeroinitializer8434; CHECK-NEXT: [[TMP11:%.*]] = shl <8 x i64> [[TMP6]], splat (i64 32)8435; CHECK-NEXT: [[TMP12:%.*]] = ashr <8 x i64> [[TMP10]], splat (i64 32)8436; CHECK-NEXT: [[TMP13:%.*]] = or <8 x i64> [[TMP12]], zeroinitializer8437; CHECK-NEXT: [[TMP14:%.*]] = ashr <8 x i64> [[TMP11]], splat (i64 32)8438; CHECK-NEXT: [[TMP15:%.*]] = shl <8 x i64> [[TMP7]], splat (i64 32)8439; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP15]], zeroinitializer8440; CHECK-NEXT: [[TMP17:%.*]] = shl <8 x i64> [[TMP8]], splat (i64 32)8441; CHECK-NEXT: [[TMP18:%.*]] = ashr <8 x i64> [[TMP16]], splat (i64 32)8442; CHECK-NEXT: [[TMP19:%.*]] = or <8 x i64> [[TMP18]], zeroinitializer8443; CHECK-NEXT: [[TMP20:%.*]] = ashr <8 x i64> [[TMP17]], splat (i64 32)8444; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP13]], [[TMP19]]8445; CHECK-NEXT: [[TMP21:%.*]] = mul <8 x i64> [[TMP14]], [[TMP20]]8446; CHECK-NEXT: [[TMP22:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>8447; CHECK-NEXT: [[TMP23:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>8448; CHECK-NEXT: [[TMP24:%.*]] = select <8 x i1> [[TMP23]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]8449; CHECK-NEXT: [[TMP25:%.*]] = xor <8 x i64> [[TMP21]], [[PASSTHRU:%.*]]8450; CHECK-NEXT: [[TMP26:%.*]] = or <8 x i64> [[TMP25]], [[_MSPROP]]8451; CHECK-NEXT: [[TMP27:%.*]] = or <8 x i64> [[TMP26]], [[TMP4]]8452; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP22]], <8 x i64> [[TMP27]], <8 x i64> [[TMP24]]8453; CHECK-NEXT: [[TMP28:%.*]] = select <8 x i1> [[TMP23]], <8 x i64> [[TMP21]], <8 x i64> [[PASSTHRU]]8454; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 88455; CHECK-NEXT: ret <8 x i64> [[TMP28]]8456;8457 %res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask)8458 ret < 8 x i64> %res8459}8460 8461define <8 x i64> @test_mask_mul_epi32_rrkz(<16 x i32> %a, <16 x i32> %b, i8 %mask) #0 {8462;8463; CHECK-LABEL: @test_mask_mul_epi32_rrkz(8464; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 88465; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 88466; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 88467; CHECK-NEXT: call void @llvm.donothing()8468; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[TMP1]] to <8 x i64>8469; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>8470; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>8471; CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i32> [[B:%.*]] to <8 x i64>8472; CHECK-NEXT: [[TMP8:%.*]] = shl <8 x i64> [[TMP4]], splat (i64 32)8473; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], zeroinitializer8474; CHECK-NEXT: [[TMP10:%.*]] = shl <8 x i64> [[TMP5]], splat (i64 32)8475; CHECK-NEXT: [[TMP11:%.*]] = ashr <8 x i64> [[TMP9]], splat (i64 32)8476; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], zeroinitializer8477; CHECK-NEXT: [[TMP13:%.*]] = ashr <8 x i64> [[TMP10]], splat (i64 32)8478; CHECK-NEXT: [[TMP14:%.*]] = shl <8 x i64> [[TMP6]], splat (i64 32)8479; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], zeroinitializer8480; CHECK-NEXT: [[TMP16:%.*]] = shl <8 x i64> [[TMP7]], splat (i64 32)8481; CHECK-NEXT: [[TMP17:%.*]] = ashr <8 x i64> [[TMP15]], splat (i64 32)8482; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i64> [[TMP17]], zeroinitializer8483; CHECK-NEXT: [[TMP19:%.*]] = ashr <8 x i64> [[TMP16]], splat (i64 32)8484; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP12]], [[TMP18]]8485; CHECK-NEXT: [[TMP20:%.*]] = mul <8 x i64> [[TMP13]], [[TMP19]]8486; CHECK-NEXT: [[TMP21:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>8487; CHECK-NEXT: [[TMP22:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>8488; CHECK-NEXT: [[TMP23:%.*]] = select <8 x i1> [[TMP22]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer8489; CHECK-NEXT: [[TMP24:%.*]] = xor <8 x i64> [[TMP20]], zeroinitializer8490; CHECK-NEXT: [[TMP25:%.*]] = or <8 x i64> [[TMP24]], [[_MSPROP]]8491; CHECK-NEXT: [[TMP26:%.*]] = or <8 x i64> [[TMP25]], zeroinitializer8492; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP21]], <8 x i64> [[TMP26]], <8 x i64> [[TMP23]]8493; CHECK-NEXT: [[TMP27:%.*]] = select <8 x i1> [[TMP22]], <8 x i64> [[TMP20]], <8 x i64> zeroinitializer8494; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 88495; CHECK-NEXT: ret <8 x i64> [[TMP27]]8496;8497 %res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 %mask)8498 ret < 8 x i64> %res8499}8500 8501define <8 x i64> @test_mask_mul_epi32_rm(<16 x i32> %a, ptr %ptr_b) #0 {8502;8503; CHECK-LABEL: @test_mask_mul_epi32_rm(8504; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 88505; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 88506; CHECK-NEXT: call void @llvm.donothing()8507; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 08508; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]8509; CHECK: 3:8510; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]8511; CHECK-NEXT: unreachable8512; CHECK: 4:8513; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 648514; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i648515; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220808516; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr8517; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP7]], align 648518; CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>8519; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>8520; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i32> [[_MSLD]] to <8 x i64>8521; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>8522; CHECK-NEXT: [[TMP12:%.*]] = shl <8 x i64> [[TMP8]], splat (i64 32)8523; CHECK-NEXT: [[TMP13:%.*]] = or <8 x i64> [[TMP12]], zeroinitializer8524; CHECK-NEXT: [[TMP14:%.*]] = shl <8 x i64> [[TMP9]], splat (i64 32)8525; CHECK-NEXT: [[TMP15:%.*]] = ashr <8 x i64> [[TMP13]], splat (i64 32)8526; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP15]], zeroinitializer8527; CHECK-NEXT: [[TMP17:%.*]] = ashr <8 x i64> [[TMP14]], splat (i64 32)8528; CHECK-NEXT: [[TMP18:%.*]] = shl <8 x i64> [[TMP10]], splat (i64 32)8529; CHECK-NEXT: [[TMP19:%.*]] = or <8 x i64> [[TMP18]], zeroinitializer8530; CHECK-NEXT: [[TMP20:%.*]] = shl <8 x i64> [[TMP11]], splat (i64 32)8531; CHECK-NEXT: [[TMP21:%.*]] = ashr <8 x i64> [[TMP19]], splat (i64 32)8532; CHECK-NEXT: [[TMP22:%.*]] = or <8 x i64> [[TMP21]], zeroinitializer8533; CHECK-NEXT: [[TMP23:%.*]] = ashr <8 x i64> [[TMP20]], splat (i64 32)8534; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP16]], [[TMP22]]8535; CHECK-NEXT: [[TMP24:%.*]] = mul <8 x i64> [[TMP17]], [[TMP23]]8536; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 88537; CHECK-NEXT: ret <8 x i64> [[TMP24]]8538;8539 %b = load <16 x i32>, ptr %ptr_b8540 %res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 -1)8541 ret < 8 x i64> %res8542}8543 8544define <8 x i64> @test_mask_mul_epi32_rmk(<16 x i32> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask) #0 {8545;8546; CHECK-LABEL: @test_mask_mul_epi32_rmk(8547; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 88548; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 88549; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 88550; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 88551; CHECK-NEXT: call void @llvm.donothing()8552; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 08553; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]8554; CHECK: 5:8555; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]8556; CHECK-NEXT: unreachable8557; CHECK: 6:8558; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 648559; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i648560; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220808561; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr8562; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP9]], align 648563; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>8564; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>8565; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i32> [[_MSLD]] to <8 x i64>8566; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>8567; CHECK-NEXT: [[TMP14:%.*]] = shl <8 x i64> [[TMP10]], splat (i64 32)8568; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], zeroinitializer8569; CHECK-NEXT: [[TMP16:%.*]] = shl <8 x i64> [[TMP11]], splat (i64 32)8570; CHECK-NEXT: [[TMP17:%.*]] = ashr <8 x i64> [[TMP15]], splat (i64 32)8571; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i64> [[TMP17]], zeroinitializer8572; CHECK-NEXT: [[TMP19:%.*]] = ashr <8 x i64> [[TMP16]], splat (i64 32)8573; CHECK-NEXT: [[TMP20:%.*]] = shl <8 x i64> [[TMP12]], splat (i64 32)8574; CHECK-NEXT: [[TMP21:%.*]] = or <8 x i64> [[TMP20]], zeroinitializer8575; CHECK-NEXT: [[TMP22:%.*]] = shl <8 x i64> [[TMP13]], splat (i64 32)8576; CHECK-NEXT: [[TMP23:%.*]] = ashr <8 x i64> [[TMP21]], splat (i64 32)8577; CHECK-NEXT: [[TMP24:%.*]] = or <8 x i64> [[TMP23]], zeroinitializer8578; CHECK-NEXT: [[TMP25:%.*]] = ashr <8 x i64> [[TMP22]], splat (i64 32)8579; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP18]], [[TMP24]]8580; CHECK-NEXT: [[TMP26:%.*]] = mul <8 x i64> [[TMP19]], [[TMP25]]8581; CHECK-NEXT: [[TMP27:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>8582; CHECK-NEXT: [[TMP28:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>8583; CHECK-NEXT: [[TMP29:%.*]] = select <8 x i1> [[TMP28]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]8584; CHECK-NEXT: [[TMP30:%.*]] = xor <8 x i64> [[TMP26]], [[PASSTHRU:%.*]]8585; CHECK-NEXT: [[TMP31:%.*]] = or <8 x i64> [[TMP30]], [[_MSPROP]]8586; CHECK-NEXT: [[TMP32:%.*]] = or <8 x i64> [[TMP31]], [[TMP4]]8587; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP27]], <8 x i64> [[TMP32]], <8 x i64> [[TMP29]]8588; CHECK-NEXT: [[TMP33:%.*]] = select <8 x i1> [[TMP28]], <8 x i64> [[TMP26]], <8 x i64> [[PASSTHRU]]8589; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 88590; CHECK-NEXT: ret <8 x i64> [[TMP33]]8591;8592 %b = load <16 x i32>, ptr %ptr_b8593 %res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask)8594 ret < 8 x i64> %res8595}8596 8597define <8 x i64> @test_mask_mul_epi32_rmkz(<16 x i32> %a, ptr %ptr_b, i8 %mask) #0 {8598;8599; CHECK-LABEL: @test_mask_mul_epi32_rmkz(8600; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 88601; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 88602; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 88603; CHECK-NEXT: call void @llvm.donothing()8604; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 08605; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]8606; CHECK: 4:8607; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]8608; CHECK-NEXT: unreachable8609; CHECK: 5:8610; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 648611; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i648612; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220808613; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr8614; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP8]], align 648615; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>8616; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>8617; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[_MSLD]] to <8 x i64>8618; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>8619; CHECK-NEXT: [[TMP13:%.*]] = shl <8 x i64> [[TMP9]], splat (i64 32)8620; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], zeroinitializer8621; CHECK-NEXT: [[TMP15:%.*]] = shl <8 x i64> [[TMP10]], splat (i64 32)8622; CHECK-NEXT: [[TMP16:%.*]] = ashr <8 x i64> [[TMP14]], splat (i64 32)8623; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP16]], zeroinitializer8624; CHECK-NEXT: [[TMP18:%.*]] = ashr <8 x i64> [[TMP15]], splat (i64 32)8625; CHECK-NEXT: [[TMP19:%.*]] = shl <8 x i64> [[TMP11]], splat (i64 32)8626; CHECK-NEXT: [[TMP20:%.*]] = or <8 x i64> [[TMP19]], zeroinitializer8627; CHECK-NEXT: [[TMP21:%.*]] = shl <8 x i64> [[TMP12]], splat (i64 32)8628; CHECK-NEXT: [[TMP22:%.*]] = ashr <8 x i64> [[TMP20]], splat (i64 32)8629; CHECK-NEXT: [[TMP23:%.*]] = or <8 x i64> [[TMP22]], zeroinitializer8630; CHECK-NEXT: [[TMP24:%.*]] = ashr <8 x i64> [[TMP21]], splat (i64 32)8631; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP17]], [[TMP23]]8632; CHECK-NEXT: [[TMP25:%.*]] = mul <8 x i64> [[TMP18]], [[TMP24]]8633; CHECK-NEXT: [[TMP26:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>8634; CHECK-NEXT: [[TMP27:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>8635; CHECK-NEXT: [[TMP28:%.*]] = select <8 x i1> [[TMP27]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer8636; CHECK-NEXT: [[TMP29:%.*]] = xor <8 x i64> [[TMP25]], zeroinitializer8637; CHECK-NEXT: [[TMP30:%.*]] = or <8 x i64> [[TMP29]], [[_MSPROP]]8638; CHECK-NEXT: [[TMP31:%.*]] = or <8 x i64> [[TMP30]], zeroinitializer8639; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP26]], <8 x i64> [[TMP31]], <8 x i64> [[TMP28]]8640; CHECK-NEXT: [[TMP32:%.*]] = select <8 x i1> [[TMP27]], <8 x i64> [[TMP25]], <8 x i64> zeroinitializer8641; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 88642; CHECK-NEXT: ret <8 x i64> [[TMP32]]8643;8644 %b = load <16 x i32>, ptr %ptr_b8645 %res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 %mask)8646 ret < 8 x i64> %res8647}8648 8649define <8 x i64> @test_mask_mul_epi32_rmb(<16 x i32> %a, ptr %ptr_b, <8 x i64> %extra_param, <8 x i64> %extra_param2) #0 {8650;8651; CHECK-LABEL: @test_mask_mul_epi32_rmb(8652; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 88653; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 88654; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 88655; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 88656; CHECK-NEXT: call void @llvm.donothing()8657; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 08658; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP26:%.*]], label [[TMP27:%.*]], !prof [[PROF1]]8659; CHECK: 5:8660; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]8661; CHECK-NEXT: unreachable8662; CHECK: 6:8663; CHECK-NEXT: [[Q:%.*]] = load i64, ptr [[PTR_B:%.*]], align 88664; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i648665; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220808666; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr8667; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP7]], align 88668; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i64> [[TMP3]], i64 [[_MSLD]], i32 08669; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i64> [[EXTRA_PARAM:%.*]], i64 [[Q]], i32 08670; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]], <8 x i32> zeroinitializer8671; CHECK-NEXT: [[B64:%.*]] = shufflevector <8 x i64> [[VECINIT_I]], <8 x i64> [[EXTRA_PARAM2:%.*]], <8 x i32> zeroinitializer8672; CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x i64> [[_MSPROP1]] to <16 x i32>8673; CHECK-NEXT: [[B:%.*]] = bitcast <8 x i64> [[B64]] to <16 x i32>8674; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>8675; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>8676; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[TMP8]] to <8 x i64>8677; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>8678; CHECK-NEXT: [[TMP13:%.*]] = shl <8 x i64> [[TMP9]], splat (i64 32)8679; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], zeroinitializer8680; CHECK-NEXT: [[TMP15:%.*]] = shl <8 x i64> [[TMP10]], splat (i64 32)8681; CHECK-NEXT: [[TMP16:%.*]] = ashr <8 x i64> [[TMP14]], splat (i64 32)8682; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP16]], zeroinitializer8683; CHECK-NEXT: [[TMP18:%.*]] = ashr <8 x i64> [[TMP15]], splat (i64 32)8684; CHECK-NEXT: [[TMP19:%.*]] = shl <8 x i64> [[TMP11]], splat (i64 32)8685; CHECK-NEXT: [[TMP20:%.*]] = or <8 x i64> [[TMP19]], zeroinitializer8686; CHECK-NEXT: [[TMP21:%.*]] = shl <8 x i64> [[TMP12]], splat (i64 32)8687; CHECK-NEXT: [[TMP22:%.*]] = ashr <8 x i64> [[TMP20]], splat (i64 32)8688; CHECK-NEXT: [[TMP23:%.*]] = or <8 x i64> [[TMP22]], zeroinitializer8689; CHECK-NEXT: [[TMP24:%.*]] = ashr <8 x i64> [[TMP21]], splat (i64 32)8690; CHECK-NEXT: [[_MSPROP2:%.*]] = or <8 x i64> [[TMP17]], [[TMP23]]8691; CHECK-NEXT: [[TMP25:%.*]] = mul <8 x i64> [[TMP18]], [[TMP24]]8692; CHECK-NEXT: store <8 x i64> [[_MSPROP2]], ptr @__msan_retval_tls, align 88693; CHECK-NEXT: ret <8 x i64> [[TMP25]]8694;8695 %q = load i64, ptr %ptr_b8696 %vecinit.i = insertelement <8 x i64> %extra_param, i64 %q, i32 08697 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> %extra_param2, <8 x i32> zeroinitializer8698 %b = bitcast <8 x i64> %b64 to <16 x i32>8699 %res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 -1)8700 ret < 8 x i64> %res8701}8702 8703define <8 x i64> @test_mask_mul_epi32_rmbk(<16 x i32> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask, <8 x i64> %extra_param, <8 x i64> %extra_param2) #0 {8704;8705; CHECK-LABEL: @test_mask_mul_epi32_rmbk(8706; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 88707; CHECK-NEXT: [[TMP5:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 88708; CHECK-NEXT: [[TMP6:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 208), align 88709; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 88710; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 88711; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 88712; CHECK-NEXT: call void @llvm.donothing()8713; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 08714; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP35:%.*]], label [[TMP36:%.*]], !prof [[PROF1]]8715; CHECK: 7:8716; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]8717; CHECK-NEXT: unreachable8718; CHECK: 8:8719; CHECK-NEXT: [[Q:%.*]] = load i64, ptr [[PTR_B:%.*]], align 88720; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i648721; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220808722; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr8723; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP9]], align 88724; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i64> [[TMP5]], i64 [[_MSLD]], i32 08725; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i64> [[EXTRA_PARAM:%.*]], i64 [[Q]], i32 08726; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[_MSPROP]], <8 x i64> [[TMP6]], <8 x i32> zeroinitializer8727; CHECK-NEXT: [[B64:%.*]] = shufflevector <8 x i64> [[VECINIT_I]], <8 x i64> [[EXTRA_PARAM2:%.*]], <8 x i32> zeroinitializer8728; CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x i64> [[_MSPROP1]] to <16 x i32>8729; CHECK-NEXT: [[B:%.*]] = bitcast <8 x i64> [[B64]] to <16 x i32>8730; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>8731; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>8732; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x i32> [[TMP10]] to <8 x i64>8733; CHECK-NEXT: [[TMP14:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>8734; CHECK-NEXT: [[TMP15:%.*]] = shl <8 x i64> [[TMP11]], splat (i64 32)8735; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP15]], zeroinitializer8736; CHECK-NEXT: [[TMP17:%.*]] = shl <8 x i64> [[TMP12]], splat (i64 32)8737; CHECK-NEXT: [[TMP18:%.*]] = ashr <8 x i64> [[TMP16]], splat (i64 32)8738; CHECK-NEXT: [[TMP19:%.*]] = or <8 x i64> [[TMP18]], zeroinitializer8739; CHECK-NEXT: [[TMP20:%.*]] = ashr <8 x i64> [[TMP17]], splat (i64 32)8740; CHECK-NEXT: [[TMP21:%.*]] = shl <8 x i64> [[TMP13]], splat (i64 32)8741; CHECK-NEXT: [[TMP22:%.*]] = or <8 x i64> [[TMP21]], zeroinitializer8742; CHECK-NEXT: [[TMP23:%.*]] = shl <8 x i64> [[TMP14]], splat (i64 32)8743; CHECK-NEXT: [[TMP24:%.*]] = ashr <8 x i64> [[TMP22]], splat (i64 32)8744; CHECK-NEXT: [[TMP25:%.*]] = or <8 x i64> [[TMP24]], zeroinitializer8745; CHECK-NEXT: [[TMP26:%.*]] = ashr <8 x i64> [[TMP23]], splat (i64 32)8746; CHECK-NEXT: [[_MSPROP2:%.*]] = or <8 x i64> [[TMP19]], [[TMP25]]8747; CHECK-NEXT: [[TMP27:%.*]] = mul <8 x i64> [[TMP20]], [[TMP26]]8748; CHECK-NEXT: [[TMP28:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>8749; CHECK-NEXT: [[TMP29:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>8750; CHECK-NEXT: [[TMP30:%.*]] = select <8 x i1> [[TMP29]], <8 x i64> [[_MSPROP2]], <8 x i64> [[TMP4]]8751; CHECK-NEXT: [[TMP31:%.*]] = xor <8 x i64> [[TMP27]], [[PASSTHRU:%.*]]8752; CHECK-NEXT: [[TMP32:%.*]] = or <8 x i64> [[TMP31]], [[_MSPROP2]]8753; CHECK-NEXT: [[TMP33:%.*]] = or <8 x i64> [[TMP32]], [[TMP4]]8754; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP28]], <8 x i64> [[TMP33]], <8 x i64> [[TMP30]]8755; CHECK-NEXT: [[TMP34:%.*]] = select <8 x i1> [[TMP29]], <8 x i64> [[TMP27]], <8 x i64> [[PASSTHRU]]8756; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 88757; CHECK-NEXT: ret <8 x i64> [[TMP34]]8758;8759 %q = load i64, ptr %ptr_b8760 %vecinit.i = insertelement <8 x i64> %extra_param, i64 %q, i32 08761 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> %extra_param2, <8 x i32> zeroinitializer8762 %b = bitcast <8 x i64> %b64 to <16 x i32>8763 %res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask)8764 ret < 8 x i64> %res8765}8766 8767define <8 x i64> @test_mask_mul_epi32_rmbk_buildvector(<16 x i32> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask, <8 x i64> %extra_param) #0 {8768;8769; CHECK-LABEL: @test_mask_mul_epi32_rmbk_buildvector(8770; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 88771; CHECK-NEXT: [[TMP5:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 88772; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 88773; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 88774; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 88775; CHECK-NEXT: call void @llvm.donothing()8776; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 08777; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP6:%.*]], label [[TMP35:%.*]], !prof [[PROF1]]8778; CHECK: 6:8779; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]8780; CHECK-NEXT: unreachable8781; CHECK: 7:8782; CHECK-NEXT: [[Q:%.*]] = load i64, ptr [[PTR_B:%.*]], align 88783; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i648784; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220808785; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr8786; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP9]], align 88787; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i64> [[TMP5]], i64 [[_MSLD]], i32 08788; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i64> [[EXTRA_PARAM:%.*]], i64 [[Q]], i32 08789; CHECK-NEXT: [[_MSPROP1:%.*]] = insertelement <8 x i64> [[_MSPROP]], i64 [[_MSLD]], i32 18790; CHECK-NEXT: [[VECINIT_I1:%.*]] = insertelement <8 x i64> [[VECINIT_I]], i64 [[Q]], i32 18791; CHECK-NEXT: [[_MSPROP2:%.*]] = insertelement <8 x i64> [[_MSPROP1]], i64 [[_MSLD]], i32 28792; CHECK-NEXT: [[VECINIT_I2:%.*]] = insertelement <8 x i64> [[VECINIT_I1]], i64 [[Q]], i32 28793; CHECK-NEXT: [[_MSPROP3:%.*]] = insertelement <8 x i64> [[_MSPROP2]], i64 [[_MSLD]], i32 38794; CHECK-NEXT: [[VECINIT_I3:%.*]] = insertelement <8 x i64> [[VECINIT_I2]], i64 [[Q]], i32 38795; CHECK-NEXT: [[_MSPROP4:%.*]] = insertelement <8 x i64> [[_MSPROP3]], i64 [[_MSLD]], i32 48796; CHECK-NEXT: [[VECINIT_I4:%.*]] = insertelement <8 x i64> [[VECINIT_I3]], i64 [[Q]], i32 48797; CHECK-NEXT: [[_MSPROP5:%.*]] = insertelement <8 x i64> [[_MSPROP4]], i64 [[_MSLD]], i32 58798; CHECK-NEXT: [[VECINIT_I5:%.*]] = insertelement <8 x i64> [[VECINIT_I4]], i64 [[Q]], i32 58799; CHECK-NEXT: [[_MSPROP6:%.*]] = insertelement <8 x i64> [[_MSPROP5]], i64 [[_MSLD]], i32 68800; CHECK-NEXT: [[VECINIT_I6:%.*]] = insertelement <8 x i64> [[VECINIT_I5]], i64 [[Q]], i32 68801; CHECK-NEXT: [[_MSPROP7:%.*]] = insertelement <8 x i64> [[_MSPROP6]], i64 [[_MSLD]], i32 78802; CHECK-NEXT: [[B64:%.*]] = insertelement <8 x i64> [[VECINIT_I6]], i64 [[Q]], i32 78803; CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x i64> [[_MSPROP7]] to <16 x i32>8804; CHECK-NEXT: [[B:%.*]] = bitcast <8 x i64> [[B64]] to <16 x i32>8805; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>8806; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>8807; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x i32> [[TMP10]] to <8 x i64>8808; CHECK-NEXT: [[TMP14:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>8809; CHECK-NEXT: [[TMP15:%.*]] = shl <8 x i64> [[TMP11]], splat (i64 32)8810; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP15]], zeroinitializer8811; CHECK-NEXT: [[TMP17:%.*]] = shl <8 x i64> [[TMP12]], splat (i64 32)8812; CHECK-NEXT: [[TMP18:%.*]] = ashr <8 x i64> [[TMP16]], splat (i64 32)8813; CHECK-NEXT: [[TMP19:%.*]] = or <8 x i64> [[TMP18]], zeroinitializer8814; CHECK-NEXT: [[TMP20:%.*]] = ashr <8 x i64> [[TMP17]], splat (i64 32)8815; CHECK-NEXT: [[TMP21:%.*]] = shl <8 x i64> [[TMP13]], splat (i64 32)8816; CHECK-NEXT: [[TMP22:%.*]] = or <8 x i64> [[TMP21]], zeroinitializer8817; CHECK-NEXT: [[TMP23:%.*]] = shl <8 x i64> [[TMP14]], splat (i64 32)8818; CHECK-NEXT: [[TMP24:%.*]] = ashr <8 x i64> [[TMP22]], splat (i64 32)8819; CHECK-NEXT: [[TMP25:%.*]] = or <8 x i64> [[TMP24]], zeroinitializer8820; CHECK-NEXT: [[TMP26:%.*]] = ashr <8 x i64> [[TMP23]], splat (i64 32)8821; CHECK-NEXT: [[_MSPROP8:%.*]] = or <8 x i64> [[TMP19]], [[TMP25]]8822; CHECK-NEXT: [[TMP27:%.*]] = mul <8 x i64> [[TMP20]], [[TMP26]]8823; CHECK-NEXT: [[TMP28:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>8824; CHECK-NEXT: [[TMP29:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>8825; CHECK-NEXT: [[TMP30:%.*]] = select <8 x i1> [[TMP29]], <8 x i64> [[_MSPROP8]], <8 x i64> [[TMP4]]8826; CHECK-NEXT: [[TMP31:%.*]] = xor <8 x i64> [[TMP27]], [[PASSTHRU:%.*]]8827; CHECK-NEXT: [[TMP32:%.*]] = or <8 x i64> [[TMP31]], [[_MSPROP8]]8828; CHECK-NEXT: [[TMP33:%.*]] = or <8 x i64> [[TMP32]], [[TMP4]]8829; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP28]], <8 x i64> [[TMP33]], <8 x i64> [[TMP30]]8830; CHECK-NEXT: [[TMP34:%.*]] = select <8 x i1> [[TMP29]], <8 x i64> [[TMP27]], <8 x i64> [[PASSTHRU]]8831; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 88832; CHECK-NEXT: ret <8 x i64> [[TMP34]]8833;8834 %q = load i64, ptr %ptr_b8835 %vecinit.i = insertelement < 8 x i64> %extra_param, i64 %q, i32 08836 %vecinit.i1 = insertelement < 8 x i64> %vecinit.i, i64 %q, i32 18837 %vecinit.i2 = insertelement < 8 x i64> %vecinit.i1, i64 %q, i32 28838 %vecinit.i3 = insertelement < 8 x i64> %vecinit.i2, i64 %q, i32 38839 %vecinit.i4 = insertelement < 8 x i64> %vecinit.i3, i64 %q, i32 48840 %vecinit.i5 = insertelement < 8 x i64> %vecinit.i4, i64 %q, i32 58841 %vecinit.i6 = insertelement < 8 x i64> %vecinit.i5, i64 %q, i32 68842 %b64 = insertelement < 8 x i64> %vecinit.i6, i64 %q, i32 78843 %b = bitcast <8 x i64> %b64 to <16 x i32>8844 %res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask)8845 ret < 8 x i64> %res8846}8847 8848define <8 x i64> @test_mask_mul_epi32_rmbkz(<16 x i32> %a, ptr %ptr_b, i8 %mask, <8 x i64> %extra_param, <8 x i64> %extra_param2) #0 {8849;8850; CHECK-LABEL: @test_mask_mul_epi32_rmbkz(8851; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 88852; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 88853; CHECK-NEXT: [[TMP5:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 88854; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 88855; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 88856; CHECK-NEXT: call void @llvm.donothing()8857; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 08858; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP34:%.*]], label [[TMP35:%.*]], !prof [[PROF1]]8859; CHECK: 6:8860; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]8861; CHECK-NEXT: unreachable8862; CHECK: 7:8863; CHECK-NEXT: [[Q:%.*]] = load i64, ptr [[PTR_B:%.*]], align 88864; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i648865; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220808866; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr8867; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP8]], align 88868; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i64> [[TMP4]], i64 [[_MSLD]], i32 08869; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i64> [[EXTRA_PARAM:%.*]], i64 [[Q]], i32 08870; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[_MSPROP]], <8 x i64> [[TMP5]], <8 x i32> zeroinitializer8871; CHECK-NEXT: [[B64:%.*]] = shufflevector <8 x i64> [[VECINIT_I]], <8 x i64> [[EXTRA_PARAM2:%.*]], <8 x i32> zeroinitializer8872; CHECK-NEXT: [[TMP9:%.*]] = bitcast <8 x i64> [[_MSPROP1]] to <16 x i32>8873; CHECK-NEXT: [[B:%.*]] = bitcast <8 x i64> [[B64]] to <16 x i32>8874; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>8875; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>8876; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i32> [[TMP9]] to <8 x i64>8877; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>8878; CHECK-NEXT: [[TMP14:%.*]] = shl <8 x i64> [[TMP10]], splat (i64 32)8879; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], zeroinitializer8880; CHECK-NEXT: [[TMP16:%.*]] = shl <8 x i64> [[TMP11]], splat (i64 32)8881; CHECK-NEXT: [[TMP17:%.*]] = ashr <8 x i64> [[TMP15]], splat (i64 32)8882; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i64> [[TMP17]], zeroinitializer8883; CHECK-NEXT: [[TMP19:%.*]] = ashr <8 x i64> [[TMP16]], splat (i64 32)8884; CHECK-NEXT: [[TMP20:%.*]] = shl <8 x i64> [[TMP12]], splat (i64 32)8885; CHECK-NEXT: [[TMP21:%.*]] = or <8 x i64> [[TMP20]], zeroinitializer8886; CHECK-NEXT: [[TMP22:%.*]] = shl <8 x i64> [[TMP13]], splat (i64 32)8887; CHECK-NEXT: [[TMP23:%.*]] = ashr <8 x i64> [[TMP21]], splat (i64 32)8888; CHECK-NEXT: [[TMP24:%.*]] = or <8 x i64> [[TMP23]], zeroinitializer8889; CHECK-NEXT: [[TMP25:%.*]] = ashr <8 x i64> [[TMP22]], splat (i64 32)8890; CHECK-NEXT: [[_MSPROP2:%.*]] = or <8 x i64> [[TMP18]], [[TMP24]]8891; CHECK-NEXT: [[TMP26:%.*]] = mul <8 x i64> [[TMP19]], [[TMP25]]8892; CHECK-NEXT: [[TMP27:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>8893; CHECK-NEXT: [[TMP28:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>8894; CHECK-NEXT: [[TMP29:%.*]] = select <8 x i1> [[TMP28]], <8 x i64> [[_MSPROP2]], <8 x i64> zeroinitializer8895; CHECK-NEXT: [[TMP30:%.*]] = xor <8 x i64> [[TMP26]], zeroinitializer8896; CHECK-NEXT: [[TMP31:%.*]] = or <8 x i64> [[TMP30]], [[_MSPROP2]]8897; CHECK-NEXT: [[TMP32:%.*]] = or <8 x i64> [[TMP31]], zeroinitializer8898; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP27]], <8 x i64> [[TMP32]], <8 x i64> [[TMP29]]8899; CHECK-NEXT: [[TMP33:%.*]] = select <8 x i1> [[TMP28]], <8 x i64> [[TMP26]], <8 x i64> zeroinitializer8900; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 88901; CHECK-NEXT: ret <8 x i64> [[TMP33]]8902;8903 %q = load i64, ptr %ptr_b8904 %vecinit.i = insertelement <8 x i64> %extra_param, i64 %q, i32 08905 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> %extra_param2, <8 x i32> zeroinitializer8906 %b = bitcast <8 x i64> %b64 to <16 x i32>8907 %res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 %mask)8908 ret < 8 x i64> %res8909}8910 8911define <8 x i64> @test_mask_mul_epi32_rmbkz_buildvector(<16 x i32> %a, ptr %ptr_b, i8 %mask, <8 x i64> %extra_param) #0 {8912;8913; CHECK-LABEL: @test_mask_mul_epi32_rmbkz_buildvector(8914; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 88915; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 88916; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 88917; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 88918; CHECK-NEXT: call void @llvm.donothing()8919; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 08920; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP34:%.*]], !prof [[PROF1]]8921; CHECK: 5:8922; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]8923; CHECK-NEXT: unreachable8924; CHECK: 6:8925; CHECK-NEXT: [[Q:%.*]] = load i64, ptr [[PTR_B:%.*]], align 88926; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i648927; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220808928; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr8929; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP8]], align 88930; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i64> [[TMP4]], i64 [[_MSLD]], i32 08931; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i64> [[EXTRA_PARAM:%.*]], i64 [[Q]], i32 08932; CHECK-NEXT: [[_MSPROP1:%.*]] = insertelement <8 x i64> [[_MSPROP]], i64 [[_MSLD]], i32 18933; CHECK-NEXT: [[VECINIT_I1:%.*]] = insertelement <8 x i64> [[VECINIT_I]], i64 [[Q]], i32 18934; CHECK-NEXT: [[_MSPROP2:%.*]] = insertelement <8 x i64> [[_MSPROP1]], i64 [[_MSLD]], i32 28935; CHECK-NEXT: [[VECINIT_I2:%.*]] = insertelement <8 x i64> [[VECINIT_I1]], i64 [[Q]], i32 28936; CHECK-NEXT: [[_MSPROP3:%.*]] = insertelement <8 x i64> [[_MSPROP2]], i64 [[_MSLD]], i32 38937; CHECK-NEXT: [[VECINIT_I3:%.*]] = insertelement <8 x i64> [[VECINIT_I2]], i64 [[Q]], i32 38938; CHECK-NEXT: [[_MSPROP4:%.*]] = insertelement <8 x i64> [[_MSPROP3]], i64 [[_MSLD]], i32 48939; CHECK-NEXT: [[VECINIT_I4:%.*]] = insertelement <8 x i64> [[VECINIT_I3]], i64 [[Q]], i32 48940; CHECK-NEXT: [[_MSPROP5:%.*]] = insertelement <8 x i64> [[_MSPROP4]], i64 [[_MSLD]], i32 58941; CHECK-NEXT: [[VECINIT_I5:%.*]] = insertelement <8 x i64> [[VECINIT_I4]], i64 [[Q]], i32 58942; CHECK-NEXT: [[_MSPROP6:%.*]] = insertelement <8 x i64> [[_MSPROP5]], i64 [[_MSLD]], i32 68943; CHECK-NEXT: [[VECINIT_I6:%.*]] = insertelement <8 x i64> [[VECINIT_I5]], i64 [[Q]], i32 68944; CHECK-NEXT: [[_MSPROP7:%.*]] = insertelement <8 x i64> [[_MSPROP6]], i64 [[_MSLD]], i32 78945; CHECK-NEXT: [[B64:%.*]] = insertelement <8 x i64> [[VECINIT_I6]], i64 [[Q]], i32 78946; CHECK-NEXT: [[TMP9:%.*]] = bitcast <8 x i64> [[_MSPROP7]] to <16 x i32>8947; CHECK-NEXT: [[B:%.*]] = bitcast <8 x i64> [[B64]] to <16 x i32>8948; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>8949; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>8950; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i32> [[TMP9]] to <8 x i64>8951; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>8952; CHECK-NEXT: [[TMP14:%.*]] = shl <8 x i64> [[TMP10]], splat (i64 32)8953; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], zeroinitializer8954; CHECK-NEXT: [[TMP16:%.*]] = shl <8 x i64> [[TMP11]], splat (i64 32)8955; CHECK-NEXT: [[TMP17:%.*]] = ashr <8 x i64> [[TMP15]], splat (i64 32)8956; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i64> [[TMP17]], zeroinitializer8957; CHECK-NEXT: [[TMP19:%.*]] = ashr <8 x i64> [[TMP16]], splat (i64 32)8958; CHECK-NEXT: [[TMP20:%.*]] = shl <8 x i64> [[TMP12]], splat (i64 32)8959; CHECK-NEXT: [[TMP21:%.*]] = or <8 x i64> [[TMP20]], zeroinitializer8960; CHECK-NEXT: [[TMP22:%.*]] = shl <8 x i64> [[TMP13]], splat (i64 32)8961; CHECK-NEXT: [[TMP23:%.*]] = ashr <8 x i64> [[TMP21]], splat (i64 32)8962; CHECK-NEXT: [[TMP24:%.*]] = or <8 x i64> [[TMP23]], zeroinitializer8963; CHECK-NEXT: [[TMP25:%.*]] = ashr <8 x i64> [[TMP22]], splat (i64 32)8964; CHECK-NEXT: [[_MSPROP8:%.*]] = or <8 x i64> [[TMP18]], [[TMP24]]8965; CHECK-NEXT: [[TMP26:%.*]] = mul <8 x i64> [[TMP19]], [[TMP25]]8966; CHECK-NEXT: [[TMP27:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>8967; CHECK-NEXT: [[TMP28:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>8968; CHECK-NEXT: [[TMP29:%.*]] = select <8 x i1> [[TMP28]], <8 x i64> [[_MSPROP8]], <8 x i64> zeroinitializer8969; CHECK-NEXT: [[TMP30:%.*]] = xor <8 x i64> [[TMP26]], zeroinitializer8970; CHECK-NEXT: [[TMP31:%.*]] = or <8 x i64> [[TMP30]], [[_MSPROP8]]8971; CHECK-NEXT: [[TMP32:%.*]] = or <8 x i64> [[TMP31]], zeroinitializer8972; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP27]], <8 x i64> [[TMP32]], <8 x i64> [[TMP29]]8973; CHECK-NEXT: [[TMP33:%.*]] = select <8 x i1> [[TMP28]], <8 x i64> [[TMP26]], <8 x i64> zeroinitializer8974; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 88975; CHECK-NEXT: ret <8 x i64> [[TMP33]]8976;8977 %q = load i64, ptr %ptr_b8978 %vecinit.i = insertelement < 8 x i64> %extra_param, i64 %q, i32 08979 %vecinit.i1 = insertelement < 8 x i64> %vecinit.i, i64 %q, i32 18980 %vecinit.i2 = insertelement < 8 x i64> %vecinit.i1, i64 %q, i32 28981 %vecinit.i3 = insertelement < 8 x i64> %vecinit.i2, i64 %q, i32 38982 %vecinit.i4 = insertelement < 8 x i64> %vecinit.i3, i64 %q, i32 48983 %vecinit.i5 = insertelement < 8 x i64> %vecinit.i4, i64 %q, i32 58984 %vecinit.i6 = insertelement < 8 x i64> %vecinit.i5, i64 %q, i32 68985 %b64 = insertelement < 8 x i64> %vecinit.i6, i64 %q, i32 78986 %b = bitcast <8 x i64> %b64 to <16 x i32>8987 %res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 %mask)8988 ret < 8 x i64> %res8989}8990 8991declare <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32>, <16 x i32>, <8 x i64>, i8)8992 8993define <8 x i64> @test_mask_mul_epu32_rr(<16 x i32> %a, <16 x i32> %b) #0 {8994; CHECK-LABEL: @test_mask_mul_epu32_rr(8995; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 88996; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 88997; CHECK-NEXT: call void @llvm.donothing()8998; CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i32> [[TMP1]] to <8 x i64>8999; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>9000; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>9001; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i32> [[B:%.*]] to <8 x i64>9002; CHECK-NEXT: [[TMP7:%.*]] = and <8 x i64> [[TMP3]], zeroinitializer9003; CHECK-NEXT: [[TMP8:%.*]] = and <8 x i64> [[TMP4]], zeroinitializer9004; CHECK-NEXT: [[TMP9:%.*]] = and <8 x i64> [[TMP3]], splat (i64 4294967295)9005; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP7]], [[TMP8]]9006; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP9]]9007; CHECK-NEXT: [[TMP12:%.*]] = and <8 x i64> [[TMP4]], splat (i64 4294967295)9008; CHECK-NEXT: [[TMP13:%.*]] = and <8 x i64> [[TMP5]], zeroinitializer9009; CHECK-NEXT: [[TMP14:%.*]] = and <8 x i64> [[TMP6]], zeroinitializer9010; CHECK-NEXT: [[TMP15:%.*]] = and <8 x i64> [[TMP5]], splat (i64 4294967295)9011; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP13]], [[TMP14]]9012; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP16]], [[TMP15]]9013; CHECK-NEXT: [[TMP18:%.*]] = and <8 x i64> [[TMP6]], splat (i64 4294967295)9014; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP11]], [[TMP17]]9015; CHECK-NEXT: [[TMP19:%.*]] = mul <8 x i64> [[TMP12]], [[TMP18]]9016; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 89017; CHECK-NEXT: ret <8 x i64> [[TMP19]]9018;9019 %res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 -1)9020 ret < 8 x i64> %res9021}9022 9023define <8 x i64> @test_mask_mul_epu32_rrk(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask) #0 {9024;9025; CHECK-LABEL: @test_mask_mul_epu32_rrk(9026; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 89027; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 89028; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 89029; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 89030; CHECK-NEXT: call void @llvm.donothing()9031; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP1]] to <8 x i64>9032; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>9033; CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>9034; CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i32> [[B:%.*]] to <8 x i64>9035; CHECK-NEXT: [[TMP9:%.*]] = and <8 x i64> [[TMP5]], zeroinitializer9036; CHECK-NEXT: [[TMP10:%.*]] = and <8 x i64> [[TMP6]], zeroinitializer9037; CHECK-NEXT: [[TMP11:%.*]] = and <8 x i64> [[TMP5]], splat (i64 4294967295)9038; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP9]], [[TMP10]]9039; CHECK-NEXT: [[TMP13:%.*]] = or <8 x i64> [[TMP12]], [[TMP11]]9040; CHECK-NEXT: [[TMP14:%.*]] = and <8 x i64> [[TMP6]], splat (i64 4294967295)9041; CHECK-NEXT: [[TMP15:%.*]] = and <8 x i64> [[TMP7]], zeroinitializer9042; CHECK-NEXT: [[TMP16:%.*]] = and <8 x i64> [[TMP8]], zeroinitializer9043; CHECK-NEXT: [[TMP17:%.*]] = and <8 x i64> [[TMP7]], splat (i64 4294967295)9044; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i64> [[TMP15]], [[TMP16]]9045; CHECK-NEXT: [[TMP19:%.*]] = or <8 x i64> [[TMP18]], [[TMP17]]9046; CHECK-NEXT: [[TMP20:%.*]] = and <8 x i64> [[TMP8]], splat (i64 4294967295)9047; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP13]], [[TMP19]]9048; CHECK-NEXT: [[TMP21:%.*]] = mul <8 x i64> [[TMP14]], [[TMP20]]9049; CHECK-NEXT: [[TMP22:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>9050; CHECK-NEXT: [[TMP23:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>9051; CHECK-NEXT: [[TMP24:%.*]] = select <8 x i1> [[TMP23]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]9052; CHECK-NEXT: [[TMP25:%.*]] = xor <8 x i64> [[TMP21]], [[PASSTHRU:%.*]]9053; CHECK-NEXT: [[TMP26:%.*]] = or <8 x i64> [[TMP25]], [[_MSPROP]]9054; CHECK-NEXT: [[TMP27:%.*]] = or <8 x i64> [[TMP26]], [[TMP4]]9055; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP22]], <8 x i64> [[TMP27]], <8 x i64> [[TMP24]]9056; CHECK-NEXT: [[TMP28:%.*]] = select <8 x i1> [[TMP23]], <8 x i64> [[TMP21]], <8 x i64> [[PASSTHRU]]9057; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 89058; CHECK-NEXT: ret <8 x i64> [[TMP28]]9059;9060 %res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask)9061 ret < 8 x i64> %res9062}9063 9064define <8 x i64> @test_mask_mul_epu32_rrkz(<16 x i32> %a, <16 x i32> %b, i8 %mask) #0 {9065;9066; CHECK-LABEL: @test_mask_mul_epu32_rrkz(9067; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 89068; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 89069; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 89070; CHECK-NEXT: call void @llvm.donothing()9071; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[TMP1]] to <8 x i64>9072; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>9073; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>9074; CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i32> [[B:%.*]] to <8 x i64>9075; CHECK-NEXT: [[TMP8:%.*]] = and <8 x i64> [[TMP4]], zeroinitializer9076; CHECK-NEXT: [[TMP9:%.*]] = and <8 x i64> [[TMP5]], zeroinitializer9077; CHECK-NEXT: [[TMP10:%.*]] = and <8 x i64> [[TMP4]], splat (i64 4294967295)9078; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP8]], [[TMP9]]9079; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], [[TMP10]]9080; CHECK-NEXT: [[TMP13:%.*]] = and <8 x i64> [[TMP5]], splat (i64 4294967295)9081; CHECK-NEXT: [[TMP14:%.*]] = and <8 x i64> [[TMP6]], zeroinitializer9082; CHECK-NEXT: [[TMP15:%.*]] = and <8 x i64> [[TMP7]], zeroinitializer9083; CHECK-NEXT: [[TMP16:%.*]] = and <8 x i64> [[TMP6]], splat (i64 4294967295)9084; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP14]], [[TMP15]]9085; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i64> [[TMP17]], [[TMP16]]9086; CHECK-NEXT: [[TMP19:%.*]] = and <8 x i64> [[TMP7]], splat (i64 4294967295)9087; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP12]], [[TMP18]]9088; CHECK-NEXT: [[TMP20:%.*]] = mul <8 x i64> [[TMP13]], [[TMP19]]9089; CHECK-NEXT: [[TMP21:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>9090; CHECK-NEXT: [[TMP22:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>9091; CHECK-NEXT: [[TMP23:%.*]] = select <8 x i1> [[TMP22]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer9092; CHECK-NEXT: [[TMP24:%.*]] = xor <8 x i64> [[TMP20]], zeroinitializer9093; CHECK-NEXT: [[TMP25:%.*]] = or <8 x i64> [[TMP24]], [[_MSPROP]]9094; CHECK-NEXT: [[TMP26:%.*]] = or <8 x i64> [[TMP25]], zeroinitializer9095; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP21]], <8 x i64> [[TMP26]], <8 x i64> [[TMP23]]9096; CHECK-NEXT: [[TMP27:%.*]] = select <8 x i1> [[TMP22]], <8 x i64> [[TMP20]], <8 x i64> zeroinitializer9097; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 89098; CHECK-NEXT: ret <8 x i64> [[TMP27]]9099;9100 %res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 %mask)9101 ret < 8 x i64> %res9102}9103 9104define <8 x i64> @test_mask_mul_epu32_rm(<16 x i32> %a, ptr %ptr_b) #0 {9105;9106; CHECK-LABEL: @test_mask_mul_epu32_rm(9107; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 89108; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 89109; CHECK-NEXT: call void @llvm.donothing()9110; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 09111; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]9112; CHECK: 3:9113; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]9114; CHECK-NEXT: unreachable9115; CHECK: 4:9116; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 649117; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i649118; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220809119; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr9120; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP7]], align 649121; CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>9122; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>9123; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i32> [[_MSLD]] to <8 x i64>9124; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>9125; CHECK-NEXT: [[TMP12:%.*]] = and <8 x i64> [[TMP8]], zeroinitializer9126; CHECK-NEXT: [[TMP13:%.*]] = and <8 x i64> [[TMP9]], zeroinitializer9127; CHECK-NEXT: [[TMP14:%.*]] = and <8 x i64> [[TMP8]], splat (i64 4294967295)9128; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP12]], [[TMP13]]9129; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP15]], [[TMP14]]9130; CHECK-NEXT: [[TMP17:%.*]] = and <8 x i64> [[TMP9]], splat (i64 4294967295)9131; CHECK-NEXT: [[TMP18:%.*]] = and <8 x i64> [[TMP10]], zeroinitializer9132; CHECK-NEXT: [[TMP19:%.*]] = and <8 x i64> [[TMP11]], zeroinitializer9133; CHECK-NEXT: [[TMP20:%.*]] = and <8 x i64> [[TMP10]], splat (i64 4294967295)9134; CHECK-NEXT: [[TMP21:%.*]] = or <8 x i64> [[TMP18]], [[TMP19]]9135; CHECK-NEXT: [[TMP22:%.*]] = or <8 x i64> [[TMP21]], [[TMP20]]9136; CHECK-NEXT: [[TMP23:%.*]] = and <8 x i64> [[TMP11]], splat (i64 4294967295)9137; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP16]], [[TMP22]]9138; CHECK-NEXT: [[TMP24:%.*]] = mul <8 x i64> [[TMP17]], [[TMP23]]9139; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 89140; CHECK-NEXT: ret <8 x i64> [[TMP24]]9141;9142 %b = load <16 x i32>, ptr %ptr_b9143 %res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 -1)9144 ret < 8 x i64> %res9145}9146 9147define <8 x i64> @test_mask_mul_epu32_rmk(<16 x i32> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask) #0 {9148;9149; CHECK-LABEL: @test_mask_mul_epu32_rmk(9150; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 89151; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 89152; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 89153; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 89154; CHECK-NEXT: call void @llvm.donothing()9155; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 09156; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]9157; CHECK: 5:9158; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]9159; CHECK-NEXT: unreachable9160; CHECK: 6:9161; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 649162; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i649163; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220809164; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr9165; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP9]], align 649166; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>9167; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>9168; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i32> [[_MSLD]] to <8 x i64>9169; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>9170; CHECK-NEXT: [[TMP14:%.*]] = and <8 x i64> [[TMP10]], zeroinitializer9171; CHECK-NEXT: [[TMP15:%.*]] = and <8 x i64> [[TMP11]], zeroinitializer9172; CHECK-NEXT: [[TMP16:%.*]] = and <8 x i64> [[TMP10]], splat (i64 4294967295)9173; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP14]], [[TMP15]]9174; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i64> [[TMP17]], [[TMP16]]9175; CHECK-NEXT: [[TMP19:%.*]] = and <8 x i64> [[TMP11]], splat (i64 4294967295)9176; CHECK-NEXT: [[TMP20:%.*]] = and <8 x i64> [[TMP12]], zeroinitializer9177; CHECK-NEXT: [[TMP21:%.*]] = and <8 x i64> [[TMP13]], zeroinitializer9178; CHECK-NEXT: [[TMP22:%.*]] = and <8 x i64> [[TMP12]], splat (i64 4294967295)9179; CHECK-NEXT: [[TMP23:%.*]] = or <8 x i64> [[TMP20]], [[TMP21]]9180; CHECK-NEXT: [[TMP24:%.*]] = or <8 x i64> [[TMP23]], [[TMP22]]9181; CHECK-NEXT: [[TMP25:%.*]] = and <8 x i64> [[TMP13]], splat (i64 4294967295)9182; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP18]], [[TMP24]]9183; CHECK-NEXT: [[TMP26:%.*]] = mul <8 x i64> [[TMP19]], [[TMP25]]9184; CHECK-NEXT: [[TMP27:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>9185; CHECK-NEXT: [[TMP28:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>9186; CHECK-NEXT: [[TMP29:%.*]] = select <8 x i1> [[TMP28]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]9187; CHECK-NEXT: [[TMP30:%.*]] = xor <8 x i64> [[TMP26]], [[PASSTHRU:%.*]]9188; CHECK-NEXT: [[TMP31:%.*]] = or <8 x i64> [[TMP30]], [[_MSPROP]]9189; CHECK-NEXT: [[TMP32:%.*]] = or <8 x i64> [[TMP31]], [[TMP4]]9190; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP27]], <8 x i64> [[TMP32]], <8 x i64> [[TMP29]]9191; CHECK-NEXT: [[TMP33:%.*]] = select <8 x i1> [[TMP28]], <8 x i64> [[TMP26]], <8 x i64> [[PASSTHRU]]9192; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 89193; CHECK-NEXT: ret <8 x i64> [[TMP33]]9194;9195 %b = load <16 x i32>, ptr %ptr_b9196 %res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask)9197 ret < 8 x i64> %res9198}9199 9200define <8 x i64> @test_mask_mul_epu32_rmkz(<16 x i32> %a, ptr %ptr_b, i8 %mask) #0 {9201;9202; CHECK-LABEL: @test_mask_mul_epu32_rmkz(9203; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 89204; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 89205; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 89206; CHECK-NEXT: call void @llvm.donothing()9207; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 09208; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]9209; CHECK: 4:9210; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]9211; CHECK-NEXT: unreachable9212; CHECK: 5:9213; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 649214; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i649215; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220809216; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr9217; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP8]], align 649218; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>9219; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>9220; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[_MSLD]] to <8 x i64>9221; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>9222; CHECK-NEXT: [[TMP13:%.*]] = and <8 x i64> [[TMP9]], zeroinitializer9223; CHECK-NEXT: [[TMP14:%.*]] = and <8 x i64> [[TMP10]], zeroinitializer9224; CHECK-NEXT: [[TMP15:%.*]] = and <8 x i64> [[TMP9]], splat (i64 4294967295)9225; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP13]], [[TMP14]]9226; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP16]], [[TMP15]]9227; CHECK-NEXT: [[TMP18:%.*]] = and <8 x i64> [[TMP10]], splat (i64 4294967295)9228; CHECK-NEXT: [[TMP19:%.*]] = and <8 x i64> [[TMP11]], zeroinitializer9229; CHECK-NEXT: [[TMP20:%.*]] = and <8 x i64> [[TMP12]], zeroinitializer9230; CHECK-NEXT: [[TMP21:%.*]] = and <8 x i64> [[TMP11]], splat (i64 4294967295)9231; CHECK-NEXT: [[TMP22:%.*]] = or <8 x i64> [[TMP19]], [[TMP20]]9232; CHECK-NEXT: [[TMP23:%.*]] = or <8 x i64> [[TMP22]], [[TMP21]]9233; CHECK-NEXT: [[TMP24:%.*]] = and <8 x i64> [[TMP12]], splat (i64 4294967295)9234; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP17]], [[TMP23]]9235; CHECK-NEXT: [[TMP25:%.*]] = mul <8 x i64> [[TMP18]], [[TMP24]]9236; CHECK-NEXT: [[TMP26:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>9237; CHECK-NEXT: [[TMP27:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>9238; CHECK-NEXT: [[TMP28:%.*]] = select <8 x i1> [[TMP27]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer9239; CHECK-NEXT: [[TMP29:%.*]] = xor <8 x i64> [[TMP25]], zeroinitializer9240; CHECK-NEXT: [[TMP30:%.*]] = or <8 x i64> [[TMP29]], [[_MSPROP]]9241; CHECK-NEXT: [[TMP31:%.*]] = or <8 x i64> [[TMP30]], zeroinitializer9242; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP26]], <8 x i64> [[TMP31]], <8 x i64> [[TMP28]]9243; CHECK-NEXT: [[TMP32:%.*]] = select <8 x i1> [[TMP27]], <8 x i64> [[TMP25]], <8 x i64> zeroinitializer9244; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 89245; CHECK-NEXT: ret <8 x i64> [[TMP32]]9246;9247 %b = load <16 x i32>, ptr %ptr_b9248 %res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 %mask)9249 ret < 8 x i64> %res9250}9251 9252define <8 x i64> @test_mask_mul_epu32_rmb(<16 x i32> %a, ptr %ptr_b, <8 x i64> %extra_param, <8 x i64> %extra_param2) #0 {9253;9254; CHECK-LABEL: @test_mask_mul_epu32_rmb(9255; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 89256; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 89257; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 89258; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 89259; CHECK-NEXT: call void @llvm.donothing()9260; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 09261; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP26:%.*]], label [[TMP27:%.*]], !prof [[PROF1]]9262; CHECK: 5:9263; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]9264; CHECK-NEXT: unreachable9265; CHECK: 6:9266; CHECK-NEXT: [[Q:%.*]] = load i64, ptr [[PTR_B:%.*]], align 89267; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i649268; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220809269; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr9270; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP7]], align 89271; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i64> [[TMP3]], i64 [[_MSLD]], i32 09272; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i64> [[EXTRA_PARAM:%.*]], i64 [[Q]], i32 09273; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]], <8 x i32> zeroinitializer9274; CHECK-NEXT: [[B64:%.*]] = shufflevector <8 x i64> [[VECINIT_I]], <8 x i64> [[EXTRA_PARAM2:%.*]], <8 x i32> zeroinitializer9275; CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x i64> [[_MSPROP1]] to <16 x i32>9276; CHECK-NEXT: [[B:%.*]] = bitcast <8 x i64> [[B64]] to <16 x i32>9277; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>9278; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>9279; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[TMP8]] to <8 x i64>9280; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>9281; CHECK-NEXT: [[TMP13:%.*]] = and <8 x i64> [[TMP9]], zeroinitializer9282; CHECK-NEXT: [[TMP14:%.*]] = and <8 x i64> [[TMP10]], zeroinitializer9283; CHECK-NEXT: [[TMP15:%.*]] = and <8 x i64> [[TMP9]], splat (i64 4294967295)9284; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP13]], [[TMP14]]9285; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP16]], [[TMP15]]9286; CHECK-NEXT: [[TMP18:%.*]] = and <8 x i64> [[TMP10]], splat (i64 4294967295)9287; CHECK-NEXT: [[TMP19:%.*]] = and <8 x i64> [[TMP11]], zeroinitializer9288; CHECK-NEXT: [[TMP20:%.*]] = and <8 x i64> [[TMP12]], zeroinitializer9289; CHECK-NEXT: [[TMP21:%.*]] = and <8 x i64> [[TMP11]], splat (i64 4294967295)9290; CHECK-NEXT: [[TMP22:%.*]] = or <8 x i64> [[TMP19]], [[TMP20]]9291; CHECK-NEXT: [[TMP23:%.*]] = or <8 x i64> [[TMP22]], [[TMP21]]9292; CHECK-NEXT: [[TMP24:%.*]] = and <8 x i64> [[TMP12]], splat (i64 4294967295)9293; CHECK-NEXT: [[_MSPROP2:%.*]] = or <8 x i64> [[TMP17]], [[TMP23]]9294; CHECK-NEXT: [[TMP25:%.*]] = mul <8 x i64> [[TMP18]], [[TMP24]]9295; CHECK-NEXT: store <8 x i64> [[_MSPROP2]], ptr @__msan_retval_tls, align 89296; CHECK-NEXT: ret <8 x i64> [[TMP25]]9297;9298 %q = load i64, ptr %ptr_b9299 %vecinit.i = insertelement <8 x i64> %extra_param, i64 %q, i32 09300 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> %extra_param2, <8 x i32> zeroinitializer9301 %b = bitcast <8 x i64> %b64 to <16 x i32>9302 %res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 -1)9303 ret < 8 x i64> %res9304}9305 9306define <8 x i64> @test_mask_mul_epu32_rmbk(<16 x i32> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask, <8 x i64> %extra_param, <8 x i64> %extra_param2) #0 {9307;9308; CHECK-LABEL: @test_mask_mul_epu32_rmbk(9309; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 89310; CHECK-NEXT: [[TMP5:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 89311; CHECK-NEXT: [[TMP6:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 208), align 89312; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 89313; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 89314; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 89315; CHECK-NEXT: call void @llvm.donothing()9316; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 09317; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP35:%.*]], label [[TMP36:%.*]], !prof [[PROF1]]9318; CHECK: 7:9319; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]9320; CHECK-NEXT: unreachable9321; CHECK: 8:9322; CHECK-NEXT: [[Q:%.*]] = load i64, ptr [[PTR_B:%.*]], align 89323; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i649324; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220809325; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr9326; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP9]], align 89327; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i64> [[TMP5]], i64 [[_MSLD]], i32 09328; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i64> [[EXTRA_PARAM:%.*]], i64 [[Q]], i32 09329; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[_MSPROP]], <8 x i64> [[TMP6]], <8 x i32> zeroinitializer9330; CHECK-NEXT: [[B64:%.*]] = shufflevector <8 x i64> [[VECINIT_I]], <8 x i64> [[EXTRA_PARAM2:%.*]], <8 x i32> zeroinitializer9331; CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x i64> [[_MSPROP1]] to <16 x i32>9332; CHECK-NEXT: [[B:%.*]] = bitcast <8 x i64> [[B64]] to <16 x i32>9333; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>9334; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>9335; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x i32> [[TMP10]] to <8 x i64>9336; CHECK-NEXT: [[TMP14:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>9337; CHECK-NEXT: [[TMP15:%.*]] = and <8 x i64> [[TMP11]], zeroinitializer9338; CHECK-NEXT: [[TMP16:%.*]] = and <8 x i64> [[TMP12]], zeroinitializer9339; CHECK-NEXT: [[TMP17:%.*]] = and <8 x i64> [[TMP11]], splat (i64 4294967295)9340; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i64> [[TMP15]], [[TMP16]]9341; CHECK-NEXT: [[TMP19:%.*]] = or <8 x i64> [[TMP18]], [[TMP17]]9342; CHECK-NEXT: [[TMP20:%.*]] = and <8 x i64> [[TMP12]], splat (i64 4294967295)9343; CHECK-NEXT: [[TMP21:%.*]] = and <8 x i64> [[TMP13]], zeroinitializer9344; CHECK-NEXT: [[TMP22:%.*]] = and <8 x i64> [[TMP14]], zeroinitializer9345; CHECK-NEXT: [[TMP23:%.*]] = and <8 x i64> [[TMP13]], splat (i64 4294967295)9346; CHECK-NEXT: [[TMP24:%.*]] = or <8 x i64> [[TMP21]], [[TMP22]]9347; CHECK-NEXT: [[TMP25:%.*]] = or <8 x i64> [[TMP24]], [[TMP23]]9348; CHECK-NEXT: [[TMP26:%.*]] = and <8 x i64> [[TMP14]], splat (i64 4294967295)9349; CHECK-NEXT: [[_MSPROP2:%.*]] = or <8 x i64> [[TMP19]], [[TMP25]]9350; CHECK-NEXT: [[TMP27:%.*]] = mul <8 x i64> [[TMP20]], [[TMP26]]9351; CHECK-NEXT: [[TMP28:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>9352; CHECK-NEXT: [[TMP29:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>9353; CHECK-NEXT: [[TMP30:%.*]] = select <8 x i1> [[TMP29]], <8 x i64> [[_MSPROP2]], <8 x i64> [[TMP4]]9354; CHECK-NEXT: [[TMP31:%.*]] = xor <8 x i64> [[TMP27]], [[PASSTHRU:%.*]]9355; CHECK-NEXT: [[TMP32:%.*]] = or <8 x i64> [[TMP31]], [[_MSPROP2]]9356; CHECK-NEXT: [[TMP33:%.*]] = or <8 x i64> [[TMP32]], [[TMP4]]9357; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP28]], <8 x i64> [[TMP33]], <8 x i64> [[TMP30]]9358; CHECK-NEXT: [[TMP34:%.*]] = select <8 x i1> [[TMP29]], <8 x i64> [[TMP27]], <8 x i64> [[PASSTHRU]]9359; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 89360; CHECK-NEXT: ret <8 x i64> [[TMP34]]9361;9362 %q = load i64, ptr %ptr_b9363 %vecinit.i = insertelement <8 x i64> %extra_param, i64 %q, i32 09364 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> %extra_param2, <8 x i32> zeroinitializer9365 %b = bitcast <8 x i64> %b64 to <16 x i32>9366 %res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask)9367 ret < 8 x i64> %res9368}9369 9370define <8 x i64> @test_mask_mul_epu32_rmbkz(<16 x i32> %a, ptr %ptr_b, i8 %mask, <8 x i64> %extra_param, <8 x i64> %extra_param2) #0 {9371;9372; CHECK-LABEL: @test_mask_mul_epu32_rmbkz(9373; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 89374; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 89375; CHECK-NEXT: [[TMP5:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 89376; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 89377; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 89378; CHECK-NEXT: call void @llvm.donothing()9379; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 09380; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP34:%.*]], label [[TMP35:%.*]], !prof [[PROF1]]9381; CHECK: 6:9382; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]9383; CHECK-NEXT: unreachable9384; CHECK: 7:9385; CHECK-NEXT: [[Q:%.*]] = load i64, ptr [[PTR_B:%.*]], align 89386; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i649387; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220809388; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr9389; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP8]], align 89390; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i64> [[TMP4]], i64 [[_MSLD]], i32 09391; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i64> [[EXTRA_PARAM:%.*]], i64 [[Q]], i32 09392; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[_MSPROP]], <8 x i64> [[TMP5]], <8 x i32> zeroinitializer9393; CHECK-NEXT: [[B64:%.*]] = shufflevector <8 x i64> [[VECINIT_I]], <8 x i64> [[EXTRA_PARAM2:%.*]], <8 x i32> zeroinitializer9394; CHECK-NEXT: [[TMP9:%.*]] = bitcast <8 x i64> [[_MSPROP1]] to <16 x i32>9395; CHECK-NEXT: [[B:%.*]] = bitcast <8 x i64> [[B64]] to <16 x i32>9396; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>9397; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>9398; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i32> [[TMP9]] to <8 x i64>9399; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>9400; CHECK-NEXT: [[TMP14:%.*]] = and <8 x i64> [[TMP10]], zeroinitializer9401; CHECK-NEXT: [[TMP15:%.*]] = and <8 x i64> [[TMP11]], zeroinitializer9402; CHECK-NEXT: [[TMP16:%.*]] = and <8 x i64> [[TMP10]], splat (i64 4294967295)9403; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP14]], [[TMP15]]9404; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i64> [[TMP17]], [[TMP16]]9405; CHECK-NEXT: [[TMP19:%.*]] = and <8 x i64> [[TMP11]], splat (i64 4294967295)9406; CHECK-NEXT: [[TMP20:%.*]] = and <8 x i64> [[TMP12]], zeroinitializer9407; CHECK-NEXT: [[TMP21:%.*]] = and <8 x i64> [[TMP13]], zeroinitializer9408; CHECK-NEXT: [[TMP22:%.*]] = and <8 x i64> [[TMP12]], splat (i64 4294967295)9409; CHECK-NEXT: [[TMP23:%.*]] = or <8 x i64> [[TMP20]], [[TMP21]]9410; CHECK-NEXT: [[TMP24:%.*]] = or <8 x i64> [[TMP23]], [[TMP22]]9411; CHECK-NEXT: [[TMP25:%.*]] = and <8 x i64> [[TMP13]], splat (i64 4294967295)9412; CHECK-NEXT: [[_MSPROP2:%.*]] = or <8 x i64> [[TMP18]], [[TMP24]]9413; CHECK-NEXT: [[TMP26:%.*]] = mul <8 x i64> [[TMP19]], [[TMP25]]9414; CHECK-NEXT: [[TMP27:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>9415; CHECK-NEXT: [[TMP28:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>9416; CHECK-NEXT: [[TMP29:%.*]] = select <8 x i1> [[TMP28]], <8 x i64> [[_MSPROP2]], <8 x i64> zeroinitializer9417; CHECK-NEXT: [[TMP30:%.*]] = xor <8 x i64> [[TMP26]], zeroinitializer9418; CHECK-NEXT: [[TMP31:%.*]] = or <8 x i64> [[TMP30]], [[_MSPROP2]]9419; CHECK-NEXT: [[TMP32:%.*]] = or <8 x i64> [[TMP31]], zeroinitializer9420; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP27]], <8 x i64> [[TMP32]], <8 x i64> [[TMP29]]9421; CHECK-NEXT: [[TMP33:%.*]] = select <8 x i1> [[TMP28]], <8 x i64> [[TMP26]], <8 x i64> zeroinitializer9422; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 89423; CHECK-NEXT: ret <8 x i64> [[TMP33]]9424;9425 %q = load i64, ptr %ptr_b9426 %vecinit.i = insertelement <8 x i64> %extra_param, i64 %q, i32 09427 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> %extra_param2, <8 x i32> zeroinitializer9428 %b = bitcast <8 x i64> %b64 to <16 x i32>9429 %res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 %mask)9430 ret < 8 x i64> %res9431}9432 9433declare <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32>, <16 x i32>, <8 x i64>, i8)9434 9435define <4 x float> @test_mask_vextractf32x4(<4 x float> %b, <16 x float> %a, i8 %mask) #0 {9436;9437; CHECK-LABEL: @test_mask_vextractf32x4(9438; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 89439; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 89440; CHECK-NEXT: [[TMP3:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 89441; CHECK-NEXT: call void @llvm.donothing()9442; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <4 x i32> <i32 8, i32 9, i32 10, i32 11>9443; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <16 x float> [[A:%.*]], <16 x float> [[A]], <4 x i32> <i32 8, i32 9, i32 10, i32 11>9444; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>9445; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>9446; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i1> [[TMP5]], <8 x i1> [[TMP5]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>9447; CHECK-NEXT: [[EXTRACT:%.*]] = shufflevector <8 x i1> [[TMP6]], <8 x i1> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>9448; CHECK-NEXT: [[TMP7:%.*]] = select <4 x i1> [[EXTRACT]], <4 x i32> [[_MSPROP]], <4 x i32> [[TMP3]]9449; CHECK-NEXT: [[TMP8:%.*]] = bitcast <4 x float> [[TMP4]] to <4 x i32>9450; CHECK-NEXT: [[TMP9:%.*]] = bitcast <4 x float> [[B:%.*]] to <4 x i32>9451; CHECK-NEXT: [[TMP10:%.*]] = xor <4 x i32> [[TMP8]], [[TMP9]]9452; CHECK-NEXT: [[TMP11:%.*]] = or <4 x i32> [[TMP10]], [[_MSPROP]]9453; CHECK-NEXT: [[TMP12:%.*]] = or <4 x i32> [[TMP11]], [[TMP3]]9454; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <4 x i1> [[_MSPROP1]], <4 x i32> [[TMP12]], <4 x i32> [[TMP7]]9455; CHECK-NEXT: [[TMP13:%.*]] = select <4 x i1> [[EXTRACT]], <4 x float> [[TMP4]], <4 x float> [[B]]9456; CHECK-NEXT: store <4 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 89457; CHECK-NEXT: ret <4 x float> [[TMP13]]9458;9459 %res = call <4 x float> @llvm.x86.avx512.mask.vextractf32x4.512(<16 x float> %a, i32 2, <4 x float> %b, i8 %mask)9460 ret <4 x float> %res9461}9462 9463declare <4 x float> @llvm.x86.avx512.mask.vextractf32x4.512(<16 x float>, i32, <4 x float>, i8)9464 9465define <4 x i64> @test_mask_vextracti64x4(<4 x i64> %b, <8 x i64> %a, i8 %mask) #0 {9466;9467; CHECK-LABEL: @test_mask_vextracti64x4(9468; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 89469; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 96), align 89470; CHECK-NEXT: [[TMP3:%.*]] = load <4 x i64>, ptr @__msan_param_tls, align 89471; CHECK-NEXT: call void @llvm.donothing()9472; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>9473; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <8 x i64> [[A:%.*]], <8 x i64> [[A]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>9474; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>9475; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>9476; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i1> [[TMP5]], <8 x i1> [[TMP5]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>9477; CHECK-NEXT: [[EXTRACT:%.*]] = shufflevector <8 x i1> [[TMP6]], <8 x i1> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>9478; CHECK-NEXT: [[TMP7:%.*]] = select <4 x i1> [[EXTRACT]], <4 x i64> [[_MSPROP]], <4 x i64> [[TMP3]]9479; CHECK-NEXT: [[TMP8:%.*]] = xor <4 x i64> [[TMP4]], [[B:%.*]]9480; CHECK-NEXT: [[TMP9:%.*]] = or <4 x i64> [[TMP8]], [[_MSPROP]]9481; CHECK-NEXT: [[TMP10:%.*]] = or <4 x i64> [[TMP9]], [[TMP3]]9482; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <4 x i1> [[_MSPROP1]], <4 x i64> [[TMP10]], <4 x i64> [[TMP7]]9483; CHECK-NEXT: [[TMP11:%.*]] = select <4 x i1> [[EXTRACT]], <4 x i64> [[TMP4]], <4 x i64> [[B]]9484; CHECK-NEXT: store <4 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 89485; CHECK-NEXT: ret <4 x i64> [[TMP11]]9486;9487 %res = call <4 x i64> @llvm.x86.avx512.mask.vextracti64x4.512(<8 x i64> %a, i32 1, <4 x i64> %b, i8 %mask)9488 ret <4 x i64> %res9489}9490 9491declare <4 x i64> @llvm.x86.avx512.mask.vextracti64x4.512(<8 x i64>, i32, <4 x i64>, i8)9492 9493define <4 x i32> @test_maskz_vextracti32x4(<16 x i32> %a, i8 %mask) #0 {9494;9495; CHECK-LABEL: @test_maskz_vextracti32x4(9496; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 89497; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 89498; CHECK-NEXT: call void @llvm.donothing()9499; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> [[TMP1]], <4 x i32> <i32 8, i32 9, i32 10, i32 11>9500; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <16 x i32> [[A:%.*]], <16 x i32> [[A]], <4 x i32> <i32 8, i32 9, i32 10, i32 11>9501; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>9502; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>9503; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i1> [[TMP4]], <8 x i1> [[TMP4]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>9504; CHECK-NEXT: [[EXTRACT:%.*]] = shufflevector <8 x i1> [[TMP5]], <8 x i1> [[TMP5]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>9505; CHECK-NEXT: [[TMP6:%.*]] = select <4 x i1> [[EXTRACT]], <4 x i32> [[_MSPROP]], <4 x i32> zeroinitializer9506; CHECK-NEXT: [[TMP7:%.*]] = xor <4 x i32> [[TMP3]], zeroinitializer9507; CHECK-NEXT: [[TMP8:%.*]] = or <4 x i32> [[TMP7]], [[_MSPROP]]9508; CHECK-NEXT: [[TMP9:%.*]] = or <4 x i32> [[TMP8]], zeroinitializer9509; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <4 x i1> [[_MSPROP1]], <4 x i32> [[TMP9]], <4 x i32> [[TMP6]]9510; CHECK-NEXT: [[TMP10:%.*]] = select <4 x i1> [[EXTRACT]], <4 x i32> [[TMP3]], <4 x i32> zeroinitializer9511; CHECK-NEXT: store <4 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 89512; CHECK-NEXT: ret <4 x i32> [[TMP10]]9513;9514 %res = call <4 x i32> @llvm.x86.avx512.mask.vextracti32x4.512(<16 x i32> %a, i32 2, <4 x i32> zeroinitializer, i8 %mask)9515 ret <4 x i32> %res9516}9517 9518declare <4 x i32> @llvm.x86.avx512.mask.vextracti32x4.512(<16 x i32>, i32, <4 x i32>, i8)9519 9520define <4 x double> @test_vextractf64x4(<8 x double> %a) #0 {9521; CHECK-LABEL: @test_vextractf64x4(9522; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 89523; CHECK-NEXT: call void @llvm.donothing()9524; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i64> [[TMP1]], <8 x i64> [[TMP1]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>9525; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x double> [[A:%.*]], <8 x double> [[A]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>9526; CHECK-NEXT: store <4 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 89527; CHECK-NEXT: ret <4 x double> [[TMP2]]9528;9529 %res = call <4 x double> @llvm.x86.avx512.mask.vextractf64x4.512(<8 x double> %a, i32 1, <4 x double> zeroinitializer, i8 -1)9530 ret <4 x double> %res9531}9532 9533declare <4 x double> @llvm.x86.avx512.mask.vextractf64x4.512(<8 x double>, i32, <4 x double>, i8)9534 9535declare <16 x float> @llvm.x86.avx512.mask.insertf32x4.512(<16 x float>, <4 x float>, i32, <16 x float>, i16)9536 9537define <16 x float>@test_int_x86_avx512_insertf32x4_512(<16 x float> %x0, <4 x float> %x1, <16 x float> %x3) #0 {9538; CHECK-LABEL: @test_int_x86_avx512_insertf32x4_512(9539; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 89540; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 89541; CHECK-NEXT: call void @llvm.donothing()9542; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> splat (i32 -1), <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>9543; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x float> [[X1:%.*]], <4 x float> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>9544; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <16 x i32> [[TMP2]], <16 x i32> [[_MSPROP]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9545; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <16 x float> [[X0:%.*]], <16 x float> [[TMP3]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9546; CHECK-NEXT: store <16 x i32> [[_MSPROP1]], ptr @__msan_retval_tls, align 89547; CHECK-NEXT: ret <16 x float> [[TMP4]]9548;9549 %res = call <16 x float> @llvm.x86.avx512.mask.insertf32x4.512(<16 x float> %x0, <4 x float> %x1, i32 1, <16 x float> %x3, i16 -1)9550 ret <16 x float> %res9551}9552 9553define <16 x float>@test_int_x86_avx512_mask_insertf32x4_512(<16 x float> %x0, <4 x float> %x1, <16 x float> %x3, i16 %x4) #0 {9554;9555; CHECK-LABEL: @test_int_x86_avx512_mask_insertf32x4_512(9556; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 89557; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 89558; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 89559; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 89560; CHECK-NEXT: call void @llvm.donothing()9561; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> splat (i32 -1), <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>9562; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <4 x float> [[X1:%.*]], <4 x float> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>9563; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <16 x i32> [[TMP2]], <16 x i32> [[_MSPROP]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9564; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <16 x float> [[X0:%.*]], <16 x float> [[TMP5]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9565; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>9566; CHECK-NEXT: [[TMP8:%.*]] = bitcast i16 [[X4:%.*]] to <16 x i1>9567; CHECK-NEXT: [[TMP9:%.*]] = select <16 x i1> [[TMP8]], <16 x i32> [[_MSPROP1]], <16 x i32> [[TMP4]]9568; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x float> [[TMP6]] to <16 x i32>9569; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x float> [[X3:%.*]] to <16 x i32>9570; CHECK-NEXT: [[TMP12:%.*]] = xor <16 x i32> [[TMP10]], [[TMP11]]9571; CHECK-NEXT: [[TMP13:%.*]] = or <16 x i32> [[TMP12]], [[_MSPROP1]]9572; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], [[TMP4]]9573; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP14]], <16 x i32> [[TMP9]]9574; CHECK-NEXT: [[TMP15:%.*]] = select <16 x i1> [[TMP8]], <16 x float> [[TMP6]], <16 x float> [[X3]]9575; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 89576; CHECK-NEXT: ret <16 x float> [[TMP15]]9577;9578 %res = call <16 x float> @llvm.x86.avx512.mask.insertf32x4.512(<16 x float> %x0, <4 x float> %x1, i32 1, <16 x float> %x3, i16 %x4)9579 ret <16 x float> %res9580}9581 9582define <16 x float>@test_int_x86_avx512_maskz_insertf32x4_512(<16 x float> %x0, <4 x float> %x1, i16 %x4) #0 {9583;9584; CHECK-LABEL: @test_int_x86_avx512_maskz_insertf32x4_512(9585; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 89586; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 89587; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 89588; CHECK-NEXT: call void @llvm.donothing()9589; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> splat (i32 -1), <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>9590; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[X1:%.*]], <4 x float> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>9591; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <16 x i32> [[TMP2]], <16 x i32> [[_MSPROP]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9592; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <16 x float> [[X0:%.*]], <16 x float> [[TMP4]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9593; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>9594; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[X4:%.*]] to <16 x i1>9595; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP1]], <16 x i32> zeroinitializer9596; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x float> [[TMP5]] to <16 x i32>9597; CHECK-NEXT: [[TMP10:%.*]] = xor <16 x i32> [[TMP9]], zeroinitializer9598; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[_MSPROP1]]9599; CHECK-NEXT: [[TMP12:%.*]] = or <16 x i32> [[TMP11]], zeroinitializer9600; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP12]], <16 x i32> [[TMP8]]9601; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP7]], <16 x float> [[TMP5]], <16 x float> zeroinitializer9602; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 89603; CHECK-NEXT: ret <16 x float> [[TMP13]]9604;9605 %res = call <16 x float> @llvm.x86.avx512.mask.insertf32x4.512(<16 x float> %x0, <4 x float> %x1, i32 1, <16 x float> zeroinitializer, i16 %x4)9606 ret <16 x float> %res9607}9608 9609declare <16 x i32> @llvm.x86.avx512.mask.inserti32x4.512(<16 x i32>, <4 x i32>, i32, <16 x i32>, i16)9610 9611define <16 x i32>@test_int_x86_avx512_inserti32x4_512(<16 x i32> %x0, <4 x i32> %x1, <16 x i32> %x3, i16 %x4) #0 {9612; CHECK-LABEL: @test_int_x86_avx512_inserti32x4_512(9613; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 89614; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 89615; CHECK-NEXT: call void @llvm.donothing()9616; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> splat (i32 -1), <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>9617; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x i32> [[X1:%.*]], <4 x i32> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>9618; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <16 x i32> [[TMP2]], <16 x i32> [[_MSPROP]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9619; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <16 x i32> [[X0:%.*]], <16 x i32> [[TMP3]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9620; CHECK-NEXT: store <16 x i32> [[_MSPROP1]], ptr @__msan_retval_tls, align 89621; CHECK-NEXT: ret <16 x i32> [[TMP4]]9622;9623 %res = call <16 x i32> @llvm.x86.avx512.mask.inserti32x4.512(<16 x i32> %x0, <4 x i32> %x1, i32 1, <16 x i32> %x3, i16 -1)9624 ret <16 x i32> %res9625}9626 9627define <16 x i32>@test_int_x86_avx512_mask_inserti32x4_512(<16 x i32> %x0, <4 x i32> %x1, <16 x i32> %x3, i16 %x4) #0 {9628;9629; CHECK-LABEL: @test_int_x86_avx512_mask_inserti32x4_512(9630; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 89631; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 89632; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 89633; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 89634; CHECK-NEXT: call void @llvm.donothing()9635; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> splat (i32 -1), <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>9636; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <4 x i32> [[X1:%.*]], <4 x i32> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>9637; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <16 x i32> [[TMP2]], <16 x i32> [[_MSPROP]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9638; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <16 x i32> [[X0:%.*]], <16 x i32> [[TMP5]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9639; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>9640; CHECK-NEXT: [[TMP8:%.*]] = bitcast i16 [[X4:%.*]] to <16 x i1>9641; CHECK-NEXT: [[TMP9:%.*]] = select <16 x i1> [[TMP8]], <16 x i32> [[_MSPROP1]], <16 x i32> [[TMP4]]9642; CHECK-NEXT: [[TMP10:%.*]] = xor <16 x i32> [[TMP6]], [[X3:%.*]]9643; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[_MSPROP1]]9644; CHECK-NEXT: [[TMP12:%.*]] = or <16 x i32> [[TMP11]], [[TMP4]]9645; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP12]], <16 x i32> [[TMP9]]9646; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP8]], <16 x i32> [[TMP6]], <16 x i32> [[X3]]9647; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 89648; CHECK-NEXT: ret <16 x i32> [[TMP13]]9649;9650 %res = call <16 x i32> @llvm.x86.avx512.mask.inserti32x4.512(<16 x i32> %x0, <4 x i32> %x1, i32 1, <16 x i32> %x3, i16 %x4)9651 ret <16 x i32> %res9652}9653 9654define <16 x i32>@test_int_x86_avx512_maskz_inserti32x4_512(<16 x i32> %x0, <4 x i32> %x1, i16 %x4) #0 {9655;9656; CHECK-LABEL: @test_int_x86_avx512_maskz_inserti32x4_512(9657; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 89658; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 89659; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 89660; CHECK-NEXT: call void @llvm.donothing()9661; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> splat (i32 -1), <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>9662; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x i32> [[X1:%.*]], <4 x i32> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>9663; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <16 x i32> [[TMP2]], <16 x i32> [[_MSPROP]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9664; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <16 x i32> [[X0:%.*]], <16 x i32> [[TMP4]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9665; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>9666; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[X4:%.*]] to <16 x i1>9667; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP1]], <16 x i32> zeroinitializer9668; CHECK-NEXT: [[TMP9:%.*]] = xor <16 x i32> [[TMP5]], zeroinitializer9669; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[_MSPROP1]]9670; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], zeroinitializer9671; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP11]], <16 x i32> [[TMP8]]9672; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP5]], <16 x i32> zeroinitializer9673; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 89674; CHECK-NEXT: ret <16 x i32> [[TMP12]]9675;9676 %res = call <16 x i32> @llvm.x86.avx512.mask.inserti32x4.512(<16 x i32> %x0, <4 x i32> %x1, i32 1, <16 x i32> zeroinitializer, i16 %x4)9677 ret <16 x i32> %res9678}9679 9680declare <8 x double> @llvm.x86.avx512.mask.insertf64x4.512(<8 x double>, <4 x double>, i32, <8 x double>, i8)9681 9682define <8 x double>@test_int_x86_avx512_insertf64x4_512(<8 x double> %x0, <4 x double> %x1, <8 x double> %x3) #0 {9683; CHECK-LABEL: @test_int_x86_avx512_insertf64x4_512(9684; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 89685; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 89686; CHECK-NEXT: call void @llvm.donothing()9687; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i64> [[TMP1]], <4 x i64> splat (i64 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4>9688; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x double> [[X1:%.*]], <4 x double> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4>9689; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[TMP2]], <8 x i64> [[_MSPROP]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>9690; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <8 x double> [[X0:%.*]], <8 x double> [[TMP3]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>9691; CHECK-NEXT: store <8 x i64> [[_MSPROP1]], ptr @__msan_retval_tls, align 89692; CHECK-NEXT: ret <8 x double> [[TMP4]]9693;9694 %res = call <8 x double> @llvm.x86.avx512.mask.insertf64x4.512(<8 x double> %x0, <4 x double> %x1, i32 1, <8 x double> %x3, i8 -1)9695 ret <8 x double> %res9696}9697 9698define <8 x double>@test_int_x86_avx512_mask_insertf64x4_512(<8 x double> %x0, <4 x double> %x1, <8 x double> %x3, i8 %x4) #0 {9699;9700; CHECK-LABEL: @test_int_x86_avx512_mask_insertf64x4_512(9701; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 89702; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 89703; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 160), align 89704; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 96), align 89705; CHECK-NEXT: call void @llvm.donothing()9706; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i64> [[TMP1]], <4 x i64> splat (i64 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4>9707; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <4 x double> [[X1:%.*]], <4 x double> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4>9708; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[TMP2]], <8 x i64> [[_MSPROP]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>9709; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <8 x double> [[X0:%.*]], <8 x double> [[TMP5]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>9710; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>9711; CHECK-NEXT: [[TMP8:%.*]] = bitcast i8 [[X4:%.*]] to <8 x i1>9712; CHECK-NEXT: [[TMP9:%.*]] = select <8 x i1> [[TMP8]], <8 x i64> [[_MSPROP1]], <8 x i64> [[TMP4]]9713; CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x double> [[TMP6]] to <8 x i64>9714; CHECK-NEXT: [[TMP11:%.*]] = bitcast <8 x double> [[X3:%.*]] to <8 x i64>9715; CHECK-NEXT: [[TMP12:%.*]] = xor <8 x i64> [[TMP10]], [[TMP11]]9716; CHECK-NEXT: [[TMP13:%.*]] = or <8 x i64> [[TMP12]], [[_MSPROP1]]9717; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], [[TMP4]]9718; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP14]], <8 x i64> [[TMP9]]9719; CHECK-NEXT: [[TMP15:%.*]] = select <8 x i1> [[TMP8]], <8 x double> [[TMP6]], <8 x double> [[X3]]9720; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 89721; CHECK-NEXT: ret <8 x double> [[TMP15]]9722;9723 %res = call <8 x double> @llvm.x86.avx512.mask.insertf64x4.512(<8 x double> %x0, <4 x double> %x1, i32 1, <8 x double> %x3, i8 %x4)9724 ret <8 x double> %res9725}9726 9727define <8 x double>@test_int_x86_avx512_maskz_insertf64x4_512(<8 x double> %x0, <4 x double> %x1, i8 %x4) #0 {9728;9729; CHECK-LABEL: @test_int_x86_avx512_maskz_insertf64x4_512(9730; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 89731; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 89732; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 96), align 89733; CHECK-NEXT: call void @llvm.donothing()9734; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i64> [[TMP1]], <4 x i64> splat (i64 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4>9735; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x double> [[X1:%.*]], <4 x double> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4>9736; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[TMP2]], <8 x i64> [[_MSPROP]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>9737; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <8 x double> [[X0:%.*]], <8 x double> [[TMP4]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>9738; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>9739; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[X4:%.*]] to <8 x i1>9740; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP1]], <8 x i64> zeroinitializer9741; CHECK-NEXT: [[TMP9:%.*]] = bitcast <8 x double> [[TMP5]] to <8 x i64>9742; CHECK-NEXT: [[TMP10:%.*]] = xor <8 x i64> [[TMP9]], zeroinitializer9743; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[_MSPROP1]]9744; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], zeroinitializer9745; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP12]], <8 x i64> [[TMP8]]9746; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP7]], <8 x double> [[TMP5]], <8 x double> zeroinitializer9747; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 89748; CHECK-NEXT: ret <8 x double> [[TMP13]]9749;9750 %res = call <8 x double> @llvm.x86.avx512.mask.insertf64x4.512(<8 x double> %x0, <4 x double> %x1, i32 1, <8 x double> zeroinitializer, i8 %x4)9751 ret <8 x double> %res9752}9753 9754declare <8 x i64> @llvm.x86.avx512.mask.inserti64x4.512(<8 x i64>, <4 x i64>, i32, <8 x i64>, i8)9755 9756define <8 x i64>@test_int_x86_avx512_inserti64x4_512(<8 x i64> %x0, <4 x i64> %x1, <8 x i64> %x3) #0 {9757; CHECK-LABEL: @test_int_x86_avx512_inserti64x4_512(9758; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 89759; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 89760; CHECK-NEXT: call void @llvm.donothing()9761; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i64> [[TMP1]], <4 x i64> splat (i64 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4>9762; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x i64> [[X1:%.*]], <4 x i64> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4>9763; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[TMP2]], <8 x i64> [[_MSPROP]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>9764; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <8 x i64> [[X0:%.*]], <8 x i64> [[TMP3]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>9765; CHECK-NEXT: store <8 x i64> [[_MSPROP1]], ptr @__msan_retval_tls, align 89766; CHECK-NEXT: ret <8 x i64> [[TMP4]]9767;9768 %res = call <8 x i64> @llvm.x86.avx512.mask.inserti64x4.512(<8 x i64> %x0, <4 x i64> %x1, i32 1, <8 x i64> %x3, i8 -1)9769 ret <8 x i64> %res9770}9771 9772define <8 x i64>@test_int_x86_avx512_mask_inserti64x4_512(<8 x i64> %x0, <4 x i64> %x1, <8 x i64> %x3, i8 %x4) #0 {9773;9774; CHECK-LABEL: @test_int_x86_avx512_mask_inserti64x4_512(9775; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 89776; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 89777; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 160), align 89778; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 96), align 89779; CHECK-NEXT: call void @llvm.donothing()9780; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i64> [[TMP1]], <4 x i64> splat (i64 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4>9781; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <4 x i64> [[X1:%.*]], <4 x i64> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4>9782; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[TMP2]], <8 x i64> [[_MSPROP]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>9783; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <8 x i64> [[X0:%.*]], <8 x i64> [[TMP5]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>9784; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>9785; CHECK-NEXT: [[TMP8:%.*]] = bitcast i8 [[X4:%.*]] to <8 x i1>9786; CHECK-NEXT: [[TMP9:%.*]] = select <8 x i1> [[TMP8]], <8 x i64> [[_MSPROP1]], <8 x i64> [[TMP4]]9787; CHECK-NEXT: [[TMP10:%.*]] = xor <8 x i64> [[TMP6]], [[X3:%.*]]9788; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[_MSPROP1]]9789; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], [[TMP4]]9790; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP12]], <8 x i64> [[TMP9]]9791; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP8]], <8 x i64> [[TMP6]], <8 x i64> [[X3]]9792; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 89793; CHECK-NEXT: ret <8 x i64> [[TMP13]]9794;9795 %res = call <8 x i64> @llvm.x86.avx512.mask.inserti64x4.512(<8 x i64> %x0, <4 x i64> %x1, i32 1, <8 x i64> %x3, i8 %x4)9796 ret <8 x i64> %res9797}9798 9799define <8 x i64>@test_int_x86_avx512_maskz_inserti64x4_512(<8 x i64> %x0, <4 x i64> %x1, i8 %x4) #0 {9800;9801; CHECK-LABEL: @test_int_x86_avx512_maskz_inserti64x4_512(9802; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 89803; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 89804; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 96), align 89805; CHECK-NEXT: call void @llvm.donothing()9806; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i64> [[TMP1]], <4 x i64> splat (i64 -1), <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4>9807; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x i64> [[X1:%.*]], <4 x i64> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4>9808; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[TMP2]], <8 x i64> [[_MSPROP]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>9809; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <8 x i64> [[X0:%.*]], <8 x i64> [[TMP4]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>9810; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>9811; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[X4:%.*]] to <8 x i1>9812; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP1]], <8 x i64> zeroinitializer9813; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP5]], zeroinitializer9814; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[_MSPROP1]]9815; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], zeroinitializer9816; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP11]], <8 x i64> [[TMP8]]9817; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP5]], <8 x i64> zeroinitializer9818; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 89819; CHECK-NEXT: ret <8 x i64> [[TMP12]]9820;9821 %res = call <8 x i64> @llvm.x86.avx512.mask.inserti64x4.512(<8 x i64> %x0, <4 x i64> %x1, i32 1, <8 x i64> zeroinitializer, i8 %x4)9822 ret <8 x i64> %res9823}9824 9825define <8 x i64> @test_x86_avx512_movntdqa(ptr %a0) #0 {9826;9827; CHECK-LABEL: @test_x86_avx512_movntdqa(9828; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 89829; CHECK-NEXT: call void @llvm.donothing()9830; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 09831; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF1]]9832; CHECK: 2:9833; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]9834; CHECK-NEXT: unreachable9835; CHECK: 3:9836; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr [[A0:%.*]], align 64, !nontemporal [[META2]]9837; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[A0]] to i649838; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220809839; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr9840; CHECK-NEXT: [[_MSLD:%.*]] = load <8 x i64>, ptr [[TMP7]], align 649841; CHECK-NEXT: store <8 x i64> [[_MSLD]], ptr @__msan_retval_tls, align 89842; CHECK-NEXT: ret <8 x i64> [[TMP4]]9843;9844 %res = call <8 x i64> @llvm.x86.avx512.movntdqa(ptr %a0)9845 ret <8 x i64> %res9846}9847 9848declare <8 x i64> @llvm.x86.avx512.movntdqa(ptr) nounwind readonly9849 9850define <8 x i16> @test_cmp_d_512(<16 x i32> %a0, <16 x i32> %a1, <8 x i16> %extra_param) #0 {9851; CHECK-LABEL: @test_cmp_d_512(9852; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 89853; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 89854; CHECK-NEXT: [[TMP77:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 89855; CHECK-NEXT: call void @llvm.donothing()9856; CHECK-NEXT: [[TMP3:%.*]] = xor <16 x i32> [[A0:%.*]], [[A1:%.*]]9857; CHECK-NEXT: [[TMP4:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]9858; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <16 x i32> [[TMP4]], zeroinitializer9859; CHECK-NEXT: [[TMP6:%.*]] = xor <16 x i32> [[TMP4]], splat (i32 -1)9860; CHECK-NEXT: [[TMP7:%.*]] = and <16 x i32> [[TMP6]], [[TMP3]]9861; CHECK-NEXT: [[TMP8:%.*]] = icmp eq <16 x i32> [[TMP7]], zeroinitializer9862; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <16 x i1> [[TMP5]], [[TMP8]]9863; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <16 x i32> [[A0]], [[A1]]9864; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i1> [[_MSPROP_ICMP]] to i169865; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i1> [[TMP9]] to i169866; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i16> [[TMP77]], i16 [[TMP10]], i32 09867; CHECK-NEXT: [[VEC0:%.*]] = insertelement <8 x i16> [[EXTRA_PARAM:%.*]], i16 [[TMP11]], i32 09868; CHECK-NEXT: [[TMP12:%.*]] = xor <16 x i32> [[A0]], splat (i32 -2147483648)9869; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i32> [[TMP1]], splat (i32 -1)9870; CHECK-NEXT: [[TMP14:%.*]] = and <16 x i32> [[TMP12]], [[TMP13]]9871; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP12]], [[TMP1]]9872; CHECK-NEXT: [[TMP16:%.*]] = xor <16 x i32> [[A1]], splat (i32 -2147483648)9873; CHECK-NEXT: [[TMP17:%.*]] = xor <16 x i32> [[TMP2]], splat (i32 -1)9874; CHECK-NEXT: [[TMP18:%.*]] = and <16 x i32> [[TMP16]], [[TMP17]]9875; CHECK-NEXT: [[TMP19:%.*]] = or <16 x i32> [[TMP16]], [[TMP2]]9876; CHECK-NEXT: [[TMP20:%.*]] = icmp ult <16 x i32> [[TMP14]], [[TMP19]]9877; CHECK-NEXT: [[TMP21:%.*]] = icmp ult <16 x i32> [[TMP15]], [[TMP18]]9878; CHECK-NEXT: [[TMP22:%.*]] = xor <16 x i1> [[TMP20]], [[TMP21]]9879; CHECK-NEXT: [[TMP23:%.*]] = icmp slt <16 x i32> [[A0]], [[A1]]9880; CHECK-NEXT: [[TMP24:%.*]] = bitcast <16 x i1> [[TMP22]] to i169881; CHECK-NEXT: [[TMP25:%.*]] = bitcast <16 x i1> [[TMP23]] to i169882; CHECK-NEXT: [[_MSPROP1:%.*]] = insertelement <8 x i16> [[_MSPROP]], i16 [[TMP24]], i32 19883; CHECK-NEXT: [[VEC1:%.*]] = insertelement <8 x i16> [[VEC0]], i16 [[TMP25]], i32 19884; CHECK-NEXT: [[TMP26:%.*]] = xor <16 x i32> [[A0]], splat (i32 -2147483648)9885; CHECK-NEXT: [[TMP27:%.*]] = xor <16 x i32> [[TMP1]], splat (i32 -1)9886; CHECK-NEXT: [[TMP28:%.*]] = and <16 x i32> [[TMP26]], [[TMP27]]9887; CHECK-NEXT: [[TMP29:%.*]] = or <16 x i32> [[TMP26]], [[TMP1]]9888; CHECK-NEXT: [[TMP30:%.*]] = xor <16 x i32> [[A1]], splat (i32 -2147483648)9889; CHECK-NEXT: [[TMP31:%.*]] = xor <16 x i32> [[TMP2]], splat (i32 -1)9890; CHECK-NEXT: [[TMP32:%.*]] = and <16 x i32> [[TMP30]], [[TMP31]]9891; CHECK-NEXT: [[TMP33:%.*]] = or <16 x i32> [[TMP30]], [[TMP2]]9892; CHECK-NEXT: [[TMP34:%.*]] = icmp ule <16 x i32> [[TMP28]], [[TMP33]]9893; CHECK-NEXT: [[TMP35:%.*]] = icmp ule <16 x i32> [[TMP29]], [[TMP32]]9894; CHECK-NEXT: [[TMP36:%.*]] = xor <16 x i1> [[TMP34]], [[TMP35]]9895; CHECK-NEXT: [[TMP37:%.*]] = icmp sle <16 x i32> [[A0]], [[A1]]9896; CHECK-NEXT: [[TMP38:%.*]] = bitcast <16 x i1> [[TMP36]] to i169897; CHECK-NEXT: [[TMP39:%.*]] = bitcast <16 x i1> [[TMP37]] to i169898; CHECK-NEXT: [[_MSPROP2:%.*]] = insertelement <8 x i16> [[_MSPROP1]], i16 [[TMP38]], i32 29899; CHECK-NEXT: [[VEC2:%.*]] = insertelement <8 x i16> [[VEC1]], i16 [[TMP39]], i32 29900; CHECK-NEXT: [[_MSPROP3:%.*]] = insertelement <8 x i16> [[_MSPROP2]], i16 0, i32 39901; CHECK-NEXT: [[VEC3:%.*]] = insertelement <8 x i16> [[VEC2]], i16 0, i32 39902; CHECK-NEXT: [[TMP40:%.*]] = xor <16 x i32> [[A0]], [[A1]]9903; CHECK-NEXT: [[TMP41:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]9904; CHECK-NEXT: [[TMP42:%.*]] = icmp ne <16 x i32> [[TMP41]], zeroinitializer9905; CHECK-NEXT: [[TMP43:%.*]] = xor <16 x i32> [[TMP41]], splat (i32 -1)9906; CHECK-NEXT: [[TMP44:%.*]] = and <16 x i32> [[TMP43]], [[TMP40]]9907; CHECK-NEXT: [[TMP45:%.*]] = icmp eq <16 x i32> [[TMP44]], zeroinitializer9908; CHECK-NEXT: [[_MSPROP_ICMP4:%.*]] = and <16 x i1> [[TMP42]], [[TMP45]]9909; CHECK-NEXT: [[TMP46:%.*]] = icmp ne <16 x i32> [[A0]], [[A1]]9910; CHECK-NEXT: [[TMP47:%.*]] = bitcast <16 x i1> [[_MSPROP_ICMP4]] to i169911; CHECK-NEXT: [[TMP48:%.*]] = bitcast <16 x i1> [[TMP46]] to i169912; CHECK-NEXT: [[_MSPROP5:%.*]] = insertelement <8 x i16> [[_MSPROP3]], i16 [[TMP47]], i32 49913; CHECK-NEXT: [[VEC4:%.*]] = insertelement <8 x i16> [[VEC3]], i16 [[TMP48]], i32 49914; CHECK-NEXT: [[TMP49:%.*]] = xor <16 x i32> [[A0]], splat (i32 -2147483648)9915; CHECK-NEXT: [[TMP50:%.*]] = xor <16 x i32> [[TMP1]], splat (i32 -1)9916; CHECK-NEXT: [[TMP51:%.*]] = and <16 x i32> [[TMP49]], [[TMP50]]9917; CHECK-NEXT: [[TMP52:%.*]] = or <16 x i32> [[TMP49]], [[TMP1]]9918; CHECK-NEXT: [[TMP53:%.*]] = xor <16 x i32> [[A1]], splat (i32 -2147483648)9919; CHECK-NEXT: [[TMP54:%.*]] = xor <16 x i32> [[TMP2]], splat (i32 -1)9920; CHECK-NEXT: [[TMP55:%.*]] = and <16 x i32> [[TMP53]], [[TMP54]]9921; CHECK-NEXT: [[TMP56:%.*]] = or <16 x i32> [[TMP53]], [[TMP2]]9922; CHECK-NEXT: [[TMP57:%.*]] = icmp uge <16 x i32> [[TMP51]], [[TMP56]]9923; CHECK-NEXT: [[TMP58:%.*]] = icmp uge <16 x i32> [[TMP52]], [[TMP55]]9924; CHECK-NEXT: [[TMP59:%.*]] = xor <16 x i1> [[TMP57]], [[TMP58]]9925; CHECK-NEXT: [[TMP60:%.*]] = icmp sge <16 x i32> [[A0]], [[A1]]9926; CHECK-NEXT: [[TMP61:%.*]] = bitcast <16 x i1> [[TMP59]] to i169927; CHECK-NEXT: [[TMP62:%.*]] = bitcast <16 x i1> [[TMP60]] to i169928; CHECK-NEXT: [[_MSPROP6:%.*]] = insertelement <8 x i16> [[_MSPROP5]], i16 [[TMP61]], i32 59929; CHECK-NEXT: [[VEC5:%.*]] = insertelement <8 x i16> [[VEC4]], i16 [[TMP62]], i32 59930; CHECK-NEXT: [[TMP63:%.*]] = xor <16 x i32> [[A0]], splat (i32 -2147483648)9931; CHECK-NEXT: [[TMP64:%.*]] = xor <16 x i32> [[TMP1]], splat (i32 -1)9932; CHECK-NEXT: [[TMP65:%.*]] = and <16 x i32> [[TMP63]], [[TMP64]]9933; CHECK-NEXT: [[TMP66:%.*]] = or <16 x i32> [[TMP63]], [[TMP1]]9934; CHECK-NEXT: [[TMP67:%.*]] = xor <16 x i32> [[A1]], splat (i32 -2147483648)9935; CHECK-NEXT: [[TMP68:%.*]] = xor <16 x i32> [[TMP2]], splat (i32 -1)9936; CHECK-NEXT: [[TMP69:%.*]] = and <16 x i32> [[TMP67]], [[TMP68]]9937; CHECK-NEXT: [[TMP70:%.*]] = or <16 x i32> [[TMP67]], [[TMP2]]9938; CHECK-NEXT: [[TMP71:%.*]] = icmp ugt <16 x i32> [[TMP65]], [[TMP70]]9939; CHECK-NEXT: [[TMP72:%.*]] = icmp ugt <16 x i32> [[TMP66]], [[TMP69]]9940; CHECK-NEXT: [[TMP73:%.*]] = xor <16 x i1> [[TMP71]], [[TMP72]]9941; CHECK-NEXT: [[TMP74:%.*]] = icmp sgt <16 x i32> [[A0]], [[A1]]9942; CHECK-NEXT: [[TMP75:%.*]] = bitcast <16 x i1> [[TMP73]] to i169943; CHECK-NEXT: [[TMP76:%.*]] = bitcast <16 x i1> [[TMP74]] to i169944; CHECK-NEXT: [[_MSPROP7:%.*]] = insertelement <8 x i16> [[_MSPROP6]], i16 [[TMP75]], i32 69945; CHECK-NEXT: [[VEC6:%.*]] = insertelement <8 x i16> [[VEC5]], i16 [[TMP76]], i32 69946; CHECK-NEXT: [[_MSPROP8:%.*]] = insertelement <8 x i16> [[_MSPROP7]], i16 0, i32 79947; CHECK-NEXT: [[VEC7:%.*]] = insertelement <8 x i16> [[VEC6]], i16 -1, i32 79948; CHECK-NEXT: store <8 x i16> [[_MSPROP8]], ptr @__msan_retval_tls, align 89949; CHECK-NEXT: ret <8 x i16> [[VEC7]]9950;9951 %res0 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 0, i16 -1)9952 %vec0 = insertelement <8 x i16> %extra_param, i16 %res0, i32 09953 %res1 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 1, i16 -1)9954 %vec1 = insertelement <8 x i16> %vec0, i16 %res1, i32 19955 %res2 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 2, i16 -1)9956 %vec2 = insertelement <8 x i16> %vec1, i16 %res2, i32 29957 %res3 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 3, i16 -1)9958 %vec3 = insertelement <8 x i16> %vec2, i16 %res3, i32 39959 %res4 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 4, i16 -1)9960 %vec4 = insertelement <8 x i16> %vec3, i16 %res4, i32 49961 %res5 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 5, i16 -1)9962 %vec5 = insertelement <8 x i16> %vec4, i16 %res5, i32 59963 %res6 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 6, i16 -1)9964 %vec6 = insertelement <8 x i16> %vec5, i16 %res6, i32 69965 %res7 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 7, i16 -1)9966 %vec7 = insertelement <8 x i16> %vec6, i16 %res7, i32 79967 ret <8 x i16> %vec79968}9969 9970define <8 x i16> @test_mask_cmp_d_512(<16 x i32> %a0, <16 x i32> %a1, i16 %mask, <8 x i16> %extra_param) #0 {9971;9972; CHECK-LABEL: @test_mask_cmp_d_512(9973; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 89974; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 89975; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 89976; CHECK-NEXT: [[TMP146:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 89977; CHECK-NEXT: call void @llvm.donothing()9978; CHECK-NEXT: [[TMP4:%.*]] = xor <16 x i32> [[A0:%.*]], [[A1:%.*]]9979; CHECK-NEXT: [[TMP5:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]9980; CHECK-NEXT: [[TMP6:%.*]] = icmp ne <16 x i32> [[TMP5]], zeroinitializer9981; CHECK-NEXT: [[TMP7:%.*]] = xor <16 x i32> [[TMP5]], splat (i32 -1)9982; CHECK-NEXT: [[TMP8:%.*]] = and <16 x i32> [[TMP7]], [[TMP4]]9983; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <16 x i32> [[TMP8]], zeroinitializer9984; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <16 x i1> [[TMP6]], [[TMP9]]9985; CHECK-NEXT: [[TMP10:%.*]] = icmp eq <16 x i32> [[A0]], [[A1]]9986; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>9987; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>9988; CHECK-NEXT: [[TMP13:%.*]] = and <16 x i1> [[_MSPROP_ICMP]], [[TMP11]]9989; CHECK-NEXT: [[TMP14:%.*]] = and <16 x i1> [[TMP10]], [[TMP11]]9990; CHECK-NEXT: [[TMP15:%.*]] = and <16 x i1> [[_MSPROP_ICMP]], [[TMP12]]9991; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i1> [[TMP13]], [[TMP14]]9992; CHECK-NEXT: [[TMP17:%.*]] = or <16 x i1> [[TMP16]], [[TMP15]]9993; CHECK-NEXT: [[TMP18:%.*]] = and <16 x i1> [[TMP10]], [[TMP12]]9994; CHECK-NEXT: [[TMP19:%.*]] = bitcast <16 x i1> [[TMP17]] to i169995; CHECK-NEXT: [[TMP20:%.*]] = bitcast <16 x i1> [[TMP18]] to i169996; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i16> [[TMP146]], i16 [[TMP19]], i32 09997; CHECK-NEXT: [[VEC0:%.*]] = insertelement <8 x i16> [[EXTRA_PARAM:%.*]], i16 [[TMP20]], i32 09998; CHECK-NEXT: [[TMP21:%.*]] = xor <16 x i32> [[A0]], splat (i32 -2147483648)9999; CHECK-NEXT: [[TMP22:%.*]] = xor <16 x i32> [[TMP1]], splat (i32 -1)10000; CHECK-NEXT: [[TMP23:%.*]] = and <16 x i32> [[TMP21]], [[TMP22]]10001; CHECK-NEXT: [[TMP24:%.*]] = or <16 x i32> [[TMP21]], [[TMP1]]10002; CHECK-NEXT: [[TMP25:%.*]] = xor <16 x i32> [[A1]], splat (i32 -2147483648)10003; CHECK-NEXT: [[TMP26:%.*]] = xor <16 x i32> [[TMP2]], splat (i32 -1)10004; CHECK-NEXT: [[TMP27:%.*]] = and <16 x i32> [[TMP25]], [[TMP26]]10005; CHECK-NEXT: [[TMP28:%.*]] = or <16 x i32> [[TMP25]], [[TMP2]]10006; CHECK-NEXT: [[TMP29:%.*]] = icmp ult <16 x i32> [[TMP23]], [[TMP28]]10007; CHECK-NEXT: [[TMP30:%.*]] = icmp ult <16 x i32> [[TMP24]], [[TMP27]]10008; CHECK-NEXT: [[TMP31:%.*]] = xor <16 x i1> [[TMP29]], [[TMP30]]10009; CHECK-NEXT: [[TMP32:%.*]] = icmp slt <16 x i32> [[A0]], [[A1]]10010; CHECK-NEXT: [[TMP33:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>10011; CHECK-NEXT: [[TMP34:%.*]] = bitcast i16 [[MASK]] to <16 x i1>10012; CHECK-NEXT: [[TMP35:%.*]] = and <16 x i1> [[TMP31]], [[TMP33]]10013; CHECK-NEXT: [[TMP36:%.*]] = and <16 x i1> [[TMP32]], [[TMP33]]10014; CHECK-NEXT: [[TMP37:%.*]] = and <16 x i1> [[TMP31]], [[TMP34]]10015; CHECK-NEXT: [[TMP38:%.*]] = or <16 x i1> [[TMP35]], [[TMP36]]10016; CHECK-NEXT: [[TMP39:%.*]] = or <16 x i1> [[TMP38]], [[TMP37]]10017; CHECK-NEXT: [[TMP40:%.*]] = and <16 x i1> [[TMP32]], [[TMP34]]10018; CHECK-NEXT: [[TMP41:%.*]] = bitcast <16 x i1> [[TMP39]] to i1610019; CHECK-NEXT: [[TMP42:%.*]] = bitcast <16 x i1> [[TMP40]] to i1610020; CHECK-NEXT: [[_MSPROP1:%.*]] = insertelement <8 x i16> [[_MSPROP]], i16 [[TMP41]], i32 110021; CHECK-NEXT: [[VEC1:%.*]] = insertelement <8 x i16> [[VEC0]], i16 [[TMP42]], i32 110022; CHECK-NEXT: [[TMP43:%.*]] = xor <16 x i32> [[A0]], splat (i32 -2147483648)10023; CHECK-NEXT: [[TMP44:%.*]] = xor <16 x i32> [[TMP1]], splat (i32 -1)10024; CHECK-NEXT: [[TMP45:%.*]] = and <16 x i32> [[TMP43]], [[TMP44]]10025; CHECK-NEXT: [[TMP46:%.*]] = or <16 x i32> [[TMP43]], [[TMP1]]10026; CHECK-NEXT: [[TMP47:%.*]] = xor <16 x i32> [[A1]], splat (i32 -2147483648)10027; CHECK-NEXT: [[TMP48:%.*]] = xor <16 x i32> [[TMP2]], splat (i32 -1)10028; CHECK-NEXT: [[TMP49:%.*]] = and <16 x i32> [[TMP47]], [[TMP48]]10029; CHECK-NEXT: [[TMP50:%.*]] = or <16 x i32> [[TMP47]], [[TMP2]]10030; CHECK-NEXT: [[TMP51:%.*]] = icmp ule <16 x i32> [[TMP45]], [[TMP50]]10031; CHECK-NEXT: [[TMP52:%.*]] = icmp ule <16 x i32> [[TMP46]], [[TMP49]]10032; CHECK-NEXT: [[TMP53:%.*]] = xor <16 x i1> [[TMP51]], [[TMP52]]10033; CHECK-NEXT: [[TMP54:%.*]] = icmp sle <16 x i32> [[A0]], [[A1]]10034; CHECK-NEXT: [[TMP55:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>10035; CHECK-NEXT: [[TMP56:%.*]] = bitcast i16 [[MASK]] to <16 x i1>10036; CHECK-NEXT: [[TMP57:%.*]] = and <16 x i1> [[TMP53]], [[TMP55]]10037; CHECK-NEXT: [[TMP58:%.*]] = and <16 x i1> [[TMP54]], [[TMP55]]10038; CHECK-NEXT: [[TMP59:%.*]] = and <16 x i1> [[TMP53]], [[TMP56]]10039; CHECK-NEXT: [[TMP60:%.*]] = or <16 x i1> [[TMP57]], [[TMP58]]10040; CHECK-NEXT: [[TMP61:%.*]] = or <16 x i1> [[TMP60]], [[TMP59]]10041; CHECK-NEXT: [[TMP62:%.*]] = and <16 x i1> [[TMP54]], [[TMP56]]10042; CHECK-NEXT: [[TMP63:%.*]] = bitcast <16 x i1> [[TMP61]] to i1610043; CHECK-NEXT: [[TMP64:%.*]] = bitcast <16 x i1> [[TMP62]] to i1610044; CHECK-NEXT: [[_MSPROP2:%.*]] = insertelement <8 x i16> [[_MSPROP1]], i16 [[TMP63]], i32 210045; CHECK-NEXT: [[VEC2:%.*]] = insertelement <8 x i16> [[VEC1]], i16 [[TMP64]], i32 210046; CHECK-NEXT: [[TMP65:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>10047; CHECK-NEXT: [[TMP66:%.*]] = bitcast i16 [[MASK]] to <16 x i1>10048; CHECK-NEXT: [[TMP67:%.*]] = and <16 x i1> zeroinitializer, [[TMP65]]10049; CHECK-NEXT: [[TMP68:%.*]] = and <16 x i1> zeroinitializer, [[TMP65]]10050; CHECK-NEXT: [[TMP69:%.*]] = and <16 x i1> zeroinitializer, [[TMP66]]10051; CHECK-NEXT: [[TMP70:%.*]] = or <16 x i1> [[TMP67]], [[TMP68]]10052; CHECK-NEXT: [[TMP71:%.*]] = or <16 x i1> [[TMP70]], [[TMP69]]10053; CHECK-NEXT: [[TMP72:%.*]] = and <16 x i1> zeroinitializer, [[TMP66]]10054; CHECK-NEXT: [[TMP73:%.*]] = bitcast <16 x i1> [[TMP71]] to i1610055; CHECK-NEXT: [[TMP74:%.*]] = bitcast <16 x i1> [[TMP72]] to i1610056; CHECK-NEXT: [[_MSPROP3:%.*]] = insertelement <8 x i16> [[_MSPROP2]], i16 [[TMP73]], i32 310057; CHECK-NEXT: [[VEC3:%.*]] = insertelement <8 x i16> [[VEC2]], i16 [[TMP74]], i32 310058; CHECK-NEXT: [[TMP75:%.*]] = xor <16 x i32> [[A0]], [[A1]]10059; CHECK-NEXT: [[TMP76:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]10060; CHECK-NEXT: [[TMP77:%.*]] = icmp ne <16 x i32> [[TMP76]], zeroinitializer10061; CHECK-NEXT: [[TMP78:%.*]] = xor <16 x i32> [[TMP76]], splat (i32 -1)10062; CHECK-NEXT: [[TMP79:%.*]] = and <16 x i32> [[TMP78]], [[TMP75]]10063; CHECK-NEXT: [[TMP80:%.*]] = icmp eq <16 x i32> [[TMP79]], zeroinitializer10064; CHECK-NEXT: [[_MSPROP_ICMP4:%.*]] = and <16 x i1> [[TMP77]], [[TMP80]]10065; CHECK-NEXT: [[TMP81:%.*]] = icmp ne <16 x i32> [[A0]], [[A1]]10066; CHECK-NEXT: [[TMP82:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>10067; CHECK-NEXT: [[TMP83:%.*]] = bitcast i16 [[MASK]] to <16 x i1>10068; CHECK-NEXT: [[TMP84:%.*]] = and <16 x i1> [[_MSPROP_ICMP4]], [[TMP82]]10069; CHECK-NEXT: [[TMP85:%.*]] = and <16 x i1> [[TMP81]], [[TMP82]]10070; CHECK-NEXT: [[TMP86:%.*]] = and <16 x i1> [[_MSPROP_ICMP4]], [[TMP83]]10071; CHECK-NEXT: [[TMP87:%.*]] = or <16 x i1> [[TMP84]], [[TMP85]]10072; CHECK-NEXT: [[TMP88:%.*]] = or <16 x i1> [[TMP87]], [[TMP86]]10073; CHECK-NEXT: [[TMP89:%.*]] = and <16 x i1> [[TMP81]], [[TMP83]]10074; CHECK-NEXT: [[TMP90:%.*]] = bitcast <16 x i1> [[TMP88]] to i1610075; CHECK-NEXT: [[TMP91:%.*]] = bitcast <16 x i1> [[TMP89]] to i1610076; CHECK-NEXT: [[_MSPROP5:%.*]] = insertelement <8 x i16> [[_MSPROP3]], i16 [[TMP90]], i32 410077; CHECK-NEXT: [[VEC4:%.*]] = insertelement <8 x i16> [[VEC3]], i16 [[TMP91]], i32 410078; CHECK-NEXT: [[TMP92:%.*]] = xor <16 x i32> [[A0]], splat (i32 -2147483648)10079; CHECK-NEXT: [[TMP93:%.*]] = xor <16 x i32> [[TMP1]], splat (i32 -1)10080; CHECK-NEXT: [[TMP94:%.*]] = and <16 x i32> [[TMP92]], [[TMP93]]10081; CHECK-NEXT: [[TMP95:%.*]] = or <16 x i32> [[TMP92]], [[TMP1]]10082; CHECK-NEXT: [[TMP96:%.*]] = xor <16 x i32> [[A1]], splat (i32 -2147483648)10083; CHECK-NEXT: [[TMP97:%.*]] = xor <16 x i32> [[TMP2]], splat (i32 -1)10084; CHECK-NEXT: [[TMP98:%.*]] = and <16 x i32> [[TMP96]], [[TMP97]]10085; CHECK-NEXT: [[TMP99:%.*]] = or <16 x i32> [[TMP96]], [[TMP2]]10086; CHECK-NEXT: [[TMP100:%.*]] = icmp uge <16 x i32> [[TMP94]], [[TMP99]]10087; CHECK-NEXT: [[TMP101:%.*]] = icmp uge <16 x i32> [[TMP95]], [[TMP98]]10088; CHECK-NEXT: [[TMP102:%.*]] = xor <16 x i1> [[TMP100]], [[TMP101]]10089; CHECK-NEXT: [[TMP103:%.*]] = icmp sge <16 x i32> [[A0]], [[A1]]10090; CHECK-NEXT: [[TMP104:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>10091; CHECK-NEXT: [[TMP105:%.*]] = bitcast i16 [[MASK]] to <16 x i1>10092; CHECK-NEXT: [[TMP106:%.*]] = and <16 x i1> [[TMP102]], [[TMP104]]10093; CHECK-NEXT: [[TMP107:%.*]] = and <16 x i1> [[TMP103]], [[TMP104]]10094; CHECK-NEXT: [[TMP108:%.*]] = and <16 x i1> [[TMP102]], [[TMP105]]10095; CHECK-NEXT: [[TMP109:%.*]] = or <16 x i1> [[TMP106]], [[TMP107]]10096; CHECK-NEXT: [[TMP110:%.*]] = or <16 x i1> [[TMP109]], [[TMP108]]10097; CHECK-NEXT: [[TMP111:%.*]] = and <16 x i1> [[TMP103]], [[TMP105]]10098; CHECK-NEXT: [[TMP112:%.*]] = bitcast <16 x i1> [[TMP110]] to i1610099; CHECK-NEXT: [[TMP113:%.*]] = bitcast <16 x i1> [[TMP111]] to i1610100; CHECK-NEXT: [[_MSPROP6:%.*]] = insertelement <8 x i16> [[_MSPROP5]], i16 [[TMP112]], i32 510101; CHECK-NEXT: [[VEC5:%.*]] = insertelement <8 x i16> [[VEC4]], i16 [[TMP113]], i32 510102; CHECK-NEXT: [[TMP114:%.*]] = xor <16 x i32> [[A0]], splat (i32 -2147483648)10103; CHECK-NEXT: [[TMP115:%.*]] = xor <16 x i32> [[TMP1]], splat (i32 -1)10104; CHECK-NEXT: [[TMP116:%.*]] = and <16 x i32> [[TMP114]], [[TMP115]]10105; CHECK-NEXT: [[TMP117:%.*]] = or <16 x i32> [[TMP114]], [[TMP1]]10106; CHECK-NEXT: [[TMP118:%.*]] = xor <16 x i32> [[A1]], splat (i32 -2147483648)10107; CHECK-NEXT: [[TMP119:%.*]] = xor <16 x i32> [[TMP2]], splat (i32 -1)10108; CHECK-NEXT: [[TMP120:%.*]] = and <16 x i32> [[TMP118]], [[TMP119]]10109; CHECK-NEXT: [[TMP121:%.*]] = or <16 x i32> [[TMP118]], [[TMP2]]10110; CHECK-NEXT: [[TMP122:%.*]] = icmp ugt <16 x i32> [[TMP116]], [[TMP121]]10111; CHECK-NEXT: [[TMP123:%.*]] = icmp ugt <16 x i32> [[TMP117]], [[TMP120]]10112; CHECK-NEXT: [[TMP124:%.*]] = xor <16 x i1> [[TMP122]], [[TMP123]]10113; CHECK-NEXT: [[TMP125:%.*]] = icmp sgt <16 x i32> [[A0]], [[A1]]10114; CHECK-NEXT: [[TMP126:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>10115; CHECK-NEXT: [[TMP127:%.*]] = bitcast i16 [[MASK]] to <16 x i1>10116; CHECK-NEXT: [[TMP128:%.*]] = and <16 x i1> [[TMP124]], [[TMP126]]10117; CHECK-NEXT: [[TMP129:%.*]] = and <16 x i1> [[TMP125]], [[TMP126]]10118; CHECK-NEXT: [[TMP130:%.*]] = and <16 x i1> [[TMP124]], [[TMP127]]10119; CHECK-NEXT: [[TMP131:%.*]] = or <16 x i1> [[TMP128]], [[TMP129]]10120; CHECK-NEXT: [[TMP132:%.*]] = or <16 x i1> [[TMP131]], [[TMP130]]10121; CHECK-NEXT: [[TMP133:%.*]] = and <16 x i1> [[TMP125]], [[TMP127]]10122; CHECK-NEXT: [[TMP134:%.*]] = bitcast <16 x i1> [[TMP132]] to i1610123; CHECK-NEXT: [[TMP135:%.*]] = bitcast <16 x i1> [[TMP133]] to i1610124; CHECK-NEXT: [[_MSPROP7:%.*]] = insertelement <8 x i16> [[_MSPROP6]], i16 [[TMP134]], i32 610125; CHECK-NEXT: [[VEC6:%.*]] = insertelement <8 x i16> [[VEC5]], i16 [[TMP135]], i32 610126; CHECK-NEXT: [[TMP136:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>10127; CHECK-NEXT: [[TMP137:%.*]] = bitcast i16 [[MASK]] to <16 x i1>10128; CHECK-NEXT: [[TMP138:%.*]] = and <16 x i1> zeroinitializer, [[TMP136]]10129; CHECK-NEXT: [[TMP139:%.*]] = and <16 x i1> splat (i1 true), [[TMP136]]10130; CHECK-NEXT: [[TMP140:%.*]] = and <16 x i1> zeroinitializer, [[TMP137]]10131; CHECK-NEXT: [[TMP141:%.*]] = or <16 x i1> [[TMP138]], [[TMP139]]10132; CHECK-NEXT: [[TMP142:%.*]] = or <16 x i1> [[TMP141]], [[TMP140]]10133; CHECK-NEXT: [[TMP143:%.*]] = and <16 x i1> splat (i1 true), [[TMP137]]10134; CHECK-NEXT: [[TMP144:%.*]] = bitcast <16 x i1> [[TMP142]] to i1610135; CHECK-NEXT: [[TMP145:%.*]] = bitcast <16 x i1> [[TMP143]] to i1610136; CHECK-NEXT: [[_MSPROP8:%.*]] = insertelement <8 x i16> [[_MSPROP7]], i16 [[TMP144]], i32 710137; CHECK-NEXT: [[VEC7:%.*]] = insertelement <8 x i16> [[VEC6]], i16 [[TMP145]], i32 710138; CHECK-NEXT: store <8 x i16> [[_MSPROP8]], ptr @__msan_retval_tls, align 810139; CHECK-NEXT: ret <8 x i16> [[VEC7]]10140;10141 %res0 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 0, i16 %mask)10142 %vec0 = insertelement <8 x i16> %extra_param, i16 %res0, i32 010143 %res1 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 1, i16 %mask)10144 %vec1 = insertelement <8 x i16> %vec0, i16 %res1, i32 110145 %res2 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 2, i16 %mask)10146 %vec2 = insertelement <8 x i16> %vec1, i16 %res2, i32 210147 %res3 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 3, i16 %mask)10148 %vec3 = insertelement <8 x i16> %vec2, i16 %res3, i32 310149 %res4 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 4, i16 %mask)10150 %vec4 = insertelement <8 x i16> %vec3, i16 %res4, i32 410151 %res5 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 5, i16 %mask)10152 %vec5 = insertelement <8 x i16> %vec4, i16 %res5, i32 510153 %res6 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 6, i16 %mask)10154 %vec6 = insertelement <8 x i16> %vec5, i16 %res6, i32 610155 %res7 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 7, i16 %mask)10156 %vec7 = insertelement <8 x i16> %vec6, i16 %res7, i32 710157 ret <8 x i16> %vec710158}10159 10160declare i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32>, <16 x i32>, i32, i16) nounwind readnone10161 10162define <8 x i16> @test_ucmp_d_512(<16 x i32> %a0, <16 x i32> %a1, <8 x i16> %extra_param) #0 {10163; CHECK-LABEL: @test_ucmp_d_512(10164; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 810165; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 810166; CHECK-NEXT: [[TMP69:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 810167; CHECK-NEXT: call void @llvm.donothing()10168; CHECK-NEXT: [[TMP3:%.*]] = xor <16 x i32> [[A0:%.*]], [[A1:%.*]]10169; CHECK-NEXT: [[TMP4:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]10170; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <16 x i32> [[TMP4]], zeroinitializer10171; CHECK-NEXT: [[TMP6:%.*]] = xor <16 x i32> [[TMP4]], splat (i32 -1)10172; CHECK-NEXT: [[TMP7:%.*]] = and <16 x i32> [[TMP6]], [[TMP3]]10173; CHECK-NEXT: [[TMP8:%.*]] = icmp eq <16 x i32> [[TMP7]], zeroinitializer10174; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <16 x i1> [[TMP5]], [[TMP8]]10175; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <16 x i32> [[A0]], [[A1]]10176; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i1> [[_MSPROP_ICMP]] to i1610177; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i1> [[TMP9]] to i1610178; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i16> [[TMP69]], i16 [[TMP10]], i32 010179; CHECK-NEXT: [[VEC0:%.*]] = insertelement <8 x i16> [[EXTRA_PARAM:%.*]], i16 [[TMP11]], i32 010180; CHECK-NEXT: [[TMP12:%.*]] = xor <16 x i32> [[TMP1]], splat (i32 -1)10181; CHECK-NEXT: [[TMP13:%.*]] = and <16 x i32> [[A0]], [[TMP12]]10182; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[A0]], [[TMP1]]10183; CHECK-NEXT: [[TMP15:%.*]] = xor <16 x i32> [[TMP2]], splat (i32 -1)10184; CHECK-NEXT: [[TMP16:%.*]] = and <16 x i32> [[A1]], [[TMP15]]10185; CHECK-NEXT: [[TMP17:%.*]] = or <16 x i32> [[A1]], [[TMP2]]10186; CHECK-NEXT: [[TMP18:%.*]] = icmp ult <16 x i32> [[TMP13]], [[TMP17]]10187; CHECK-NEXT: [[TMP19:%.*]] = icmp ult <16 x i32> [[TMP14]], [[TMP16]]10188; CHECK-NEXT: [[TMP20:%.*]] = xor <16 x i1> [[TMP18]], [[TMP19]]10189; CHECK-NEXT: [[TMP21:%.*]] = icmp ult <16 x i32> [[A0]], [[A1]]10190; CHECK-NEXT: [[TMP22:%.*]] = bitcast <16 x i1> [[TMP20]] to i1610191; CHECK-NEXT: [[TMP23:%.*]] = bitcast <16 x i1> [[TMP21]] to i1610192; CHECK-NEXT: [[_MSPROP1:%.*]] = insertelement <8 x i16> [[_MSPROP]], i16 [[TMP22]], i32 110193; CHECK-NEXT: [[VEC1:%.*]] = insertelement <8 x i16> [[VEC0]], i16 [[TMP23]], i32 110194; CHECK-NEXT: [[TMP24:%.*]] = xor <16 x i32> [[TMP1]], splat (i32 -1)10195; CHECK-NEXT: [[TMP25:%.*]] = and <16 x i32> [[A0]], [[TMP24]]10196; CHECK-NEXT: [[TMP26:%.*]] = or <16 x i32> [[A0]], [[TMP1]]10197; CHECK-NEXT: [[TMP27:%.*]] = xor <16 x i32> [[TMP2]], splat (i32 -1)10198; CHECK-NEXT: [[TMP28:%.*]] = and <16 x i32> [[A1]], [[TMP27]]10199; CHECK-NEXT: [[TMP29:%.*]] = or <16 x i32> [[A1]], [[TMP2]]10200; CHECK-NEXT: [[TMP30:%.*]] = icmp ule <16 x i32> [[TMP25]], [[TMP29]]10201; CHECK-NEXT: [[TMP31:%.*]] = icmp ule <16 x i32> [[TMP26]], [[TMP28]]10202; CHECK-NEXT: [[TMP32:%.*]] = xor <16 x i1> [[TMP30]], [[TMP31]]10203; CHECK-NEXT: [[TMP33:%.*]] = icmp ule <16 x i32> [[A0]], [[A1]]10204; CHECK-NEXT: [[TMP34:%.*]] = bitcast <16 x i1> [[TMP32]] to i1610205; CHECK-NEXT: [[TMP35:%.*]] = bitcast <16 x i1> [[TMP33]] to i1610206; CHECK-NEXT: [[_MSPROP2:%.*]] = insertelement <8 x i16> [[_MSPROP1]], i16 [[TMP34]], i32 210207; CHECK-NEXT: [[VEC2:%.*]] = insertelement <8 x i16> [[VEC1]], i16 [[TMP35]], i32 210208; CHECK-NEXT: [[_MSPROP3:%.*]] = insertelement <8 x i16> [[_MSPROP2]], i16 0, i32 310209; CHECK-NEXT: [[VEC3:%.*]] = insertelement <8 x i16> [[VEC2]], i16 0, i32 310210; CHECK-NEXT: [[TMP36:%.*]] = xor <16 x i32> [[A0]], [[A1]]10211; CHECK-NEXT: [[TMP37:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]10212; CHECK-NEXT: [[TMP38:%.*]] = icmp ne <16 x i32> [[TMP37]], zeroinitializer10213; CHECK-NEXT: [[TMP39:%.*]] = xor <16 x i32> [[TMP37]], splat (i32 -1)10214; CHECK-NEXT: [[TMP40:%.*]] = and <16 x i32> [[TMP39]], [[TMP36]]10215; CHECK-NEXT: [[TMP41:%.*]] = icmp eq <16 x i32> [[TMP40]], zeroinitializer10216; CHECK-NEXT: [[_MSPROP_ICMP4:%.*]] = and <16 x i1> [[TMP38]], [[TMP41]]10217; CHECK-NEXT: [[TMP42:%.*]] = icmp ne <16 x i32> [[A0]], [[A1]]10218; CHECK-NEXT: [[TMP43:%.*]] = bitcast <16 x i1> [[_MSPROP_ICMP4]] to i1610219; CHECK-NEXT: [[TMP44:%.*]] = bitcast <16 x i1> [[TMP42]] to i1610220; CHECK-NEXT: [[_MSPROP5:%.*]] = insertelement <8 x i16> [[_MSPROP3]], i16 [[TMP43]], i32 410221; CHECK-NEXT: [[VEC4:%.*]] = insertelement <8 x i16> [[VEC3]], i16 [[TMP44]], i32 410222; CHECK-NEXT: [[TMP45:%.*]] = xor <16 x i32> [[TMP1]], splat (i32 -1)10223; CHECK-NEXT: [[TMP46:%.*]] = and <16 x i32> [[A0]], [[TMP45]]10224; CHECK-NEXT: [[TMP47:%.*]] = or <16 x i32> [[A0]], [[TMP1]]10225; CHECK-NEXT: [[TMP48:%.*]] = xor <16 x i32> [[TMP2]], splat (i32 -1)10226; CHECK-NEXT: [[TMP49:%.*]] = and <16 x i32> [[A1]], [[TMP48]]10227; CHECK-NEXT: [[TMP50:%.*]] = or <16 x i32> [[A1]], [[TMP2]]10228; CHECK-NEXT: [[TMP51:%.*]] = icmp uge <16 x i32> [[TMP46]], [[TMP50]]10229; CHECK-NEXT: [[TMP52:%.*]] = icmp uge <16 x i32> [[TMP47]], [[TMP49]]10230; CHECK-NEXT: [[TMP53:%.*]] = xor <16 x i1> [[TMP51]], [[TMP52]]10231; CHECK-NEXT: [[TMP54:%.*]] = icmp uge <16 x i32> [[A0]], [[A1]]10232; CHECK-NEXT: [[TMP55:%.*]] = bitcast <16 x i1> [[TMP53]] to i1610233; CHECK-NEXT: [[TMP56:%.*]] = bitcast <16 x i1> [[TMP54]] to i1610234; CHECK-NEXT: [[_MSPROP6:%.*]] = insertelement <8 x i16> [[_MSPROP5]], i16 [[TMP55]], i32 510235; CHECK-NEXT: [[VEC5:%.*]] = insertelement <8 x i16> [[VEC4]], i16 [[TMP56]], i32 510236; CHECK-NEXT: [[TMP57:%.*]] = xor <16 x i32> [[TMP1]], splat (i32 -1)10237; CHECK-NEXT: [[TMP58:%.*]] = and <16 x i32> [[A0]], [[TMP57]]10238; CHECK-NEXT: [[TMP59:%.*]] = or <16 x i32> [[A0]], [[TMP1]]10239; CHECK-NEXT: [[TMP60:%.*]] = xor <16 x i32> [[TMP2]], splat (i32 -1)10240; CHECK-NEXT: [[TMP61:%.*]] = and <16 x i32> [[A1]], [[TMP60]]10241; CHECK-NEXT: [[TMP62:%.*]] = or <16 x i32> [[A1]], [[TMP2]]10242; CHECK-NEXT: [[TMP63:%.*]] = icmp ugt <16 x i32> [[TMP58]], [[TMP62]]10243; CHECK-NEXT: [[TMP64:%.*]] = icmp ugt <16 x i32> [[TMP59]], [[TMP61]]10244; CHECK-NEXT: [[TMP65:%.*]] = xor <16 x i1> [[TMP63]], [[TMP64]]10245; CHECK-NEXT: [[TMP66:%.*]] = icmp ugt <16 x i32> [[A0]], [[A1]]10246; CHECK-NEXT: [[TMP67:%.*]] = bitcast <16 x i1> [[TMP65]] to i1610247; CHECK-NEXT: [[TMP68:%.*]] = bitcast <16 x i1> [[TMP66]] to i1610248; CHECK-NEXT: [[_MSPROP7:%.*]] = insertelement <8 x i16> [[_MSPROP6]], i16 [[TMP67]], i32 610249; CHECK-NEXT: [[VEC6:%.*]] = insertelement <8 x i16> [[VEC5]], i16 [[TMP68]], i32 610250; CHECK-NEXT: [[_MSPROP8:%.*]] = insertelement <8 x i16> [[_MSPROP7]], i16 0, i32 710251; CHECK-NEXT: [[VEC7:%.*]] = insertelement <8 x i16> [[VEC6]], i16 -1, i32 710252; CHECK-NEXT: store <8 x i16> [[_MSPROP8]], ptr @__msan_retval_tls, align 810253; CHECK-NEXT: ret <8 x i16> [[VEC7]]10254;10255 %res0 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 0, i16 -1)10256 %vec0 = insertelement <8 x i16> %extra_param, i16 %res0, i32 010257 %res1 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 1, i16 -1)10258 %vec1 = insertelement <8 x i16> %vec0, i16 %res1, i32 110259 %res2 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 2, i16 -1)10260 %vec2 = insertelement <8 x i16> %vec1, i16 %res2, i32 210261 %res3 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 3, i16 -1)10262 %vec3 = insertelement <8 x i16> %vec2, i16 %res3, i32 310263 %res4 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 4, i16 -1)10264 %vec4 = insertelement <8 x i16> %vec3, i16 %res4, i32 410265 %res5 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 5, i16 -1)10266 %vec5 = insertelement <8 x i16> %vec4, i16 %res5, i32 510267 %res6 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 6, i16 -1)10268 %vec6 = insertelement <8 x i16> %vec5, i16 %res6, i32 610269 %res7 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 7, i16 -1)10270 %vec7 = insertelement <8 x i16> %vec6, i16 %res7, i32 710271 ret <8 x i16> %vec710272}10273 10274define <8 x i16> @test_mask_ucmp_d_512(<16 x i32> %a0, <16 x i32> %a1, i16 %mask, <8 x i16> %extra_param) #0 {10275;10276; CHECK-LABEL: @test_mask_ucmp_d_512(10277; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 810278; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 810279; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 810280; CHECK-NEXT: [[TMP138:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 810281; CHECK-NEXT: call void @llvm.donothing()10282; CHECK-NEXT: [[TMP4:%.*]] = xor <16 x i32> [[A0:%.*]], [[A1:%.*]]10283; CHECK-NEXT: [[TMP5:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]10284; CHECK-NEXT: [[TMP6:%.*]] = icmp ne <16 x i32> [[TMP5]], zeroinitializer10285; CHECK-NEXT: [[TMP7:%.*]] = xor <16 x i32> [[TMP5]], splat (i32 -1)10286; CHECK-NEXT: [[TMP8:%.*]] = and <16 x i32> [[TMP7]], [[TMP4]]10287; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <16 x i32> [[TMP8]], zeroinitializer10288; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <16 x i1> [[TMP6]], [[TMP9]]10289; CHECK-NEXT: [[TMP10:%.*]] = icmp eq <16 x i32> [[A0]], [[A1]]10290; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>10291; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>10292; CHECK-NEXT: [[TMP13:%.*]] = and <16 x i1> [[_MSPROP_ICMP]], [[TMP11]]10293; CHECK-NEXT: [[TMP14:%.*]] = and <16 x i1> [[TMP10]], [[TMP11]]10294; CHECK-NEXT: [[TMP15:%.*]] = and <16 x i1> [[_MSPROP_ICMP]], [[TMP12]]10295; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i1> [[TMP13]], [[TMP14]]10296; CHECK-NEXT: [[TMP17:%.*]] = or <16 x i1> [[TMP16]], [[TMP15]]10297; CHECK-NEXT: [[TMP18:%.*]] = and <16 x i1> [[TMP10]], [[TMP12]]10298; CHECK-NEXT: [[TMP19:%.*]] = bitcast <16 x i1> [[TMP17]] to i1610299; CHECK-NEXT: [[TMP20:%.*]] = bitcast <16 x i1> [[TMP18]] to i1610300; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i16> [[TMP138]], i16 [[TMP19]], i32 010301; CHECK-NEXT: [[VEC0:%.*]] = insertelement <8 x i16> [[EXTRA_PARAM:%.*]], i16 [[TMP20]], i32 010302; CHECK-NEXT: [[TMP21:%.*]] = xor <16 x i32> [[TMP1]], splat (i32 -1)10303; CHECK-NEXT: [[TMP22:%.*]] = and <16 x i32> [[A0]], [[TMP21]]10304; CHECK-NEXT: [[TMP23:%.*]] = or <16 x i32> [[A0]], [[TMP1]]10305; CHECK-NEXT: [[TMP24:%.*]] = xor <16 x i32> [[TMP2]], splat (i32 -1)10306; CHECK-NEXT: [[TMP25:%.*]] = and <16 x i32> [[A1]], [[TMP24]]10307; CHECK-NEXT: [[TMP26:%.*]] = or <16 x i32> [[A1]], [[TMP2]]10308; CHECK-NEXT: [[TMP27:%.*]] = icmp ult <16 x i32> [[TMP22]], [[TMP26]]10309; CHECK-NEXT: [[TMP28:%.*]] = icmp ult <16 x i32> [[TMP23]], [[TMP25]]10310; CHECK-NEXT: [[TMP29:%.*]] = xor <16 x i1> [[TMP27]], [[TMP28]]10311; CHECK-NEXT: [[TMP30:%.*]] = icmp ult <16 x i32> [[A0]], [[A1]]10312; CHECK-NEXT: [[TMP31:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>10313; CHECK-NEXT: [[TMP32:%.*]] = bitcast i16 [[MASK]] to <16 x i1>10314; CHECK-NEXT: [[TMP33:%.*]] = and <16 x i1> [[TMP29]], [[TMP31]]10315; CHECK-NEXT: [[TMP34:%.*]] = and <16 x i1> [[TMP30]], [[TMP31]]10316; CHECK-NEXT: [[TMP35:%.*]] = and <16 x i1> [[TMP29]], [[TMP32]]10317; CHECK-NEXT: [[TMP36:%.*]] = or <16 x i1> [[TMP33]], [[TMP34]]10318; CHECK-NEXT: [[TMP37:%.*]] = or <16 x i1> [[TMP36]], [[TMP35]]10319; CHECK-NEXT: [[TMP38:%.*]] = and <16 x i1> [[TMP30]], [[TMP32]]10320; CHECK-NEXT: [[TMP39:%.*]] = bitcast <16 x i1> [[TMP37]] to i1610321; CHECK-NEXT: [[TMP40:%.*]] = bitcast <16 x i1> [[TMP38]] to i1610322; CHECK-NEXT: [[_MSPROP1:%.*]] = insertelement <8 x i16> [[_MSPROP]], i16 [[TMP39]], i32 110323; CHECK-NEXT: [[VEC1:%.*]] = insertelement <8 x i16> [[VEC0]], i16 [[TMP40]], i32 110324; CHECK-NEXT: [[TMP41:%.*]] = xor <16 x i32> [[TMP1]], splat (i32 -1)10325; CHECK-NEXT: [[TMP42:%.*]] = and <16 x i32> [[A0]], [[TMP41]]10326; CHECK-NEXT: [[TMP43:%.*]] = or <16 x i32> [[A0]], [[TMP1]]10327; CHECK-NEXT: [[TMP44:%.*]] = xor <16 x i32> [[TMP2]], splat (i32 -1)10328; CHECK-NEXT: [[TMP45:%.*]] = and <16 x i32> [[A1]], [[TMP44]]10329; CHECK-NEXT: [[TMP46:%.*]] = or <16 x i32> [[A1]], [[TMP2]]10330; CHECK-NEXT: [[TMP47:%.*]] = icmp ule <16 x i32> [[TMP42]], [[TMP46]]10331; CHECK-NEXT: [[TMP48:%.*]] = icmp ule <16 x i32> [[TMP43]], [[TMP45]]10332; CHECK-NEXT: [[TMP49:%.*]] = xor <16 x i1> [[TMP47]], [[TMP48]]10333; CHECK-NEXT: [[TMP50:%.*]] = icmp ule <16 x i32> [[A0]], [[A1]]10334; CHECK-NEXT: [[TMP51:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>10335; CHECK-NEXT: [[TMP52:%.*]] = bitcast i16 [[MASK]] to <16 x i1>10336; CHECK-NEXT: [[TMP53:%.*]] = and <16 x i1> [[TMP49]], [[TMP51]]10337; CHECK-NEXT: [[TMP54:%.*]] = and <16 x i1> [[TMP50]], [[TMP51]]10338; CHECK-NEXT: [[TMP55:%.*]] = and <16 x i1> [[TMP49]], [[TMP52]]10339; CHECK-NEXT: [[TMP56:%.*]] = or <16 x i1> [[TMP53]], [[TMP54]]10340; CHECK-NEXT: [[TMP57:%.*]] = or <16 x i1> [[TMP56]], [[TMP55]]10341; CHECK-NEXT: [[TMP58:%.*]] = and <16 x i1> [[TMP50]], [[TMP52]]10342; CHECK-NEXT: [[TMP59:%.*]] = bitcast <16 x i1> [[TMP57]] to i1610343; CHECK-NEXT: [[TMP60:%.*]] = bitcast <16 x i1> [[TMP58]] to i1610344; CHECK-NEXT: [[_MSPROP2:%.*]] = insertelement <8 x i16> [[_MSPROP1]], i16 [[TMP59]], i32 210345; CHECK-NEXT: [[VEC2:%.*]] = insertelement <8 x i16> [[VEC1]], i16 [[TMP60]], i32 210346; CHECK-NEXT: [[TMP61:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>10347; CHECK-NEXT: [[TMP62:%.*]] = bitcast i16 [[MASK]] to <16 x i1>10348; CHECK-NEXT: [[TMP63:%.*]] = and <16 x i1> zeroinitializer, [[TMP61]]10349; CHECK-NEXT: [[TMP64:%.*]] = and <16 x i1> zeroinitializer, [[TMP61]]10350; CHECK-NEXT: [[TMP65:%.*]] = and <16 x i1> zeroinitializer, [[TMP62]]10351; CHECK-NEXT: [[TMP66:%.*]] = or <16 x i1> [[TMP63]], [[TMP64]]10352; CHECK-NEXT: [[TMP67:%.*]] = or <16 x i1> [[TMP66]], [[TMP65]]10353; CHECK-NEXT: [[TMP68:%.*]] = and <16 x i1> zeroinitializer, [[TMP62]]10354; CHECK-NEXT: [[TMP69:%.*]] = bitcast <16 x i1> [[TMP67]] to i1610355; CHECK-NEXT: [[TMP70:%.*]] = bitcast <16 x i1> [[TMP68]] to i1610356; CHECK-NEXT: [[_MSPROP3:%.*]] = insertelement <8 x i16> [[_MSPROP2]], i16 [[TMP69]], i32 310357; CHECK-NEXT: [[VEC3:%.*]] = insertelement <8 x i16> [[VEC2]], i16 [[TMP70]], i32 310358; CHECK-NEXT: [[TMP71:%.*]] = xor <16 x i32> [[A0]], [[A1]]10359; CHECK-NEXT: [[TMP72:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]10360; CHECK-NEXT: [[TMP73:%.*]] = icmp ne <16 x i32> [[TMP72]], zeroinitializer10361; CHECK-NEXT: [[TMP74:%.*]] = xor <16 x i32> [[TMP72]], splat (i32 -1)10362; CHECK-NEXT: [[TMP75:%.*]] = and <16 x i32> [[TMP74]], [[TMP71]]10363; CHECK-NEXT: [[TMP76:%.*]] = icmp eq <16 x i32> [[TMP75]], zeroinitializer10364; CHECK-NEXT: [[_MSPROP_ICMP4:%.*]] = and <16 x i1> [[TMP73]], [[TMP76]]10365; CHECK-NEXT: [[TMP77:%.*]] = icmp ne <16 x i32> [[A0]], [[A1]]10366; CHECK-NEXT: [[TMP78:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>10367; CHECK-NEXT: [[TMP79:%.*]] = bitcast i16 [[MASK]] to <16 x i1>10368; CHECK-NEXT: [[TMP80:%.*]] = and <16 x i1> [[_MSPROP_ICMP4]], [[TMP78]]10369; CHECK-NEXT: [[TMP81:%.*]] = and <16 x i1> [[TMP77]], [[TMP78]]10370; CHECK-NEXT: [[TMP82:%.*]] = and <16 x i1> [[_MSPROP_ICMP4]], [[TMP79]]10371; CHECK-NEXT: [[TMP83:%.*]] = or <16 x i1> [[TMP80]], [[TMP81]]10372; CHECK-NEXT: [[TMP84:%.*]] = or <16 x i1> [[TMP83]], [[TMP82]]10373; CHECK-NEXT: [[TMP85:%.*]] = and <16 x i1> [[TMP77]], [[TMP79]]10374; CHECK-NEXT: [[TMP86:%.*]] = bitcast <16 x i1> [[TMP84]] to i1610375; CHECK-NEXT: [[TMP87:%.*]] = bitcast <16 x i1> [[TMP85]] to i1610376; CHECK-NEXT: [[_MSPROP5:%.*]] = insertelement <8 x i16> [[_MSPROP3]], i16 [[TMP86]], i32 410377; CHECK-NEXT: [[VEC4:%.*]] = insertelement <8 x i16> [[VEC3]], i16 [[TMP87]], i32 410378; CHECK-NEXT: [[TMP88:%.*]] = xor <16 x i32> [[TMP1]], splat (i32 -1)10379; CHECK-NEXT: [[TMP89:%.*]] = and <16 x i32> [[A0]], [[TMP88]]10380; CHECK-NEXT: [[TMP90:%.*]] = or <16 x i32> [[A0]], [[TMP1]]10381; CHECK-NEXT: [[TMP91:%.*]] = xor <16 x i32> [[TMP2]], splat (i32 -1)10382; CHECK-NEXT: [[TMP92:%.*]] = and <16 x i32> [[A1]], [[TMP91]]10383; CHECK-NEXT: [[TMP93:%.*]] = or <16 x i32> [[A1]], [[TMP2]]10384; CHECK-NEXT: [[TMP94:%.*]] = icmp uge <16 x i32> [[TMP89]], [[TMP93]]10385; CHECK-NEXT: [[TMP95:%.*]] = icmp uge <16 x i32> [[TMP90]], [[TMP92]]10386; CHECK-NEXT: [[TMP96:%.*]] = xor <16 x i1> [[TMP94]], [[TMP95]]10387; CHECK-NEXT: [[TMP97:%.*]] = icmp uge <16 x i32> [[A0]], [[A1]]10388; CHECK-NEXT: [[TMP98:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>10389; CHECK-NEXT: [[TMP99:%.*]] = bitcast i16 [[MASK]] to <16 x i1>10390; CHECK-NEXT: [[TMP100:%.*]] = and <16 x i1> [[TMP96]], [[TMP98]]10391; CHECK-NEXT: [[TMP101:%.*]] = and <16 x i1> [[TMP97]], [[TMP98]]10392; CHECK-NEXT: [[TMP102:%.*]] = and <16 x i1> [[TMP96]], [[TMP99]]10393; CHECK-NEXT: [[TMP103:%.*]] = or <16 x i1> [[TMP100]], [[TMP101]]10394; CHECK-NEXT: [[TMP104:%.*]] = or <16 x i1> [[TMP103]], [[TMP102]]10395; CHECK-NEXT: [[TMP105:%.*]] = and <16 x i1> [[TMP97]], [[TMP99]]10396; CHECK-NEXT: [[TMP106:%.*]] = bitcast <16 x i1> [[TMP104]] to i1610397; CHECK-NEXT: [[TMP107:%.*]] = bitcast <16 x i1> [[TMP105]] to i1610398; CHECK-NEXT: [[_MSPROP6:%.*]] = insertelement <8 x i16> [[_MSPROP5]], i16 [[TMP106]], i32 510399; CHECK-NEXT: [[VEC5:%.*]] = insertelement <8 x i16> [[VEC4]], i16 [[TMP107]], i32 510400; CHECK-NEXT: [[TMP108:%.*]] = xor <16 x i32> [[TMP1]], splat (i32 -1)10401; CHECK-NEXT: [[TMP109:%.*]] = and <16 x i32> [[A0]], [[TMP108]]10402; CHECK-NEXT: [[TMP110:%.*]] = or <16 x i32> [[A0]], [[TMP1]]10403; CHECK-NEXT: [[TMP111:%.*]] = xor <16 x i32> [[TMP2]], splat (i32 -1)10404; CHECK-NEXT: [[TMP112:%.*]] = and <16 x i32> [[A1]], [[TMP111]]10405; CHECK-NEXT: [[TMP113:%.*]] = or <16 x i32> [[A1]], [[TMP2]]10406; CHECK-NEXT: [[TMP114:%.*]] = icmp ugt <16 x i32> [[TMP109]], [[TMP113]]10407; CHECK-NEXT: [[TMP115:%.*]] = icmp ugt <16 x i32> [[TMP110]], [[TMP112]]10408; CHECK-NEXT: [[TMP116:%.*]] = xor <16 x i1> [[TMP114]], [[TMP115]]10409; CHECK-NEXT: [[TMP117:%.*]] = icmp ugt <16 x i32> [[A0]], [[A1]]10410; CHECK-NEXT: [[TMP118:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>10411; CHECK-NEXT: [[TMP119:%.*]] = bitcast i16 [[MASK]] to <16 x i1>10412; CHECK-NEXT: [[TMP120:%.*]] = and <16 x i1> [[TMP116]], [[TMP118]]10413; CHECK-NEXT: [[TMP121:%.*]] = and <16 x i1> [[TMP117]], [[TMP118]]10414; CHECK-NEXT: [[TMP122:%.*]] = and <16 x i1> [[TMP116]], [[TMP119]]10415; CHECK-NEXT: [[TMP123:%.*]] = or <16 x i1> [[TMP120]], [[TMP121]]10416; CHECK-NEXT: [[TMP124:%.*]] = or <16 x i1> [[TMP123]], [[TMP122]]10417; CHECK-NEXT: [[TMP125:%.*]] = and <16 x i1> [[TMP117]], [[TMP119]]10418; CHECK-NEXT: [[TMP126:%.*]] = bitcast <16 x i1> [[TMP124]] to i1610419; CHECK-NEXT: [[TMP127:%.*]] = bitcast <16 x i1> [[TMP125]] to i1610420; CHECK-NEXT: [[_MSPROP7:%.*]] = insertelement <8 x i16> [[_MSPROP6]], i16 [[TMP126]], i32 610421; CHECK-NEXT: [[VEC6:%.*]] = insertelement <8 x i16> [[VEC5]], i16 [[TMP127]], i32 610422; CHECK-NEXT: [[TMP128:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>10423; CHECK-NEXT: [[TMP129:%.*]] = bitcast i16 [[MASK]] to <16 x i1>10424; CHECK-NEXT: [[TMP130:%.*]] = and <16 x i1> zeroinitializer, [[TMP128]]10425; CHECK-NEXT: [[TMP131:%.*]] = and <16 x i1> splat (i1 true), [[TMP128]]10426; CHECK-NEXT: [[TMP132:%.*]] = and <16 x i1> zeroinitializer, [[TMP129]]10427; CHECK-NEXT: [[TMP133:%.*]] = or <16 x i1> [[TMP130]], [[TMP131]]10428; CHECK-NEXT: [[TMP134:%.*]] = or <16 x i1> [[TMP133]], [[TMP132]]10429; CHECK-NEXT: [[TMP135:%.*]] = and <16 x i1> splat (i1 true), [[TMP129]]10430; CHECK-NEXT: [[TMP136:%.*]] = bitcast <16 x i1> [[TMP134]] to i1610431; CHECK-NEXT: [[TMP137:%.*]] = bitcast <16 x i1> [[TMP135]] to i1610432; CHECK-NEXT: [[_MSPROP8:%.*]] = insertelement <8 x i16> [[_MSPROP7]], i16 [[TMP136]], i32 710433; CHECK-NEXT: [[VEC7:%.*]] = insertelement <8 x i16> [[VEC6]], i16 [[TMP137]], i32 710434; CHECK-NEXT: store <8 x i16> [[_MSPROP8]], ptr @__msan_retval_tls, align 810435; CHECK-NEXT: ret <8 x i16> [[VEC7]]10436;10437 %res0 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 0, i16 %mask)10438 %vec0 = insertelement <8 x i16> %extra_param, i16 %res0, i32 010439 %res1 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 1, i16 %mask)10440 %vec1 = insertelement <8 x i16> %vec0, i16 %res1, i32 110441 %res2 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 2, i16 %mask)10442 %vec2 = insertelement <8 x i16> %vec1, i16 %res2, i32 210443 %res3 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 3, i16 %mask)10444 %vec3 = insertelement <8 x i16> %vec2, i16 %res3, i32 310445 %res4 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 4, i16 %mask)10446 %vec4 = insertelement <8 x i16> %vec3, i16 %res4, i32 410447 %res5 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 5, i16 %mask)10448 %vec5 = insertelement <8 x i16> %vec4, i16 %res5, i32 510449 %res6 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 6, i16 %mask)10450 %vec6 = insertelement <8 x i16> %vec5, i16 %res6, i32 610451 %res7 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 7, i16 %mask)10452 %vec7 = insertelement <8 x i16> %vec6, i16 %res7, i32 710453 ret <8 x i16> %vec710454}10455 10456declare i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32>, <16 x i32>, i32, i16) nounwind readnone10457 10458define <8 x i8> @test_cmp_q_512(<8 x i64> %a0, <8 x i64> %a1, <8 x i8> %extra_param) #0 {10459; CHECK-LABEL: @test_cmp_q_512(10460; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 810461; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 810462; CHECK-NEXT: [[TMP77:%.*]] = load <8 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 810463; CHECK-NEXT: call void @llvm.donothing()10464; CHECK-NEXT: [[TMP3:%.*]] = xor <8 x i64> [[A0:%.*]], [[A1:%.*]]10465; CHECK-NEXT: [[TMP4:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]10466; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <8 x i64> [[TMP4]], zeroinitializer10467; CHECK-NEXT: [[TMP6:%.*]] = xor <8 x i64> [[TMP4]], splat (i64 -1)10468; CHECK-NEXT: [[TMP7:%.*]] = and <8 x i64> [[TMP6]], [[TMP3]]10469; CHECK-NEXT: [[TMP8:%.*]] = icmp eq <8 x i64> [[TMP7]], zeroinitializer10470; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <8 x i1> [[TMP5]], [[TMP8]]10471; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <8 x i64> [[A0]], [[A1]]10472; CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x i1> [[_MSPROP_ICMP]] to i810473; CHECK-NEXT: [[TMP11:%.*]] = bitcast <8 x i1> [[TMP9]] to i810474; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i8> [[TMP77]], i8 [[TMP10]], i32 010475; CHECK-NEXT: [[VEC0:%.*]] = insertelement <8 x i8> [[EXTRA_PARAM:%.*]], i8 [[TMP11]], i32 010476; CHECK-NEXT: [[TMP12:%.*]] = xor <8 x i64> [[A0]], splat (i64 -9223372036854775808)10477; CHECK-NEXT: [[TMP13:%.*]] = xor <8 x i64> [[TMP1]], splat (i64 -1)10478; CHECK-NEXT: [[TMP14:%.*]] = and <8 x i64> [[TMP12]], [[TMP13]]10479; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP12]], [[TMP1]]10480; CHECK-NEXT: [[TMP16:%.*]] = xor <8 x i64> [[A1]], splat (i64 -9223372036854775808)10481; CHECK-NEXT: [[TMP17:%.*]] = xor <8 x i64> [[TMP2]], splat (i64 -1)10482; CHECK-NEXT: [[TMP18:%.*]] = and <8 x i64> [[TMP16]], [[TMP17]]10483; CHECK-NEXT: [[TMP19:%.*]] = or <8 x i64> [[TMP16]], [[TMP2]]10484; CHECK-NEXT: [[TMP20:%.*]] = icmp ult <8 x i64> [[TMP14]], [[TMP19]]10485; CHECK-NEXT: [[TMP21:%.*]] = icmp ult <8 x i64> [[TMP15]], [[TMP18]]10486; CHECK-NEXT: [[TMP22:%.*]] = xor <8 x i1> [[TMP20]], [[TMP21]]10487; CHECK-NEXT: [[TMP23:%.*]] = icmp slt <8 x i64> [[A0]], [[A1]]10488; CHECK-NEXT: [[TMP24:%.*]] = bitcast <8 x i1> [[TMP22]] to i810489; CHECK-NEXT: [[TMP25:%.*]] = bitcast <8 x i1> [[TMP23]] to i810490; CHECK-NEXT: [[_MSPROP1:%.*]] = insertelement <8 x i8> [[_MSPROP]], i8 [[TMP24]], i32 110491; CHECK-NEXT: [[VEC1:%.*]] = insertelement <8 x i8> [[VEC0]], i8 [[TMP25]], i32 110492; CHECK-NEXT: [[TMP26:%.*]] = xor <8 x i64> [[A0]], splat (i64 -9223372036854775808)10493; CHECK-NEXT: [[TMP27:%.*]] = xor <8 x i64> [[TMP1]], splat (i64 -1)10494; CHECK-NEXT: [[TMP28:%.*]] = and <8 x i64> [[TMP26]], [[TMP27]]10495; CHECK-NEXT: [[TMP29:%.*]] = or <8 x i64> [[TMP26]], [[TMP1]]10496; CHECK-NEXT: [[TMP30:%.*]] = xor <8 x i64> [[A1]], splat (i64 -9223372036854775808)10497; CHECK-NEXT: [[TMP31:%.*]] = xor <8 x i64> [[TMP2]], splat (i64 -1)10498; CHECK-NEXT: [[TMP32:%.*]] = and <8 x i64> [[TMP30]], [[TMP31]]10499; CHECK-NEXT: [[TMP33:%.*]] = or <8 x i64> [[TMP30]], [[TMP2]]10500; CHECK-NEXT: [[TMP34:%.*]] = icmp ule <8 x i64> [[TMP28]], [[TMP33]]10501; CHECK-NEXT: [[TMP35:%.*]] = icmp ule <8 x i64> [[TMP29]], [[TMP32]]10502; CHECK-NEXT: [[TMP36:%.*]] = xor <8 x i1> [[TMP34]], [[TMP35]]10503; CHECK-NEXT: [[TMP37:%.*]] = icmp sle <8 x i64> [[A0]], [[A1]]10504; CHECK-NEXT: [[TMP38:%.*]] = bitcast <8 x i1> [[TMP36]] to i810505; CHECK-NEXT: [[TMP39:%.*]] = bitcast <8 x i1> [[TMP37]] to i810506; CHECK-NEXT: [[_MSPROP2:%.*]] = insertelement <8 x i8> [[_MSPROP1]], i8 [[TMP38]], i32 210507; CHECK-NEXT: [[VEC2:%.*]] = insertelement <8 x i8> [[VEC1]], i8 [[TMP39]], i32 210508; CHECK-NEXT: [[_MSPROP3:%.*]] = insertelement <8 x i8> [[_MSPROP2]], i8 0, i32 310509; CHECK-NEXT: [[VEC3:%.*]] = insertelement <8 x i8> [[VEC2]], i8 0, i32 310510; CHECK-NEXT: [[TMP40:%.*]] = xor <8 x i64> [[A0]], [[A1]]10511; CHECK-NEXT: [[TMP41:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]10512; CHECK-NEXT: [[TMP42:%.*]] = icmp ne <8 x i64> [[TMP41]], zeroinitializer10513; CHECK-NEXT: [[TMP43:%.*]] = xor <8 x i64> [[TMP41]], splat (i64 -1)10514; CHECK-NEXT: [[TMP44:%.*]] = and <8 x i64> [[TMP43]], [[TMP40]]10515; CHECK-NEXT: [[TMP45:%.*]] = icmp eq <8 x i64> [[TMP44]], zeroinitializer10516; CHECK-NEXT: [[_MSPROP_ICMP4:%.*]] = and <8 x i1> [[TMP42]], [[TMP45]]10517; CHECK-NEXT: [[TMP46:%.*]] = icmp ne <8 x i64> [[A0]], [[A1]]10518; CHECK-NEXT: [[TMP47:%.*]] = bitcast <8 x i1> [[_MSPROP_ICMP4]] to i810519; CHECK-NEXT: [[TMP48:%.*]] = bitcast <8 x i1> [[TMP46]] to i810520; CHECK-NEXT: [[_MSPROP5:%.*]] = insertelement <8 x i8> [[_MSPROP3]], i8 [[TMP47]], i32 410521; CHECK-NEXT: [[VEC4:%.*]] = insertelement <8 x i8> [[VEC3]], i8 [[TMP48]], i32 410522; CHECK-NEXT: [[TMP49:%.*]] = xor <8 x i64> [[A0]], splat (i64 -9223372036854775808)10523; CHECK-NEXT: [[TMP50:%.*]] = xor <8 x i64> [[TMP1]], splat (i64 -1)10524; CHECK-NEXT: [[TMP51:%.*]] = and <8 x i64> [[TMP49]], [[TMP50]]10525; CHECK-NEXT: [[TMP52:%.*]] = or <8 x i64> [[TMP49]], [[TMP1]]10526; CHECK-NEXT: [[TMP53:%.*]] = xor <8 x i64> [[A1]], splat (i64 -9223372036854775808)10527; CHECK-NEXT: [[TMP54:%.*]] = xor <8 x i64> [[TMP2]], splat (i64 -1)10528; CHECK-NEXT: [[TMP55:%.*]] = and <8 x i64> [[TMP53]], [[TMP54]]10529; CHECK-NEXT: [[TMP56:%.*]] = or <8 x i64> [[TMP53]], [[TMP2]]10530; CHECK-NEXT: [[TMP57:%.*]] = icmp uge <8 x i64> [[TMP51]], [[TMP56]]10531; CHECK-NEXT: [[TMP58:%.*]] = icmp uge <8 x i64> [[TMP52]], [[TMP55]]10532; CHECK-NEXT: [[TMP59:%.*]] = xor <8 x i1> [[TMP57]], [[TMP58]]10533; CHECK-NEXT: [[TMP60:%.*]] = icmp sge <8 x i64> [[A0]], [[A1]]10534; CHECK-NEXT: [[TMP61:%.*]] = bitcast <8 x i1> [[TMP59]] to i810535; CHECK-NEXT: [[TMP62:%.*]] = bitcast <8 x i1> [[TMP60]] to i810536; CHECK-NEXT: [[_MSPROP6:%.*]] = insertelement <8 x i8> [[_MSPROP5]], i8 [[TMP61]], i32 510537; CHECK-NEXT: [[VEC5:%.*]] = insertelement <8 x i8> [[VEC4]], i8 [[TMP62]], i32 510538; CHECK-NEXT: [[TMP63:%.*]] = xor <8 x i64> [[A0]], splat (i64 -9223372036854775808)10539; CHECK-NEXT: [[TMP64:%.*]] = xor <8 x i64> [[TMP1]], splat (i64 -1)10540; CHECK-NEXT: [[TMP65:%.*]] = and <8 x i64> [[TMP63]], [[TMP64]]10541; CHECK-NEXT: [[TMP66:%.*]] = or <8 x i64> [[TMP63]], [[TMP1]]10542; CHECK-NEXT: [[TMP67:%.*]] = xor <8 x i64> [[A1]], splat (i64 -9223372036854775808)10543; CHECK-NEXT: [[TMP68:%.*]] = xor <8 x i64> [[TMP2]], splat (i64 -1)10544; CHECK-NEXT: [[TMP69:%.*]] = and <8 x i64> [[TMP67]], [[TMP68]]10545; CHECK-NEXT: [[TMP70:%.*]] = or <8 x i64> [[TMP67]], [[TMP2]]10546; CHECK-NEXT: [[TMP71:%.*]] = icmp ugt <8 x i64> [[TMP65]], [[TMP70]]10547; CHECK-NEXT: [[TMP72:%.*]] = icmp ugt <8 x i64> [[TMP66]], [[TMP69]]10548; CHECK-NEXT: [[TMP73:%.*]] = xor <8 x i1> [[TMP71]], [[TMP72]]10549; CHECK-NEXT: [[TMP74:%.*]] = icmp sgt <8 x i64> [[A0]], [[A1]]10550; CHECK-NEXT: [[TMP75:%.*]] = bitcast <8 x i1> [[TMP73]] to i810551; CHECK-NEXT: [[TMP76:%.*]] = bitcast <8 x i1> [[TMP74]] to i810552; CHECK-NEXT: [[_MSPROP7:%.*]] = insertelement <8 x i8> [[_MSPROP6]], i8 [[TMP75]], i32 610553; CHECK-NEXT: [[VEC6:%.*]] = insertelement <8 x i8> [[VEC5]], i8 [[TMP76]], i32 610554; CHECK-NEXT: [[_MSPROP8:%.*]] = insertelement <8 x i8> [[_MSPROP7]], i8 0, i32 710555; CHECK-NEXT: [[VEC7:%.*]] = insertelement <8 x i8> [[VEC6]], i8 -1, i32 710556; CHECK-NEXT: store <8 x i8> [[_MSPROP8]], ptr @__msan_retval_tls, align 810557; CHECK-NEXT: ret <8 x i8> [[VEC7]]10558;10559 %res0 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 0, i8 -1)10560 %vec0 = insertelement <8 x i8> %extra_param, i8 %res0, i32 010561 %res1 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 1, i8 -1)10562 %vec1 = insertelement <8 x i8> %vec0, i8 %res1, i32 110563 %res2 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 2, i8 -1)10564 %vec2 = insertelement <8 x i8> %vec1, i8 %res2, i32 210565 %res3 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 3, i8 -1)10566 %vec3 = insertelement <8 x i8> %vec2, i8 %res3, i32 310567 %res4 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 4, i8 -1)10568 %vec4 = insertelement <8 x i8> %vec3, i8 %res4, i32 410569 %res5 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 5, i8 -1)10570 %vec5 = insertelement <8 x i8> %vec4, i8 %res5, i32 510571 %res6 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 6, i8 -1)10572 %vec6 = insertelement <8 x i8> %vec5, i8 %res6, i32 610573 %res7 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 7, i8 -1)10574 %vec7 = insertelement <8 x i8> %vec6, i8 %res7, i32 710575 ret <8 x i8> %vec710576}10577 10578define <8 x i8> @test_mask_cmp_q_512(<8 x i64> %a0, <8 x i64> %a1, i8 %mask, <8 x i8> %extra_param) #0 {10579;10580; CHECK-LABEL: @test_mask_cmp_q_512(10581; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 810582; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 810583; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 810584; CHECK-NEXT: [[TMP146:%.*]] = load <8 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 810585; CHECK-NEXT: call void @llvm.donothing()10586; CHECK-NEXT: [[TMP4:%.*]] = xor <8 x i64> [[A0:%.*]], [[A1:%.*]]10587; CHECK-NEXT: [[TMP5:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]10588; CHECK-NEXT: [[TMP6:%.*]] = icmp ne <8 x i64> [[TMP5]], zeroinitializer10589; CHECK-NEXT: [[TMP7:%.*]] = xor <8 x i64> [[TMP5]], splat (i64 -1)10590; CHECK-NEXT: [[TMP8:%.*]] = and <8 x i64> [[TMP7]], [[TMP4]]10591; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <8 x i64> [[TMP8]], zeroinitializer10592; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <8 x i1> [[TMP6]], [[TMP9]]10593; CHECK-NEXT: [[TMP10:%.*]] = icmp eq <8 x i64> [[A0]], [[A1]]10594; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>10595; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>10596; CHECK-NEXT: [[TMP13:%.*]] = and <8 x i1> [[_MSPROP_ICMP]], [[TMP11]]10597; CHECK-NEXT: [[TMP14:%.*]] = and <8 x i1> [[TMP10]], [[TMP11]]10598; CHECK-NEXT: [[TMP15:%.*]] = and <8 x i1> [[_MSPROP_ICMP]], [[TMP12]]10599; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i1> [[TMP13]], [[TMP14]]10600; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i1> [[TMP16]], [[TMP15]]10601; CHECK-NEXT: [[TMP18:%.*]] = and <8 x i1> [[TMP10]], [[TMP12]]10602; CHECK-NEXT: [[TMP19:%.*]] = bitcast <8 x i1> [[TMP17]] to i810603; CHECK-NEXT: [[TMP20:%.*]] = bitcast <8 x i1> [[TMP18]] to i810604; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i8> [[TMP146]], i8 [[TMP19]], i32 010605; CHECK-NEXT: [[VEC0:%.*]] = insertelement <8 x i8> [[EXTRA_PARAM:%.*]], i8 [[TMP20]], i32 010606; CHECK-NEXT: [[TMP21:%.*]] = xor <8 x i64> [[A0]], splat (i64 -9223372036854775808)10607; CHECK-NEXT: [[TMP22:%.*]] = xor <8 x i64> [[TMP1]], splat (i64 -1)10608; CHECK-NEXT: [[TMP23:%.*]] = and <8 x i64> [[TMP21]], [[TMP22]]10609; CHECK-NEXT: [[TMP24:%.*]] = or <8 x i64> [[TMP21]], [[TMP1]]10610; CHECK-NEXT: [[TMP25:%.*]] = xor <8 x i64> [[A1]], splat (i64 -9223372036854775808)10611; CHECK-NEXT: [[TMP26:%.*]] = xor <8 x i64> [[TMP2]], splat (i64 -1)10612; CHECK-NEXT: [[TMP27:%.*]] = and <8 x i64> [[TMP25]], [[TMP26]]10613; CHECK-NEXT: [[TMP28:%.*]] = or <8 x i64> [[TMP25]], [[TMP2]]10614; CHECK-NEXT: [[TMP29:%.*]] = icmp ult <8 x i64> [[TMP23]], [[TMP28]]10615; CHECK-NEXT: [[TMP30:%.*]] = icmp ult <8 x i64> [[TMP24]], [[TMP27]]10616; CHECK-NEXT: [[TMP31:%.*]] = xor <8 x i1> [[TMP29]], [[TMP30]]10617; CHECK-NEXT: [[TMP32:%.*]] = icmp slt <8 x i64> [[A0]], [[A1]]10618; CHECK-NEXT: [[TMP33:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>10619; CHECK-NEXT: [[TMP34:%.*]] = bitcast i8 [[MASK]] to <8 x i1>10620; CHECK-NEXT: [[TMP35:%.*]] = and <8 x i1> [[TMP31]], [[TMP33]]10621; CHECK-NEXT: [[TMP36:%.*]] = and <8 x i1> [[TMP32]], [[TMP33]]10622; CHECK-NEXT: [[TMP37:%.*]] = and <8 x i1> [[TMP31]], [[TMP34]]10623; CHECK-NEXT: [[TMP38:%.*]] = or <8 x i1> [[TMP35]], [[TMP36]]10624; CHECK-NEXT: [[TMP39:%.*]] = or <8 x i1> [[TMP38]], [[TMP37]]10625; CHECK-NEXT: [[TMP40:%.*]] = and <8 x i1> [[TMP32]], [[TMP34]]10626; CHECK-NEXT: [[TMP41:%.*]] = bitcast <8 x i1> [[TMP39]] to i810627; CHECK-NEXT: [[TMP42:%.*]] = bitcast <8 x i1> [[TMP40]] to i810628; CHECK-NEXT: [[_MSPROP1:%.*]] = insertelement <8 x i8> [[_MSPROP]], i8 [[TMP41]], i32 110629; CHECK-NEXT: [[VEC1:%.*]] = insertelement <8 x i8> [[VEC0]], i8 [[TMP42]], i32 110630; CHECK-NEXT: [[TMP43:%.*]] = xor <8 x i64> [[A0]], splat (i64 -9223372036854775808)10631; CHECK-NEXT: [[TMP44:%.*]] = xor <8 x i64> [[TMP1]], splat (i64 -1)10632; CHECK-NEXT: [[TMP45:%.*]] = and <8 x i64> [[TMP43]], [[TMP44]]10633; CHECK-NEXT: [[TMP46:%.*]] = or <8 x i64> [[TMP43]], [[TMP1]]10634; CHECK-NEXT: [[TMP47:%.*]] = xor <8 x i64> [[A1]], splat (i64 -9223372036854775808)10635; CHECK-NEXT: [[TMP48:%.*]] = xor <8 x i64> [[TMP2]], splat (i64 -1)10636; CHECK-NEXT: [[TMP49:%.*]] = and <8 x i64> [[TMP47]], [[TMP48]]10637; CHECK-NEXT: [[TMP50:%.*]] = or <8 x i64> [[TMP47]], [[TMP2]]10638; CHECK-NEXT: [[TMP51:%.*]] = icmp ule <8 x i64> [[TMP45]], [[TMP50]]10639; CHECK-NEXT: [[TMP52:%.*]] = icmp ule <8 x i64> [[TMP46]], [[TMP49]]10640; CHECK-NEXT: [[TMP53:%.*]] = xor <8 x i1> [[TMP51]], [[TMP52]]10641; CHECK-NEXT: [[TMP54:%.*]] = icmp sle <8 x i64> [[A0]], [[A1]]10642; CHECK-NEXT: [[TMP55:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>10643; CHECK-NEXT: [[TMP56:%.*]] = bitcast i8 [[MASK]] to <8 x i1>10644; CHECK-NEXT: [[TMP57:%.*]] = and <8 x i1> [[TMP53]], [[TMP55]]10645; CHECK-NEXT: [[TMP58:%.*]] = and <8 x i1> [[TMP54]], [[TMP55]]10646; CHECK-NEXT: [[TMP59:%.*]] = and <8 x i1> [[TMP53]], [[TMP56]]10647; CHECK-NEXT: [[TMP60:%.*]] = or <8 x i1> [[TMP57]], [[TMP58]]10648; CHECK-NEXT: [[TMP61:%.*]] = or <8 x i1> [[TMP60]], [[TMP59]]10649; CHECK-NEXT: [[TMP62:%.*]] = and <8 x i1> [[TMP54]], [[TMP56]]10650; CHECK-NEXT: [[TMP63:%.*]] = bitcast <8 x i1> [[TMP61]] to i810651; CHECK-NEXT: [[TMP64:%.*]] = bitcast <8 x i1> [[TMP62]] to i810652; CHECK-NEXT: [[_MSPROP2:%.*]] = insertelement <8 x i8> [[_MSPROP1]], i8 [[TMP63]], i32 210653; CHECK-NEXT: [[VEC2:%.*]] = insertelement <8 x i8> [[VEC1]], i8 [[TMP64]], i32 210654; CHECK-NEXT: [[TMP65:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>10655; CHECK-NEXT: [[TMP66:%.*]] = bitcast i8 [[MASK]] to <8 x i1>10656; CHECK-NEXT: [[TMP67:%.*]] = and <8 x i1> zeroinitializer, [[TMP65]]10657; CHECK-NEXT: [[TMP68:%.*]] = and <8 x i1> zeroinitializer, [[TMP65]]10658; CHECK-NEXT: [[TMP69:%.*]] = and <8 x i1> zeroinitializer, [[TMP66]]10659; CHECK-NEXT: [[TMP70:%.*]] = or <8 x i1> [[TMP67]], [[TMP68]]10660; CHECK-NEXT: [[TMP71:%.*]] = or <8 x i1> [[TMP70]], [[TMP69]]10661; CHECK-NEXT: [[TMP72:%.*]] = and <8 x i1> zeroinitializer, [[TMP66]]10662; CHECK-NEXT: [[TMP73:%.*]] = bitcast <8 x i1> [[TMP71]] to i810663; CHECK-NEXT: [[TMP74:%.*]] = bitcast <8 x i1> [[TMP72]] to i810664; CHECK-NEXT: [[_MSPROP3:%.*]] = insertelement <8 x i8> [[_MSPROP2]], i8 [[TMP73]], i32 310665; CHECK-NEXT: [[VEC3:%.*]] = insertelement <8 x i8> [[VEC2]], i8 [[TMP74]], i32 310666; CHECK-NEXT: [[TMP75:%.*]] = xor <8 x i64> [[A0]], [[A1]]10667; CHECK-NEXT: [[TMP76:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]10668; CHECK-NEXT: [[TMP77:%.*]] = icmp ne <8 x i64> [[TMP76]], zeroinitializer10669; CHECK-NEXT: [[TMP78:%.*]] = xor <8 x i64> [[TMP76]], splat (i64 -1)10670; CHECK-NEXT: [[TMP79:%.*]] = and <8 x i64> [[TMP78]], [[TMP75]]10671; CHECK-NEXT: [[TMP80:%.*]] = icmp eq <8 x i64> [[TMP79]], zeroinitializer10672; CHECK-NEXT: [[_MSPROP_ICMP4:%.*]] = and <8 x i1> [[TMP77]], [[TMP80]]10673; CHECK-NEXT: [[TMP81:%.*]] = icmp ne <8 x i64> [[A0]], [[A1]]10674; CHECK-NEXT: [[TMP82:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>10675; CHECK-NEXT: [[TMP83:%.*]] = bitcast i8 [[MASK]] to <8 x i1>10676; CHECK-NEXT: [[TMP84:%.*]] = and <8 x i1> [[_MSPROP_ICMP4]], [[TMP82]]10677; CHECK-NEXT: [[TMP85:%.*]] = and <8 x i1> [[TMP81]], [[TMP82]]10678; CHECK-NEXT: [[TMP86:%.*]] = and <8 x i1> [[_MSPROP_ICMP4]], [[TMP83]]10679; CHECK-NEXT: [[TMP87:%.*]] = or <8 x i1> [[TMP84]], [[TMP85]]10680; CHECK-NEXT: [[TMP88:%.*]] = or <8 x i1> [[TMP87]], [[TMP86]]10681; CHECK-NEXT: [[TMP89:%.*]] = and <8 x i1> [[TMP81]], [[TMP83]]10682; CHECK-NEXT: [[TMP90:%.*]] = bitcast <8 x i1> [[TMP88]] to i810683; CHECK-NEXT: [[TMP91:%.*]] = bitcast <8 x i1> [[TMP89]] to i810684; CHECK-NEXT: [[_MSPROP5:%.*]] = insertelement <8 x i8> [[_MSPROP3]], i8 [[TMP90]], i32 410685; CHECK-NEXT: [[VEC4:%.*]] = insertelement <8 x i8> [[VEC3]], i8 [[TMP91]], i32 410686; CHECK-NEXT: [[TMP92:%.*]] = xor <8 x i64> [[A0]], splat (i64 -9223372036854775808)10687; CHECK-NEXT: [[TMP93:%.*]] = xor <8 x i64> [[TMP1]], splat (i64 -1)10688; CHECK-NEXT: [[TMP94:%.*]] = and <8 x i64> [[TMP92]], [[TMP93]]10689; CHECK-NEXT: [[TMP95:%.*]] = or <8 x i64> [[TMP92]], [[TMP1]]10690; CHECK-NEXT: [[TMP96:%.*]] = xor <8 x i64> [[A1]], splat (i64 -9223372036854775808)10691; CHECK-NEXT: [[TMP97:%.*]] = xor <8 x i64> [[TMP2]], splat (i64 -1)10692; CHECK-NEXT: [[TMP98:%.*]] = and <8 x i64> [[TMP96]], [[TMP97]]10693; CHECK-NEXT: [[TMP99:%.*]] = or <8 x i64> [[TMP96]], [[TMP2]]10694; CHECK-NEXT: [[TMP100:%.*]] = icmp uge <8 x i64> [[TMP94]], [[TMP99]]10695; CHECK-NEXT: [[TMP101:%.*]] = icmp uge <8 x i64> [[TMP95]], [[TMP98]]10696; CHECK-NEXT: [[TMP102:%.*]] = xor <8 x i1> [[TMP100]], [[TMP101]]10697; CHECK-NEXT: [[TMP103:%.*]] = icmp sge <8 x i64> [[A0]], [[A1]]10698; CHECK-NEXT: [[TMP104:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>10699; CHECK-NEXT: [[TMP105:%.*]] = bitcast i8 [[MASK]] to <8 x i1>10700; CHECK-NEXT: [[TMP106:%.*]] = and <8 x i1> [[TMP102]], [[TMP104]]10701; CHECK-NEXT: [[TMP107:%.*]] = and <8 x i1> [[TMP103]], [[TMP104]]10702; CHECK-NEXT: [[TMP108:%.*]] = and <8 x i1> [[TMP102]], [[TMP105]]10703; CHECK-NEXT: [[TMP109:%.*]] = or <8 x i1> [[TMP106]], [[TMP107]]10704; CHECK-NEXT: [[TMP110:%.*]] = or <8 x i1> [[TMP109]], [[TMP108]]10705; CHECK-NEXT: [[TMP111:%.*]] = and <8 x i1> [[TMP103]], [[TMP105]]10706; CHECK-NEXT: [[TMP112:%.*]] = bitcast <8 x i1> [[TMP110]] to i810707; CHECK-NEXT: [[TMP113:%.*]] = bitcast <8 x i1> [[TMP111]] to i810708; CHECK-NEXT: [[_MSPROP6:%.*]] = insertelement <8 x i8> [[_MSPROP5]], i8 [[TMP112]], i32 510709; CHECK-NEXT: [[VEC5:%.*]] = insertelement <8 x i8> [[VEC4]], i8 [[TMP113]], i32 510710; CHECK-NEXT: [[TMP114:%.*]] = xor <8 x i64> [[A0]], splat (i64 -9223372036854775808)10711; CHECK-NEXT: [[TMP115:%.*]] = xor <8 x i64> [[TMP1]], splat (i64 -1)10712; CHECK-NEXT: [[TMP116:%.*]] = and <8 x i64> [[TMP114]], [[TMP115]]10713; CHECK-NEXT: [[TMP117:%.*]] = or <8 x i64> [[TMP114]], [[TMP1]]10714; CHECK-NEXT: [[TMP118:%.*]] = xor <8 x i64> [[A1]], splat (i64 -9223372036854775808)10715; CHECK-NEXT: [[TMP119:%.*]] = xor <8 x i64> [[TMP2]], splat (i64 -1)10716; CHECK-NEXT: [[TMP120:%.*]] = and <8 x i64> [[TMP118]], [[TMP119]]10717; CHECK-NEXT: [[TMP121:%.*]] = or <8 x i64> [[TMP118]], [[TMP2]]10718; CHECK-NEXT: [[TMP122:%.*]] = icmp ugt <8 x i64> [[TMP116]], [[TMP121]]10719; CHECK-NEXT: [[TMP123:%.*]] = icmp ugt <8 x i64> [[TMP117]], [[TMP120]]10720; CHECK-NEXT: [[TMP124:%.*]] = xor <8 x i1> [[TMP122]], [[TMP123]]10721; CHECK-NEXT: [[TMP125:%.*]] = icmp sgt <8 x i64> [[A0]], [[A1]]10722; CHECK-NEXT: [[TMP126:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>10723; CHECK-NEXT: [[TMP127:%.*]] = bitcast i8 [[MASK]] to <8 x i1>10724; CHECK-NEXT: [[TMP128:%.*]] = and <8 x i1> [[TMP124]], [[TMP126]]10725; CHECK-NEXT: [[TMP129:%.*]] = and <8 x i1> [[TMP125]], [[TMP126]]10726; CHECK-NEXT: [[TMP130:%.*]] = and <8 x i1> [[TMP124]], [[TMP127]]10727; CHECK-NEXT: [[TMP131:%.*]] = or <8 x i1> [[TMP128]], [[TMP129]]10728; CHECK-NEXT: [[TMP132:%.*]] = or <8 x i1> [[TMP131]], [[TMP130]]10729; CHECK-NEXT: [[TMP133:%.*]] = and <8 x i1> [[TMP125]], [[TMP127]]10730; CHECK-NEXT: [[TMP134:%.*]] = bitcast <8 x i1> [[TMP132]] to i810731; CHECK-NEXT: [[TMP135:%.*]] = bitcast <8 x i1> [[TMP133]] to i810732; CHECK-NEXT: [[_MSPROP7:%.*]] = insertelement <8 x i8> [[_MSPROP6]], i8 [[TMP134]], i32 610733; CHECK-NEXT: [[VEC6:%.*]] = insertelement <8 x i8> [[VEC5]], i8 [[TMP135]], i32 610734; CHECK-NEXT: [[TMP136:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>10735; CHECK-NEXT: [[TMP137:%.*]] = bitcast i8 [[MASK]] to <8 x i1>10736; CHECK-NEXT: [[TMP138:%.*]] = and <8 x i1> zeroinitializer, [[TMP136]]10737; CHECK-NEXT: [[TMP139:%.*]] = and <8 x i1> splat (i1 true), [[TMP136]]10738; CHECK-NEXT: [[TMP140:%.*]] = and <8 x i1> zeroinitializer, [[TMP137]]10739; CHECK-NEXT: [[TMP141:%.*]] = or <8 x i1> [[TMP138]], [[TMP139]]10740; CHECK-NEXT: [[TMP142:%.*]] = or <8 x i1> [[TMP141]], [[TMP140]]10741; CHECK-NEXT: [[TMP143:%.*]] = and <8 x i1> splat (i1 true), [[TMP137]]10742; CHECK-NEXT: [[TMP144:%.*]] = bitcast <8 x i1> [[TMP142]] to i810743; CHECK-NEXT: [[TMP145:%.*]] = bitcast <8 x i1> [[TMP143]] to i810744; CHECK-NEXT: [[_MSPROP8:%.*]] = insertelement <8 x i8> [[_MSPROP7]], i8 [[TMP144]], i32 710745; CHECK-NEXT: [[VEC7:%.*]] = insertelement <8 x i8> [[VEC6]], i8 [[TMP145]], i32 710746; CHECK-NEXT: store <8 x i8> [[_MSPROP8]], ptr @__msan_retval_tls, align 810747; CHECK-NEXT: ret <8 x i8> [[VEC7]]10748;10749 %res0 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 0, i8 %mask)10750 %vec0 = insertelement <8 x i8> %extra_param, i8 %res0, i32 010751 %res1 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 1, i8 %mask)10752 %vec1 = insertelement <8 x i8> %vec0, i8 %res1, i32 110753 %res2 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 2, i8 %mask)10754 %vec2 = insertelement <8 x i8> %vec1, i8 %res2, i32 210755 %res3 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 3, i8 %mask)10756 %vec3 = insertelement <8 x i8> %vec2, i8 %res3, i32 310757 %res4 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 4, i8 %mask)10758 %vec4 = insertelement <8 x i8> %vec3, i8 %res4, i32 410759 %res5 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 5, i8 %mask)10760 %vec5 = insertelement <8 x i8> %vec4, i8 %res5, i32 510761 %res6 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 6, i8 %mask)10762 %vec6 = insertelement <8 x i8> %vec5, i8 %res6, i32 610763 %res7 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 7, i8 %mask)10764 %vec7 = insertelement <8 x i8> %vec6, i8 %res7, i32 710765 ret <8 x i8> %vec710766}10767 10768declare i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64>, <8 x i64>, i32, i8) nounwind readnone10769 10770define <8 x i8> @test_ucmp_q_512(<8 x i64> %a0, <8 x i64> %a1, <8 x i8> %extra_param) #0 {10771; CHECK-LABEL: @test_ucmp_q_512(10772; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 810773; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 810774; CHECK-NEXT: [[TMP69:%.*]] = load <8 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 810775; CHECK-NEXT: call void @llvm.donothing()10776; CHECK-NEXT: [[TMP3:%.*]] = xor <8 x i64> [[A0:%.*]], [[A1:%.*]]10777; CHECK-NEXT: [[TMP4:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]10778; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <8 x i64> [[TMP4]], zeroinitializer10779; CHECK-NEXT: [[TMP6:%.*]] = xor <8 x i64> [[TMP4]], splat (i64 -1)10780; CHECK-NEXT: [[TMP7:%.*]] = and <8 x i64> [[TMP6]], [[TMP3]]10781; CHECK-NEXT: [[TMP8:%.*]] = icmp eq <8 x i64> [[TMP7]], zeroinitializer10782; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <8 x i1> [[TMP5]], [[TMP8]]10783; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <8 x i64> [[A0]], [[A1]]10784; CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x i1> [[_MSPROP_ICMP]] to i810785; CHECK-NEXT: [[TMP11:%.*]] = bitcast <8 x i1> [[TMP9]] to i810786; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i8> [[TMP69]], i8 [[TMP10]], i32 010787; CHECK-NEXT: [[VEC0:%.*]] = insertelement <8 x i8> [[EXTRA_PARAM:%.*]], i8 [[TMP11]], i32 010788; CHECK-NEXT: [[TMP12:%.*]] = xor <8 x i64> [[TMP1]], splat (i64 -1)10789; CHECK-NEXT: [[TMP13:%.*]] = and <8 x i64> [[A0]], [[TMP12]]10790; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[A0]], [[TMP1]]10791; CHECK-NEXT: [[TMP15:%.*]] = xor <8 x i64> [[TMP2]], splat (i64 -1)10792; CHECK-NEXT: [[TMP16:%.*]] = and <8 x i64> [[A1]], [[TMP15]]10793; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[A1]], [[TMP2]]10794; CHECK-NEXT: [[TMP18:%.*]] = icmp ult <8 x i64> [[TMP13]], [[TMP17]]10795; CHECK-NEXT: [[TMP19:%.*]] = icmp ult <8 x i64> [[TMP14]], [[TMP16]]10796; CHECK-NEXT: [[TMP20:%.*]] = xor <8 x i1> [[TMP18]], [[TMP19]]10797; CHECK-NEXT: [[TMP21:%.*]] = icmp ult <8 x i64> [[A0]], [[A1]]10798; CHECK-NEXT: [[TMP22:%.*]] = bitcast <8 x i1> [[TMP20]] to i810799; CHECK-NEXT: [[TMP23:%.*]] = bitcast <8 x i1> [[TMP21]] to i810800; CHECK-NEXT: [[_MSPROP1:%.*]] = insertelement <8 x i8> [[_MSPROP]], i8 [[TMP22]], i32 110801; CHECK-NEXT: [[VEC1:%.*]] = insertelement <8 x i8> [[VEC0]], i8 [[TMP23]], i32 110802; CHECK-NEXT: [[TMP24:%.*]] = xor <8 x i64> [[TMP1]], splat (i64 -1)10803; CHECK-NEXT: [[TMP25:%.*]] = and <8 x i64> [[A0]], [[TMP24]]10804; CHECK-NEXT: [[TMP26:%.*]] = or <8 x i64> [[A0]], [[TMP1]]10805; CHECK-NEXT: [[TMP27:%.*]] = xor <8 x i64> [[TMP2]], splat (i64 -1)10806; CHECK-NEXT: [[TMP28:%.*]] = and <8 x i64> [[A1]], [[TMP27]]10807; CHECK-NEXT: [[TMP29:%.*]] = or <8 x i64> [[A1]], [[TMP2]]10808; CHECK-NEXT: [[TMP30:%.*]] = icmp ule <8 x i64> [[TMP25]], [[TMP29]]10809; CHECK-NEXT: [[TMP31:%.*]] = icmp ule <8 x i64> [[TMP26]], [[TMP28]]10810; CHECK-NEXT: [[TMP32:%.*]] = xor <8 x i1> [[TMP30]], [[TMP31]]10811; CHECK-NEXT: [[TMP33:%.*]] = icmp ule <8 x i64> [[A0]], [[A1]]10812; CHECK-NEXT: [[TMP34:%.*]] = bitcast <8 x i1> [[TMP32]] to i810813; CHECK-NEXT: [[TMP35:%.*]] = bitcast <8 x i1> [[TMP33]] to i810814; CHECK-NEXT: [[_MSPROP2:%.*]] = insertelement <8 x i8> [[_MSPROP1]], i8 [[TMP34]], i32 210815; CHECK-NEXT: [[VEC2:%.*]] = insertelement <8 x i8> [[VEC1]], i8 [[TMP35]], i32 210816; CHECK-NEXT: [[_MSPROP3:%.*]] = insertelement <8 x i8> [[_MSPROP2]], i8 0, i32 310817; CHECK-NEXT: [[VEC3:%.*]] = insertelement <8 x i8> [[VEC2]], i8 0, i32 310818; CHECK-NEXT: [[TMP36:%.*]] = xor <8 x i64> [[A0]], [[A1]]10819; CHECK-NEXT: [[TMP37:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]10820; CHECK-NEXT: [[TMP38:%.*]] = icmp ne <8 x i64> [[TMP37]], zeroinitializer10821; CHECK-NEXT: [[TMP39:%.*]] = xor <8 x i64> [[TMP37]], splat (i64 -1)10822; CHECK-NEXT: [[TMP40:%.*]] = and <8 x i64> [[TMP39]], [[TMP36]]10823; CHECK-NEXT: [[TMP41:%.*]] = icmp eq <8 x i64> [[TMP40]], zeroinitializer10824; CHECK-NEXT: [[_MSPROP_ICMP4:%.*]] = and <8 x i1> [[TMP38]], [[TMP41]]10825; CHECK-NEXT: [[TMP42:%.*]] = icmp ne <8 x i64> [[A0]], [[A1]]10826; CHECK-NEXT: [[TMP43:%.*]] = bitcast <8 x i1> [[_MSPROP_ICMP4]] to i810827; CHECK-NEXT: [[TMP44:%.*]] = bitcast <8 x i1> [[TMP42]] to i810828; CHECK-NEXT: [[_MSPROP5:%.*]] = insertelement <8 x i8> [[_MSPROP3]], i8 [[TMP43]], i32 410829; CHECK-NEXT: [[VEC4:%.*]] = insertelement <8 x i8> [[VEC3]], i8 [[TMP44]], i32 410830; CHECK-NEXT: [[TMP45:%.*]] = xor <8 x i64> [[TMP1]], splat (i64 -1)10831; CHECK-NEXT: [[TMP46:%.*]] = and <8 x i64> [[A0]], [[TMP45]]10832; CHECK-NEXT: [[TMP47:%.*]] = or <8 x i64> [[A0]], [[TMP1]]10833; CHECK-NEXT: [[TMP48:%.*]] = xor <8 x i64> [[TMP2]], splat (i64 -1)10834; CHECK-NEXT: [[TMP49:%.*]] = and <8 x i64> [[A1]], [[TMP48]]10835; CHECK-NEXT: [[TMP50:%.*]] = or <8 x i64> [[A1]], [[TMP2]]10836; CHECK-NEXT: [[TMP51:%.*]] = icmp uge <8 x i64> [[TMP46]], [[TMP50]]10837; CHECK-NEXT: [[TMP52:%.*]] = icmp uge <8 x i64> [[TMP47]], [[TMP49]]10838; CHECK-NEXT: [[TMP53:%.*]] = xor <8 x i1> [[TMP51]], [[TMP52]]10839; CHECK-NEXT: [[TMP54:%.*]] = icmp uge <8 x i64> [[A0]], [[A1]]10840; CHECK-NEXT: [[TMP55:%.*]] = bitcast <8 x i1> [[TMP53]] to i810841; CHECK-NEXT: [[TMP56:%.*]] = bitcast <8 x i1> [[TMP54]] to i810842; CHECK-NEXT: [[_MSPROP6:%.*]] = insertelement <8 x i8> [[_MSPROP5]], i8 [[TMP55]], i32 510843; CHECK-NEXT: [[VEC5:%.*]] = insertelement <8 x i8> [[VEC4]], i8 [[TMP56]], i32 510844; CHECK-NEXT: [[TMP57:%.*]] = xor <8 x i64> [[TMP1]], splat (i64 -1)10845; CHECK-NEXT: [[TMP58:%.*]] = and <8 x i64> [[A0]], [[TMP57]]10846; CHECK-NEXT: [[TMP59:%.*]] = or <8 x i64> [[A0]], [[TMP1]]10847; CHECK-NEXT: [[TMP60:%.*]] = xor <8 x i64> [[TMP2]], splat (i64 -1)10848; CHECK-NEXT: [[TMP61:%.*]] = and <8 x i64> [[A1]], [[TMP60]]10849; CHECK-NEXT: [[TMP62:%.*]] = or <8 x i64> [[A1]], [[TMP2]]10850; CHECK-NEXT: [[TMP63:%.*]] = icmp ugt <8 x i64> [[TMP58]], [[TMP62]]10851; CHECK-NEXT: [[TMP64:%.*]] = icmp ugt <8 x i64> [[TMP59]], [[TMP61]]10852; CHECK-NEXT: [[TMP65:%.*]] = xor <8 x i1> [[TMP63]], [[TMP64]]10853; CHECK-NEXT: [[TMP66:%.*]] = icmp ugt <8 x i64> [[A0]], [[A1]]10854; CHECK-NEXT: [[TMP67:%.*]] = bitcast <8 x i1> [[TMP65]] to i810855; CHECK-NEXT: [[TMP68:%.*]] = bitcast <8 x i1> [[TMP66]] to i810856; CHECK-NEXT: [[_MSPROP7:%.*]] = insertelement <8 x i8> [[_MSPROP6]], i8 [[TMP67]], i32 610857; CHECK-NEXT: [[VEC6:%.*]] = insertelement <8 x i8> [[VEC5]], i8 [[TMP68]], i32 610858; CHECK-NEXT: [[_MSPROP8:%.*]] = insertelement <8 x i8> [[_MSPROP7]], i8 0, i32 710859; CHECK-NEXT: [[VEC7:%.*]] = insertelement <8 x i8> [[VEC6]], i8 -1, i32 710860; CHECK-NEXT: store <8 x i8> [[_MSPROP8]], ptr @__msan_retval_tls, align 810861; CHECK-NEXT: ret <8 x i8> [[VEC7]]10862;10863 %res0 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 0, i8 -1)10864 %vec0 = insertelement <8 x i8> %extra_param, i8 %res0, i32 010865 %res1 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 1, i8 -1)10866 %vec1 = insertelement <8 x i8> %vec0, i8 %res1, i32 110867 %res2 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 2, i8 -1)10868 %vec2 = insertelement <8 x i8> %vec1, i8 %res2, i32 210869 %res3 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 3, i8 -1)10870 %vec3 = insertelement <8 x i8> %vec2, i8 %res3, i32 310871 %res4 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 4, i8 -1)10872 %vec4 = insertelement <8 x i8> %vec3, i8 %res4, i32 410873 %res5 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 5, i8 -1)10874 %vec5 = insertelement <8 x i8> %vec4, i8 %res5, i32 510875 %res6 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 6, i8 -1)10876 %vec6 = insertelement <8 x i8> %vec5, i8 %res6, i32 610877 %res7 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 7, i8 -1)10878 %vec7 = insertelement <8 x i8> %vec6, i8 %res7, i32 710879 ret <8 x i8> %vec710880}10881 10882define <8 x i8> @test_mask_ucmp_q_512(<8 x i64> %a0, <8 x i64> %a1, i8 %mask, <8 x i8> %extra_param) #0 {10883;10884; CHECK-LABEL: @test_mask_ucmp_q_512(10885; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 810886; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 810887; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 810888; CHECK-NEXT: [[TMP138:%.*]] = load <8 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 810889; CHECK-NEXT: call void @llvm.donothing()10890; CHECK-NEXT: [[TMP4:%.*]] = xor <8 x i64> [[A0:%.*]], [[A1:%.*]]10891; CHECK-NEXT: [[TMP5:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]10892; CHECK-NEXT: [[TMP6:%.*]] = icmp ne <8 x i64> [[TMP5]], zeroinitializer10893; CHECK-NEXT: [[TMP7:%.*]] = xor <8 x i64> [[TMP5]], splat (i64 -1)10894; CHECK-NEXT: [[TMP8:%.*]] = and <8 x i64> [[TMP7]], [[TMP4]]10895; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <8 x i64> [[TMP8]], zeroinitializer10896; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <8 x i1> [[TMP6]], [[TMP9]]10897; CHECK-NEXT: [[TMP10:%.*]] = icmp eq <8 x i64> [[A0]], [[A1]]10898; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>10899; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>10900; CHECK-NEXT: [[TMP13:%.*]] = and <8 x i1> [[_MSPROP_ICMP]], [[TMP11]]10901; CHECK-NEXT: [[TMP14:%.*]] = and <8 x i1> [[TMP10]], [[TMP11]]10902; CHECK-NEXT: [[TMP15:%.*]] = and <8 x i1> [[_MSPROP_ICMP]], [[TMP12]]10903; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i1> [[TMP13]], [[TMP14]]10904; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i1> [[TMP16]], [[TMP15]]10905; CHECK-NEXT: [[TMP18:%.*]] = and <8 x i1> [[TMP10]], [[TMP12]]10906; CHECK-NEXT: [[TMP19:%.*]] = bitcast <8 x i1> [[TMP17]] to i810907; CHECK-NEXT: [[TMP20:%.*]] = bitcast <8 x i1> [[TMP18]] to i810908; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i8> [[TMP138]], i8 [[TMP19]], i32 010909; CHECK-NEXT: [[VEC0:%.*]] = insertelement <8 x i8> [[EXTRA_PARAM:%.*]], i8 [[TMP20]], i32 010910; CHECK-NEXT: [[TMP21:%.*]] = xor <8 x i64> [[TMP1]], splat (i64 -1)10911; CHECK-NEXT: [[TMP22:%.*]] = and <8 x i64> [[A0]], [[TMP21]]10912; CHECK-NEXT: [[TMP23:%.*]] = or <8 x i64> [[A0]], [[TMP1]]10913; CHECK-NEXT: [[TMP24:%.*]] = xor <8 x i64> [[TMP2]], splat (i64 -1)10914; CHECK-NEXT: [[TMP25:%.*]] = and <8 x i64> [[A1]], [[TMP24]]10915; CHECK-NEXT: [[TMP26:%.*]] = or <8 x i64> [[A1]], [[TMP2]]10916; CHECK-NEXT: [[TMP27:%.*]] = icmp ult <8 x i64> [[TMP22]], [[TMP26]]10917; CHECK-NEXT: [[TMP28:%.*]] = icmp ult <8 x i64> [[TMP23]], [[TMP25]]10918; CHECK-NEXT: [[TMP29:%.*]] = xor <8 x i1> [[TMP27]], [[TMP28]]10919; CHECK-NEXT: [[TMP30:%.*]] = icmp ult <8 x i64> [[A0]], [[A1]]10920; CHECK-NEXT: [[TMP31:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>10921; CHECK-NEXT: [[TMP32:%.*]] = bitcast i8 [[MASK]] to <8 x i1>10922; CHECK-NEXT: [[TMP33:%.*]] = and <8 x i1> [[TMP29]], [[TMP31]]10923; CHECK-NEXT: [[TMP34:%.*]] = and <8 x i1> [[TMP30]], [[TMP31]]10924; CHECK-NEXT: [[TMP35:%.*]] = and <8 x i1> [[TMP29]], [[TMP32]]10925; CHECK-NEXT: [[TMP36:%.*]] = or <8 x i1> [[TMP33]], [[TMP34]]10926; CHECK-NEXT: [[TMP37:%.*]] = or <8 x i1> [[TMP36]], [[TMP35]]10927; CHECK-NEXT: [[TMP38:%.*]] = and <8 x i1> [[TMP30]], [[TMP32]]10928; CHECK-NEXT: [[TMP39:%.*]] = bitcast <8 x i1> [[TMP37]] to i810929; CHECK-NEXT: [[TMP40:%.*]] = bitcast <8 x i1> [[TMP38]] to i810930; CHECK-NEXT: [[_MSPROP1:%.*]] = insertelement <8 x i8> [[_MSPROP]], i8 [[TMP39]], i32 110931; CHECK-NEXT: [[VEC1:%.*]] = insertelement <8 x i8> [[VEC0]], i8 [[TMP40]], i32 110932; CHECK-NEXT: [[TMP41:%.*]] = xor <8 x i64> [[TMP1]], splat (i64 -1)10933; CHECK-NEXT: [[TMP42:%.*]] = and <8 x i64> [[A0]], [[TMP41]]10934; CHECK-NEXT: [[TMP43:%.*]] = or <8 x i64> [[A0]], [[TMP1]]10935; CHECK-NEXT: [[TMP44:%.*]] = xor <8 x i64> [[TMP2]], splat (i64 -1)10936; CHECK-NEXT: [[TMP45:%.*]] = and <8 x i64> [[A1]], [[TMP44]]10937; CHECK-NEXT: [[TMP46:%.*]] = or <8 x i64> [[A1]], [[TMP2]]10938; CHECK-NEXT: [[TMP47:%.*]] = icmp ule <8 x i64> [[TMP42]], [[TMP46]]10939; CHECK-NEXT: [[TMP48:%.*]] = icmp ule <8 x i64> [[TMP43]], [[TMP45]]10940; CHECK-NEXT: [[TMP49:%.*]] = xor <8 x i1> [[TMP47]], [[TMP48]]10941; CHECK-NEXT: [[TMP50:%.*]] = icmp ule <8 x i64> [[A0]], [[A1]]10942; CHECK-NEXT: [[TMP51:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>10943; CHECK-NEXT: [[TMP52:%.*]] = bitcast i8 [[MASK]] to <8 x i1>10944; CHECK-NEXT: [[TMP53:%.*]] = and <8 x i1> [[TMP49]], [[TMP51]]10945; CHECK-NEXT: [[TMP54:%.*]] = and <8 x i1> [[TMP50]], [[TMP51]]10946; CHECK-NEXT: [[TMP55:%.*]] = and <8 x i1> [[TMP49]], [[TMP52]]10947; CHECK-NEXT: [[TMP56:%.*]] = or <8 x i1> [[TMP53]], [[TMP54]]10948; CHECK-NEXT: [[TMP57:%.*]] = or <8 x i1> [[TMP56]], [[TMP55]]10949; CHECK-NEXT: [[TMP58:%.*]] = and <8 x i1> [[TMP50]], [[TMP52]]10950; CHECK-NEXT: [[TMP59:%.*]] = bitcast <8 x i1> [[TMP57]] to i810951; CHECK-NEXT: [[TMP60:%.*]] = bitcast <8 x i1> [[TMP58]] to i810952; CHECK-NEXT: [[_MSPROP2:%.*]] = insertelement <8 x i8> [[_MSPROP1]], i8 [[TMP59]], i32 210953; CHECK-NEXT: [[VEC2:%.*]] = insertelement <8 x i8> [[VEC1]], i8 [[TMP60]], i32 210954; CHECK-NEXT: [[TMP61:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>10955; CHECK-NEXT: [[TMP62:%.*]] = bitcast i8 [[MASK]] to <8 x i1>10956; CHECK-NEXT: [[TMP63:%.*]] = and <8 x i1> zeroinitializer, [[TMP61]]10957; CHECK-NEXT: [[TMP64:%.*]] = and <8 x i1> zeroinitializer, [[TMP61]]10958; CHECK-NEXT: [[TMP65:%.*]] = and <8 x i1> zeroinitializer, [[TMP62]]10959; CHECK-NEXT: [[TMP66:%.*]] = or <8 x i1> [[TMP63]], [[TMP64]]10960; CHECK-NEXT: [[TMP67:%.*]] = or <8 x i1> [[TMP66]], [[TMP65]]10961; CHECK-NEXT: [[TMP68:%.*]] = and <8 x i1> zeroinitializer, [[TMP62]]10962; CHECK-NEXT: [[TMP69:%.*]] = bitcast <8 x i1> [[TMP67]] to i810963; CHECK-NEXT: [[TMP70:%.*]] = bitcast <8 x i1> [[TMP68]] to i810964; CHECK-NEXT: [[_MSPROP3:%.*]] = insertelement <8 x i8> [[_MSPROP2]], i8 [[TMP69]], i32 310965; CHECK-NEXT: [[VEC3:%.*]] = insertelement <8 x i8> [[VEC2]], i8 [[TMP70]], i32 310966; CHECK-NEXT: [[TMP71:%.*]] = xor <8 x i64> [[A0]], [[A1]]10967; CHECK-NEXT: [[TMP72:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]10968; CHECK-NEXT: [[TMP73:%.*]] = icmp ne <8 x i64> [[TMP72]], zeroinitializer10969; CHECK-NEXT: [[TMP74:%.*]] = xor <8 x i64> [[TMP72]], splat (i64 -1)10970; CHECK-NEXT: [[TMP75:%.*]] = and <8 x i64> [[TMP74]], [[TMP71]]10971; CHECK-NEXT: [[TMP76:%.*]] = icmp eq <8 x i64> [[TMP75]], zeroinitializer10972; CHECK-NEXT: [[_MSPROP_ICMP4:%.*]] = and <8 x i1> [[TMP73]], [[TMP76]]10973; CHECK-NEXT: [[TMP77:%.*]] = icmp ne <8 x i64> [[A0]], [[A1]]10974; CHECK-NEXT: [[TMP78:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>10975; CHECK-NEXT: [[TMP79:%.*]] = bitcast i8 [[MASK]] to <8 x i1>10976; CHECK-NEXT: [[TMP80:%.*]] = and <8 x i1> [[_MSPROP_ICMP4]], [[TMP78]]10977; CHECK-NEXT: [[TMP81:%.*]] = and <8 x i1> [[TMP77]], [[TMP78]]10978; CHECK-NEXT: [[TMP82:%.*]] = and <8 x i1> [[_MSPROP_ICMP4]], [[TMP79]]10979; CHECK-NEXT: [[TMP83:%.*]] = or <8 x i1> [[TMP80]], [[TMP81]]10980; CHECK-NEXT: [[TMP84:%.*]] = or <8 x i1> [[TMP83]], [[TMP82]]10981; CHECK-NEXT: [[TMP85:%.*]] = and <8 x i1> [[TMP77]], [[TMP79]]10982; CHECK-NEXT: [[TMP86:%.*]] = bitcast <8 x i1> [[TMP84]] to i810983; CHECK-NEXT: [[TMP87:%.*]] = bitcast <8 x i1> [[TMP85]] to i810984; CHECK-NEXT: [[_MSPROP5:%.*]] = insertelement <8 x i8> [[_MSPROP3]], i8 [[TMP86]], i32 410985; CHECK-NEXT: [[VEC4:%.*]] = insertelement <8 x i8> [[VEC3]], i8 [[TMP87]], i32 410986; CHECK-NEXT: [[TMP88:%.*]] = xor <8 x i64> [[TMP1]], splat (i64 -1)10987; CHECK-NEXT: [[TMP89:%.*]] = and <8 x i64> [[A0]], [[TMP88]]10988; CHECK-NEXT: [[TMP90:%.*]] = or <8 x i64> [[A0]], [[TMP1]]10989; CHECK-NEXT: [[TMP91:%.*]] = xor <8 x i64> [[TMP2]], splat (i64 -1)10990; CHECK-NEXT: [[TMP92:%.*]] = and <8 x i64> [[A1]], [[TMP91]]10991; CHECK-NEXT: [[TMP93:%.*]] = or <8 x i64> [[A1]], [[TMP2]]10992; CHECK-NEXT: [[TMP94:%.*]] = icmp uge <8 x i64> [[TMP89]], [[TMP93]]10993; CHECK-NEXT: [[TMP95:%.*]] = icmp uge <8 x i64> [[TMP90]], [[TMP92]]10994; CHECK-NEXT: [[TMP96:%.*]] = xor <8 x i1> [[TMP94]], [[TMP95]]10995; CHECK-NEXT: [[TMP97:%.*]] = icmp uge <8 x i64> [[A0]], [[A1]]10996; CHECK-NEXT: [[TMP98:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>10997; CHECK-NEXT: [[TMP99:%.*]] = bitcast i8 [[MASK]] to <8 x i1>10998; CHECK-NEXT: [[TMP100:%.*]] = and <8 x i1> [[TMP96]], [[TMP98]]10999; CHECK-NEXT: [[TMP101:%.*]] = and <8 x i1> [[TMP97]], [[TMP98]]11000; CHECK-NEXT: [[TMP102:%.*]] = and <8 x i1> [[TMP96]], [[TMP99]]11001; CHECK-NEXT: [[TMP103:%.*]] = or <8 x i1> [[TMP100]], [[TMP101]]11002; CHECK-NEXT: [[TMP104:%.*]] = or <8 x i1> [[TMP103]], [[TMP102]]11003; CHECK-NEXT: [[TMP105:%.*]] = and <8 x i1> [[TMP97]], [[TMP99]]11004; CHECK-NEXT: [[TMP106:%.*]] = bitcast <8 x i1> [[TMP104]] to i811005; CHECK-NEXT: [[TMP107:%.*]] = bitcast <8 x i1> [[TMP105]] to i811006; CHECK-NEXT: [[_MSPROP6:%.*]] = insertelement <8 x i8> [[_MSPROP5]], i8 [[TMP106]], i32 511007; CHECK-NEXT: [[VEC5:%.*]] = insertelement <8 x i8> [[VEC4]], i8 [[TMP107]], i32 511008; CHECK-NEXT: [[TMP108:%.*]] = xor <8 x i64> [[TMP1]], splat (i64 -1)11009; CHECK-NEXT: [[TMP109:%.*]] = and <8 x i64> [[A0]], [[TMP108]]11010; CHECK-NEXT: [[TMP110:%.*]] = or <8 x i64> [[A0]], [[TMP1]]11011; CHECK-NEXT: [[TMP111:%.*]] = xor <8 x i64> [[TMP2]], splat (i64 -1)11012; CHECK-NEXT: [[TMP112:%.*]] = and <8 x i64> [[A1]], [[TMP111]]11013; CHECK-NEXT: [[TMP113:%.*]] = or <8 x i64> [[A1]], [[TMP2]]11014; CHECK-NEXT: [[TMP114:%.*]] = icmp ugt <8 x i64> [[TMP109]], [[TMP113]]11015; CHECK-NEXT: [[TMP115:%.*]] = icmp ugt <8 x i64> [[TMP110]], [[TMP112]]11016; CHECK-NEXT: [[TMP116:%.*]] = xor <8 x i1> [[TMP114]], [[TMP115]]11017; CHECK-NEXT: [[TMP117:%.*]] = icmp ugt <8 x i64> [[A0]], [[A1]]11018; CHECK-NEXT: [[TMP118:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>11019; CHECK-NEXT: [[TMP119:%.*]] = bitcast i8 [[MASK]] to <8 x i1>11020; CHECK-NEXT: [[TMP120:%.*]] = and <8 x i1> [[TMP116]], [[TMP118]]11021; CHECK-NEXT: [[TMP121:%.*]] = and <8 x i1> [[TMP117]], [[TMP118]]11022; CHECK-NEXT: [[TMP122:%.*]] = and <8 x i1> [[TMP116]], [[TMP119]]11023; CHECK-NEXT: [[TMP123:%.*]] = or <8 x i1> [[TMP120]], [[TMP121]]11024; CHECK-NEXT: [[TMP124:%.*]] = or <8 x i1> [[TMP123]], [[TMP122]]11025; CHECK-NEXT: [[TMP125:%.*]] = and <8 x i1> [[TMP117]], [[TMP119]]11026; CHECK-NEXT: [[TMP126:%.*]] = bitcast <8 x i1> [[TMP124]] to i811027; CHECK-NEXT: [[TMP127:%.*]] = bitcast <8 x i1> [[TMP125]] to i811028; CHECK-NEXT: [[_MSPROP7:%.*]] = insertelement <8 x i8> [[_MSPROP6]], i8 [[TMP126]], i32 611029; CHECK-NEXT: [[VEC6:%.*]] = insertelement <8 x i8> [[VEC5]], i8 [[TMP127]], i32 611030; CHECK-NEXT: [[TMP128:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>11031; CHECK-NEXT: [[TMP129:%.*]] = bitcast i8 [[MASK]] to <8 x i1>11032; CHECK-NEXT: [[TMP130:%.*]] = and <8 x i1> zeroinitializer, [[TMP128]]11033; CHECK-NEXT: [[TMP131:%.*]] = and <8 x i1> splat (i1 true), [[TMP128]]11034; CHECK-NEXT: [[TMP132:%.*]] = and <8 x i1> zeroinitializer, [[TMP129]]11035; CHECK-NEXT: [[TMP133:%.*]] = or <8 x i1> [[TMP130]], [[TMP131]]11036; CHECK-NEXT: [[TMP134:%.*]] = or <8 x i1> [[TMP133]], [[TMP132]]11037; CHECK-NEXT: [[TMP135:%.*]] = and <8 x i1> splat (i1 true), [[TMP129]]11038; CHECK-NEXT: [[TMP136:%.*]] = bitcast <8 x i1> [[TMP134]] to i811039; CHECK-NEXT: [[TMP137:%.*]] = bitcast <8 x i1> [[TMP135]] to i811040; CHECK-NEXT: [[_MSPROP8:%.*]] = insertelement <8 x i8> [[_MSPROP7]], i8 [[TMP136]], i32 711041; CHECK-NEXT: [[VEC7:%.*]] = insertelement <8 x i8> [[VEC6]], i8 [[TMP137]], i32 711042; CHECK-NEXT: store <8 x i8> [[_MSPROP8]], ptr @__msan_retval_tls, align 811043; CHECK-NEXT: ret <8 x i8> [[VEC7]]11044;11045 %res0 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 0, i8 %mask)11046 %vec0 = insertelement <8 x i8> %extra_param, i8 %res0, i32 011047 %res1 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 1, i8 %mask)11048 %vec1 = insertelement <8 x i8> %vec0, i8 %res1, i32 111049 %res2 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 2, i8 %mask)11050 %vec2 = insertelement <8 x i8> %vec1, i8 %res2, i32 211051 %res3 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 3, i8 %mask)11052 %vec3 = insertelement <8 x i8> %vec2, i8 %res3, i32 311053 %res4 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 4, i8 %mask)11054 %vec4 = insertelement <8 x i8> %vec3, i8 %res4, i32 411055 %res5 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 5, i8 %mask)11056 %vec5 = insertelement <8 x i8> %vec4, i8 %res5, i32 511057 %res6 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 6, i8 %mask)11058 %vec6 = insertelement <8 x i8> %vec5, i8 %res6, i32 611059 %res7 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 7, i8 %mask)11060 %vec7 = insertelement <8 x i8> %vec6, i8 %res7, i32 711061 ret <8 x i8> %vec711062}11063 11064declare i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64>, <8 x i64>, i32, i8) nounwind readnone11065 11066declare <16 x float> @llvm.x86.avx512.mask.broadcastf32x4.512(<4 x float>, <16 x float>, i16)11067 11068define <16 x float>@test_int_x86_avx512_mask_broadcastf32x4_512(<4 x float> %x0, <16 x float> %x2, i16 %mask) #0 {11069;11070; CHECK-LABEL: @test_int_x86_avx512_mask_broadcastf32x4_512(11071; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 811072; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 811073; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 811074; CHECK-NEXT: call void @llvm.donothing()11075; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> [[TMP1]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11076; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[X0:%.*]], <4 x float> [[X0]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11077; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> [[TMP1]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11078; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <4 x float> [[X0]], <4 x float> [[X0]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11079; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>11080; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>11081; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP1]], <16 x i32> [[TMP3]]11082; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x float> [[TMP5]] to <16 x i32>11083; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x float> [[X2:%.*]] to <16 x i32>11084; CHECK-NEXT: [[TMP11:%.*]] = xor <16 x i32> [[TMP9]], [[TMP10]]11085; CHECK-NEXT: [[TMP12:%.*]] = or <16 x i32> [[TMP11]], [[_MSPROP1]]11086; CHECK-NEXT: [[TMP13:%.*]] = or <16 x i32> [[TMP12]], [[TMP3]]11087; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP13]], <16 x i32> [[TMP8]]11088; CHECK-NEXT: [[TMP14:%.*]] = select <16 x i1> [[TMP7]], <16 x float> [[TMP5]], <16 x float> [[X2]]11089; CHECK-NEXT: [[_MSPROP2:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> [[TMP1]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11090; CHECK-NEXT: [[TMP15:%.*]] = shufflevector <4 x float> [[X0]], <4 x float> [[X0]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11091; CHECK-NEXT: [[TMP16:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>11092; CHECK-NEXT: [[TMP17:%.*]] = bitcast i16 [[MASK]] to <16 x i1>11093; CHECK-NEXT: [[TMP18:%.*]] = select <16 x i1> [[TMP17]], <16 x i32> [[_MSPROP2]], <16 x i32> zeroinitializer11094; CHECK-NEXT: [[TMP19:%.*]] = bitcast <16 x float> [[TMP15]] to <16 x i32>11095; CHECK-NEXT: [[TMP20:%.*]] = xor <16 x i32> [[TMP19]], zeroinitializer11096; CHECK-NEXT: [[TMP21:%.*]] = or <16 x i32> [[TMP20]], [[_MSPROP2]]11097; CHECK-NEXT: [[TMP22:%.*]] = or <16 x i32> [[TMP21]], zeroinitializer11098; CHECK-NEXT: [[_MSPROP_SELECT3:%.*]] = select <16 x i1> [[TMP16]], <16 x i32> [[TMP22]], <16 x i32> [[TMP18]]11099; CHECK-NEXT: [[TMP23:%.*]] = select <16 x i1> [[TMP17]], <16 x float> [[TMP15]], <16 x float> zeroinitializer11100; CHECK-NEXT: [[_MSPROP4:%.*]] = or <16 x i32> [[_MSPROP]], [[_MSPROP_SELECT]]11101; CHECK-NEXT: [[RES4:%.*]] = fadd <16 x float> [[TMP4]], [[TMP14]]11102; CHECK-NEXT: [[_MSPROP5:%.*]] = or <16 x i32> [[_MSPROP_SELECT3]], [[_MSPROP4]]11103; CHECK-NEXT: [[RES5:%.*]] = fadd <16 x float> [[TMP23]], [[RES4]]11104; CHECK-NEXT: store <16 x i32> [[_MSPROP5]], ptr @__msan_retval_tls, align 811105; CHECK-NEXT: ret <16 x float> [[RES5]]11106;11107 %res1 = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x4.512(<4 x float> %x0, <16 x float> %x2, i16 -1)11108 %res2 = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x4.512(<4 x float> %x0, <16 x float> %x2, i16 %mask)11109 %res3 = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x4.512(<4 x float> %x0, <16 x float> zeroinitializer, i16 %mask)11110 %res4 = fadd <16 x float> %res1, %res211111 %res5 = fadd <16 x float> %res3, %res411112 ret <16 x float> %res511113}11114 11115define <16 x float>@test_int_x86_avx512_mask_broadcastf32x4_512_load(ptr %x0ptr, <16 x float> %x2, i16 %mask) #0 {11116;11117; CHECK-LABEL: @test_int_x86_avx512_mask_broadcastf32x4_512_load(11118; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 811119; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 811120; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 811121; CHECK-NEXT: call void @llvm.donothing()11122; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 011123; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]11124; CHECK: 4:11125; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]11126; CHECK-NEXT: unreachable11127; CHECK: 5:11128; CHECK-NEXT: [[X0:%.*]] = load <4 x float>, ptr [[X0PTR:%.*]], align 1611129; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[X0PTR]] to i6411130; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 8796093022208011131; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr11132; CHECK-NEXT: [[_MSLD:%.*]] = load <4 x i32>, ptr [[TMP8]], align 1611133; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i32> [[_MSLD]], <4 x i32> [[_MSLD]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11134; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <4 x float> [[X0]], <4 x float> [[X0]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11135; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>11136; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>11137; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP3]]11138; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x float> [[TMP9]] to <16 x i32>11139; CHECK-NEXT: [[TMP14:%.*]] = bitcast <16 x float> [[X2:%.*]] to <16 x i32>11140; CHECK-NEXT: [[TMP15:%.*]] = xor <16 x i32> [[TMP13]], [[TMP14]]11141; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i32> [[TMP15]], [[_MSPROP]]11142; CHECK-NEXT: [[TMP17:%.*]] = or <16 x i32> [[TMP16]], [[TMP3]]11143; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP17]], <16 x i32> [[TMP12]]11144; CHECK-NEXT: [[TMP18:%.*]] = select <16 x i1> [[TMP11]], <16 x float> [[TMP9]], <16 x float> [[X2]]11145; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 811146; CHECK-NEXT: ret <16 x float> [[TMP18]]11147;11148 %x0 = load <4 x float>, ptr %x0ptr11149 %res = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x4.512(<4 x float> %x0, <16 x float> %x2, i16 %mask)11150 ret <16 x float> %res11151}11152 11153declare <8 x double> @llvm.x86.avx512.mask.broadcastf64x4.512(<4 x double>, <8 x double>, i8)11154 11155define <8 x double>@test_int_x86_avx512_broadcastf64x4_512(<4 x double> %x0, <8 x double> %x2) #0 {11156; CHECK-LABEL: @test_int_x86_avx512_broadcastf64x4_512(11157; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i64>, ptr @__msan_param_tls, align 811158; CHECK-NEXT: call void @llvm.donothing()11159; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i64> [[TMP1]], <4 x i64> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11160; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x double> [[X0:%.*]], <4 x double> [[X0]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11161; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 811162; CHECK-NEXT: ret <8 x double> [[TMP2]]11163;11164 %res = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x4.512(<4 x double> %x0, <8 x double> %x2, i8 -1)11165 ret <8 x double> %res11166}11167 11168define <8 x double>@test_int_x86_avx512_mask_broadcastf64x4_512(<4 x double> %x0, <8 x double> %x2, i8 %mask) #0 {11169;11170; CHECK-LABEL: @test_int_x86_avx512_mask_broadcastf64x4_512(11171; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i64>, ptr @__msan_param_tls, align 811172; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 96), align 811173; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 811174; CHECK-NEXT: call void @llvm.donothing()11175; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i64> [[TMP1]], <4 x i64> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11176; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x double> [[X0:%.*]], <4 x double> [[X0]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11177; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>11178; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>11179; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP3]]11180; CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x double> [[TMP4]] to <8 x i64>11181; CHECK-NEXT: [[TMP9:%.*]] = bitcast <8 x double> [[X2:%.*]] to <8 x i64>11182; CHECK-NEXT: [[TMP10:%.*]] = xor <8 x i64> [[TMP8]], [[TMP9]]11183; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[_MSPROP]]11184; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], [[TMP3]]11185; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP12]], <8 x i64> [[TMP7]]11186; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP6]], <8 x double> [[TMP4]], <8 x double> [[X2]]11187; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 811188; CHECK-NEXT: ret <8 x double> [[TMP13]]11189;11190 %res = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x4.512(<4 x double> %x0, <8 x double> %x2, i8 %mask)11191 ret <8 x double> %res11192}11193 11194define <8 x double>@test_int_x86_avx512_maskz_broadcastf64x4_512(<4 x double> %x0, i8 %mask) #0 {11195;11196; CHECK-LABEL: @test_int_x86_avx512_maskz_broadcastf64x4_512(11197; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i64>, ptr @__msan_param_tls, align 811198; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 811199; CHECK-NEXT: call void @llvm.donothing()11200; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i64> [[TMP1]], <4 x i64> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11201; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x double> [[X0:%.*]], <4 x double> [[X0]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11202; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>11203; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>11204; CHECK-NEXT: [[TMP6:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer11205; CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x double> [[TMP3]] to <8 x i64>11206; CHECK-NEXT: [[TMP8:%.*]] = xor <8 x i64> [[TMP7]], zeroinitializer11207; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[_MSPROP]]11208; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], zeroinitializer11209; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP4]], <8 x i64> [[TMP10]], <8 x i64> [[TMP6]]11210; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP5]], <8 x double> [[TMP3]], <8 x double> zeroinitializer11211; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 811212; CHECK-NEXT: ret <8 x double> [[TMP11]]11213;11214 %res = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x4.512(<4 x double> %x0, <8 x double> zeroinitializer, i8 %mask)11215 ret <8 x double> %res11216}11217 11218define <8 x double>@test_int_x86_avx512_mask_broadcastf64x4_512_load(ptr %x0ptr, <8 x double> %x2, i8 %mask) #0 {11219;11220; CHECK-LABEL: @test_int_x86_avx512_mask_broadcastf64x4_512_load(11221; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 811222; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 811223; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 811224; CHECK-NEXT: call void @llvm.donothing()11225; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 011226; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]11227; CHECK: 4:11228; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]11229; CHECK-NEXT: unreachable11230; CHECK: 5:11231; CHECK-NEXT: [[X0:%.*]] = load <4 x double>, ptr [[X0PTR:%.*]], align 3211232; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[X0PTR]] to i6411233; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 8796093022208011234; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr11235; CHECK-NEXT: [[_MSLD:%.*]] = load <4 x i64>, ptr [[TMP8]], align 3211236; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i64> [[_MSLD]], <4 x i64> [[_MSLD]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11237; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <4 x double> [[X0]], <4 x double> [[X0]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11238; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>11239; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>11240; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP3]]11241; CHECK-NEXT: [[TMP13:%.*]] = bitcast <8 x double> [[TMP9]] to <8 x i64>11242; CHECK-NEXT: [[TMP14:%.*]] = bitcast <8 x double> [[X2:%.*]] to <8 x i64>11243; CHECK-NEXT: [[TMP15:%.*]] = xor <8 x i64> [[TMP13]], [[TMP14]]11244; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP15]], [[_MSPROP]]11245; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP16]], [[TMP3]]11246; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP17]], <8 x i64> [[TMP12]]11247; CHECK-NEXT: [[TMP18:%.*]] = select <8 x i1> [[TMP11]], <8 x double> [[TMP9]], <8 x double> [[X2]]11248; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 811249; CHECK-NEXT: ret <8 x double> [[TMP18]]11250;11251 %x0 = load <4 x double>, ptr %x0ptr11252 %res = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x4.512(<4 x double> %x0, <8 x double> %x2, i8 %mask)11253 ret <8 x double> %res11254}11255 11256declare <16 x i32> @llvm.x86.avx512.mask.broadcasti32x4.512(<4 x i32>, <16 x i32>, i16)11257 11258define { <16 x i32>, <16 x i32>, <16 x i32> } @test_int_x86_avx512_mask_broadcasti32x4_512(<4 x i32> %x0, <16 x i32> %x2, i16 %mask) #0 {11259;11260; CHECK-LABEL: @test_int_x86_avx512_mask_broadcasti32x4_512(11261; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 811262; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 811263; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 811264; CHECK-NEXT: call void @llvm.donothing()11265; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> [[TMP1]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11266; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x i32> [[X0:%.*]], <4 x i32> [[X0]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11267; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> [[TMP1]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11268; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <4 x i32> [[X0]], <4 x i32> [[X0]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11269; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>11270; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>11271; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP1]], <16 x i32> [[TMP3]]11272; CHECK-NEXT: [[TMP9:%.*]] = xor <16 x i32> [[TMP5]], [[X2:%.*]]11273; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[_MSPROP1]]11274; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP3]]11275; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP11]], <16 x i32> [[TMP8]]11276; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP5]], <16 x i32> [[X2]]11277; CHECK-NEXT: [[_MSPROP2:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> [[TMP1]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11278; CHECK-NEXT: [[TMP13:%.*]] = shufflevector <4 x i32> [[X0]], <4 x i32> [[X0]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11279; CHECK-NEXT: [[TMP14:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>11280; CHECK-NEXT: [[TMP15:%.*]] = bitcast i16 [[MASK]] to <16 x i1>11281; CHECK-NEXT: [[TMP16:%.*]] = select <16 x i1> [[TMP15]], <16 x i32> [[_MSPROP2]], <16 x i32> zeroinitializer11282; CHECK-NEXT: [[TMP17:%.*]] = xor <16 x i32> [[TMP13]], zeroinitializer11283; CHECK-NEXT: [[TMP18:%.*]] = or <16 x i32> [[TMP17]], [[_MSPROP2]]11284; CHECK-NEXT: [[TMP19:%.*]] = or <16 x i32> [[TMP18]], zeroinitializer11285; CHECK-NEXT: [[_MSPROP_SELECT3:%.*]] = select <16 x i1> [[TMP14]], <16 x i32> [[TMP19]], <16 x i32> [[TMP16]]11286; CHECK-NEXT: [[TMP20:%.*]] = select <16 x i1> [[TMP15]], <16 x i32> [[TMP13]], <16 x i32> zeroinitializer11287; CHECK-NEXT: [[TMP21:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } { <16 x i32> splat (i32 -1), <16 x i32> splat (i32 -1), <16 x i32> splat (i32 -1) }, <16 x i32> [[_MSPROP]], 011288; CHECK-NEXT: [[RES3:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> [[TMP4]], 011289; CHECK-NEXT: [[TMP22:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[TMP21]], <16 x i32> [[_MSPROP_SELECT]], 111290; CHECK-NEXT: [[RES4:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[RES3]], <16 x i32> [[TMP12]], 111291; CHECK-NEXT: [[TMP23:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[TMP22]], <16 x i32> [[_MSPROP_SELECT3]], 211292; CHECK-NEXT: [[RES5:%.*]] = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } [[RES4]], <16 x i32> [[TMP20]], 211293; CHECK-NEXT: store { <16 x i32>, <16 x i32>, <16 x i32> } [[TMP23]], ptr @__msan_retval_tls, align 811294; CHECK-NEXT: ret { <16 x i32>, <16 x i32>, <16 x i32> } [[RES5]]11295;11296 %res0 = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x4.512(<4 x i32> %x0, <16 x i32> %x2, i16 -1)11297 %res1 = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x4.512(<4 x i32> %x0, <16 x i32> %x2, i16 %mask)11298 %res2 = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x4.512(<4 x i32> %x0, <16 x i32> zeroinitializer, i16 %mask)11299 %res3 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> %res0, 011300 %res4 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res3, <16 x i32> %res1, 111301 %res5 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res4, <16 x i32> %res2, 211302 ret { <16 x i32>, <16 x i32>, <16 x i32> } %res511303}11304 11305define <16 x i32>@test_int_x86_avx512_mask_broadcasti32x4_512_load(ptr %x0ptr, <16 x i32> %x2, i16 %mask) #0 {11306;11307; CHECK-LABEL: @test_int_x86_avx512_mask_broadcasti32x4_512_load(11308; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 811309; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 811310; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 811311; CHECK-NEXT: call void @llvm.donothing()11312; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 011313; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]11314; CHECK: 4:11315; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]11316; CHECK-NEXT: unreachable11317; CHECK: 5:11318; CHECK-NEXT: [[X0:%.*]] = load <4 x i32>, ptr [[X0PTR:%.*]], align 1611319; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[X0PTR]] to i6411320; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 8796093022208011321; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr11322; CHECK-NEXT: [[_MSLD:%.*]] = load <4 x i32>, ptr [[TMP8]], align 1611323; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i32> [[_MSLD]], <4 x i32> [[_MSLD]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11324; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <4 x i32> [[X0]], <4 x i32> [[X0]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11325; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>11326; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>11327; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP3]]11328; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i32> [[TMP9]], [[X2:%.*]]11329; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], [[_MSPROP]]11330; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], [[TMP3]]11331; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP15]], <16 x i32> [[TMP12]]11332; CHECK-NEXT: [[TMP16:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP9]], <16 x i32> [[X2]]11333; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 811334; CHECK-NEXT: ret <16 x i32> [[TMP16]]11335;11336 %x0 = load <4 x i32>, ptr %x0ptr11337 %res = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x4.512(<4 x i32> %x0, <16 x i32> %x2, i16 %mask)11338 ret <16 x i32> %res11339}11340 11341declare <8 x i64> @llvm.x86.avx512.mask.broadcasti64x4.512(<4 x i64>, <8 x i64>, i8)11342 11343define <8 x i64>@test_int_x86_avx512_broadcasti64x4_512(<4 x i64> %x0, <8 x i64> %x2) #0 {11344; CHECK-LABEL: @test_int_x86_avx512_broadcasti64x4_512(11345; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i64>, ptr @__msan_param_tls, align 811346; CHECK-NEXT: call void @llvm.donothing()11347; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i64> [[TMP1]], <4 x i64> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11348; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i64> [[X0:%.*]], <4 x i64> [[X0]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11349; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 811350; CHECK-NEXT: ret <8 x i64> [[TMP2]]11351;11352 %res = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x4.512(<4 x i64> %x0, <8 x i64> %x2, i8 -1)11353 ret <8 x i64> %res11354}11355 11356define <8 x i64>@test_int_x86_avx512_mask_broadcasti64x4_512(<4 x i64> %x0, <8 x i64> %x2, i8 %mask) #0 {11357;11358; CHECK-LABEL: @test_int_x86_avx512_mask_broadcasti64x4_512(11359; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i64>, ptr @__msan_param_tls, align 811360; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 96), align 811361; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 811362; CHECK-NEXT: call void @llvm.donothing()11363; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i64> [[TMP1]], <4 x i64> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11364; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x i64> [[X0:%.*]], <4 x i64> [[X0]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11365; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>11366; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>11367; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP3]]11368; CHECK-NEXT: [[TMP8:%.*]] = xor <8 x i64> [[TMP4]], [[X2:%.*]]11369; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[_MSPROP]]11370; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[TMP3]]11371; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP10]], <8 x i64> [[TMP7]]11372; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP4]], <8 x i64> [[X2]]11373; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 811374; CHECK-NEXT: ret <8 x i64> [[TMP11]]11375;11376 %res = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x4.512(<4 x i64> %x0, <8 x i64> %x2, i8 %mask)11377 ret <8 x i64> %res11378}11379 11380define <8 x i64>@test_int_x86_avx512_maskz_broadcasti64x4_512(<4 x i64> %x0, i8 %mask) #0 {11381;11382; CHECK-LABEL: @test_int_x86_avx512_maskz_broadcasti64x4_512(11383; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i64>, ptr @__msan_param_tls, align 811384; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 811385; CHECK-NEXT: call void @llvm.donothing()11386; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i64> [[TMP1]], <4 x i64> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11387; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x i64> [[X0:%.*]], <4 x i64> [[X0]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11388; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>11389; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>11390; CHECK-NEXT: [[TMP6:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer11391; CHECK-NEXT: [[TMP7:%.*]] = xor <8 x i64> [[TMP3]], zeroinitializer11392; CHECK-NEXT: [[TMP8:%.*]] = or <8 x i64> [[TMP7]], [[_MSPROP]]11393; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], zeroinitializer11394; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP4]], <8 x i64> [[TMP9]], <8 x i64> [[TMP6]]11395; CHECK-NEXT: [[TMP10:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP3]], <8 x i64> zeroinitializer11396; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 811397; CHECK-NEXT: ret <8 x i64> [[TMP10]]11398;11399 %res = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x4.512(<4 x i64> %x0, <8 x i64> zeroinitializer, i8 %mask)11400 ret <8 x i64> %res11401}11402 11403define <8 x i64>@test_int_x86_avx512_mask_broadcasti64x4_512_load(ptr %x0ptr, <8 x i64> %x2, i8 %mask) #0 {11404;11405; CHECK-LABEL: @test_int_x86_avx512_mask_broadcasti64x4_512_load(11406; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 811407; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 811408; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 811409; CHECK-NEXT: call void @llvm.donothing()11410; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 011411; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]11412; CHECK: 4:11413; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]11414; CHECK-NEXT: unreachable11415; CHECK: 5:11416; CHECK-NEXT: [[X0:%.*]] = load <4 x i64>, ptr [[X0PTR:%.*]], align 3211417; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[X0PTR]] to i6411418; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 8796093022208011419; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr11420; CHECK-NEXT: [[_MSLD:%.*]] = load <4 x i64>, ptr [[TMP8]], align 3211421; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <4 x i64> [[_MSLD]], <4 x i64> [[_MSLD]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11422; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <4 x i64> [[X0]], <4 x i64> [[X0]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>11423; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>11424; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>11425; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP3]]11426; CHECK-NEXT: [[TMP13:%.*]] = xor <8 x i64> [[TMP9]], [[X2:%.*]]11427; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], [[_MSPROP]]11428; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], [[TMP3]]11429; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP15]], <8 x i64> [[TMP12]]11430; CHECK-NEXT: [[TMP16:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP9]], <8 x i64> [[X2]]11431; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 811432; CHECK-NEXT: ret <8 x i64> [[TMP16]]11433;11434 %x0 = load <4 x i64>, ptr %x0ptr11435 %res = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x4.512(<4 x i64> %x0, <8 x i64> %x2, i8 %mask)11436 ret <8 x i64> %res11437}11438 11439declare <16 x i32> @llvm.x86.avx512.mask.pabs.d.512(<16 x i32>, <16 x i32>, i16)11440 11441define <16 x i32>@test_int_x86_avx512_pabs_d_512(<16 x i32> %x0, <16 x i32> %x1) #0 {11442; CHECK-LABEL: @test_int_x86_avx512_pabs_d_512(11443; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 811444; CHECK-NEXT: call void @llvm.donothing()11445; CHECK-NEXT: [[TMP5:%.*]] = icmp eq <16 x i32> [[X0:%.*]], splat (i32 -2147483648)11446; CHECK-NEXT: [[TMP3:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> splat (i32 -1), <16 x i32> [[TMP1]]11447; CHECK-NEXT: [[TMP4:%.*]] = select i1 false, <16 x i32> [[TMP3]], <16 x i32> [[TMP1]]11448; CHECK-NEXT: [[TMP2:%.*]] = call <16 x i32> @llvm.abs.v16i32(<16 x i32> [[X0]], i1 false)11449; CHECK-NEXT: store <16 x i32> [[TMP4]], ptr @__msan_retval_tls, align 811450; CHECK-NEXT: ret <16 x i32> [[TMP2]]11451;11452 %res = call <16 x i32> @llvm.x86.avx512.mask.pabs.d.512(<16 x i32> %x0, <16 x i32> %x1, i16 -1)11453 ret <16 x i32> %res11454}11455 11456define <16 x i32>@test_int_x86_avx512_mask_pabs_d_512(<16 x i32> %x0, <16 x i32> %x1, i16 %x2) #0 {11457;11458; CHECK-LABEL: @test_int_x86_avx512_mask_pabs_d_512(11459; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 811460; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 811461; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 811462; CHECK-NEXT: call void @llvm.donothing()11463; CHECK-NEXT: [[TMP12:%.*]] = icmp eq <16 x i32> [[X0:%.*]], splat (i32 -2147483648)11464; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> splat (i32 -1), <16 x i32> [[TMP1]]11465; CHECK-NEXT: [[TMP14:%.*]] = select i1 false, <16 x i32> [[TMP13]], <16 x i32> [[TMP1]]11466; CHECK-NEXT: [[TMP4:%.*]] = call <16 x i32> @llvm.abs.v16i32(<16 x i32> [[X0]], i1 false)11467; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>11468; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[X2:%.*]] to <16 x i1>11469; CHECK-NEXT: [[TMP7:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP14]], <16 x i32> [[TMP3]]11470; CHECK-NEXT: [[TMP8:%.*]] = xor <16 x i32> [[TMP4]], [[X1:%.*]]11471; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], [[TMP14]]11472; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[TMP3]]11473; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[TMP10]], <16 x i32> [[TMP7]]11474; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP4]], <16 x i32> [[X1]]11475; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 811476; CHECK-NEXT: ret <16 x i32> [[TMP11]]11477;11478 %res = call <16 x i32> @llvm.x86.avx512.mask.pabs.d.512(<16 x i32> %x0, <16 x i32> %x1, i16 %x2)11479 ret <16 x i32> %res11480}11481 11482declare <8 x i64> @llvm.x86.avx512.mask.pabs.q.512(<8 x i64>, <8 x i64>, i8)11483 11484define <8 x i64>@test_int_x86_avx512_pabs_q_512(<8 x i64> %x0, <8 x i64> %x1, i8 %x2) #0 {11485; CHECK-LABEL: @test_int_x86_avx512_pabs_q_512(11486; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 811487; CHECK-NEXT: call void @llvm.donothing()11488; CHECK-NEXT: [[TMP5:%.*]] = icmp eq <8 x i64> [[X0:%.*]], splat (i64 -9223372036854775808)11489; CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> splat (i64 -1), <8 x i64> [[TMP1]]11490; CHECK-NEXT: [[TMP4:%.*]] = select i1 false, <8 x i64> [[TMP3]], <8 x i64> [[TMP1]]11491; CHECK-NEXT: [[TMP2:%.*]] = call <8 x i64> @llvm.abs.v8i64(<8 x i64> [[X0]], i1 false)11492; CHECK-NEXT: store <8 x i64> [[TMP4]], ptr @__msan_retval_tls, align 811493; CHECK-NEXT: ret <8 x i64> [[TMP2]]11494;11495 %res = call <8 x i64> @llvm.x86.avx512.mask.pabs.q.512(<8 x i64> %x0, <8 x i64> %x1, i8 -1)11496 ret <8 x i64> %res11497}11498 11499define <8 x i64>@test_int_x86_avx512_mask_pabs_q_512(<8 x i64> %x0, <8 x i64> %x1, i8 %x2) #0 {11500;11501; CHECK-LABEL: @test_int_x86_avx512_mask_pabs_q_512(11502; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 811503; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 811504; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 811505; CHECK-NEXT: call void @llvm.donothing()11506; CHECK-NEXT: [[TMP12:%.*]] = icmp eq <8 x i64> [[X0:%.*]], splat (i64 -9223372036854775808)11507; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP12]], <8 x i64> splat (i64 -1), <8 x i64> [[TMP1]]11508; CHECK-NEXT: [[TMP14:%.*]] = select i1 false, <8 x i64> [[TMP13]], <8 x i64> [[TMP1]]11509; CHECK-NEXT: [[TMP4:%.*]] = call <8 x i64> @llvm.abs.v8i64(<8 x i64> [[X0]], i1 false)11510; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>11511; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[X2:%.*]] to <8 x i1>11512; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP14]], <8 x i64> [[TMP3]]11513; CHECK-NEXT: [[TMP8:%.*]] = xor <8 x i64> [[TMP4]], [[X1:%.*]]11514; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[TMP14]]11515; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[TMP3]]11516; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP10]], <8 x i64> [[TMP7]]11517; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP4]], <8 x i64> [[X1]]11518; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 811519; CHECK-NEXT: ret <8 x i64> [[TMP11]]11520;11521 %res = call <8 x i64> @llvm.x86.avx512.mask.pabs.q.512(<8 x i64> %x0, <8 x i64> %x1, i8 %x2)11522 ret <8 x i64> %res11523}11524 11525define i8 @test_vptestmq(<8 x i64> %a0, <8 x i64> %a1, i8 %m) #0 {11526;11527; CHECK-LABEL: @test_vptestmq(11528; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 811529; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 811530; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 811531; CHECK-NEXT: call void @llvm.donothing()11532; CHECK-NEXT: [[TMP4:%.*]] = and <8 x i64> [[TMP1]], [[TMP2]]11533; CHECK-NEXT: [[TMP5:%.*]] = and <8 x i64> [[A0:%.*]], [[TMP2]]11534; CHECK-NEXT: [[TMP6:%.*]] = and <8 x i64> [[TMP1]], [[A1:%.*]]11535; CHECK-NEXT: [[TMP7:%.*]] = or <8 x i64> [[TMP4]], [[TMP5]]11536; CHECK-NEXT: [[TMP8:%.*]] = or <8 x i64> [[TMP7]], [[TMP6]]11537; CHECK-NEXT: [[TMP9:%.*]] = and <8 x i64> [[A0]], [[A1]]11538; CHECK-NEXT: [[TMP10:%.*]] = xor <8 x i64> [[TMP9]], zeroinitializer11539; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP8]], zeroinitializer11540; CHECK-NEXT: [[TMP12:%.*]] = icmp ne <8 x i64> [[TMP11]], zeroinitializer11541; CHECK-NEXT: [[TMP13:%.*]] = xor <8 x i64> [[TMP11]], splat (i64 -1)11542; CHECK-NEXT: [[TMP14:%.*]] = and <8 x i64> [[TMP13]], [[TMP10]]11543; CHECK-NEXT: [[TMP15:%.*]] = icmp eq <8 x i64> [[TMP14]], zeroinitializer11544; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <8 x i1> [[TMP12]], [[TMP15]]11545; CHECK-NEXT: [[TMP16:%.*]] = icmp ne <8 x i64> [[TMP9]], zeroinitializer11546; CHECK-NEXT: [[TMP17:%.*]] = bitcast <8 x i1> [[_MSPROP_ICMP]] to i811547; CHECK-NEXT: [[TMP18:%.*]] = bitcast <8 x i1> [[TMP16]] to i811548; CHECK-NEXT: [[TMP19:%.*]] = and <8 x i64> [[TMP1]], [[TMP2]]11549; CHECK-NEXT: [[TMP20:%.*]] = and <8 x i64> [[A0]], [[TMP2]]11550; CHECK-NEXT: [[TMP21:%.*]] = and <8 x i64> [[TMP1]], [[A1]]11551; CHECK-NEXT: [[TMP22:%.*]] = or <8 x i64> [[TMP19]], [[TMP20]]11552; CHECK-NEXT: [[TMP23:%.*]] = or <8 x i64> [[TMP22]], [[TMP21]]11553; CHECK-NEXT: [[TMP24:%.*]] = and <8 x i64> [[A0]], [[A1]]11554; CHECK-NEXT: [[TMP25:%.*]] = xor <8 x i64> [[TMP24]], zeroinitializer11555; CHECK-NEXT: [[TMP26:%.*]] = or <8 x i64> [[TMP23]], zeroinitializer11556; CHECK-NEXT: [[TMP27:%.*]] = icmp ne <8 x i64> [[TMP26]], zeroinitializer11557; CHECK-NEXT: [[TMP28:%.*]] = xor <8 x i64> [[TMP26]], splat (i64 -1)11558; CHECK-NEXT: [[TMP29:%.*]] = and <8 x i64> [[TMP28]], [[TMP25]]11559; CHECK-NEXT: [[TMP30:%.*]] = icmp eq <8 x i64> [[TMP29]], zeroinitializer11560; CHECK-NEXT: [[_MSPROP_ICMP1:%.*]] = and <8 x i1> [[TMP27]], [[TMP30]]11561; CHECK-NEXT: [[TMP31:%.*]] = icmp ne <8 x i64> [[TMP24]], zeroinitializer11562; CHECK-NEXT: [[TMP32:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>11563; CHECK-NEXT: [[TMP33:%.*]] = bitcast i8 [[M:%.*]] to <8 x i1>11564; CHECK-NEXT: [[TMP34:%.*]] = and <8 x i1> [[_MSPROP_ICMP1]], [[TMP32]]11565; CHECK-NEXT: [[TMP35:%.*]] = and <8 x i1> [[TMP31]], [[TMP32]]11566; CHECK-NEXT: [[TMP36:%.*]] = and <8 x i1> [[_MSPROP_ICMP1]], [[TMP33]]11567; CHECK-NEXT: [[TMP37:%.*]] = or <8 x i1> [[TMP34]], [[TMP35]]11568; CHECK-NEXT: [[TMP38:%.*]] = or <8 x i1> [[TMP37]], [[TMP36]]11569; CHECK-NEXT: [[TMP39:%.*]] = and <8 x i1> [[TMP31]], [[TMP33]]11570; CHECK-NEXT: [[TMP40:%.*]] = bitcast <8 x i1> [[TMP38]] to i811571; CHECK-NEXT: [[TMP41:%.*]] = bitcast <8 x i1> [[TMP39]] to i811572; CHECK-NEXT: [[_MSPROP:%.*]] = or i8 [[TMP40]], [[TMP17]]11573; CHECK-NEXT: [[RES2:%.*]] = add i8 [[TMP41]], [[TMP18]]11574; CHECK-NEXT: store i8 [[_MSPROP]], ptr @__msan_retval_tls, align 811575; CHECK-NEXT: ret i8 [[RES2]]11576;11577 %res = call i8 @llvm.x86.avx512.ptestm.q.512(<8 x i64> %a0, <8 x i64> %a1, i8 -1)11578 %res1 = call i8 @llvm.x86.avx512.ptestm.q.512(<8 x i64> %a0, <8 x i64> %a1, i8 %m)11579 %res2 = add i8 %res1, %res11580 ret i8 %res211581}11582declare i8 @llvm.x86.avx512.ptestm.q.512(<8 x i64>, <8 x i64>, i8)11583 11584define i16 @test_vptestmd(<16 x i32> %a0, <16 x i32> %a1, i16 %m) #0 {11585;11586; CHECK-LABEL: @test_vptestmd(11587; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 811588; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 811589; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 811590; CHECK-NEXT: call void @llvm.donothing()11591; CHECK-NEXT: [[TMP4:%.*]] = and <16 x i32> [[TMP1]], [[TMP2]]11592; CHECK-NEXT: [[TMP5:%.*]] = and <16 x i32> [[A0:%.*]], [[TMP2]]11593; CHECK-NEXT: [[TMP6:%.*]] = and <16 x i32> [[TMP1]], [[A1:%.*]]11594; CHECK-NEXT: [[TMP7:%.*]] = or <16 x i32> [[TMP4]], [[TMP5]]11595; CHECK-NEXT: [[TMP8:%.*]] = or <16 x i32> [[TMP7]], [[TMP6]]11596; CHECK-NEXT: [[TMP9:%.*]] = and <16 x i32> [[A0]], [[A1]]11597; CHECK-NEXT: [[TMP10:%.*]] = xor <16 x i32> [[TMP9]], zeroinitializer11598; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP8]], zeroinitializer11599; CHECK-NEXT: [[TMP12:%.*]] = icmp ne <16 x i32> [[TMP11]], zeroinitializer11600; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i32> [[TMP11]], splat (i32 -1)11601; CHECK-NEXT: [[TMP14:%.*]] = and <16 x i32> [[TMP13]], [[TMP10]]11602; CHECK-NEXT: [[TMP15:%.*]] = icmp eq <16 x i32> [[TMP14]], zeroinitializer11603; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <16 x i1> [[TMP12]], [[TMP15]]11604; CHECK-NEXT: [[TMP16:%.*]] = icmp ne <16 x i32> [[TMP9]], zeroinitializer11605; CHECK-NEXT: [[TMP17:%.*]] = bitcast <16 x i1> [[_MSPROP_ICMP]] to i1611606; CHECK-NEXT: [[TMP18:%.*]] = bitcast <16 x i1> [[TMP16]] to i1611607; CHECK-NEXT: [[TMP19:%.*]] = and <16 x i32> [[TMP1]], [[TMP2]]11608; CHECK-NEXT: [[TMP20:%.*]] = and <16 x i32> [[A0]], [[TMP2]]11609; CHECK-NEXT: [[TMP21:%.*]] = and <16 x i32> [[TMP1]], [[A1]]11610; CHECK-NEXT: [[TMP22:%.*]] = or <16 x i32> [[TMP19]], [[TMP20]]11611; CHECK-NEXT: [[TMP23:%.*]] = or <16 x i32> [[TMP22]], [[TMP21]]11612; CHECK-NEXT: [[TMP24:%.*]] = and <16 x i32> [[A0]], [[A1]]11613; CHECK-NEXT: [[TMP25:%.*]] = xor <16 x i32> [[TMP24]], zeroinitializer11614; CHECK-NEXT: [[TMP26:%.*]] = or <16 x i32> [[TMP23]], zeroinitializer11615; CHECK-NEXT: [[TMP27:%.*]] = icmp ne <16 x i32> [[TMP26]], zeroinitializer11616; CHECK-NEXT: [[TMP28:%.*]] = xor <16 x i32> [[TMP26]], splat (i32 -1)11617; CHECK-NEXT: [[TMP29:%.*]] = and <16 x i32> [[TMP28]], [[TMP25]]11618; CHECK-NEXT: [[TMP30:%.*]] = icmp eq <16 x i32> [[TMP29]], zeroinitializer11619; CHECK-NEXT: [[_MSPROP_ICMP1:%.*]] = and <16 x i1> [[TMP27]], [[TMP30]]11620; CHECK-NEXT: [[TMP31:%.*]] = icmp ne <16 x i32> [[TMP24]], zeroinitializer11621; CHECK-NEXT: [[TMP32:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>11622; CHECK-NEXT: [[TMP33:%.*]] = bitcast i16 [[M:%.*]] to <16 x i1>11623; CHECK-NEXT: [[TMP34:%.*]] = and <16 x i1> [[_MSPROP_ICMP1]], [[TMP32]]11624; CHECK-NEXT: [[TMP35:%.*]] = and <16 x i1> [[TMP31]], [[TMP32]]11625; CHECK-NEXT: [[TMP36:%.*]] = and <16 x i1> [[_MSPROP_ICMP1]], [[TMP33]]11626; CHECK-NEXT: [[TMP37:%.*]] = or <16 x i1> [[TMP34]], [[TMP35]]11627; CHECK-NEXT: [[TMP38:%.*]] = or <16 x i1> [[TMP37]], [[TMP36]]11628; CHECK-NEXT: [[TMP39:%.*]] = and <16 x i1> [[TMP31]], [[TMP33]]11629; CHECK-NEXT: [[TMP40:%.*]] = bitcast <16 x i1> [[TMP38]] to i1611630; CHECK-NEXT: [[TMP41:%.*]] = bitcast <16 x i1> [[TMP39]] to i1611631; CHECK-NEXT: [[_MSPROP:%.*]] = or i16 [[TMP40]], [[TMP17]]11632; CHECK-NEXT: [[RES2:%.*]] = add i16 [[TMP41]], [[TMP18]]11633; CHECK-NEXT: store i16 [[_MSPROP]], ptr @__msan_retval_tls, align 811634; CHECK-NEXT: ret i16 [[RES2]]11635;11636 %res = call i16 @llvm.x86.avx512.ptestm.d.512(<16 x i32> %a0, <16 x i32> %a1, i16 -1)11637 %res1 = call i16 @llvm.x86.avx512.ptestm.d.512(<16 x i32> %a0, <16 x i32> %a1, i16 %m)11638 %res2 = add i16 %res1, %res11639 ret i16 %res211640}11641declare i16 @llvm.x86.avx512.ptestm.d.512(<16 x i32>, <16 x i32>, i16)11642 11643declare i16 @llvm.x86.avx512.ptestnm.d.512(<16 x i32>, <16 x i32>, i16 %x2)11644 11645define i16@test_int_x86_avx512_ptestnm_d_512(<16 x i32> %x0, <16 x i32> %x1, i16 %x2) #0 {11646;11647; CHECK-LABEL: @test_int_x86_avx512_ptestnm_d_512(11648; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 811649; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 811650; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 811651; CHECK-NEXT: call void @llvm.donothing()11652; CHECK-NEXT: [[TMP4:%.*]] = and <16 x i32> [[TMP1]], [[TMP2]]11653; CHECK-NEXT: [[TMP5:%.*]] = and <16 x i32> [[X0:%.*]], [[TMP2]]11654; CHECK-NEXT: [[TMP6:%.*]] = and <16 x i32> [[TMP1]], [[X1:%.*]]11655; CHECK-NEXT: [[TMP7:%.*]] = or <16 x i32> [[TMP4]], [[TMP5]]11656; CHECK-NEXT: [[TMP8:%.*]] = or <16 x i32> [[TMP7]], [[TMP6]]11657; CHECK-NEXT: [[TMP9:%.*]] = and <16 x i32> [[X0]], [[X1]]11658; CHECK-NEXT: [[TMP10:%.*]] = xor <16 x i32> [[TMP9]], zeroinitializer11659; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP8]], zeroinitializer11660; CHECK-NEXT: [[TMP12:%.*]] = icmp ne <16 x i32> [[TMP11]], zeroinitializer11661; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i32> [[TMP11]], splat (i32 -1)11662; CHECK-NEXT: [[TMP14:%.*]] = and <16 x i32> [[TMP13]], [[TMP10]]11663; CHECK-NEXT: [[TMP15:%.*]] = icmp eq <16 x i32> [[TMP14]], zeroinitializer11664; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <16 x i1> [[TMP12]], [[TMP15]]11665; CHECK-NEXT: [[TMP16:%.*]] = icmp eq <16 x i32> [[TMP9]], zeroinitializer11666; CHECK-NEXT: [[TMP17:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>11667; CHECK-NEXT: [[TMP18:%.*]] = bitcast i16 [[X2:%.*]] to <16 x i1>11668; CHECK-NEXT: [[TMP19:%.*]] = and <16 x i1> [[_MSPROP_ICMP]], [[TMP17]]11669; CHECK-NEXT: [[TMP20:%.*]] = and <16 x i1> [[TMP16]], [[TMP17]]11670; CHECK-NEXT: [[TMP21:%.*]] = and <16 x i1> [[_MSPROP_ICMP]], [[TMP18]]11671; CHECK-NEXT: [[TMP22:%.*]] = or <16 x i1> [[TMP19]], [[TMP20]]11672; CHECK-NEXT: [[TMP23:%.*]] = or <16 x i1> [[TMP22]], [[TMP21]]11673; CHECK-NEXT: [[TMP24:%.*]] = and <16 x i1> [[TMP16]], [[TMP18]]11674; CHECK-NEXT: [[TMP25:%.*]] = bitcast <16 x i1> [[TMP23]] to i1611675; CHECK-NEXT: [[TMP26:%.*]] = bitcast <16 x i1> [[TMP24]] to i1611676; CHECK-NEXT: [[TMP27:%.*]] = and <16 x i32> [[TMP1]], [[TMP2]]11677; CHECK-NEXT: [[TMP28:%.*]] = and <16 x i32> [[X0]], [[TMP2]]11678; CHECK-NEXT: [[TMP29:%.*]] = and <16 x i32> [[TMP1]], [[X1]]11679; CHECK-NEXT: [[TMP30:%.*]] = or <16 x i32> [[TMP27]], [[TMP28]]11680; CHECK-NEXT: [[TMP31:%.*]] = or <16 x i32> [[TMP30]], [[TMP29]]11681; CHECK-NEXT: [[TMP32:%.*]] = and <16 x i32> [[X0]], [[X1]]11682; CHECK-NEXT: [[TMP33:%.*]] = xor <16 x i32> [[TMP32]], zeroinitializer11683; CHECK-NEXT: [[TMP34:%.*]] = or <16 x i32> [[TMP31]], zeroinitializer11684; CHECK-NEXT: [[TMP35:%.*]] = icmp ne <16 x i32> [[TMP34]], zeroinitializer11685; CHECK-NEXT: [[TMP36:%.*]] = xor <16 x i32> [[TMP34]], splat (i32 -1)11686; CHECK-NEXT: [[TMP37:%.*]] = and <16 x i32> [[TMP36]], [[TMP33]]11687; CHECK-NEXT: [[TMP38:%.*]] = icmp eq <16 x i32> [[TMP37]], zeroinitializer11688; CHECK-NEXT: [[_MSPROP_ICMP1:%.*]] = and <16 x i1> [[TMP35]], [[TMP38]]11689; CHECK-NEXT: [[TMP39:%.*]] = icmp eq <16 x i32> [[TMP32]], zeroinitializer11690; CHECK-NEXT: [[TMP40:%.*]] = bitcast <16 x i1> [[_MSPROP_ICMP1]] to i1611691; CHECK-NEXT: [[TMP41:%.*]] = bitcast <16 x i1> [[TMP39]] to i1611692; CHECK-NEXT: [[_MSPROP:%.*]] = or i16 [[TMP25]], [[TMP40]]11693; CHECK-NEXT: [[RES2:%.*]] = add i16 [[TMP26]], [[TMP41]]11694; CHECK-NEXT: store i16 [[_MSPROP]], ptr @__msan_retval_tls, align 811695; CHECK-NEXT: ret i16 [[RES2]]11696;11697 %res = call i16 @llvm.x86.avx512.ptestnm.d.512(<16 x i32> %x0, <16 x i32> %x1, i16 %x2)11698 %res1 = call i16 @llvm.x86.avx512.ptestnm.d.512(<16 x i32> %x0, <16 x i32> %x1, i16-1)11699 %res2 = add i16 %res, %res111700 ret i16 %res211701}11702 11703declare i8 @llvm.x86.avx512.ptestnm.q.512(<8 x i64>, <8 x i64>, i8 %x2)11704 11705define i8@test_int_x86_avx512_ptestnm_q_512(<8 x i64> %x0, <8 x i64> %x1, i8 %x2) #0 {11706;11707; CHECK-LABEL: @test_int_x86_avx512_ptestnm_q_512(11708; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 811709; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 811710; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 811711; CHECK-NEXT: call void @llvm.donothing()11712; CHECK-NEXT: [[TMP4:%.*]] = and <8 x i64> [[TMP1]], [[TMP2]]11713; CHECK-NEXT: [[TMP5:%.*]] = and <8 x i64> [[X0:%.*]], [[TMP2]]11714; CHECK-NEXT: [[TMP6:%.*]] = and <8 x i64> [[TMP1]], [[X1:%.*]]11715; CHECK-NEXT: [[TMP7:%.*]] = or <8 x i64> [[TMP4]], [[TMP5]]11716; CHECK-NEXT: [[TMP8:%.*]] = or <8 x i64> [[TMP7]], [[TMP6]]11717; CHECK-NEXT: [[TMP9:%.*]] = and <8 x i64> [[X0]], [[X1]]11718; CHECK-NEXT: [[TMP10:%.*]] = xor <8 x i64> [[TMP9]], zeroinitializer11719; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP8]], zeroinitializer11720; CHECK-NEXT: [[TMP12:%.*]] = icmp ne <8 x i64> [[TMP11]], zeroinitializer11721; CHECK-NEXT: [[TMP13:%.*]] = xor <8 x i64> [[TMP11]], splat (i64 -1)11722; CHECK-NEXT: [[TMP14:%.*]] = and <8 x i64> [[TMP13]], [[TMP10]]11723; CHECK-NEXT: [[TMP15:%.*]] = icmp eq <8 x i64> [[TMP14]], zeroinitializer11724; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <8 x i1> [[TMP12]], [[TMP15]]11725; CHECK-NEXT: [[TMP16:%.*]] = icmp eq <8 x i64> [[TMP9]], zeroinitializer11726; CHECK-NEXT: [[TMP17:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>11727; CHECK-NEXT: [[TMP18:%.*]] = bitcast i8 [[X2:%.*]] to <8 x i1>11728; CHECK-NEXT: [[TMP19:%.*]] = and <8 x i1> [[_MSPROP_ICMP]], [[TMP17]]11729; CHECK-NEXT: [[TMP20:%.*]] = and <8 x i1> [[TMP16]], [[TMP17]]11730; CHECK-NEXT: [[TMP21:%.*]] = and <8 x i1> [[_MSPROP_ICMP]], [[TMP18]]11731; CHECK-NEXT: [[TMP22:%.*]] = or <8 x i1> [[TMP19]], [[TMP20]]11732; CHECK-NEXT: [[TMP23:%.*]] = or <8 x i1> [[TMP22]], [[TMP21]]11733; CHECK-NEXT: [[TMP24:%.*]] = and <8 x i1> [[TMP16]], [[TMP18]]11734; CHECK-NEXT: [[TMP25:%.*]] = bitcast <8 x i1> [[TMP23]] to i811735; CHECK-NEXT: [[TMP26:%.*]] = bitcast <8 x i1> [[TMP24]] to i811736; CHECK-NEXT: [[TMP27:%.*]] = and <8 x i64> [[TMP1]], [[TMP2]]11737; CHECK-NEXT: [[TMP28:%.*]] = and <8 x i64> [[X0]], [[TMP2]]11738; CHECK-NEXT: [[TMP29:%.*]] = and <8 x i64> [[TMP1]], [[X1]]11739; CHECK-NEXT: [[TMP30:%.*]] = or <8 x i64> [[TMP27]], [[TMP28]]11740; CHECK-NEXT: [[TMP31:%.*]] = or <8 x i64> [[TMP30]], [[TMP29]]11741; CHECK-NEXT: [[TMP32:%.*]] = and <8 x i64> [[X0]], [[X1]]11742; CHECK-NEXT: [[TMP33:%.*]] = xor <8 x i64> [[TMP32]], zeroinitializer11743; CHECK-NEXT: [[TMP34:%.*]] = or <8 x i64> [[TMP31]], zeroinitializer11744; CHECK-NEXT: [[TMP35:%.*]] = icmp ne <8 x i64> [[TMP34]], zeroinitializer11745; CHECK-NEXT: [[TMP36:%.*]] = xor <8 x i64> [[TMP34]], splat (i64 -1)11746; CHECK-NEXT: [[TMP37:%.*]] = and <8 x i64> [[TMP36]], [[TMP33]]11747; CHECK-NEXT: [[TMP38:%.*]] = icmp eq <8 x i64> [[TMP37]], zeroinitializer11748; CHECK-NEXT: [[_MSPROP_ICMP1:%.*]] = and <8 x i1> [[TMP35]], [[TMP38]]11749; CHECK-NEXT: [[TMP39:%.*]] = icmp eq <8 x i64> [[TMP32]], zeroinitializer11750; CHECK-NEXT: [[TMP40:%.*]] = bitcast <8 x i1> [[_MSPROP_ICMP1]] to i811751; CHECK-NEXT: [[TMP41:%.*]] = bitcast <8 x i1> [[TMP39]] to i811752; CHECK-NEXT: [[_MSPROP:%.*]] = or i8 [[TMP25]], [[TMP40]]11753; CHECK-NEXT: [[RES2:%.*]] = add i8 [[TMP26]], [[TMP41]]11754; CHECK-NEXT: store i8 [[_MSPROP]], ptr @__msan_retval_tls, align 811755; CHECK-NEXT: ret i8 [[RES2]]11756;11757 %res = call i8 @llvm.x86.avx512.ptestnm.q.512(<8 x i64> %x0, <8 x i64> %x1, i8 %x2)11758 %res1 = call i8 @llvm.x86.avx512.ptestnm.q.512(<8 x i64> %x0, <8 x i64> %x1, i8-1)11759 %res2 = add i8 %res, %res111760 ret i8 %res211761}11762 11763declare i16 @llvm.x86.avx512.kand.w(i16, i16) nounwind readnone11764define i16 @test_kand(i16 %a0, i16 %a1) #0 {11765;11766; CHECK-LABEL: @test_kand(11767; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 811768; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 811769; CHECK-NEXT: call void @llvm.donothing()11770; CHECK-NEXT: [[TMP3:%.*]] = bitcast i16 [[TMP1]] to <16 x i1>11771; CHECK-NEXT: [[TMP4:%.*]] = bitcast i16 [[A0:%.*]] to <16 x i1>11772; CHECK-NEXT: [[TMP5:%.*]] = and <16 x i1> [[TMP3]], zeroinitializer11773; CHECK-NEXT: [[TMP6:%.*]] = and <16 x i1> [[TMP4]], zeroinitializer11774; CHECK-NEXT: [[TMP7:%.*]] = and <16 x i1> [[TMP3]], bitcast (<1 x i16> splat (i16 8) to <16 x i1>)11775; CHECK-NEXT: [[TMP8:%.*]] = or <16 x i1> [[TMP5]], [[TMP6]]11776; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i1> [[TMP8]], [[TMP7]]11777; CHECK-NEXT: [[TMP10:%.*]] = and <16 x i1> [[TMP4]], bitcast (<1 x i16> splat (i16 8) to <16 x i1>)11778; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i1> [[TMP9]] to i1611779; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i1> [[TMP10]] to i1611780; CHECK-NEXT: [[TMP13:%.*]] = bitcast i16 [[TMP11]] to <16 x i1>11781; CHECK-NEXT: [[TMP14:%.*]] = bitcast i16 [[TMP12]] to <16 x i1>11782; CHECK-NEXT: [[TMP15:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>11783; CHECK-NEXT: [[TMP16:%.*]] = bitcast i16 [[A1:%.*]] to <16 x i1>11784; CHECK-NEXT: [[TMP17:%.*]] = and <16 x i1> [[TMP13]], [[TMP15]]11785; CHECK-NEXT: [[TMP18:%.*]] = and <16 x i1> [[TMP14]], [[TMP15]]11786; CHECK-NEXT: [[TMP19:%.*]] = and <16 x i1> [[TMP13]], [[TMP16]]11787; CHECK-NEXT: [[TMP20:%.*]] = or <16 x i1> [[TMP17]], [[TMP18]]11788; CHECK-NEXT: [[TMP21:%.*]] = or <16 x i1> [[TMP20]], [[TMP19]]11789; CHECK-NEXT: [[TMP22:%.*]] = and <16 x i1> [[TMP14]], [[TMP16]]11790; CHECK-NEXT: [[TMP23:%.*]] = bitcast <16 x i1> [[TMP21]] to i1611791; CHECK-NEXT: [[TMP24:%.*]] = bitcast <16 x i1> [[TMP22]] to i1611792; CHECK-NEXT: store i16 [[TMP23]], ptr @__msan_retval_tls, align 811793; CHECK-NEXT: ret i16 [[TMP24]]11794;11795 %t1 = call i16 @llvm.x86.avx512.kand.w(i16 %a0, i16 8)11796 %t2 = call i16 @llvm.x86.avx512.kand.w(i16 %t1, i16 %a1)11797 ret i16 %t211798}11799 11800declare i16 @llvm.x86.avx512.kandn.w(i16, i16) nounwind readnone11801define i16 @test_kandn(i16 %a0, i16 %a1) #0 {11802;11803; CHECK-LABEL: @test_kandn(11804; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 811805; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 811806; CHECK-NEXT: call void @llvm.donothing()11807; CHECK-NEXT: [[TMP3:%.*]] = bitcast i16 [[TMP1]] to <16 x i1>11808; CHECK-NEXT: [[TMP4:%.*]] = bitcast i16 [[A0:%.*]] to <16 x i1>11809; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i1> [[TMP3]], zeroinitializer11810; CHECK-NEXT: [[TMP5:%.*]] = xor <16 x i1> [[TMP4]], splat (i1 true)11811; CHECK-NEXT: [[TMP6:%.*]] = and <16 x i1> [[_MSPROP]], zeroinitializer11812; CHECK-NEXT: [[TMP7:%.*]] = and <16 x i1> [[TMP5]], zeroinitializer11813; CHECK-NEXT: [[TMP8:%.*]] = and <16 x i1> [[_MSPROP]], bitcast (<1 x i16> splat (i16 8) to <16 x i1>)11814; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i1> [[TMP6]], [[TMP7]]11815; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i1> [[TMP9]], [[TMP8]]11816; CHECK-NEXT: [[TMP11:%.*]] = and <16 x i1> [[TMP5]], bitcast (<1 x i16> splat (i16 8) to <16 x i1>)11817; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i1> [[TMP10]] to i1611818; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x i1> [[TMP11]] to i1611819; CHECK-NEXT: [[TMP14:%.*]] = bitcast i16 [[TMP12]] to <16 x i1>11820; CHECK-NEXT: [[TMP15:%.*]] = bitcast i16 [[TMP13]] to <16 x i1>11821; CHECK-NEXT: [[TMP16:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>11822; CHECK-NEXT: [[TMP17:%.*]] = bitcast i16 [[A1:%.*]] to <16 x i1>11823; CHECK-NEXT: [[_MSPROP1:%.*]] = or <16 x i1> [[TMP14]], zeroinitializer11824; CHECK-NEXT: [[TMP18:%.*]] = xor <16 x i1> [[TMP15]], splat (i1 true)11825; CHECK-NEXT: [[TMP19:%.*]] = and <16 x i1> [[_MSPROP1]], [[TMP16]]11826; CHECK-NEXT: [[TMP20:%.*]] = and <16 x i1> [[TMP18]], [[TMP16]]11827; CHECK-NEXT: [[TMP21:%.*]] = and <16 x i1> [[_MSPROP1]], [[TMP17]]11828; CHECK-NEXT: [[TMP22:%.*]] = or <16 x i1> [[TMP19]], [[TMP20]]11829; CHECK-NEXT: [[TMP23:%.*]] = or <16 x i1> [[TMP22]], [[TMP21]]11830; CHECK-NEXT: [[TMP24:%.*]] = and <16 x i1> [[TMP18]], [[TMP17]]11831; CHECK-NEXT: [[TMP25:%.*]] = bitcast <16 x i1> [[TMP23]] to i1611832; CHECK-NEXT: [[TMP26:%.*]] = bitcast <16 x i1> [[TMP24]] to i1611833; CHECK-NEXT: store i16 [[TMP25]], ptr @__msan_retval_tls, align 811834; CHECK-NEXT: ret i16 [[TMP26]]11835;11836 %t1 = call i16 @llvm.x86.avx512.kandn.w(i16 %a0, i16 8)11837 %t2 = call i16 @llvm.x86.avx512.kandn.w(i16 %t1, i16 %a1)11838 ret i16 %t211839}11840 11841declare i16 @llvm.x86.avx512.knot.w(i16) nounwind readnone11842define i16 @test_knot(i16 %a0) #0 {11843;11844; CHECK-LABEL: @test_knot(11845; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 811846; CHECK-NEXT: call void @llvm.donothing()11847; CHECK-NEXT: [[TMP2:%.*]] = bitcast i16 [[TMP1]] to <16 x i1>11848; CHECK-NEXT: [[TMP3:%.*]] = bitcast i16 [[A0:%.*]] to <16 x i1>11849; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i1> [[TMP2]], zeroinitializer11850; CHECK-NEXT: [[TMP4:%.*]] = xor <16 x i1> [[TMP3]], splat (i1 true)11851; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i1> [[_MSPROP]] to i1611852; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i1> [[TMP4]] to i1611853; CHECK-NEXT: store i16 [[TMP5]], ptr @__msan_retval_tls, align 811854; CHECK-NEXT: ret i16 [[TMP6]]11855;11856 %res = call i16 @llvm.x86.avx512.knot.w(i16 %a0)11857 ret i16 %res11858}11859 11860declare i16 @llvm.x86.avx512.kor.w(i16, i16) nounwind readnone11861define i16 @test_kor(i16 %a0, i16 %a1) #0 {11862;11863; CHECK-LABEL: @test_kor(11864; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 811865; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 811866; CHECK-NEXT: call void @llvm.donothing()11867; CHECK-NEXT: [[TMP3:%.*]] = bitcast i16 [[TMP1]] to <16 x i1>11868; CHECK-NEXT: [[TMP4:%.*]] = bitcast i16 [[A0:%.*]] to <16 x i1>11869; CHECK-NEXT: [[TMP5:%.*]] = xor <16 x i1> [[TMP4]], splat (i1 true)11870; CHECK-NEXT: [[TMP6:%.*]] = and <16 x i1> [[TMP3]], zeroinitializer11871; CHECK-NEXT: [[TMP7:%.*]] = and <16 x i1> [[TMP5]], zeroinitializer11872; CHECK-NEXT: [[TMP8:%.*]] = and <16 x i1> [[TMP3]], <i1 xor (i1 extractelement (<16 x i1> bitcast (<1 x i16> splat (i16 8) to <16 x i1>), i32 0), i1 true), i1 xor (i1 extractelement (<16 x i1> bitcast (<1 x i16> splat (i16 8) to <16 x i1>), i32 1), i1 true), i1 xor (i1 extractelement (<16 x i1> bitcast (<1 x i16> splat (i16 8) to <16 x i1>), i32 2), i1 true), i1 xor (i1 extractelement (<16 x i1> bitcast (<1 x i16> splat (i16 8) to <16 x i1>), i32 3), i1 true), i1 xor (i1 extractelement (<16 x i1> bitcast (<1 x i16> splat (i16 8) to <16 x i1>), i32 4), i1 true), i1 xor (i1 extractelement (<16 x i1> bitcast (<1 x i16> splat (i16 8) to <16 x i1>), i32 5), i1 true), i1 xor (i1 extractelement (<16 x i1> bitcast (<1 x i16> splat (i16 8) to <16 x i1>), i32 6), i1 true), i1 xor (i1 extractelement (<16 x i1> bitcast (<1 x i16> splat (i16 8) to <16 x i1>), i32 7), i1 true), i1 xor (i1 extractelement (<16 x i1> bitcast (<1 x i16> splat (i16 8) to <16 x i1>), i32 8), i1 true), i1 xor (i1 extractelement (<16 x i1> bitcast (<1 x i16> splat (i16 8) to <16 x i1>), i32 9), i1 true), i1 xor (i1 extractelement (<16 x i1> bitcast (<1 x i16> splat (i16 8) to <16 x i1>), i32 10), i1 true), i1 xor (i1 extractelement (<16 x i1> bitcast (<1 x i16> splat (i16 8) to <16 x i1>), i32 11), i1 true), i1 xor (i1 extractelement (<16 x i1> bitcast (<1 x i16> splat (i16 8) to <16 x i1>), i32 12), i1 true), i1 xor (i1 extractelement (<16 x i1> bitcast (<1 x i16> splat (i16 8) to <16 x i1>), i32 13), i1 true), i1 xor (i1 extractelement (<16 x i1> bitcast (<1 x i16> splat (i16 8) to <16 x i1>), i32 14), i1 true), i1 xor (i1 extractelement (<16 x i1> bitcast (<1 x i16> splat (i16 8) to <16 x i1>), i32 15), i1 true)>11873; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i1> [[TMP6]], [[TMP7]]11874; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i1> [[TMP9]], [[TMP8]]11875; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i1> [[TMP4]], bitcast (<1 x i16> splat (i16 8) to <16 x i1>)11876; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i1> [[TMP10]] to i1611877; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x i1> [[TMP11]] to i1611878; CHECK-NEXT: [[TMP14:%.*]] = bitcast i16 [[TMP12]] to <16 x i1>11879; CHECK-NEXT: [[TMP15:%.*]] = bitcast i16 [[TMP13]] to <16 x i1>11880; CHECK-NEXT: [[TMP16:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>11881; CHECK-NEXT: [[TMP17:%.*]] = bitcast i16 [[A1:%.*]] to <16 x i1>11882; CHECK-NEXT: [[TMP18:%.*]] = xor <16 x i1> [[TMP15]], splat (i1 true)11883; CHECK-NEXT: [[TMP19:%.*]] = xor <16 x i1> [[TMP17]], splat (i1 true)11884; CHECK-NEXT: [[TMP20:%.*]] = and <16 x i1> [[TMP14]], [[TMP16]]11885; CHECK-NEXT: [[TMP21:%.*]] = and <16 x i1> [[TMP18]], [[TMP16]]11886; CHECK-NEXT: [[TMP22:%.*]] = and <16 x i1> [[TMP14]], [[TMP19]]11887; CHECK-NEXT: [[TMP23:%.*]] = or <16 x i1> [[TMP20]], [[TMP21]]11888; CHECK-NEXT: [[TMP24:%.*]] = or <16 x i1> [[TMP23]], [[TMP22]]11889; CHECK-NEXT: [[TMP25:%.*]] = or <16 x i1> [[TMP15]], [[TMP17]]11890; CHECK-NEXT: [[TMP26:%.*]] = bitcast <16 x i1> [[TMP24]] to i1611891; CHECK-NEXT: [[TMP27:%.*]] = bitcast <16 x i1> [[TMP25]] to i1611892; CHECK-NEXT: store i16 [[TMP26]], ptr @__msan_retval_tls, align 811893; CHECK-NEXT: ret i16 [[TMP27]]11894;11895 %t1 = call i16 @llvm.x86.avx512.kor.w(i16 %a0, i16 8)11896 %t2 = call i16 @llvm.x86.avx512.kor.w(i16 %t1, i16 %a1)11897 ret i16 %t211898}11899 11900declare i16 @llvm.x86.avx512.kxnor.w(i16, i16) nounwind readnone11901; TODO: the two kxnor instructions here a no op and should be elimintaed,11902; probably by FoldConstantArithmetic in SelectionDAG.11903define i16 @test_kxnor(i16 %a0, i16 %a1) #0 {11904;11905; CHECK-LABEL: @test_kxnor(11906; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 811907; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 811908; CHECK-NEXT: call void @llvm.donothing()11909; CHECK-NEXT: [[TMP3:%.*]] = bitcast i16 [[TMP1]] to <16 x i1>11910; CHECK-NEXT: [[TMP4:%.*]] = bitcast i16 [[A0:%.*]] to <16 x i1>11911; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i1> [[TMP3]], zeroinitializer11912; CHECK-NEXT: [[TMP5:%.*]] = xor <16 x i1> [[TMP4]], splat (i1 true)11913; CHECK-NEXT: [[_MSPROP1:%.*]] = or <16 x i1> [[_MSPROP]], zeroinitializer11914; CHECK-NEXT: [[TMP6:%.*]] = xor <16 x i1> [[TMP5]], bitcast (<1 x i16> splat (i16 8) to <16 x i1>)11915; CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i1> [[_MSPROP1]] to i1611916; CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i1> [[TMP6]] to i1611917; CHECK-NEXT: [[TMP9:%.*]] = bitcast i16 [[TMP7]] to <16 x i1>11918; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[TMP8]] to <16 x i1>11919; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>11920; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16 [[A1:%.*]] to <16 x i1>11921; CHECK-NEXT: [[_MSPROP2:%.*]] = or <16 x i1> [[TMP9]], zeroinitializer11922; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i1> [[TMP10]], splat (i1 true)11923; CHECK-NEXT: [[_MSPROP3:%.*]] = or <16 x i1> [[_MSPROP2]], [[TMP11]]11924; CHECK-NEXT: [[TMP14:%.*]] = xor <16 x i1> [[TMP13]], [[TMP12]]11925; CHECK-NEXT: [[TMP15:%.*]] = bitcast <16 x i1> [[_MSPROP3]] to i1611926; CHECK-NEXT: [[TMP16:%.*]] = bitcast <16 x i1> [[TMP14]] to i1611927; CHECK-NEXT: store i16 [[TMP15]], ptr @__msan_retval_tls, align 811928; CHECK-NEXT: ret i16 [[TMP16]]11929;11930 %t1 = call i16 @llvm.x86.avx512.kxnor.w(i16 %a0, i16 8)11931 %t2 = call i16 @llvm.x86.avx512.kxnor.w(i16 %t1, i16 %a1)11932 ret i16 %t211933}11934 11935declare i16 @llvm.x86.avx512.kxor.w(i16, i16) nounwind readnone11936define i16 @test_kxor(i16 %a0, i16 %a1) #0 {11937;11938; CHECK-LABEL: @test_kxor(11939; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 811940; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 811941; CHECK-NEXT: call void @llvm.donothing()11942; CHECK-NEXT: [[TMP3:%.*]] = bitcast i16 [[TMP1]] to <16 x i1>11943; CHECK-NEXT: [[TMP4:%.*]] = bitcast i16 [[A0:%.*]] to <16 x i1>11944; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i1> [[TMP3]], zeroinitializer11945; CHECK-NEXT: [[TMP5:%.*]] = xor <16 x i1> [[TMP4]], bitcast (<1 x i16> splat (i16 8) to <16 x i1>)11946; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i1> [[_MSPROP]] to i1611947; CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i1> [[TMP5]] to i1611948; CHECK-NEXT: [[TMP8:%.*]] = bitcast i16 [[TMP6]] to <16 x i1>11949; CHECK-NEXT: [[TMP9:%.*]] = bitcast i16 [[TMP7]] to <16 x i1>11950; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>11951; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[A1:%.*]] to <16 x i1>11952; CHECK-NEXT: [[_MSPROP1:%.*]] = or <16 x i1> [[TMP8]], [[TMP10]]11953; CHECK-NEXT: [[TMP12:%.*]] = xor <16 x i1> [[TMP9]], [[TMP11]]11954; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x i1> [[_MSPROP1]] to i1611955; CHECK-NEXT: [[TMP14:%.*]] = bitcast <16 x i1> [[TMP12]] to i1611956; CHECK-NEXT: store i16 [[TMP13]], ptr @__msan_retval_tls, align 811957; CHECK-NEXT: ret i16 [[TMP14]]11958;11959 %t1 = call i16 @llvm.x86.avx512.kxor.w(i16 %a0, i16 8)11960 %t2 = call i16 @llvm.x86.avx512.kxor.w(i16 %t1, i16 %a1)11961 ret i16 %t211962}11963 11964declare i32 @llvm.x86.avx512.kortestz.w(i16, i16) nounwind readnone11965define i32 @test_kortestz(<8 x i64> %A, <8 x i64> %B, <8 x i64> %C, <8 x i64> %D) #0 {11966; CHECK-LABEL: @test_kortestz(11967; CHECK-NEXT: entry:11968; CHECK-NEXT: [[TMP0:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 811969; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 811970; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 811971; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 811972; CHECK-NEXT: call void @llvm.donothing()11973; CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i64> [[TMP0]] to <16 x i32>11974; CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i64> [[A:%.*]] to <16 x i32>11975; CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i64> [[TMP1]] to <16 x i32>11976; CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i64> [[B:%.*]] to <16 x i32>11977; CHECK-NEXT: [[TMP8:%.*]] = xor <16 x i32> [[TMP5]], [[TMP7]]11978; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP4]], [[TMP6]]11979; CHECK-NEXT: [[TMP10:%.*]] = icmp ne <16 x i32> [[TMP9]], zeroinitializer11980; CHECK-NEXT: [[TMP11:%.*]] = xor <16 x i32> [[TMP9]], splat (i32 -1)11981; CHECK-NEXT: [[TMP12:%.*]] = and <16 x i32> [[TMP11]], [[TMP8]]11982; CHECK-NEXT: [[TMP13:%.*]] = icmp eq <16 x i32> [[TMP12]], zeroinitializer11983; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <16 x i1> [[TMP10]], [[TMP13]]11984; CHECK-NEXT: [[TMP14:%.*]] = icmp ne <16 x i32> [[TMP5]], [[TMP7]]11985; CHECK-NEXT: [[TMP15:%.*]] = bitcast <8 x i64> [[TMP2]] to <16 x i32>11986; CHECK-NEXT: [[TMP16:%.*]] = bitcast <8 x i64> [[C:%.*]] to <16 x i32>11987; CHECK-NEXT: [[TMP17:%.*]] = bitcast <8 x i64> [[TMP3]] to <16 x i32>11988; CHECK-NEXT: [[TMP18:%.*]] = bitcast <8 x i64> [[D:%.*]] to <16 x i32>11989; CHECK-NEXT: [[TMP19:%.*]] = xor <16 x i32> [[TMP16]], [[TMP18]]11990; CHECK-NEXT: [[TMP20:%.*]] = or <16 x i32> [[TMP15]], [[TMP17]]11991; CHECK-NEXT: [[TMP21:%.*]] = icmp ne <16 x i32> [[TMP20]], zeroinitializer11992; CHECK-NEXT: [[TMP22:%.*]] = xor <16 x i32> [[TMP20]], splat (i32 -1)11993; CHECK-NEXT: [[TMP23:%.*]] = and <16 x i32> [[TMP22]], [[TMP19]]11994; CHECK-NEXT: [[TMP24:%.*]] = icmp eq <16 x i32> [[TMP23]], zeroinitializer11995; CHECK-NEXT: [[_MSPROP_ICMP1:%.*]] = and <16 x i1> [[TMP21]], [[TMP24]]11996; CHECK-NEXT: [[TMP25:%.*]] = icmp ne <16 x i32> [[TMP16]], [[TMP18]]11997; CHECK-NEXT: [[TMP26:%.*]] = bitcast <16 x i1> [[_MSPROP_ICMP]] to i1611998; CHECK-NEXT: [[TMP27:%.*]] = bitcast <16 x i1> [[TMP14]] to i1611999; CHECK-NEXT: [[TMP28:%.*]] = bitcast <16 x i1> [[_MSPROP_ICMP1]] to i1612000; CHECK-NEXT: [[TMP29:%.*]] = bitcast <16 x i1> [[TMP25]] to i1612001; CHECK-NEXT: [[TMP30:%.*]] = bitcast i16 [[TMP26]] to <16 x i1>12002; CHECK-NEXT: [[TMP31:%.*]] = bitcast i16 [[TMP27]] to <16 x i1>12003; CHECK-NEXT: [[TMP32:%.*]] = bitcast i16 [[TMP28]] to <16 x i1>12004; CHECK-NEXT: [[TMP33:%.*]] = bitcast i16 [[TMP29]] to <16 x i1>12005; CHECK-NEXT: [[TMP34:%.*]] = xor <16 x i1> [[TMP31]], splat (i1 true)12006; CHECK-NEXT: [[TMP35:%.*]] = xor <16 x i1> [[TMP33]], splat (i1 true)12007; CHECK-NEXT: [[TMP36:%.*]] = and <16 x i1> [[TMP30]], [[TMP32]]12008; CHECK-NEXT: [[TMP37:%.*]] = and <16 x i1> [[TMP34]], [[TMP32]]12009; CHECK-NEXT: [[TMP38:%.*]] = and <16 x i1> [[TMP30]], [[TMP35]]12010; CHECK-NEXT: [[TMP39:%.*]] = or <16 x i1> [[TMP36]], [[TMP37]]12011; CHECK-NEXT: [[TMP40:%.*]] = or <16 x i1> [[TMP39]], [[TMP38]]12012; CHECK-NEXT: [[TMP41:%.*]] = or <16 x i1> [[TMP31]], [[TMP33]]12013; CHECK-NEXT: [[TMP42:%.*]] = bitcast <16 x i1> [[TMP40]] to i1612014; CHECK-NEXT: [[TMP43:%.*]] = bitcast <16 x i1> [[TMP41]] to i1612015; CHECK-NEXT: [[TMP44:%.*]] = xor i16 [[TMP43]], 012016; CHECK-NEXT: [[TMP45:%.*]] = or i16 [[TMP42]], 012017; CHECK-NEXT: [[TMP46:%.*]] = icmp ne i16 [[TMP45]], 012018; CHECK-NEXT: [[TMP47:%.*]] = xor i16 [[TMP45]], -112019; CHECK-NEXT: [[TMP48:%.*]] = and i16 [[TMP47]], [[TMP44]]12020; CHECK-NEXT: [[TMP49:%.*]] = icmp eq i16 [[TMP48]], 012021; CHECK-NEXT: [[_MSPROP_ICMP2:%.*]] = and i1 [[TMP46]], [[TMP49]]12022; CHECK-NEXT: [[TMP50:%.*]] = icmp eq i16 [[TMP43]], 012023; CHECK-NEXT: [[_MSPROP:%.*]] = zext i1 [[_MSPROP_ICMP2]] to i3212024; CHECK-NEXT: [[TMP51:%.*]] = zext i1 [[TMP50]] to i3212025; CHECK-NEXT: store i32 [[_MSPROP]], ptr @__msan_retval_tls, align 812026; CHECK-NEXT: ret i32 [[TMP51]]12027;12028entry:12029 %0 = bitcast <8 x i64> %A to <16 x i32>12030 %1 = bitcast <8 x i64> %B to <16 x i32>12031 %2 = icmp ne <16 x i32> %0, %112032 %3 = bitcast <8 x i64> %C to <16 x i32>12033 %4 = bitcast <8 x i64> %D to <16 x i32>12034 %5 = icmp ne <16 x i32> %3, %412035 %6 = bitcast <16 x i1> %2 to i1612036 %7 = bitcast <16 x i1> %5 to i1612037 %res = call i32 @llvm.x86.avx512.kortestz.w(i16 %6, i16 %7)12038 ret i32 %res12039}12040 12041declare i32 @llvm.x86.avx512.kortestc.w(i16, i16) nounwind readnone12042define i32 @test_kortestc(<8 x i64> %A, <8 x i64> %B, <8 x i64> %C, <8 x i64> %D) #0 {12043; CHECK-LABEL: @test_kortestc(12044; CHECK-NEXT: entry:12045; CHECK-NEXT: [[TMP0:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 812046; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 812047; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 812048; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 812049; CHECK-NEXT: call void @llvm.donothing()12050; CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i64> [[TMP0]] to <16 x i32>12051; CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i64> [[A:%.*]] to <16 x i32>12052; CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i64> [[TMP1]] to <16 x i32>12053; CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i64> [[B:%.*]] to <16 x i32>12054; CHECK-NEXT: [[TMP8:%.*]] = xor <16 x i32> [[TMP5]], [[TMP7]]12055; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP4]], [[TMP6]]12056; CHECK-NEXT: [[TMP10:%.*]] = icmp ne <16 x i32> [[TMP9]], zeroinitializer12057; CHECK-NEXT: [[TMP11:%.*]] = xor <16 x i32> [[TMP9]], splat (i32 -1)12058; CHECK-NEXT: [[TMP12:%.*]] = and <16 x i32> [[TMP11]], [[TMP8]]12059; CHECK-NEXT: [[TMP13:%.*]] = icmp eq <16 x i32> [[TMP12]], zeroinitializer12060; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <16 x i1> [[TMP10]], [[TMP13]]12061; CHECK-NEXT: [[TMP14:%.*]] = icmp ne <16 x i32> [[TMP5]], [[TMP7]]12062; CHECK-NEXT: [[TMP15:%.*]] = bitcast <8 x i64> [[TMP2]] to <16 x i32>12063; CHECK-NEXT: [[TMP16:%.*]] = bitcast <8 x i64> [[C:%.*]] to <16 x i32>12064; CHECK-NEXT: [[TMP17:%.*]] = bitcast <8 x i64> [[TMP3]] to <16 x i32>12065; CHECK-NEXT: [[TMP18:%.*]] = bitcast <8 x i64> [[D:%.*]] to <16 x i32>12066; CHECK-NEXT: [[TMP19:%.*]] = xor <16 x i32> [[TMP16]], [[TMP18]]12067; CHECK-NEXT: [[TMP20:%.*]] = or <16 x i32> [[TMP15]], [[TMP17]]12068; CHECK-NEXT: [[TMP21:%.*]] = icmp ne <16 x i32> [[TMP20]], zeroinitializer12069; CHECK-NEXT: [[TMP22:%.*]] = xor <16 x i32> [[TMP20]], splat (i32 -1)12070; CHECK-NEXT: [[TMP23:%.*]] = and <16 x i32> [[TMP22]], [[TMP19]]12071; CHECK-NEXT: [[TMP24:%.*]] = icmp eq <16 x i32> [[TMP23]], zeroinitializer12072; CHECK-NEXT: [[_MSPROP_ICMP1:%.*]] = and <16 x i1> [[TMP21]], [[TMP24]]12073; CHECK-NEXT: [[TMP25:%.*]] = icmp ne <16 x i32> [[TMP16]], [[TMP18]]12074; CHECK-NEXT: [[TMP26:%.*]] = bitcast <16 x i1> [[_MSPROP_ICMP]] to i1612075; CHECK-NEXT: [[TMP27:%.*]] = bitcast <16 x i1> [[TMP14]] to i1612076; CHECK-NEXT: [[TMP28:%.*]] = bitcast <16 x i1> [[_MSPROP_ICMP1]] to i1612077; CHECK-NEXT: [[TMP29:%.*]] = bitcast <16 x i1> [[TMP25]] to i1612078; CHECK-NEXT: [[TMP30:%.*]] = bitcast i16 [[TMP26]] to <16 x i1>12079; CHECK-NEXT: [[TMP31:%.*]] = bitcast i16 [[TMP27]] to <16 x i1>12080; CHECK-NEXT: [[TMP32:%.*]] = bitcast i16 [[TMP28]] to <16 x i1>12081; CHECK-NEXT: [[TMP33:%.*]] = bitcast i16 [[TMP29]] to <16 x i1>12082; CHECK-NEXT: [[TMP34:%.*]] = xor <16 x i1> [[TMP31]], splat (i1 true)12083; CHECK-NEXT: [[TMP35:%.*]] = xor <16 x i1> [[TMP33]], splat (i1 true)12084; CHECK-NEXT: [[TMP36:%.*]] = and <16 x i1> [[TMP30]], [[TMP32]]12085; CHECK-NEXT: [[TMP37:%.*]] = and <16 x i1> [[TMP34]], [[TMP32]]12086; CHECK-NEXT: [[TMP38:%.*]] = and <16 x i1> [[TMP30]], [[TMP35]]12087; CHECK-NEXT: [[TMP39:%.*]] = or <16 x i1> [[TMP36]], [[TMP37]]12088; CHECK-NEXT: [[TMP40:%.*]] = or <16 x i1> [[TMP39]], [[TMP38]]12089; CHECK-NEXT: [[TMP41:%.*]] = or <16 x i1> [[TMP31]], [[TMP33]]12090; CHECK-NEXT: [[TMP42:%.*]] = bitcast <16 x i1> [[TMP40]] to i1612091; CHECK-NEXT: [[TMP43:%.*]] = bitcast <16 x i1> [[TMP41]] to i1612092; CHECK-NEXT: [[TMP44:%.*]] = xor i16 [[TMP43]], 012093; CHECK-NEXT: [[TMP45:%.*]] = or i16 [[TMP42]], 012094; CHECK-NEXT: [[TMP46:%.*]] = icmp ne i16 [[TMP45]], 012095; CHECK-NEXT: [[TMP47:%.*]] = xor i16 [[TMP45]], -112096; CHECK-NEXT: [[TMP48:%.*]] = and i16 [[TMP47]], [[TMP44]]12097; CHECK-NEXT: [[TMP49:%.*]] = icmp eq i16 [[TMP48]], 012098; CHECK-NEXT: [[_MSPROP_ICMP2:%.*]] = and i1 [[TMP46]], [[TMP49]]12099; CHECK-NEXT: [[TMP50:%.*]] = icmp eq i16 [[TMP43]], 012100; CHECK-NEXT: [[_MSPROP:%.*]] = zext i1 [[_MSPROP_ICMP2]] to i3212101; CHECK-NEXT: [[TMP51:%.*]] = zext i1 [[TMP50]] to i3212102; CHECK-NEXT: store i32 [[_MSPROP]], ptr @__msan_retval_tls, align 812103; CHECK-NEXT: ret i32 [[TMP51]]12104;12105entry:12106 %0 = bitcast <8 x i64> %A to <16 x i32>12107 %1 = bitcast <8 x i64> %B to <16 x i32>12108 %2 = icmp ne <16 x i32> %0, %112109 %3 = bitcast <8 x i64> %C to <16 x i32>12110 %4 = bitcast <8 x i64> %D to <16 x i32>12111 %5 = icmp ne <16 x i32> %3, %412112 %6 = bitcast <16 x i1> %2 to i1612113 %7 = bitcast <16 x i1> %5 to i1612114 %res = call i32 @llvm.x86.avx512.kortestz.w(i16 %6, i16 %7)12115 ret i32 %res12116}12117 12118define i16 @test_cmpps(<16 x float> %a, <16 x float> %b) #0 {12119; CHECK-LABEL: @test_cmpps(12120; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 812121; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 812122; CHECK-NEXT: call void @llvm.donothing()12123; CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i32> [[TMP1]] to i51212124; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP3]], 012125; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[TMP2]] to i51212126; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP4]], 012127; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]12128; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]12129; CHECK: 5:12130; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]12131; CHECK-NEXT: unreachable12132; CHECK: 6:12133; CHECK-NEXT: [[RES:%.*]] = call <16 x i1> @llvm.x86.avx512.mask.cmp.ps.512(<16 x float> [[A:%.*]], <16 x float> [[B:%.*]], i32 2, <16 x i1> splat (i1 true), i32 8)12134; CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i1> [[RES]] to i1612135; CHECK-NEXT: store i16 0, ptr @__msan_retval_tls, align 812136; CHECK-NEXT: ret i16 [[TMP7]]12137;12138 %res = call i16 @llvm.x86.avx512.mask.cmp.ps.512(<16 x float> %a, <16 x float> %b, i32 2, i16 -1, i32 8)12139 ret i16 %res12140}12141declare i16 @llvm.x86.avx512.mask.cmp.ps.512(<16 x float> , <16 x float> , i32, i16, i32)12142 12143define i8 @test_cmppd(<8 x double> %a, <8 x double> %b) #0 {12144; CHECK-LABEL: @test_cmppd(12145; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 812146; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 812147; CHECK-NEXT: call void @llvm.donothing()12148; CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i64> [[TMP1]] to i51212149; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP3]], 012150; CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i64> [[TMP2]] to i51212151; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP4]], 012152; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]12153; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]12154; CHECK: 5:12155; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]12156; CHECK-NEXT: unreachable12157; CHECK: 6:12158; CHECK-NEXT: [[RES:%.*]] = call <8 x i1> @llvm.x86.avx512.mask.cmp.pd.512(<8 x double> [[A:%.*]], <8 x double> [[B:%.*]], i32 4, <8 x i1> splat (i1 true), i32 4)12159; CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i1> [[RES]] to i812160; CHECK-NEXT: store i8 0, ptr @__msan_retval_tls, align 812161; CHECK-NEXT: ret i8 [[TMP7]]12162;12163 %res = call i8 @llvm.x86.avx512.mask.cmp.pd.512(<8 x double> %a, <8 x double> %b, i32 4, i8 -1, i32 4)12164 ret i8 %res12165}12166declare i8 @llvm.x86.avx512.mask.cmp.pd.512(<8 x double> , <8 x double> , i32, i8, i32)12167 12168define <8 x i64> @test_mul_epi32_rr(<16 x i32> %a, <16 x i32> %b) #0 {12169; CHECK-LABEL: @test_mul_epi32_rr(12170; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 812171; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 812172; CHECK-NEXT: call void @llvm.donothing()12173; CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i32> [[TMP1]] to <8 x i64>12174; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>12175; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>12176; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i32> [[B:%.*]] to <8 x i64>12177; CHECK-NEXT: [[TMP7:%.*]] = shl <8 x i64> [[TMP3]], splat (i64 32)12178; CHECK-NEXT: [[TMP8:%.*]] = or <8 x i64> [[TMP7]], zeroinitializer12179; CHECK-NEXT: [[TMP9:%.*]] = shl <8 x i64> [[TMP4]], splat (i64 32)12180; CHECK-NEXT: [[TMP10:%.*]] = ashr <8 x i64> [[TMP8]], splat (i64 32)12181; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], zeroinitializer12182; CHECK-NEXT: [[TMP12:%.*]] = ashr <8 x i64> [[TMP9]], splat (i64 32)12183; CHECK-NEXT: [[TMP13:%.*]] = shl <8 x i64> [[TMP5]], splat (i64 32)12184; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], zeroinitializer12185; CHECK-NEXT: [[TMP15:%.*]] = shl <8 x i64> [[TMP6]], splat (i64 32)12186; CHECK-NEXT: [[TMP16:%.*]] = ashr <8 x i64> [[TMP14]], splat (i64 32)12187; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP16]], zeroinitializer12188; CHECK-NEXT: [[TMP18:%.*]] = ashr <8 x i64> [[TMP15]], splat (i64 32)12189; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP11]], [[TMP17]]12190; CHECK-NEXT: [[TMP19:%.*]] = mul <8 x i64> [[TMP12]], [[TMP18]]12191; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 812192; CHECK-NEXT: ret <8 x i64> [[TMP19]]12193;12194 %res = call <8 x i64> @llvm.x86.avx512.pmul.dq.512(<16 x i32> %a, <16 x i32> %b)12195 ret < 8 x i64> %res12196}12197 12198define <8 x i64> @test_mul_epi32_rrk(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask) #0 {12199;12200; CHECK-LABEL: @test_mul_epi32_rrk(12201; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 812202; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 812203; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 812204; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 812205; CHECK-NEXT: call void @llvm.donothing()12206; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP1]] to <8 x i64>12207; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>12208; CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>12209; CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i32> [[B:%.*]] to <8 x i64>12210; CHECK-NEXT: [[TMP9:%.*]] = shl <8 x i64> [[TMP5]], splat (i64 32)12211; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], zeroinitializer12212; CHECK-NEXT: [[TMP11:%.*]] = shl <8 x i64> [[TMP6]], splat (i64 32)12213; CHECK-NEXT: [[TMP12:%.*]] = ashr <8 x i64> [[TMP10]], splat (i64 32)12214; CHECK-NEXT: [[TMP13:%.*]] = or <8 x i64> [[TMP12]], zeroinitializer12215; CHECK-NEXT: [[TMP14:%.*]] = ashr <8 x i64> [[TMP11]], splat (i64 32)12216; CHECK-NEXT: [[TMP15:%.*]] = shl <8 x i64> [[TMP7]], splat (i64 32)12217; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP15]], zeroinitializer12218; CHECK-NEXT: [[TMP17:%.*]] = shl <8 x i64> [[TMP8]], splat (i64 32)12219; CHECK-NEXT: [[TMP18:%.*]] = ashr <8 x i64> [[TMP16]], splat (i64 32)12220; CHECK-NEXT: [[TMP19:%.*]] = or <8 x i64> [[TMP18]], zeroinitializer12221; CHECK-NEXT: [[TMP20:%.*]] = ashr <8 x i64> [[TMP17]], splat (i64 32)12222; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP13]], [[TMP19]]12223; CHECK-NEXT: [[TMP21:%.*]] = mul <8 x i64> [[TMP14]], [[TMP20]]12224; CHECK-NEXT: [[TMP22:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>12225; CHECK-NEXT: [[MASK_CAST:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>12226; CHECK-NEXT: [[TMP23:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]12227; CHECK-NEXT: [[TMP24:%.*]] = xor <8 x i64> [[TMP21]], [[PASSTHRU:%.*]]12228; CHECK-NEXT: [[TMP25:%.*]] = or <8 x i64> [[TMP24]], [[_MSPROP]]12229; CHECK-NEXT: [[TMP26:%.*]] = or <8 x i64> [[TMP25]], [[TMP4]]12230; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP22]], <8 x i64> [[TMP26]], <8 x i64> [[TMP23]]12231; CHECK-NEXT: [[RES:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[TMP21]], <8 x i64> [[PASSTHRU]]12232; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 812233; CHECK-NEXT: ret <8 x i64> [[RES]]12234;12235 %mul = call <8 x i64> @llvm.x86.avx512.pmul.dq.512(<16 x i32> %a, <16 x i32> %b)12236 %mask.cast = bitcast i8 %mask to <8 x i1>12237 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> %passThru12238 ret < 8 x i64> %res12239}12240 12241define <8 x i64> @test_mul_epi32_rrkz(<16 x i32> %a, <16 x i32> %b, i8 %mask) #0 {12242;12243; CHECK-LABEL: @test_mul_epi32_rrkz(12244; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 812245; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 812246; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 812247; CHECK-NEXT: call void @llvm.donothing()12248; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[TMP1]] to <8 x i64>12249; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>12250; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>12251; CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i32> [[B:%.*]] to <8 x i64>12252; CHECK-NEXT: [[TMP8:%.*]] = shl <8 x i64> [[TMP4]], splat (i64 32)12253; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], zeroinitializer12254; CHECK-NEXT: [[TMP10:%.*]] = shl <8 x i64> [[TMP5]], splat (i64 32)12255; CHECK-NEXT: [[TMP11:%.*]] = ashr <8 x i64> [[TMP9]], splat (i64 32)12256; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], zeroinitializer12257; CHECK-NEXT: [[TMP13:%.*]] = ashr <8 x i64> [[TMP10]], splat (i64 32)12258; CHECK-NEXT: [[TMP14:%.*]] = shl <8 x i64> [[TMP6]], splat (i64 32)12259; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], zeroinitializer12260; CHECK-NEXT: [[TMP16:%.*]] = shl <8 x i64> [[TMP7]], splat (i64 32)12261; CHECK-NEXT: [[TMP17:%.*]] = ashr <8 x i64> [[TMP15]], splat (i64 32)12262; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i64> [[TMP17]], zeroinitializer12263; CHECK-NEXT: [[TMP19:%.*]] = ashr <8 x i64> [[TMP16]], splat (i64 32)12264; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP12]], [[TMP18]]12265; CHECK-NEXT: [[TMP20:%.*]] = mul <8 x i64> [[TMP13]], [[TMP19]]12266; CHECK-NEXT: [[TMP21:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>12267; CHECK-NEXT: [[MASK_CAST:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>12268; CHECK-NEXT: [[TMP22:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer12269; CHECK-NEXT: [[TMP23:%.*]] = xor <8 x i64> [[TMP20]], zeroinitializer12270; CHECK-NEXT: [[TMP24:%.*]] = or <8 x i64> [[TMP23]], [[_MSPROP]]12271; CHECK-NEXT: [[TMP25:%.*]] = or <8 x i64> [[TMP24]], zeroinitializer12272; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP21]], <8 x i64> [[TMP25]], <8 x i64> [[TMP22]]12273; CHECK-NEXT: [[RES:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[TMP20]], <8 x i64> zeroinitializer12274; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 812275; CHECK-NEXT: ret <8 x i64> [[RES]]12276;12277 %mul = call <8 x i64> @llvm.x86.avx512.pmul.dq.512(<16 x i32> %a, <16 x i32> %b)12278 %mask.cast = bitcast i8 %mask to <8 x i1>12279 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> zeroinitializer12280 ret < 8 x i64> %res12281}12282 12283define <8 x i64> @test_mul_epi32_rm(<16 x i32> %a, ptr %ptr_b) #0 {12284;12285; CHECK-LABEL: @test_mul_epi32_rm(12286; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 812287; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 812288; CHECK-NEXT: call void @llvm.donothing()12289; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 012290; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]12291; CHECK: 3:12292; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]12293; CHECK-NEXT: unreachable12294; CHECK: 4:12295; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 6412296; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i6412297; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 8796093022208012298; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr12299; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP7]], align 6412300; CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>12301; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>12302; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i32> [[_MSLD]] to <8 x i64>12303; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>12304; CHECK-NEXT: [[TMP12:%.*]] = shl <8 x i64> [[TMP8]], splat (i64 32)12305; CHECK-NEXT: [[TMP13:%.*]] = or <8 x i64> [[TMP12]], zeroinitializer12306; CHECK-NEXT: [[TMP14:%.*]] = shl <8 x i64> [[TMP9]], splat (i64 32)12307; CHECK-NEXT: [[TMP15:%.*]] = ashr <8 x i64> [[TMP13]], splat (i64 32)12308; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP15]], zeroinitializer12309; CHECK-NEXT: [[TMP17:%.*]] = ashr <8 x i64> [[TMP14]], splat (i64 32)12310; CHECK-NEXT: [[TMP18:%.*]] = shl <8 x i64> [[TMP10]], splat (i64 32)12311; CHECK-NEXT: [[TMP19:%.*]] = or <8 x i64> [[TMP18]], zeroinitializer12312; CHECK-NEXT: [[TMP20:%.*]] = shl <8 x i64> [[TMP11]], splat (i64 32)12313; CHECK-NEXT: [[TMP21:%.*]] = ashr <8 x i64> [[TMP19]], splat (i64 32)12314; CHECK-NEXT: [[TMP22:%.*]] = or <8 x i64> [[TMP21]], zeroinitializer12315; CHECK-NEXT: [[TMP23:%.*]] = ashr <8 x i64> [[TMP20]], splat (i64 32)12316; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP16]], [[TMP22]]12317; CHECK-NEXT: [[TMP24:%.*]] = mul <8 x i64> [[TMP17]], [[TMP23]]12318; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 812319; CHECK-NEXT: ret <8 x i64> [[TMP24]]12320;12321 %b = load <16 x i32>, ptr %ptr_b12322 %res = call <8 x i64> @llvm.x86.avx512.pmul.dq.512(<16 x i32> %a, <16 x i32> %b)12323 ret < 8 x i64> %res12324}12325 12326define <8 x i64> @test_mul_epi32_rmk(<16 x i32> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask) #0 {12327;12328; CHECK-LABEL: @test_mul_epi32_rmk(12329; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 812330; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 812331; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 812332; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 812333; CHECK-NEXT: call void @llvm.donothing()12334; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 012335; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]12336; CHECK: 5:12337; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]12338; CHECK-NEXT: unreachable12339; CHECK: 6:12340; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 6412341; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i6412342; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 8796093022208012343; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr12344; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP9]], align 6412345; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>12346; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>12347; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i32> [[_MSLD]] to <8 x i64>12348; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>12349; CHECK-NEXT: [[TMP14:%.*]] = shl <8 x i64> [[TMP10]], splat (i64 32)12350; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], zeroinitializer12351; CHECK-NEXT: [[TMP16:%.*]] = shl <8 x i64> [[TMP11]], splat (i64 32)12352; CHECK-NEXT: [[TMP17:%.*]] = ashr <8 x i64> [[TMP15]], splat (i64 32)12353; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i64> [[TMP17]], zeroinitializer12354; CHECK-NEXT: [[TMP19:%.*]] = ashr <8 x i64> [[TMP16]], splat (i64 32)12355; CHECK-NEXT: [[TMP20:%.*]] = shl <8 x i64> [[TMP12]], splat (i64 32)12356; CHECK-NEXT: [[TMP21:%.*]] = or <8 x i64> [[TMP20]], zeroinitializer12357; CHECK-NEXT: [[TMP22:%.*]] = shl <8 x i64> [[TMP13]], splat (i64 32)12358; CHECK-NEXT: [[TMP23:%.*]] = ashr <8 x i64> [[TMP21]], splat (i64 32)12359; CHECK-NEXT: [[TMP24:%.*]] = or <8 x i64> [[TMP23]], zeroinitializer12360; CHECK-NEXT: [[TMP25:%.*]] = ashr <8 x i64> [[TMP22]], splat (i64 32)12361; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP18]], [[TMP24]]12362; CHECK-NEXT: [[TMP26:%.*]] = mul <8 x i64> [[TMP19]], [[TMP25]]12363; CHECK-NEXT: [[TMP27:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>12364; CHECK-NEXT: [[MASK_CAST:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>12365; CHECK-NEXT: [[TMP28:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]12366; CHECK-NEXT: [[TMP29:%.*]] = xor <8 x i64> [[TMP26]], [[PASSTHRU:%.*]]12367; CHECK-NEXT: [[TMP30:%.*]] = or <8 x i64> [[TMP29]], [[_MSPROP]]12368; CHECK-NEXT: [[TMP31:%.*]] = or <8 x i64> [[TMP30]], [[TMP4]]12369; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP27]], <8 x i64> [[TMP31]], <8 x i64> [[TMP28]]12370; CHECK-NEXT: [[RES:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[TMP26]], <8 x i64> [[PASSTHRU]]12371; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 812372; CHECK-NEXT: ret <8 x i64> [[RES]]12373;12374 %b = load <16 x i32>, ptr %ptr_b12375 %mul = call <8 x i64> @llvm.x86.avx512.pmul.dq.512(<16 x i32> %a, <16 x i32> %b)12376 %mask.cast = bitcast i8 %mask to <8 x i1>12377 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> %passThru12378 ret < 8 x i64> %res12379}12380 12381define <8 x i64> @test_mul_epi32_rmkz(<16 x i32> %a, ptr %ptr_b, i8 %mask) #0 {12382;12383; CHECK-LABEL: @test_mul_epi32_rmkz(12384; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 812385; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 812386; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 812387; CHECK-NEXT: call void @llvm.donothing()12388; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 012389; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]12390; CHECK: 4:12391; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]12392; CHECK-NEXT: unreachable12393; CHECK: 5:12394; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 6412395; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i6412396; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 8796093022208012397; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr12398; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP8]], align 6412399; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>12400; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>12401; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[_MSLD]] to <8 x i64>12402; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>12403; CHECK-NEXT: [[TMP13:%.*]] = shl <8 x i64> [[TMP9]], splat (i64 32)12404; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], zeroinitializer12405; CHECK-NEXT: [[TMP15:%.*]] = shl <8 x i64> [[TMP10]], splat (i64 32)12406; CHECK-NEXT: [[TMP16:%.*]] = ashr <8 x i64> [[TMP14]], splat (i64 32)12407; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP16]], zeroinitializer12408; CHECK-NEXT: [[TMP18:%.*]] = ashr <8 x i64> [[TMP15]], splat (i64 32)12409; CHECK-NEXT: [[TMP19:%.*]] = shl <8 x i64> [[TMP11]], splat (i64 32)12410; CHECK-NEXT: [[TMP20:%.*]] = or <8 x i64> [[TMP19]], zeroinitializer12411; CHECK-NEXT: [[TMP21:%.*]] = shl <8 x i64> [[TMP12]], splat (i64 32)12412; CHECK-NEXT: [[TMP22:%.*]] = ashr <8 x i64> [[TMP20]], splat (i64 32)12413; CHECK-NEXT: [[TMP23:%.*]] = or <8 x i64> [[TMP22]], zeroinitializer12414; CHECK-NEXT: [[TMP24:%.*]] = ashr <8 x i64> [[TMP21]], splat (i64 32)12415; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP17]], [[TMP23]]12416; CHECK-NEXT: [[TMP25:%.*]] = mul <8 x i64> [[TMP18]], [[TMP24]]12417; CHECK-NEXT: [[TMP26:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>12418; CHECK-NEXT: [[MASK_CAST:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>12419; CHECK-NEXT: [[TMP27:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer12420; CHECK-NEXT: [[TMP28:%.*]] = xor <8 x i64> [[TMP25]], zeroinitializer12421; CHECK-NEXT: [[TMP29:%.*]] = or <8 x i64> [[TMP28]], [[_MSPROP]]12422; CHECK-NEXT: [[TMP30:%.*]] = or <8 x i64> [[TMP29]], zeroinitializer12423; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP26]], <8 x i64> [[TMP30]], <8 x i64> [[TMP27]]12424; CHECK-NEXT: [[RES:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[TMP25]], <8 x i64> zeroinitializer12425; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 812426; CHECK-NEXT: ret <8 x i64> [[RES]]12427;12428 %b = load <16 x i32>, ptr %ptr_b12429 %mul = call <8 x i64> @llvm.x86.avx512.pmul.dq.512(<16 x i32> %a, <16 x i32> %b)12430 %mask.cast = bitcast i8 %mask to <8 x i1>12431 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> zeroinitializer12432 ret < 8 x i64> %res12433}12434 12435define <8 x i64> @test_mul_epi32_rmb(<16 x i32> %a, ptr %ptr_b, <8 x i64> %extra_param) #0 {12436;12437; CHECK-LABEL: @test_mul_epi32_rmb(12438; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 812439; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 812440; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 812441; CHECK-NEXT: call void @llvm.donothing()12442; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 012443; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP26:%.*]], !prof [[PROF1]]12444; CHECK: 4:12445; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]12446; CHECK-NEXT: unreachable12447; CHECK: 5:12448; CHECK-NEXT: [[Q:%.*]] = load i64, ptr [[PTR_B:%.*]], align 812449; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i6412450; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 8796093022208012451; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr12452; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP7]], align 812453; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i64> [[TMP3]], i64 [[_MSLD]], i32 012454; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i64> [[EXTRA_PARAM:%.*]], i64 [[Q]], i32 012455; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[_MSPROP]], <8 x i64> [[TMP3]], <8 x i32> zeroinitializer12456; CHECK-NEXT: [[B64:%.*]] = shufflevector <8 x i64> [[VECINIT_I]], <8 x i64> [[EXTRA_PARAM]], <8 x i32> zeroinitializer12457; CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x i64> [[_MSPROP1]] to <16 x i32>12458; CHECK-NEXT: [[B:%.*]] = bitcast <8 x i64> [[B64]] to <16 x i32>12459; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>12460; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>12461; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[TMP8]] to <8 x i64>12462; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>12463; CHECK-NEXT: [[TMP13:%.*]] = shl <8 x i64> [[TMP9]], splat (i64 32)12464; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], zeroinitializer12465; CHECK-NEXT: [[TMP15:%.*]] = shl <8 x i64> [[TMP10]], splat (i64 32)12466; CHECK-NEXT: [[TMP16:%.*]] = ashr <8 x i64> [[TMP14]], splat (i64 32)12467; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP16]], zeroinitializer12468; CHECK-NEXT: [[TMP18:%.*]] = ashr <8 x i64> [[TMP15]], splat (i64 32)12469; CHECK-NEXT: [[TMP19:%.*]] = shl <8 x i64> [[TMP11]], splat (i64 32)12470; CHECK-NEXT: [[TMP20:%.*]] = or <8 x i64> [[TMP19]], zeroinitializer12471; CHECK-NEXT: [[TMP21:%.*]] = shl <8 x i64> [[TMP12]], splat (i64 32)12472; CHECK-NEXT: [[TMP22:%.*]] = ashr <8 x i64> [[TMP20]], splat (i64 32)12473; CHECK-NEXT: [[TMP23:%.*]] = or <8 x i64> [[TMP22]], zeroinitializer12474; CHECK-NEXT: [[TMP24:%.*]] = ashr <8 x i64> [[TMP21]], splat (i64 32)12475; CHECK-NEXT: [[_MSPROP2:%.*]] = or <8 x i64> [[TMP17]], [[TMP23]]12476; CHECK-NEXT: [[TMP25:%.*]] = mul <8 x i64> [[TMP18]], [[TMP24]]12477; CHECK-NEXT: store <8 x i64> [[_MSPROP2]], ptr @__msan_retval_tls, align 812478; CHECK-NEXT: ret <8 x i64> [[TMP25]]12479;12480 %q = load i64, ptr %ptr_b12481 %vecinit.i = insertelement <8 x i64> %extra_param, i64 %q, i32 012482 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> %extra_param, <8 x i32> zeroinitializer12483 %b = bitcast <8 x i64> %b64 to <16 x i32>12484 %res = call <8 x i64> @llvm.x86.avx512.pmul.dq.512(<16 x i32> %a, <16 x i32> %b)12485 ret < 8 x i64> %res12486}12487 12488define <8 x i64> @test_mul_epi32_rmbk(<16 x i32> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask, <8 x i64> %extra_param) #0 {12489;12490; CHECK-LABEL: @test_mul_epi32_rmbk(12491; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 812492; CHECK-NEXT: [[TMP5:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 812493; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 812494; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 812495; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 812496; CHECK-NEXT: call void @llvm.donothing()12497; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 012498; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP6:%.*]], label [[TMP33:%.*]], !prof [[PROF1]]12499; CHECK: 6:12500; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]12501; CHECK-NEXT: unreachable12502; CHECK: 7:12503; CHECK-NEXT: [[Q:%.*]] = load i64, ptr [[PTR_B:%.*]], align 812504; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i6412505; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 8796093022208012506; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr12507; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP9]], align 812508; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i64> [[TMP5]], i64 [[_MSLD]], i32 012509; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i64> [[EXTRA_PARAM:%.*]], i64 [[Q]], i32 012510; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[_MSPROP]], <8 x i64> [[TMP5]], <8 x i32> zeroinitializer12511; CHECK-NEXT: [[B64:%.*]] = shufflevector <8 x i64> [[VECINIT_I]], <8 x i64> [[EXTRA_PARAM]], <8 x i32> zeroinitializer12512; CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x i64> [[_MSPROP1]] to <16 x i32>12513; CHECK-NEXT: [[B:%.*]] = bitcast <8 x i64> [[B64]] to <16 x i32>12514; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>12515; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>12516; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x i32> [[TMP10]] to <8 x i64>12517; CHECK-NEXT: [[TMP14:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>12518; CHECK-NEXT: [[TMP15:%.*]] = shl <8 x i64> [[TMP11]], splat (i64 32)12519; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP15]], zeroinitializer12520; CHECK-NEXT: [[TMP17:%.*]] = shl <8 x i64> [[TMP12]], splat (i64 32)12521; CHECK-NEXT: [[TMP18:%.*]] = ashr <8 x i64> [[TMP16]], splat (i64 32)12522; CHECK-NEXT: [[TMP19:%.*]] = or <8 x i64> [[TMP18]], zeroinitializer12523; CHECK-NEXT: [[TMP20:%.*]] = ashr <8 x i64> [[TMP17]], splat (i64 32)12524; CHECK-NEXT: [[TMP21:%.*]] = shl <8 x i64> [[TMP13]], splat (i64 32)12525; CHECK-NEXT: [[TMP22:%.*]] = or <8 x i64> [[TMP21]], zeroinitializer12526; CHECK-NEXT: [[TMP23:%.*]] = shl <8 x i64> [[TMP14]], splat (i64 32)12527; CHECK-NEXT: [[TMP24:%.*]] = ashr <8 x i64> [[TMP22]], splat (i64 32)12528; CHECK-NEXT: [[TMP25:%.*]] = or <8 x i64> [[TMP24]], zeroinitializer12529; CHECK-NEXT: [[TMP26:%.*]] = ashr <8 x i64> [[TMP23]], splat (i64 32)12530; CHECK-NEXT: [[_MSPROP2:%.*]] = or <8 x i64> [[TMP19]], [[TMP25]]12531; CHECK-NEXT: [[TMP27:%.*]] = mul <8 x i64> [[TMP20]], [[TMP26]]12532; CHECK-NEXT: [[TMP28:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>12533; CHECK-NEXT: [[MASK_CAST:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>12534; CHECK-NEXT: [[TMP29:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[_MSPROP2]], <8 x i64> [[TMP4]]12535; CHECK-NEXT: [[TMP30:%.*]] = xor <8 x i64> [[TMP27]], [[PASSTHRU:%.*]]12536; CHECK-NEXT: [[TMP31:%.*]] = or <8 x i64> [[TMP30]], [[_MSPROP2]]12537; CHECK-NEXT: [[TMP32:%.*]] = or <8 x i64> [[TMP31]], [[TMP4]]12538; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP28]], <8 x i64> [[TMP32]], <8 x i64> [[TMP29]]12539; CHECK-NEXT: [[RES:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[TMP27]], <8 x i64> [[PASSTHRU]]12540; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 812541; CHECK-NEXT: ret <8 x i64> [[RES]]12542;12543 %q = load i64, ptr %ptr_b12544 %vecinit.i = insertelement <8 x i64> %extra_param, i64 %q, i32 012545 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> %extra_param, <8 x i32> zeroinitializer12546 %b = bitcast <8 x i64> %b64 to <16 x i32>12547 %mul = call <8 x i64> @llvm.x86.avx512.pmul.dq.512(<16 x i32> %a, <16 x i32> %b)12548 %mask.cast = bitcast i8 %mask to <8 x i1>12549 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> %passThru12550 ret < 8 x i64> %res12551}12552 12553define <8 x i64> @test_mul_epi32_rmbkz(<16 x i32> %a, ptr %ptr_b, i8 %mask, <8 x i64> %extra_param) #0 {12554;12555; CHECK-LABEL: @test_mul_epi32_rmbkz(12556; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 812557; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 812558; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 812559; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 812560; CHECK-NEXT: call void @llvm.donothing()12561; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 012562; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP32:%.*]], !prof [[PROF1]]12563; CHECK: 5:12564; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]12565; CHECK-NEXT: unreachable12566; CHECK: 6:12567; CHECK-NEXT: [[Q:%.*]] = load i64, ptr [[PTR_B:%.*]], align 812568; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i6412569; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 8796093022208012570; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr12571; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP8]], align 812572; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i64> [[TMP4]], i64 [[_MSLD]], i32 012573; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i64> [[EXTRA_PARAM:%.*]], i64 [[Q]], i32 012574; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]], <8 x i32> zeroinitializer12575; CHECK-NEXT: [[B64:%.*]] = shufflevector <8 x i64> [[VECINIT_I]], <8 x i64> [[EXTRA_PARAM]], <8 x i32> zeroinitializer12576; CHECK-NEXT: [[TMP9:%.*]] = bitcast <8 x i64> [[_MSPROP1]] to <16 x i32>12577; CHECK-NEXT: [[B:%.*]] = bitcast <8 x i64> [[B64]] to <16 x i32>12578; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>12579; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>12580; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i32> [[TMP9]] to <8 x i64>12581; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>12582; CHECK-NEXT: [[TMP14:%.*]] = shl <8 x i64> [[TMP10]], splat (i64 32)12583; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], zeroinitializer12584; CHECK-NEXT: [[TMP16:%.*]] = shl <8 x i64> [[TMP11]], splat (i64 32)12585; CHECK-NEXT: [[TMP17:%.*]] = ashr <8 x i64> [[TMP15]], splat (i64 32)12586; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i64> [[TMP17]], zeroinitializer12587; CHECK-NEXT: [[TMP19:%.*]] = ashr <8 x i64> [[TMP16]], splat (i64 32)12588; CHECK-NEXT: [[TMP20:%.*]] = shl <8 x i64> [[TMP12]], splat (i64 32)12589; CHECK-NEXT: [[TMP21:%.*]] = or <8 x i64> [[TMP20]], zeroinitializer12590; CHECK-NEXT: [[TMP22:%.*]] = shl <8 x i64> [[TMP13]], splat (i64 32)12591; CHECK-NEXT: [[TMP23:%.*]] = ashr <8 x i64> [[TMP21]], splat (i64 32)12592; CHECK-NEXT: [[TMP24:%.*]] = or <8 x i64> [[TMP23]], zeroinitializer12593; CHECK-NEXT: [[TMP25:%.*]] = ashr <8 x i64> [[TMP22]], splat (i64 32)12594; CHECK-NEXT: [[_MSPROP2:%.*]] = or <8 x i64> [[TMP18]], [[TMP24]]12595; CHECK-NEXT: [[TMP26:%.*]] = mul <8 x i64> [[TMP19]], [[TMP25]]12596; CHECK-NEXT: [[TMP27:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>12597; CHECK-NEXT: [[MASK_CAST:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>12598; CHECK-NEXT: [[TMP28:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[_MSPROP2]], <8 x i64> zeroinitializer12599; CHECK-NEXT: [[TMP29:%.*]] = xor <8 x i64> [[TMP26]], zeroinitializer12600; CHECK-NEXT: [[TMP30:%.*]] = or <8 x i64> [[TMP29]], [[_MSPROP2]]12601; CHECK-NEXT: [[TMP31:%.*]] = or <8 x i64> [[TMP30]], zeroinitializer12602; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP27]], <8 x i64> [[TMP31]], <8 x i64> [[TMP28]]12603; CHECK-NEXT: [[RES:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[TMP26]], <8 x i64> zeroinitializer12604; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 812605; CHECK-NEXT: ret <8 x i64> [[RES]]12606;12607 %q = load i64, ptr %ptr_b12608 %vecinit.i = insertelement <8 x i64> %extra_param, i64 %q, i32 012609 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> %extra_param, <8 x i32> zeroinitializer12610 %b = bitcast <8 x i64> %b64 to <16 x i32>12611 %mul = call <8 x i64> @llvm.x86.avx512.pmul.dq.512(<16 x i32> %a, <16 x i32> %b)12612 %mask.cast = bitcast i8 %mask to <8 x i1>12613 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> zeroinitializer12614 ret < 8 x i64> %res12615}12616 12617declare <8 x i64> @llvm.x86.avx512.pmul.dq.512(<16 x i32>, <16 x i32>)12618 12619define <8 x i64> @test_mul_epu32_rr(<16 x i32> %a, <16 x i32> %b) #0 {12620; CHECK-LABEL: @test_mul_epu32_rr(12621; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 812622; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 812623; CHECK-NEXT: call void @llvm.donothing()12624; CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i32> [[TMP1]] to <8 x i64>12625; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>12626; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>12627; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i32> [[B:%.*]] to <8 x i64>12628; CHECK-NEXT: [[TMP7:%.*]] = and <8 x i64> [[TMP3]], zeroinitializer12629; CHECK-NEXT: [[TMP8:%.*]] = and <8 x i64> [[TMP4]], zeroinitializer12630; CHECK-NEXT: [[TMP9:%.*]] = and <8 x i64> [[TMP3]], splat (i64 4294967295)12631; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP7]], [[TMP8]]12632; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP9]]12633; CHECK-NEXT: [[TMP12:%.*]] = and <8 x i64> [[TMP4]], splat (i64 4294967295)12634; CHECK-NEXT: [[TMP13:%.*]] = and <8 x i64> [[TMP5]], zeroinitializer12635; CHECK-NEXT: [[TMP14:%.*]] = and <8 x i64> [[TMP6]], zeroinitializer12636; CHECK-NEXT: [[TMP15:%.*]] = and <8 x i64> [[TMP5]], splat (i64 4294967295)12637; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP13]], [[TMP14]]12638; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP16]], [[TMP15]]12639; CHECK-NEXT: [[TMP18:%.*]] = and <8 x i64> [[TMP6]], splat (i64 4294967295)12640; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP11]], [[TMP17]]12641; CHECK-NEXT: [[TMP19:%.*]] = mul <8 x i64> [[TMP12]], [[TMP18]]12642; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 812643; CHECK-NEXT: ret <8 x i64> [[TMP19]]12644;12645 %res = call <8 x i64> @llvm.x86.avx512.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b)12646 ret < 8 x i64> %res12647}12648 12649define <8 x i64> @test_mul_epu32_rrk(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask) #0 {12650;12651; CHECK-LABEL: @test_mul_epu32_rrk(12652; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 812653; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 812654; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 812655; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 812656; CHECK-NEXT: call void @llvm.donothing()12657; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP1]] to <8 x i64>12658; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>12659; CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>12660; CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i32> [[B:%.*]] to <8 x i64>12661; CHECK-NEXT: [[TMP9:%.*]] = and <8 x i64> [[TMP5]], zeroinitializer12662; CHECK-NEXT: [[TMP10:%.*]] = and <8 x i64> [[TMP6]], zeroinitializer12663; CHECK-NEXT: [[TMP11:%.*]] = and <8 x i64> [[TMP5]], splat (i64 4294967295)12664; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP9]], [[TMP10]]12665; CHECK-NEXT: [[TMP13:%.*]] = or <8 x i64> [[TMP12]], [[TMP11]]12666; CHECK-NEXT: [[TMP14:%.*]] = and <8 x i64> [[TMP6]], splat (i64 4294967295)12667; CHECK-NEXT: [[TMP15:%.*]] = and <8 x i64> [[TMP7]], zeroinitializer12668; CHECK-NEXT: [[TMP16:%.*]] = and <8 x i64> [[TMP8]], zeroinitializer12669; CHECK-NEXT: [[TMP17:%.*]] = and <8 x i64> [[TMP7]], splat (i64 4294967295)12670; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i64> [[TMP15]], [[TMP16]]12671; CHECK-NEXT: [[TMP19:%.*]] = or <8 x i64> [[TMP18]], [[TMP17]]12672; CHECK-NEXT: [[TMP20:%.*]] = and <8 x i64> [[TMP8]], splat (i64 4294967295)12673; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP13]], [[TMP19]]12674; CHECK-NEXT: [[TMP21:%.*]] = mul <8 x i64> [[TMP14]], [[TMP20]]12675; CHECK-NEXT: [[TMP22:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>12676; CHECK-NEXT: [[MASK_CAST:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>12677; CHECK-NEXT: [[TMP23:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]12678; CHECK-NEXT: [[TMP24:%.*]] = xor <8 x i64> [[TMP21]], [[PASSTHRU:%.*]]12679; CHECK-NEXT: [[TMP25:%.*]] = or <8 x i64> [[TMP24]], [[_MSPROP]]12680; CHECK-NEXT: [[TMP26:%.*]] = or <8 x i64> [[TMP25]], [[TMP4]]12681; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP22]], <8 x i64> [[TMP26]], <8 x i64> [[TMP23]]12682; CHECK-NEXT: [[RES:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[TMP21]], <8 x i64> [[PASSTHRU]]12683; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 812684; CHECK-NEXT: ret <8 x i64> [[RES]]12685;12686 %mul = call <8 x i64> @llvm.x86.avx512.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b)12687 %mask.cast = bitcast i8 %mask to <8 x i1>12688 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> %passThru12689 ret < 8 x i64> %res12690}12691 12692define <8 x i64> @test_mul_epu32_rrkz(<16 x i32> %a, <16 x i32> %b, i8 %mask) #0 {12693;12694; CHECK-LABEL: @test_mul_epu32_rrkz(12695; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 812696; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 812697; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 812698; CHECK-NEXT: call void @llvm.donothing()12699; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[TMP1]] to <8 x i64>12700; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>12701; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>12702; CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i32> [[B:%.*]] to <8 x i64>12703; CHECK-NEXT: [[TMP8:%.*]] = and <8 x i64> [[TMP4]], zeroinitializer12704; CHECK-NEXT: [[TMP9:%.*]] = and <8 x i64> [[TMP5]], zeroinitializer12705; CHECK-NEXT: [[TMP10:%.*]] = and <8 x i64> [[TMP4]], splat (i64 4294967295)12706; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP8]], [[TMP9]]12707; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i64> [[TMP11]], [[TMP10]]12708; CHECK-NEXT: [[TMP13:%.*]] = and <8 x i64> [[TMP5]], splat (i64 4294967295)12709; CHECK-NEXT: [[TMP14:%.*]] = and <8 x i64> [[TMP6]], zeroinitializer12710; CHECK-NEXT: [[TMP15:%.*]] = and <8 x i64> [[TMP7]], zeroinitializer12711; CHECK-NEXT: [[TMP16:%.*]] = and <8 x i64> [[TMP6]], splat (i64 4294967295)12712; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP14]], [[TMP15]]12713; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i64> [[TMP17]], [[TMP16]]12714; CHECK-NEXT: [[TMP19:%.*]] = and <8 x i64> [[TMP7]], splat (i64 4294967295)12715; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP12]], [[TMP18]]12716; CHECK-NEXT: [[TMP20:%.*]] = mul <8 x i64> [[TMP13]], [[TMP19]]12717; CHECK-NEXT: [[TMP21:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>12718; CHECK-NEXT: [[MASK_CAST:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>12719; CHECK-NEXT: [[TMP22:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer12720; CHECK-NEXT: [[TMP23:%.*]] = xor <8 x i64> [[TMP20]], zeroinitializer12721; CHECK-NEXT: [[TMP24:%.*]] = or <8 x i64> [[TMP23]], [[_MSPROP]]12722; CHECK-NEXT: [[TMP25:%.*]] = or <8 x i64> [[TMP24]], zeroinitializer12723; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP21]], <8 x i64> [[TMP25]], <8 x i64> [[TMP22]]12724; CHECK-NEXT: [[RES:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[TMP20]], <8 x i64> zeroinitializer12725; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 812726; CHECK-NEXT: ret <8 x i64> [[RES]]12727;12728 %mul = call <8 x i64> @llvm.x86.avx512.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b)12729 %mask.cast = bitcast i8 %mask to <8 x i1>12730 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> zeroinitializer12731 ret < 8 x i64> %res12732}12733 12734define <8 x i64> @test_mul_epu32_rm(<16 x i32> %a, ptr %ptr_b) #0 {12735;12736; CHECK-LABEL: @test_mul_epu32_rm(12737; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 812738; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 812739; CHECK-NEXT: call void @llvm.donothing()12740; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 012741; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]12742; CHECK: 3:12743; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]12744; CHECK-NEXT: unreachable12745; CHECK: 4:12746; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 6412747; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i6412748; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 8796093022208012749; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr12750; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP7]], align 6412751; CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>12752; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>12753; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i32> [[_MSLD]] to <8 x i64>12754; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>12755; CHECK-NEXT: [[TMP12:%.*]] = and <8 x i64> [[TMP8]], zeroinitializer12756; CHECK-NEXT: [[TMP13:%.*]] = and <8 x i64> [[TMP9]], zeroinitializer12757; CHECK-NEXT: [[TMP14:%.*]] = and <8 x i64> [[TMP8]], splat (i64 4294967295)12758; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP12]], [[TMP13]]12759; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP15]], [[TMP14]]12760; CHECK-NEXT: [[TMP17:%.*]] = and <8 x i64> [[TMP9]], splat (i64 4294967295)12761; CHECK-NEXT: [[TMP18:%.*]] = and <8 x i64> [[TMP10]], zeroinitializer12762; CHECK-NEXT: [[TMP19:%.*]] = and <8 x i64> [[TMP11]], zeroinitializer12763; CHECK-NEXT: [[TMP20:%.*]] = and <8 x i64> [[TMP10]], splat (i64 4294967295)12764; CHECK-NEXT: [[TMP21:%.*]] = or <8 x i64> [[TMP18]], [[TMP19]]12765; CHECK-NEXT: [[TMP22:%.*]] = or <8 x i64> [[TMP21]], [[TMP20]]12766; CHECK-NEXT: [[TMP23:%.*]] = and <8 x i64> [[TMP11]], splat (i64 4294967295)12767; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP16]], [[TMP22]]12768; CHECK-NEXT: [[TMP24:%.*]] = mul <8 x i64> [[TMP17]], [[TMP23]]12769; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 812770; CHECK-NEXT: ret <8 x i64> [[TMP24]]12771;12772 %b = load <16 x i32>, ptr %ptr_b12773 %res = call <8 x i64> @llvm.x86.avx512.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b)12774 ret < 8 x i64> %res12775}12776 12777define <8 x i64> @test_mul_epu32_rmk(<16 x i32> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask) #0 {12778;12779; CHECK-LABEL: @test_mul_epu32_rmk(12780; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 812781; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 812782; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 812783; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 812784; CHECK-NEXT: call void @llvm.donothing()12785; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 012786; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]12787; CHECK: 5:12788; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]12789; CHECK-NEXT: unreachable12790; CHECK: 6:12791; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 6412792; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i6412793; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 8796093022208012794; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr12795; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP9]], align 6412796; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>12797; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>12798; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i32> [[_MSLD]] to <8 x i64>12799; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>12800; CHECK-NEXT: [[TMP14:%.*]] = and <8 x i64> [[TMP10]], zeroinitializer12801; CHECK-NEXT: [[TMP15:%.*]] = and <8 x i64> [[TMP11]], zeroinitializer12802; CHECK-NEXT: [[TMP16:%.*]] = and <8 x i64> [[TMP10]], splat (i64 4294967295)12803; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP14]], [[TMP15]]12804; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i64> [[TMP17]], [[TMP16]]12805; CHECK-NEXT: [[TMP19:%.*]] = and <8 x i64> [[TMP11]], splat (i64 4294967295)12806; CHECK-NEXT: [[TMP20:%.*]] = and <8 x i64> [[TMP12]], zeroinitializer12807; CHECK-NEXT: [[TMP21:%.*]] = and <8 x i64> [[TMP13]], zeroinitializer12808; CHECK-NEXT: [[TMP22:%.*]] = and <8 x i64> [[TMP12]], splat (i64 4294967295)12809; CHECK-NEXT: [[TMP23:%.*]] = or <8 x i64> [[TMP20]], [[TMP21]]12810; CHECK-NEXT: [[TMP24:%.*]] = or <8 x i64> [[TMP23]], [[TMP22]]12811; CHECK-NEXT: [[TMP25:%.*]] = and <8 x i64> [[TMP13]], splat (i64 4294967295)12812; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP18]], [[TMP24]]12813; CHECK-NEXT: [[TMP26:%.*]] = mul <8 x i64> [[TMP19]], [[TMP25]]12814; CHECK-NEXT: [[TMP27:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>12815; CHECK-NEXT: [[MASK_CAST:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>12816; CHECK-NEXT: [[TMP28:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]12817; CHECK-NEXT: [[TMP29:%.*]] = xor <8 x i64> [[TMP26]], [[PASSTHRU:%.*]]12818; CHECK-NEXT: [[TMP30:%.*]] = or <8 x i64> [[TMP29]], [[_MSPROP]]12819; CHECK-NEXT: [[TMP31:%.*]] = or <8 x i64> [[TMP30]], [[TMP4]]12820; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP27]], <8 x i64> [[TMP31]], <8 x i64> [[TMP28]]12821; CHECK-NEXT: [[RES:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[TMP26]], <8 x i64> [[PASSTHRU]]12822; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 812823; CHECK-NEXT: ret <8 x i64> [[RES]]12824;12825 %b = load <16 x i32>, ptr %ptr_b12826 %mul = call <8 x i64> @llvm.x86.avx512.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b)12827 %mask.cast = bitcast i8 %mask to <8 x i1>12828 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> %passThru12829 ret < 8 x i64> %res12830}12831 12832define <8 x i64> @test_mul_epu32_rmkz(<16 x i32> %a, ptr %ptr_b, i8 %mask) #0 {12833;12834; CHECK-LABEL: @test_mul_epu32_rmkz(12835; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 812836; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 812837; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 812838; CHECK-NEXT: call void @llvm.donothing()12839; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 012840; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]12841; CHECK: 4:12842; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]12843; CHECK-NEXT: unreachable12844; CHECK: 5:12845; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 6412846; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i6412847; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 8796093022208012848; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr12849; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP8]], align 6412850; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>12851; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>12852; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[_MSLD]] to <8 x i64>12853; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>12854; CHECK-NEXT: [[TMP13:%.*]] = and <8 x i64> [[TMP9]], zeroinitializer12855; CHECK-NEXT: [[TMP14:%.*]] = and <8 x i64> [[TMP10]], zeroinitializer12856; CHECK-NEXT: [[TMP15:%.*]] = and <8 x i64> [[TMP9]], splat (i64 4294967295)12857; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP13]], [[TMP14]]12858; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP16]], [[TMP15]]12859; CHECK-NEXT: [[TMP18:%.*]] = and <8 x i64> [[TMP10]], splat (i64 4294967295)12860; CHECK-NEXT: [[TMP19:%.*]] = and <8 x i64> [[TMP11]], zeroinitializer12861; CHECK-NEXT: [[TMP20:%.*]] = and <8 x i64> [[TMP12]], zeroinitializer12862; CHECK-NEXT: [[TMP21:%.*]] = and <8 x i64> [[TMP11]], splat (i64 4294967295)12863; CHECK-NEXT: [[TMP22:%.*]] = or <8 x i64> [[TMP19]], [[TMP20]]12864; CHECK-NEXT: [[TMP23:%.*]] = or <8 x i64> [[TMP22]], [[TMP21]]12865; CHECK-NEXT: [[TMP24:%.*]] = and <8 x i64> [[TMP12]], splat (i64 4294967295)12866; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP17]], [[TMP23]]12867; CHECK-NEXT: [[TMP25:%.*]] = mul <8 x i64> [[TMP18]], [[TMP24]]12868; CHECK-NEXT: [[TMP26:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>12869; CHECK-NEXT: [[MASK_CAST:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>12870; CHECK-NEXT: [[TMP27:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer12871; CHECK-NEXT: [[TMP28:%.*]] = xor <8 x i64> [[TMP25]], zeroinitializer12872; CHECK-NEXT: [[TMP29:%.*]] = or <8 x i64> [[TMP28]], [[_MSPROP]]12873; CHECK-NEXT: [[TMP30:%.*]] = or <8 x i64> [[TMP29]], zeroinitializer12874; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP26]], <8 x i64> [[TMP30]], <8 x i64> [[TMP27]]12875; CHECK-NEXT: [[RES:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[TMP25]], <8 x i64> zeroinitializer12876; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 812877; CHECK-NEXT: ret <8 x i64> [[RES]]12878;12879 %b = load <16 x i32>, ptr %ptr_b12880 %mul = call <8 x i64> @llvm.x86.avx512.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b)12881 %mask.cast = bitcast i8 %mask to <8 x i1>12882 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> zeroinitializer12883 ret < 8 x i64> %res12884}12885 12886define <8 x i64> @test_mul_epu32_rmb(<16 x i32> %a, ptr %ptr_b, <8 x i64> %extra_param) #0 {12887;12888; CHECK-LABEL: @test_mul_epu32_rmb(12889; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 812890; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 812891; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 812892; CHECK-NEXT: call void @llvm.donothing()12893; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 012894; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP26:%.*]], !prof [[PROF1]]12895; CHECK: 4:12896; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]12897; CHECK-NEXT: unreachable12898; CHECK: 5:12899; CHECK-NEXT: [[Q:%.*]] = load i64, ptr [[PTR_B:%.*]], align 812900; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i6412901; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 8796093022208012902; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr12903; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP7]], align 812904; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i64> [[TMP3]], i64 [[_MSLD]], i32 012905; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i64> [[EXTRA_PARAM:%.*]], i64 [[Q]], i32 012906; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[_MSPROP]], <8 x i64> [[TMP3]], <8 x i32> zeroinitializer12907; CHECK-NEXT: [[B64:%.*]] = shufflevector <8 x i64> [[VECINIT_I]], <8 x i64> [[EXTRA_PARAM]], <8 x i32> zeroinitializer12908; CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x i64> [[_MSPROP1]] to <16 x i32>12909; CHECK-NEXT: [[B:%.*]] = bitcast <8 x i64> [[B64]] to <16 x i32>12910; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>12911; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>12912; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[TMP8]] to <8 x i64>12913; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>12914; CHECK-NEXT: [[TMP13:%.*]] = and <8 x i64> [[TMP9]], zeroinitializer12915; CHECK-NEXT: [[TMP14:%.*]] = and <8 x i64> [[TMP10]], zeroinitializer12916; CHECK-NEXT: [[TMP15:%.*]] = and <8 x i64> [[TMP9]], splat (i64 4294967295)12917; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP13]], [[TMP14]]12918; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP16]], [[TMP15]]12919; CHECK-NEXT: [[TMP18:%.*]] = and <8 x i64> [[TMP10]], splat (i64 4294967295)12920; CHECK-NEXT: [[TMP19:%.*]] = and <8 x i64> [[TMP11]], zeroinitializer12921; CHECK-NEXT: [[TMP20:%.*]] = and <8 x i64> [[TMP12]], zeroinitializer12922; CHECK-NEXT: [[TMP21:%.*]] = and <8 x i64> [[TMP11]], splat (i64 4294967295)12923; CHECK-NEXT: [[TMP22:%.*]] = or <8 x i64> [[TMP19]], [[TMP20]]12924; CHECK-NEXT: [[TMP23:%.*]] = or <8 x i64> [[TMP22]], [[TMP21]]12925; CHECK-NEXT: [[TMP24:%.*]] = and <8 x i64> [[TMP12]], splat (i64 4294967295)12926; CHECK-NEXT: [[_MSPROP2:%.*]] = or <8 x i64> [[TMP17]], [[TMP23]]12927; CHECK-NEXT: [[TMP25:%.*]] = mul <8 x i64> [[TMP18]], [[TMP24]]12928; CHECK-NEXT: store <8 x i64> [[_MSPROP2]], ptr @__msan_retval_tls, align 812929; CHECK-NEXT: ret <8 x i64> [[TMP25]]12930;12931 %q = load i64, ptr %ptr_b12932 %vecinit.i = insertelement <8 x i64> %extra_param, i64 %q, i32 012933 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> %extra_param, <8 x i32> zeroinitializer12934 %b = bitcast <8 x i64> %b64 to <16 x i32>12935 %res = call <8 x i64> @llvm.x86.avx512.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b)12936 ret < 8 x i64> %res12937}12938 12939define <8 x i64> @test_mul_epu32_rmbk(<16 x i32> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask, <8 x i64> %extra_param) #0 {12940;12941; CHECK-LABEL: @test_mul_epu32_rmbk(12942; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 812943; CHECK-NEXT: [[TMP5:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 812944; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 812945; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 812946; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 812947; CHECK-NEXT: call void @llvm.donothing()12948; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 012949; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP6:%.*]], label [[TMP33:%.*]], !prof [[PROF1]]12950; CHECK: 6:12951; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]12952; CHECK-NEXT: unreachable12953; CHECK: 7:12954; CHECK-NEXT: [[Q:%.*]] = load i64, ptr [[PTR_B:%.*]], align 812955; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i6412956; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 8796093022208012957; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr12958; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP9]], align 812959; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i64> [[TMP5]], i64 [[_MSLD]], i32 012960; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i64> [[EXTRA_PARAM:%.*]], i64 [[Q]], i32 012961; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[_MSPROP]], <8 x i64> [[TMP5]], <8 x i32> zeroinitializer12962; CHECK-NEXT: [[B64:%.*]] = shufflevector <8 x i64> [[VECINIT_I]], <8 x i64> [[EXTRA_PARAM]], <8 x i32> zeroinitializer12963; CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x i64> [[_MSPROP1]] to <16 x i32>12964; CHECK-NEXT: [[B:%.*]] = bitcast <8 x i64> [[B64]] to <16 x i32>12965; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>12966; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>12967; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x i32> [[TMP10]] to <8 x i64>12968; CHECK-NEXT: [[TMP14:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>12969; CHECK-NEXT: [[TMP15:%.*]] = and <8 x i64> [[TMP11]], zeroinitializer12970; CHECK-NEXT: [[TMP16:%.*]] = and <8 x i64> [[TMP12]], zeroinitializer12971; CHECK-NEXT: [[TMP17:%.*]] = and <8 x i64> [[TMP11]], splat (i64 4294967295)12972; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i64> [[TMP15]], [[TMP16]]12973; CHECK-NEXT: [[TMP19:%.*]] = or <8 x i64> [[TMP18]], [[TMP17]]12974; CHECK-NEXT: [[TMP20:%.*]] = and <8 x i64> [[TMP12]], splat (i64 4294967295)12975; CHECK-NEXT: [[TMP21:%.*]] = and <8 x i64> [[TMP13]], zeroinitializer12976; CHECK-NEXT: [[TMP22:%.*]] = and <8 x i64> [[TMP14]], zeroinitializer12977; CHECK-NEXT: [[TMP23:%.*]] = and <8 x i64> [[TMP13]], splat (i64 4294967295)12978; CHECK-NEXT: [[TMP24:%.*]] = or <8 x i64> [[TMP21]], [[TMP22]]12979; CHECK-NEXT: [[TMP25:%.*]] = or <8 x i64> [[TMP24]], [[TMP23]]12980; CHECK-NEXT: [[TMP26:%.*]] = and <8 x i64> [[TMP14]], splat (i64 4294967295)12981; CHECK-NEXT: [[_MSPROP2:%.*]] = or <8 x i64> [[TMP19]], [[TMP25]]12982; CHECK-NEXT: [[TMP27:%.*]] = mul <8 x i64> [[TMP20]], [[TMP26]]12983; CHECK-NEXT: [[TMP28:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>12984; CHECK-NEXT: [[MASK_CAST:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>12985; CHECK-NEXT: [[TMP29:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[_MSPROP2]], <8 x i64> [[TMP4]]12986; CHECK-NEXT: [[TMP30:%.*]] = xor <8 x i64> [[TMP27]], [[PASSTHRU:%.*]]12987; CHECK-NEXT: [[TMP31:%.*]] = or <8 x i64> [[TMP30]], [[_MSPROP2]]12988; CHECK-NEXT: [[TMP32:%.*]] = or <8 x i64> [[TMP31]], [[TMP4]]12989; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP28]], <8 x i64> [[TMP32]], <8 x i64> [[TMP29]]12990; CHECK-NEXT: [[RES:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[TMP27]], <8 x i64> [[PASSTHRU]]12991; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 812992; CHECK-NEXT: ret <8 x i64> [[RES]]12993;12994 %q = load i64, ptr %ptr_b12995 %vecinit.i = insertelement <8 x i64> %extra_param, i64 %q, i32 012996 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> %extra_param, <8 x i32> zeroinitializer12997 %b = bitcast <8 x i64> %b64 to <16 x i32>12998 %mul = call <8 x i64> @llvm.x86.avx512.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b)12999 %mask.cast = bitcast i8 %mask to <8 x i1>13000 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> %passThru13001 ret < 8 x i64> %res13002}13003 13004define <8 x i64> @test_mul_epu32_rmbkz(<16 x i32> %a, ptr %ptr_b, i8 %mask, <8 x i64> %extra_param) #0 {13005;13006; CHECK-LABEL: @test_mul_epu32_rmbkz(13007; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813008; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 813009; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 813010; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 813011; CHECK-NEXT: call void @llvm.donothing()13012; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 013013; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP32:%.*]], !prof [[PROF1]]13014; CHECK: 5:13015; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13016; CHECK-NEXT: unreachable13017; CHECK: 6:13018; CHECK-NEXT: [[Q:%.*]] = load i64, ptr [[PTR_B:%.*]], align 813019; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i6413020; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 8796093022208013021; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr13022; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP8]], align 813023; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i64> [[TMP4]], i64 [[_MSLD]], i32 013024; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i64> [[EXTRA_PARAM:%.*]], i64 [[Q]], i32 013025; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]], <8 x i32> zeroinitializer13026; CHECK-NEXT: [[B64:%.*]] = shufflevector <8 x i64> [[VECINIT_I]], <8 x i64> [[EXTRA_PARAM]], <8 x i32> zeroinitializer13027; CHECK-NEXT: [[TMP9:%.*]] = bitcast <8 x i64> [[_MSPROP1]] to <16 x i32>13028; CHECK-NEXT: [[B:%.*]] = bitcast <8 x i64> [[B64]] to <16 x i32>13029; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i32> [[TMP2]] to <8 x i64>13030; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[A:%.*]] to <8 x i64>13031; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i32> [[TMP9]] to <8 x i64>13032; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x i32> [[B]] to <8 x i64>13033; CHECK-NEXT: [[TMP14:%.*]] = and <8 x i64> [[TMP10]], zeroinitializer13034; CHECK-NEXT: [[TMP15:%.*]] = and <8 x i64> [[TMP11]], zeroinitializer13035; CHECK-NEXT: [[TMP16:%.*]] = and <8 x i64> [[TMP10]], splat (i64 4294967295)13036; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP14]], [[TMP15]]13037; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i64> [[TMP17]], [[TMP16]]13038; CHECK-NEXT: [[TMP19:%.*]] = and <8 x i64> [[TMP11]], splat (i64 4294967295)13039; CHECK-NEXT: [[TMP20:%.*]] = and <8 x i64> [[TMP12]], zeroinitializer13040; CHECK-NEXT: [[TMP21:%.*]] = and <8 x i64> [[TMP13]], zeroinitializer13041; CHECK-NEXT: [[TMP22:%.*]] = and <8 x i64> [[TMP12]], splat (i64 4294967295)13042; CHECK-NEXT: [[TMP23:%.*]] = or <8 x i64> [[TMP20]], [[TMP21]]13043; CHECK-NEXT: [[TMP24:%.*]] = or <8 x i64> [[TMP23]], [[TMP22]]13044; CHECK-NEXT: [[TMP25:%.*]] = and <8 x i64> [[TMP13]], splat (i64 4294967295)13045; CHECK-NEXT: [[_MSPROP2:%.*]] = or <8 x i64> [[TMP18]], [[TMP24]]13046; CHECK-NEXT: [[TMP26:%.*]] = mul <8 x i64> [[TMP19]], [[TMP25]]13047; CHECK-NEXT: [[TMP27:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>13048; CHECK-NEXT: [[MASK_CAST:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>13049; CHECK-NEXT: [[TMP28:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[_MSPROP2]], <8 x i64> zeroinitializer13050; CHECK-NEXT: [[TMP29:%.*]] = xor <8 x i64> [[TMP26]], zeroinitializer13051; CHECK-NEXT: [[TMP30:%.*]] = or <8 x i64> [[TMP29]], [[_MSPROP2]]13052; CHECK-NEXT: [[TMP31:%.*]] = or <8 x i64> [[TMP30]], zeroinitializer13053; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP27]], <8 x i64> [[TMP31]], <8 x i64> [[TMP28]]13054; CHECK-NEXT: [[RES:%.*]] = select <8 x i1> [[MASK_CAST]], <8 x i64> [[TMP26]], <8 x i64> zeroinitializer13055; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 813056; CHECK-NEXT: ret <8 x i64> [[RES]]13057;13058 %q = load i64, ptr %ptr_b13059 %vecinit.i = insertelement <8 x i64> %extra_param, i64 %q, i32 013060 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> %extra_param, <8 x i32> zeroinitializer13061 %b = bitcast <8 x i64> %b64 to <16 x i32>13062 %mul = call <8 x i64> @llvm.x86.avx512.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b)13063 %mask.cast = bitcast i8 %mask to <8 x i1>13064 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> zeroinitializer13065 ret < 8 x i64> %res13066}13067 13068declare <8 x i64> @llvm.x86.avx512.pmulu.dq.512(<16 x i32>, <16 x i32>)13069 13070define <2 x double> @test_x86_avx512_mm_cvtu32_sd(<2 x double> %a, i32 %b)13071;13072; CHECK-LABEL: @test_x86_avx512_mm_cvtu32_sd(13073; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 813074; CHECK-NEXT: [[TMP2:%.*]] = load <2 x i64>, ptr @__msan_param_tls, align 813075; CHECK-NEXT: call void @llvm.donothing()13076; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP1]] to i6413077; CHECK-NEXT: [[TMP4:%.*]] = uitofp i32 [[B:%.*]] to double13078; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <2 x i64> [[TMP2]], i64 [[TMP3]], i64 013079; CHECK-NEXT: [[TMP5:%.*]] = insertelement <2 x double> [[A:%.*]], double [[TMP4]], i64 013080; CHECK-NEXT: store <2 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 813081; CHECK-NEXT: ret <2 x double> [[TMP5]]13082;13083 #0 {13084 %res = call <2 x double> @llvm.x86.avx512.cvtusi2sd(<2 x double> %a, i32 %b) ; <<<2 x double>> [#uses=1]13085 ret <2 x double> %res13086}13087declare <2 x double> @llvm.x86.avx512.cvtusi2sd(<2 x double>, i32) nounwind readnone13088 13089define <16 x float> @test_x86_vbroadcast_ss_512(ptr %a0) #0 {13090;13091; CHECK-LABEL: @test_x86_vbroadcast_ss_512(13092; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 813093; CHECK-NEXT: call void @llvm.donothing()13094; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 013095; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF1]]13096; CHECK: 2:13097; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13098; CHECK-NEXT: unreachable13099; CHECK: 3:13100; CHECK-NEXT: [[TMP4:%.*]] = load float, ptr [[A0:%.*]], align 413101; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[A0]] to i6413102; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 8796093022208013103; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr13104; CHECK-NEXT: [[_MSLD:%.*]] = load i32, ptr [[TMP7]], align 413105; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <16 x i32> splat (i32 -1), i32 [[_MSLD]], i32 013106; CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x float> poison, float [[TMP4]], i32 013107; CHECK-NEXT: [[_MSPROP1:%.*]] = insertelement <16 x i32> [[_MSPROP]], i32 [[_MSLD]], i32 113108; CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x float> [[TMP8]], float [[TMP4]], i32 113109; CHECK-NEXT: [[_MSPROP2:%.*]] = insertelement <16 x i32> [[_MSPROP1]], i32 [[_MSLD]], i32 213110; CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x float> [[TMP9]], float [[TMP4]], i32 213111; CHECK-NEXT: [[_MSPROP3:%.*]] = insertelement <16 x i32> [[_MSPROP2]], i32 [[_MSLD]], i32 313112; CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x float> [[TMP10]], float [[TMP4]], i32 313113; CHECK-NEXT: [[_MSPROP4:%.*]] = insertelement <16 x i32> [[_MSPROP3]], i32 [[_MSLD]], i32 413114; CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x float> [[TMP11]], float [[TMP4]], i32 413115; CHECK-NEXT: [[_MSPROP5:%.*]] = insertelement <16 x i32> [[_MSPROP4]], i32 [[_MSLD]], i32 513116; CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x float> [[TMP12]], float [[TMP4]], i32 513117; CHECK-NEXT: [[_MSPROP6:%.*]] = insertelement <16 x i32> [[_MSPROP5]], i32 [[_MSLD]], i32 613118; CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x float> [[TMP13]], float [[TMP4]], i32 613119; CHECK-NEXT: [[_MSPROP7:%.*]] = insertelement <16 x i32> [[_MSPROP6]], i32 [[_MSLD]], i32 713120; CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x float> [[TMP14]], float [[TMP4]], i32 713121; CHECK-NEXT: [[_MSPROP8:%.*]] = insertelement <16 x i32> [[_MSPROP7]], i32 [[_MSLD]], i32 813122; CHECK-NEXT: [[TMP16:%.*]] = insertelement <16 x float> [[TMP15]], float [[TMP4]], i32 813123; CHECK-NEXT: [[_MSPROP9:%.*]] = insertelement <16 x i32> [[_MSPROP8]], i32 [[_MSLD]], i32 913124; CHECK-NEXT: [[TMP17:%.*]] = insertelement <16 x float> [[TMP16]], float [[TMP4]], i32 913125; CHECK-NEXT: [[_MSPROP10:%.*]] = insertelement <16 x i32> [[_MSPROP9]], i32 [[_MSLD]], i32 1013126; CHECK-NEXT: [[TMP18:%.*]] = insertelement <16 x float> [[TMP17]], float [[TMP4]], i32 1013127; CHECK-NEXT: [[_MSPROP11:%.*]] = insertelement <16 x i32> [[_MSPROP10]], i32 [[_MSLD]], i32 1113128; CHECK-NEXT: [[TMP19:%.*]] = insertelement <16 x float> [[TMP18]], float [[TMP4]], i32 1113129; CHECK-NEXT: [[_MSPROP12:%.*]] = insertelement <16 x i32> [[_MSPROP11]], i32 [[_MSLD]], i32 1213130; CHECK-NEXT: [[TMP20:%.*]] = insertelement <16 x float> [[TMP19]], float [[TMP4]], i32 1213131; CHECK-NEXT: [[_MSPROP13:%.*]] = insertelement <16 x i32> [[_MSPROP12]], i32 [[_MSLD]], i32 1313132; CHECK-NEXT: [[TMP21:%.*]] = insertelement <16 x float> [[TMP20]], float [[TMP4]], i32 1313133; CHECK-NEXT: [[_MSPROP14:%.*]] = insertelement <16 x i32> [[_MSPROP13]], i32 [[_MSLD]], i32 1413134; CHECK-NEXT: [[TMP22:%.*]] = insertelement <16 x float> [[TMP21]], float [[TMP4]], i32 1413135; CHECK-NEXT: [[_MSPROP15:%.*]] = insertelement <16 x i32> [[_MSPROP14]], i32 [[_MSLD]], i32 1513136; CHECK-NEXT: [[TMP23:%.*]] = insertelement <16 x float> [[TMP22]], float [[TMP4]], i32 1513137; CHECK-NEXT: store <16 x i32> [[_MSPROP15]], ptr @__msan_retval_tls, align 813138; CHECK-NEXT: ret <16 x float> [[TMP23]]13139;13140 %res = call <16 x float> @llvm.x86.avx512.vbroadcast.ss.512(ptr %a0) ; <<16 x float>> [#uses=1]13141 ret <16 x float> %res13142}13143declare <16 x float> @llvm.x86.avx512.vbroadcast.ss.512(ptr) nounwind readonly13144 13145define <8 x double> @test_x86_vbroadcast_sd_512(ptr %a0) #0 {13146;13147; CHECK-LABEL: @test_x86_vbroadcast_sd_512(13148; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 813149; CHECK-NEXT: call void @llvm.donothing()13150; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 013151; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF1]]13152; CHECK: 2:13153; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13154; CHECK-NEXT: unreachable13155; CHECK: 3:13156; CHECK-NEXT: [[TMP4:%.*]] = load double, ptr [[A0:%.*]], align 813157; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[A0]] to i6413158; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 8796093022208013159; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr13160; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP7]], align 813161; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i64> splat (i64 -1), i64 [[_MSLD]], i32 013162; CHECK-NEXT: [[TMP8:%.*]] = insertelement <8 x double> poison, double [[TMP4]], i32 013163; CHECK-NEXT: [[_MSPROP1:%.*]] = insertelement <8 x i64> [[_MSPROP]], i64 [[_MSLD]], i32 113164; CHECK-NEXT: [[TMP9:%.*]] = insertelement <8 x double> [[TMP8]], double [[TMP4]], i32 113165; CHECK-NEXT: [[_MSPROP2:%.*]] = insertelement <8 x i64> [[_MSPROP1]], i64 [[_MSLD]], i32 213166; CHECK-NEXT: [[TMP10:%.*]] = insertelement <8 x double> [[TMP9]], double [[TMP4]], i32 213167; CHECK-NEXT: [[_MSPROP3:%.*]] = insertelement <8 x i64> [[_MSPROP2]], i64 [[_MSLD]], i32 313168; CHECK-NEXT: [[TMP11:%.*]] = insertelement <8 x double> [[TMP10]], double [[TMP4]], i32 313169; CHECK-NEXT: [[_MSPROP4:%.*]] = insertelement <8 x i64> [[_MSPROP3]], i64 [[_MSLD]], i32 413170; CHECK-NEXT: [[TMP12:%.*]] = insertelement <8 x double> [[TMP11]], double [[TMP4]], i32 413171; CHECK-NEXT: [[_MSPROP5:%.*]] = insertelement <8 x i64> [[_MSPROP4]], i64 [[_MSLD]], i32 513172; CHECK-NEXT: [[TMP13:%.*]] = insertelement <8 x double> [[TMP12]], double [[TMP4]], i32 513173; CHECK-NEXT: [[_MSPROP6:%.*]] = insertelement <8 x i64> [[_MSPROP5]], i64 [[_MSLD]], i32 613174; CHECK-NEXT: [[TMP14:%.*]] = insertelement <8 x double> [[TMP13]], double [[TMP4]], i32 613175; CHECK-NEXT: [[_MSPROP7:%.*]] = insertelement <8 x i64> [[_MSPROP6]], i64 [[_MSLD]], i32 713176; CHECK-NEXT: [[TMP15:%.*]] = insertelement <8 x double> [[TMP14]], double [[TMP4]], i32 713177; CHECK-NEXT: store <8 x i64> [[_MSPROP7]], ptr @__msan_retval_tls, align 813178; CHECK-NEXT: ret <8 x double> [[TMP15]]13179;13180 %res = call <8 x double> @llvm.x86.avx512.vbroadcast.sd.512(ptr %a0) ; <<8 x double>> [#uses=1]13181 ret <8 x double> %res13182}13183declare <8 x double> @llvm.x86.avx512.vbroadcast.sd.512(ptr) nounwind readonly13184 13185declare <8 x double> @llvm.x86.avx512.mask.permvar.df.512(<8 x double>, <8 x i64>, <8 x double>, i8)13186 13187define <8 x double>@test_int_x86_avx512_permvar_df_512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2) #0 {13188; CHECK-LABEL: @test_int_x86_avx512_permvar_df_512(13189; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 813190; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813191; CHECK-NEXT: call void @llvm.donothing()13192; CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i64> [[TMP1]] to i51213193; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP3]], 013194; CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i64> [[TMP2]] to i51213195; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP4]], 013196; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]13197; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]13198; CHECK: 5:13199; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13200; CHECK-NEXT: unreachable13201; CHECK: 6:13202; CHECK-NEXT: [[TMP7:%.*]] = call <8 x double> @llvm.x86.avx512.permvar.df.512(<8 x double> [[X0:%.*]], <8 x i64> [[X1:%.*]])13203; CHECK-NEXT: store <8 x i64> zeroinitializer, ptr @__msan_retval_tls, align 813204; CHECK-NEXT: ret <8 x double> [[TMP7]]13205;13206 %res = call <8 x double> @llvm.x86.avx512.mask.permvar.df.512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 -1)13207 ret <8 x double> %res13208}13209 13210define <8 x double>@test_int_x86_avx512_mask_permvar_df_512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 %x3) #0 {13211;13212; CHECK-LABEL: @test_int_x86_avx512_mask_permvar_df_512(13213; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 813214; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813215; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 813216; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 813217; CHECK-NEXT: call void @llvm.donothing()13218; CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i64> [[TMP1]] to i51213219; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP5]], 013220; CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i64> [[TMP2]] to i51213221; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP6]], 013222; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]13223; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP7:%.*]], label [[TMP8:%.*]], !prof [[PROF1]]13224; CHECK: 7:13225; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13226; CHECK-NEXT: unreachable13227; CHECK: 8:13228; CHECK-NEXT: [[TMP9:%.*]] = call <8 x double> @llvm.x86.avx512.permvar.df.512(<8 x double> [[X0:%.*]], <8 x i64> [[X1:%.*]])13229; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>13230; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>13231; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> zeroinitializer, <8 x i64> [[TMP4]]13232; CHECK-NEXT: [[TMP13:%.*]] = bitcast <8 x double> [[TMP9]] to <8 x i64>13233; CHECK-NEXT: [[TMP14:%.*]] = bitcast <8 x double> [[X2:%.*]] to <8 x i64>13234; CHECK-NEXT: [[TMP15:%.*]] = xor <8 x i64> [[TMP13]], [[TMP14]]13235; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP15]], zeroinitializer13236; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i64> [[TMP16]], [[TMP4]]13237; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> [[TMP17]], <8 x i64> [[TMP12]]13238; CHECK-NEXT: [[TMP18:%.*]] = select <8 x i1> [[TMP11]], <8 x double> [[TMP9]], <8 x double> [[X2]]13239; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 813240; CHECK-NEXT: ret <8 x double> [[TMP18]]13241;13242 %res = call <8 x double> @llvm.x86.avx512.mask.permvar.df.512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 %x3)13243 ret <8 x double> %res13244}13245 13246define <8 x double>@test_int_x86_avx512_maskz_permvar_df_512(<8 x double> %x0, <8 x i64> %x1, i8 %x3) #0 {13247;13248; CHECK-LABEL: @test_int_x86_avx512_maskz_permvar_df_512(13249; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 813250; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813251; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 813252; CHECK-NEXT: call void @llvm.donothing()13253; CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i64> [[TMP1]] to i51213254; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP4]], 013255; CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i64> [[TMP2]] to i51213256; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP5]], 013257; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]13258; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP6:%.*]], label [[TMP7:%.*]], !prof [[PROF1]]13259; CHECK: 6:13260; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13261; CHECK-NEXT: unreachable13262; CHECK: 7:13263; CHECK-NEXT: [[TMP8:%.*]] = call <8 x double> @llvm.x86.avx512.permvar.df.512(<8 x double> [[X0:%.*]], <8 x i64> [[X1:%.*]])13264; CHECK-NEXT: [[TMP9:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>13265; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>13266; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> zeroinitializer, <8 x i64> zeroinitializer13267; CHECK-NEXT: [[TMP12:%.*]] = bitcast <8 x double> [[TMP8]] to <8 x i64>13268; CHECK-NEXT: [[TMP13:%.*]] = xor <8 x i64> [[TMP12]], zeroinitializer13269; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], zeroinitializer13270; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], zeroinitializer13271; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP9]], <8 x i64> [[TMP15]], <8 x i64> [[TMP11]]13272; CHECK-NEXT: [[TMP16:%.*]] = select <8 x i1> [[TMP10]], <8 x double> [[TMP8]], <8 x double> zeroinitializer13273; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 813274; CHECK-NEXT: ret <8 x double> [[TMP16]]13275;13276 %res = call <8 x double> @llvm.x86.avx512.mask.permvar.df.512(<8 x double> %x0, <8 x i64> %x1, <8 x double> zeroinitializer, i8 %x3)13277 ret <8 x double> %res13278}13279 13280declare <8 x i64> @llvm.x86.avx512.mask.permvar.di.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)13281 13282define <8 x i64>@test_int_x86_avx512_permvar_di_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2) #0 {13283; CHECK-LABEL: @test_int_x86_avx512_permvar_di_512(13284; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 813285; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813286; CHECK-NEXT: call void @llvm.donothing()13287; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]13288; CHECK-NEXT: [[TMP3:%.*]] = call <8 x i64> @llvm.x86.avx512.permvar.di.512(<8 x i64> [[X0:%.*]], <8 x i64> [[X1:%.*]])13289; CHECK-NEXT: store <8 x i64> [[_MSPROP]], ptr @__msan_retval_tls, align 813290; CHECK-NEXT: ret <8 x i64> [[TMP3]]13291;13292 %res = call <8 x i64> @llvm.x86.avx512.mask.permvar.di.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)13293 ret <8 x i64> %res13294}13295 13296define <8 x i64>@test_int_x86_avx512_mask_permvar_di_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) #0 {13297;13298; CHECK-LABEL: @test_int_x86_avx512_mask_permvar_di_512(13299; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 813300; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813301; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 813302; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 813303; CHECK-NEXT: call void @llvm.donothing()13304; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]13305; CHECK-NEXT: [[TMP5:%.*]] = call <8 x i64> @llvm.x86.avx512.permvar.di.512(<8 x i64> [[X0:%.*]], <8 x i64> [[X1:%.*]])13306; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>13307; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>13308; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP]], <8 x i64> [[TMP4]]13309; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP5]], [[X2:%.*]]13310; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[_MSPROP]]13311; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP4]]13312; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP11]], <8 x i64> [[TMP8]]13313; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP5]], <8 x i64> [[X2]]13314; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 813315; CHECK-NEXT: ret <8 x i64> [[TMP12]]13316;13317 %res = call <8 x i64> @llvm.x86.avx512.mask.permvar.di.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)13318 ret <8 x i64> %res13319}13320 13321define <8 x i64>@test_int_x86_avx512_maskz_permvar_di_512(<8 x i64> %x0, <8 x i64> %x1, i8 %x3) #0 {13322;13323; CHECK-LABEL: @test_int_x86_avx512_maskz_permvar_di_512(13324; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 813325; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813326; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 813327; CHECK-NEXT: call void @llvm.donothing()13328; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i64> [[TMP1]], [[TMP2]]13329; CHECK-NEXT: [[TMP4:%.*]] = call <8 x i64> @llvm.x86.avx512.permvar.di.512(<8 x i64> [[X0:%.*]], <8 x i64> [[X1:%.*]])13330; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>13331; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>13332; CHECK-NEXT: [[TMP7:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[_MSPROP]], <8 x i64> zeroinitializer13333; CHECK-NEXT: [[TMP8:%.*]] = xor <8 x i64> [[TMP4]], zeroinitializer13334; CHECK-NEXT: [[TMP9:%.*]] = or <8 x i64> [[TMP8]], [[_MSPROP]]13335; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], zeroinitializer13336; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP5]], <8 x i64> [[TMP10]], <8 x i64> [[TMP7]]13337; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP4]], <8 x i64> zeroinitializer13338; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 813339; CHECK-NEXT: ret <8 x i64> [[TMP11]]13340;13341 %res = call <8 x i64> @llvm.x86.avx512.mask.permvar.di.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> zeroinitializer, i8 %x3)13342 ret <8 x i64> %res13343}13344 13345declare <16 x float> @llvm.x86.avx512.mask.permvar.sf.512(<16 x float>, <16 x i32>, <16 x float>, i16)13346 13347define <16 x float>@test_int_x86_avx512_permvar_sf_512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2) #0 {13348; CHECK-LABEL: @test_int_x86_avx512_permvar_sf_512(13349; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 813350; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813351; CHECK-NEXT: call void @llvm.donothing()13352; CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i32> [[TMP1]] to i51213353; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP3]], 013354; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[TMP2]] to i51213355; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP4]], 013356; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]13357; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]13358; CHECK: 5:13359; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13360; CHECK-NEXT: unreachable13361; CHECK: 6:13362; CHECK-NEXT: [[TMP7:%.*]] = call <16 x float> @llvm.x86.avx512.permvar.sf.512(<16 x float> [[X0:%.*]], <16 x i32> [[X1:%.*]])13363; CHECK-NEXT: store <16 x i32> zeroinitializer, ptr @__msan_retval_tls, align 813364; CHECK-NEXT: ret <16 x float> [[TMP7]]13365;13366 %res = call <16 x float> @llvm.x86.avx512.mask.permvar.sf.512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 -1)13367 ret <16 x float> %res13368}13369 13370define <16 x float>@test_int_x86_avx512_mask_permvar_sf_512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 %x3) #0 {13371;13372; CHECK-LABEL: @test_int_x86_avx512_mask_permvar_sf_512(13373; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 813374; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813375; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 813376; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 813377; CHECK-NEXT: call void @llvm.donothing()13378; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP1]] to i51213379; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP5]], 013380; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i32> [[TMP2]] to i51213381; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP6]], 013382; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]13383; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP7:%.*]], label [[TMP8:%.*]], !prof [[PROF1]]13384; CHECK: 7:13385; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13386; CHECK-NEXT: unreachable13387; CHECK: 8:13388; CHECK-NEXT: [[TMP9:%.*]] = call <16 x float> @llvm.x86.avx512.permvar.sf.512(<16 x float> [[X0:%.*]], <16 x i32> [[X1:%.*]])13389; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>13390; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>13391; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> zeroinitializer, <16 x i32> [[TMP4]]13392; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x float> [[TMP9]] to <16 x i32>13393; CHECK-NEXT: [[TMP14:%.*]] = bitcast <16 x float> [[X2:%.*]] to <16 x i32>13394; CHECK-NEXT: [[TMP15:%.*]] = xor <16 x i32> [[TMP13]], [[TMP14]]13395; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i32> [[TMP15]], zeroinitializer13396; CHECK-NEXT: [[TMP17:%.*]] = or <16 x i32> [[TMP16]], [[TMP4]]13397; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP17]], <16 x i32> [[TMP12]]13398; CHECK-NEXT: [[TMP18:%.*]] = select <16 x i1> [[TMP11]], <16 x float> [[TMP9]], <16 x float> [[X2]]13399; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 813400; CHECK-NEXT: ret <16 x float> [[TMP18]]13401;13402 %res = call <16 x float> @llvm.x86.avx512.mask.permvar.sf.512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 %x3)13403 ret <16 x float> %res13404}13405 13406define <16 x float>@test_int_x86_avx512_maskz_permvar_sf_512(<16 x float> %x0, <16 x i32> %x1, i16 %x3) #0 {13407;13408; CHECK-LABEL: @test_int_x86_avx512_maskz_permvar_sf_512(13409; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 813410; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813411; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 813412; CHECK-NEXT: call void @llvm.donothing()13413; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[TMP1]] to i51213414; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP4]], 013415; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP2]] to i51213416; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP5]], 013417; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]13418; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP6:%.*]], label [[TMP7:%.*]], !prof [[PROF1]]13419; CHECK: 6:13420; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13421; CHECK-NEXT: unreachable13422; CHECK: 7:13423; CHECK-NEXT: [[TMP8:%.*]] = call <16 x float> @llvm.x86.avx512.permvar.sf.512(<16 x float> [[X0:%.*]], <16 x i32> [[X1:%.*]])13424; CHECK-NEXT: [[TMP9:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>13425; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>13426; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> zeroinitializer, <16 x i32> zeroinitializer13427; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x float> [[TMP8]] to <16 x i32>13428; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i32> [[TMP12]], zeroinitializer13429; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], zeroinitializer13430; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], zeroinitializer13431; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP9]], <16 x i32> [[TMP15]], <16 x i32> [[TMP11]]13432; CHECK-NEXT: [[TMP16:%.*]] = select <16 x i1> [[TMP10]], <16 x float> [[TMP8]], <16 x float> zeroinitializer13433; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 813434; CHECK-NEXT: ret <16 x float> [[TMP16]]13435;13436 %res = call <16 x float> @llvm.x86.avx512.mask.permvar.sf.512(<16 x float> %x0, <16 x i32> %x1, <16 x float> zeroinitializer, i16 %x3)13437 ret <16 x float> %res13438}13439 13440declare <16 x i32> @llvm.x86.avx512.mask.permvar.si.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)13441 13442define <16 x i32>@test_int_x86_avx512_permvar_si_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) #0 {13443; CHECK-LABEL: @test_int_x86_avx512_permvar_si_512(13444; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 813445; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813446; CHECK-NEXT: call void @llvm.donothing()13447; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]13448; CHECK-NEXT: [[TMP3:%.*]] = call <16 x i32> @llvm.x86.avx512.permvar.si.512(<16 x i32> [[X0:%.*]], <16 x i32> [[X1:%.*]])13449; CHECK-NEXT: store <16 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 813450; CHECK-NEXT: ret <16 x i32> [[TMP3]]13451;13452 %res = call <16 x i32> @llvm.x86.avx512.mask.permvar.si.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)13453 ret <16 x i32> %res13454}13455 13456define <16 x i32>@test_int_x86_avx512_mask_permvar_si_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) #0 {13457;13458; CHECK-LABEL: @test_int_x86_avx512_mask_permvar_si_512(13459; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 813460; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813461; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 813462; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 813463; CHECK-NEXT: call void @llvm.donothing()13464; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]13465; CHECK-NEXT: [[TMP5:%.*]] = call <16 x i32> @llvm.x86.avx512.permvar.si.512(<16 x i32> [[X0:%.*]], <16 x i32> [[X1:%.*]])13466; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>13467; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>13468; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP]], <16 x i32> [[TMP4]]13469; CHECK-NEXT: [[TMP9:%.*]] = xor <16 x i32> [[TMP5]], [[X2:%.*]]13470; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[_MSPROP]]13471; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP4]]13472; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP11]], <16 x i32> [[TMP8]]13473; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP5]], <16 x i32> [[X2]]13474; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 813475; CHECK-NEXT: ret <16 x i32> [[TMP12]]13476;13477 %res = call <16 x i32> @llvm.x86.avx512.mask.permvar.si.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)13478 ret <16 x i32> %res13479}13480 13481define <16 x i32>@test_int_x86_avx512_maskz_permvar_si_512(<16 x i32> %x0, <16 x i32> %x1, i16 %x3) #0 {13482;13483; CHECK-LABEL: @test_int_x86_avx512_maskz_permvar_si_512(13484; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 813485; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813486; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 813487; CHECK-NEXT: call void @llvm.donothing()13488; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i32> [[TMP1]], [[TMP2]]13489; CHECK-NEXT: [[TMP4:%.*]] = call <16 x i32> @llvm.x86.avx512.permvar.si.512(<16 x i32> [[X0:%.*]], <16 x i32> [[X1:%.*]])13490; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>13491; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>13492; CHECK-NEXT: [[TMP7:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[_MSPROP]], <16 x i32> zeroinitializer13493; CHECK-NEXT: [[TMP8:%.*]] = xor <16 x i32> [[TMP4]], zeroinitializer13494; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i32> [[TMP8]], [[_MSPROP]]13495; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], zeroinitializer13496; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP5]], <16 x i32> [[TMP10]], <16 x i32> [[TMP7]]13497; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP4]], <16 x i32> zeroinitializer13498; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 813499; CHECK-NEXT: ret <16 x i32> [[TMP11]]13500;13501 %res = call <16 x i32> @llvm.x86.avx512.mask.permvar.si.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> zeroinitializer, i16 %x3)13502 ret <16 x i32> %res13503}13504 13505declare <16 x i32> @llvm.x86.avx512.mask.pternlog.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i32, i16)13506 13507define <16 x i32>@test_int_x86_avx512_pternlog_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) #0 {13508; CHECK-LABEL: @test_int_x86_avx512_pternlog_d_512(13509; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 813510; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813511; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 813512; CHECK-NEXT: call void @llvm.donothing()13513; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[TMP1]] to i51213514; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP4]], 013515; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP2]] to i51213516; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP5]], 013517; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]13518; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i32> [[TMP3]] to i51213519; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i512 [[TMP6]], 013520; CHECK-NEXT: [[_MSOR3:%.*]] = or i1 [[_MSOR]], [[_MSCMP2]]13521; CHECK-NEXT: br i1 [[_MSOR3]], label [[TMP7:%.*]], label [[TMP8:%.*]], !prof [[PROF1]]13522; CHECK: 7:13523; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13524; CHECK-NEXT: unreachable13525; CHECK: 8:13526; CHECK-NEXT: [[TMP9:%.*]] = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> [[X0:%.*]], <16 x i32> [[X1:%.*]], <16 x i32> [[X2:%.*]], i32 33)13527; CHECK-NEXT: store <16 x i32> zeroinitializer, ptr @__msan_retval_tls, align 813528; CHECK-NEXT: ret <16 x i32> [[TMP9]]13529;13530 %res = call <16 x i32> @llvm.x86.avx512.mask.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 33, i16 -1)13531 ret <16 x i32> %res13532}13533 13534define <16 x i32>@test_int_x86_avx512_mask_pternlog_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x4) #0 {13535;13536; CHECK-LABEL: @test_int_x86_avx512_mask_pternlog_d_512(13537; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 813538; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813539; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 813540; CHECK-NEXT: [[TMP4:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 813541; CHECK-NEXT: call void @llvm.donothing()13542; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP1]] to i51213543; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP5]], 013544; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i32> [[TMP2]] to i51213545; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP6]], 013546; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]13547; CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i32> [[TMP3]] to i51213548; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i512 [[TMP7]], 013549; CHECK-NEXT: [[_MSOR3:%.*]] = or i1 [[_MSOR]], [[_MSCMP2]]13550; CHECK-NEXT: br i1 [[_MSOR3]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF1]]13551; CHECK: 8:13552; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13553; CHECK-NEXT: unreachable13554; CHECK: 9:13555; CHECK-NEXT: [[TMP10:%.*]] = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> [[X0:%.*]], <16 x i32> [[X1:%.*]], <16 x i32> [[X2:%.*]], i32 33)13556; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[TMP4]] to <16 x i1>13557; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16 [[X4:%.*]] to <16 x i1>13558; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> zeroinitializer, <16 x i32> [[TMP1]]13559; CHECK-NEXT: [[TMP14:%.*]] = xor <16 x i32> [[TMP10]], [[X0]]13560; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], zeroinitializer13561; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i32> [[TMP15]], [[TMP1]]13562; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP16]], <16 x i32> [[TMP13]]13563; CHECK-NEXT: [[TMP17:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[TMP10]], <16 x i32> [[X0]]13564; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 813565; CHECK-NEXT: ret <16 x i32> [[TMP17]]13566;13567 %res = call <16 x i32> @llvm.x86.avx512.mask.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 33, i16 %x4)13568 ret <16 x i32> %res13569}13570 13571declare <16 x i32> @llvm.x86.avx512.maskz.pternlog.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i32, i16)13572 13573define <16 x i32>@test_int_x86_avx512_maskz_pternlog_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x4) #0 {13574;13575; CHECK-LABEL: @test_int_x86_avx512_maskz_pternlog_d_512(13576; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 813577; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813578; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 813579; CHECK-NEXT: [[TMP4:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 813580; CHECK-NEXT: call void @llvm.donothing()13581; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP1]] to i51213582; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP5]], 013583; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i32> [[TMP2]] to i51213584; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP6]], 013585; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]13586; CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i32> [[TMP3]] to i51213587; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i512 [[TMP7]], 013588; CHECK-NEXT: [[_MSOR3:%.*]] = or i1 [[_MSOR]], [[_MSCMP2]]13589; CHECK-NEXT: br i1 [[_MSOR3]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF1]]13590; CHECK: 8:13591; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13592; CHECK-NEXT: unreachable13593; CHECK: 9:13594; CHECK-NEXT: [[TMP10:%.*]] = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> [[X0:%.*]], <16 x i32> [[X1:%.*]], <16 x i32> [[X2:%.*]], i32 33)13595; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[TMP4]] to <16 x i1>13596; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16 [[X4:%.*]] to <16 x i1>13597; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> zeroinitializer, <16 x i32> zeroinitializer13598; CHECK-NEXT: [[TMP14:%.*]] = xor <16 x i32> [[TMP10]], zeroinitializer13599; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], zeroinitializer13600; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i32> [[TMP15]], zeroinitializer13601; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP16]], <16 x i32> [[TMP13]]13602; CHECK-NEXT: [[TMP17:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[TMP10]], <16 x i32> zeroinitializer13603; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 813604; CHECK-NEXT: ret <16 x i32> [[TMP17]]13605;13606 %res = call <16 x i32> @llvm.x86.avx512.maskz.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 33, i16 %x4)13607 ret <16 x i32> %res13608}13609 13610declare <8 x i64> @llvm.x86.avx512.mask.pternlog.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i32, i8)13611 13612define <8 x i64>@test_int_x86_avx512_pternlog_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2) #0 {13613; CHECK-LABEL: @test_int_x86_avx512_pternlog_q_512(13614; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 813615; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813616; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 813617; CHECK-NEXT: call void @llvm.donothing()13618; CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i64> [[TMP1]] to i51213619; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP4]], 013620; CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i64> [[TMP2]] to i51213621; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP5]], 013622; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]13623; CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i64> [[TMP3]] to i51213624; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i512 [[TMP6]], 013625; CHECK-NEXT: [[_MSOR3:%.*]] = or i1 [[_MSOR]], [[_MSCMP2]]13626; CHECK-NEXT: br i1 [[_MSOR3]], label [[TMP7:%.*]], label [[TMP8:%.*]], !prof [[PROF1]]13627; CHECK: 7:13628; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13629; CHECK-NEXT: unreachable13630; CHECK: 8:13631; CHECK-NEXT: [[TMP9:%.*]] = call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> [[X0:%.*]], <8 x i64> [[X1:%.*]], <8 x i64> [[X2:%.*]], i32 33)13632; CHECK-NEXT: store <8 x i64> zeroinitializer, ptr @__msan_retval_tls, align 813633; CHECK-NEXT: ret <8 x i64> [[TMP9]]13634;13635 %res = call <8 x i64> @llvm.x86.avx512.mask.pternlog.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i32 33, i8 -1)13636 ret <8 x i64> %res13637}13638 13639define <8 x i64>@test_int_x86_avx512_mask_pternlog_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x4) #0 {13640;13641; CHECK-LABEL: @test_int_x86_avx512_mask_pternlog_q_512(13642; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 813643; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813644; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 813645; CHECK-NEXT: [[TMP4:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 813646; CHECK-NEXT: call void @llvm.donothing()13647; CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i64> [[TMP1]] to i51213648; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP5]], 013649; CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i64> [[TMP2]] to i51213650; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP6]], 013651; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]13652; CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i64> [[TMP3]] to i51213653; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i512 [[TMP7]], 013654; CHECK-NEXT: [[_MSOR3:%.*]] = or i1 [[_MSOR]], [[_MSCMP2]]13655; CHECK-NEXT: br i1 [[_MSOR3]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF1]]13656; CHECK: 8:13657; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13658; CHECK-NEXT: unreachable13659; CHECK: 9:13660; CHECK-NEXT: [[TMP10:%.*]] = call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> [[X0:%.*]], <8 x i64> [[X1:%.*]], <8 x i64> [[X2:%.*]], i32 33)13661; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[TMP4]] to <8 x i1>13662; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8 [[X4:%.*]] to <8 x i1>13663; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP12]], <8 x i64> zeroinitializer, <8 x i64> [[TMP1]]13664; CHECK-NEXT: [[TMP14:%.*]] = xor <8 x i64> [[TMP10]], [[X0]]13665; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], zeroinitializer13666; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP15]], [[TMP1]]13667; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP16]], <8 x i64> [[TMP13]]13668; CHECK-NEXT: [[TMP17:%.*]] = select <8 x i1> [[TMP12]], <8 x i64> [[TMP10]], <8 x i64> [[X0]]13669; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 813670; CHECK-NEXT: ret <8 x i64> [[TMP17]]13671;13672 %res = call <8 x i64> @llvm.x86.avx512.mask.pternlog.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i32 33, i8 %x4)13673 ret <8 x i64> %res13674}13675 13676declare <8 x i64> @llvm.x86.avx512.maskz.pternlog.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i32, i8)13677 13678define <8 x i64>@test_int_x86_avx512_maskz_pternlog_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x4) #0 {13679;13680; CHECK-LABEL: @test_int_x86_avx512_maskz_pternlog_q_512(13681; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 813682; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813683; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 813684; CHECK-NEXT: [[TMP4:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 813685; CHECK-NEXT: call void @llvm.donothing()13686; CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i64> [[TMP1]] to i51213687; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP5]], 013688; CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i64> [[TMP2]] to i51213689; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP6]], 013690; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]13691; CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i64> [[TMP3]] to i51213692; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i512 [[TMP7]], 013693; CHECK-NEXT: [[_MSOR3:%.*]] = or i1 [[_MSOR]], [[_MSCMP2]]13694; CHECK-NEXT: br i1 [[_MSOR3]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF1]]13695; CHECK: 8:13696; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13697; CHECK-NEXT: unreachable13698; CHECK: 9:13699; CHECK-NEXT: [[TMP10:%.*]] = call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> [[X0:%.*]], <8 x i64> [[X1:%.*]], <8 x i64> [[X2:%.*]], i32 33)13700; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[TMP4]] to <8 x i1>13701; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8 [[X4:%.*]] to <8 x i1>13702; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP12]], <8 x i64> zeroinitializer, <8 x i64> zeroinitializer13703; CHECK-NEXT: [[TMP14:%.*]] = xor <8 x i64> [[TMP10]], zeroinitializer13704; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], zeroinitializer13705; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i64> [[TMP15]], zeroinitializer13706; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP11]], <8 x i64> [[TMP16]], <8 x i64> [[TMP13]]13707; CHECK-NEXT: [[TMP17:%.*]] = select <8 x i1> [[TMP12]], <8 x i64> [[TMP10]], <8 x i64> zeroinitializer13708; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 813709; CHECK-NEXT: ret <8 x i64> [[TMP17]]13710;13711 %res = call <8 x i64> @llvm.x86.avx512.maskz.pternlog.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i32 33, i8 %x4)13712 ret <8 x i64> %res13713}13714 13715declare <16 x i32> @llvm.x86.avx512.mask.vpermi2var.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)13716 13717define <16 x i32>@test_int_x86_avx512_vpermi2var_d_512(<16 x i32> %x0, <16 x i32> %x1, ptr %x2p, <16 x i32> %x4) #0 {13718; CHECK-LABEL: @test_int_x86_avx512_vpermi2var_d_512(13719; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 813720; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 813721; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 813722; CHECK-NEXT: [[X1:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813723; CHECK-NEXT: call void @llvm.donothing()13724; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 013725; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]13726; CHECK: 5:13727; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13728; CHECK-NEXT: unreachable13729; CHECK: 6:13730; CHECK-NEXT: [[X2:%.*]] = load <16 x i32>, ptr [[X2P:%.*]], align 6413731; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[X2P]] to i6413732; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 8796093022208013733; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr13734; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP9]], align 6413735; CHECK-NEXT: [[TMP14:%.*]] = trunc <16 x i32> [[X1]] to <16 x i4>13736; CHECK-NEXT: [[_MSPROP1:%.*]] = call <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32> [[TMP2]], <16 x i32> [[X3:%.*]], <16 x i32> [[TMP4]])13737; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i4> [[TMP14]] to i6413738; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i64 [[TMP11]], 013739; CHECK-NEXT: br i1 [[_MSCMP1]], label [[TMP13:%.*]], label [[TMP15:%.*]], !prof [[PROF1]]13740; CHECK: 13:13741; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13742; CHECK-NEXT: unreachable13743; CHECK: 14:13744; CHECK-NEXT: [[TMP10:%.*]] = call <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32> [[X0:%.*]], <16 x i32> [[X3]], <16 x i32> [[X4:%.*]])13745; CHECK-NEXT: store <16 x i32> [[_MSPROP1]], ptr @__msan_retval_tls, align 813746; CHECK-NEXT: ret <16 x i32> [[TMP10]]13747;13748 %x2 = load <16 x i32>, ptr %x2p13749 %res = call <16 x i32> @llvm.x86.avx512.mask.vpermi2var.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x4, i16 -1)13750 ret <16 x i32> %res13751}13752 13753define <16 x i32>@test_int_x86_avx512_mask_vpermi2var_d_512(<16 x i32> %x0, <16 x i32> %x1, ptr %x2p, <16 x i32> %x4, i16 %x3) #0 {13754;13755; CHECK-LABEL: @test_int_x86_avx512_mask_vpermi2var_d_512(13756; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 813757; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 813758; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813759; CHECK-NEXT: [[TMP4:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 200), align 813760; CHECK-NEXT: call void @llvm.donothing()13761; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 013762; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]13763; CHECK: 5:13764; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13765; CHECK-NEXT: unreachable13766; CHECK: 6:13767; CHECK-NEXT: [[X2:%.*]] = load <16 x i32>, ptr [[X2P:%.*]], align 6413768; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[X2P]] to i6413769; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 8796093022208013770; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr13771; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP9]], align 6413772; CHECK-NEXT: [[TMP18:%.*]] = trunc <16 x i32> [[TMP3]] to <16 x i4>13773; CHECK-NEXT: [[_MSPROP1:%.*]] = call <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32> [[TMP2]], <16 x i32> [[X1:%.*]], <16 x i32> [[_MSLD]])13774; CHECK-NEXT: [[TMP19:%.*]] = bitcast <16 x i4> [[TMP18]] to i6413775; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i64 [[TMP19]], 013776; CHECK-NEXT: br i1 [[_MSCMP1]], label [[TMP20:%.*]], label [[TMP21:%.*]], !prof [[PROF1]]13777; CHECK: 13:13778; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13779; CHECK-NEXT: unreachable13780; CHECK: 14:13781; CHECK-NEXT: [[TMP10:%.*]] = call <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32> [[X0:%.*]], <16 x i32> [[X1]], <16 x i32> [[X2]])13782; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[TMP4]] to <16 x i1>13783; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>13784; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[_MSPROP1]], <16 x i32> [[TMP3]]13785; CHECK-NEXT: [[TMP14:%.*]] = xor <16 x i32> [[TMP10]], [[X1]]13786; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], [[_MSPROP1]]13787; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i32> [[TMP15]], [[TMP3]]13788; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP16]], <16 x i32> [[TMP13]]13789; CHECK-NEXT: [[TMP17:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[TMP10]], <16 x i32> [[X1]]13790; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 813791; CHECK-NEXT: ret <16 x i32> [[TMP17]]13792;13793 %x2 = load <16 x i32>, ptr %x2p13794 %res = call <16 x i32> @llvm.x86.avx512.mask.vpermi2var.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)13795 ret <16 x i32> %res13796}13797 13798declare <8 x double> @llvm.x86.avx512.mask.vpermi2var.pd.512(<8 x double>, <8 x i64>, <8 x double>, i8)13799 13800define <8 x double>@test_int_x86_avx512_vpermi2var_pd_512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2) #0 {13801; CHECK-LABEL: @test_int_x86_avx512_vpermi2var_pd_512(13802; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 813803; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 813804; CHECK-NEXT: [[TMP8:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813805; CHECK-NEXT: call void @llvm.donothing()13806; CHECK-NEXT: [[TMP6:%.*]] = trunc <8 x i64> [[TMP8]] to <8 x i3>13807; CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i64> [[TMP1]] to <8 x double>13808; CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i64> [[TMP3]] to <8 x double>13809; CHECK-NEXT: [[TMP11:%.*]] = call <8 x double> @llvm.x86.avx512.vpermi2var.pd.512(<8 x double> [[TMP4]], <8 x i64> [[X1:%.*]], <8 x double> [[TMP5]])13810; CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x double> [[TMP11]] to <8 x i64>13811; CHECK-NEXT: [[TMP12:%.*]] = bitcast <8 x i3> [[TMP6]] to i2413812; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i24 [[TMP12]], 013813; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP13:%.*]], label [[TMP14:%.*]], !prof [[PROF1]]13814; CHECK: 10:13815; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13816; CHECK-NEXT: unreachable13817; CHECK: 11:13818; CHECK-NEXT: [[TMP9:%.*]] = call <8 x double> @llvm.x86.avx512.vpermi2var.pd.512(<8 x double> [[X0:%.*]], <8 x i64> [[X1]], <8 x double> [[X2:%.*]])13819; CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x i64> [[X1]] to <8 x double>13820; CHECK-NEXT: store <8 x i64> [[TMP7]], ptr @__msan_retval_tls, align 813821; CHECK-NEXT: ret <8 x double> [[TMP9]]13822;13823 %res = call <8 x double> @llvm.x86.avx512.mask.vpermi2var.pd.512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 -1)13824 ret <8 x double> %res13825}13826 13827define <8 x double>@test_int_x86_avx512_mask_vpermi2var_pd_512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 %x3) #0 {13828;13829; CHECK-LABEL: @test_int_x86_avx512_mask_vpermi2var_pd_512(13830; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 813831; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 813832; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813833; CHECK-NEXT: [[TMP4:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 813834; CHECK-NEXT: call void @llvm.donothing()13835; CHECK-NEXT: [[TMP7:%.*]] = trunc <8 x i64> [[TMP2]] to <8 x i3>13836; CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i64> [[TMP1]] to <8 x double>13837; CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i64> [[TMP3]] to <8 x double>13838; CHECK-NEXT: [[TMP9:%.*]] = call <8 x double> @llvm.x86.avx512.vpermi2var.pd.512(<8 x double> [[TMP5]], <8 x i64> [[X1:%.*]], <8 x double> [[TMP6]])13839; CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x double> [[TMP9]] to <8 x i64>13840; CHECK-NEXT: [[TMP21:%.*]] = bitcast <8 x i3> [[TMP7]] to i2413841; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i24 [[TMP21]], 013842; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP22:%.*]], label [[TMP23:%.*]], !prof [[PROF1]]13843; CHECK: 11:13844; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13845; CHECK-NEXT: unreachable13846; CHECK: 12:13847; CHECK-NEXT: [[TMP10:%.*]] = call <8 x double> @llvm.x86.avx512.vpermi2var.pd.512(<8 x double> [[X0:%.*]], <8 x i64> [[X1]], <8 x double> [[X2:%.*]])13848; CHECK-NEXT: [[TMP11:%.*]] = bitcast <8 x i64> [[X1]] to <8 x double>13849; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8 [[TMP4]] to <8 x i1>13850; CHECK-NEXT: [[TMP13:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>13851; CHECK-NEXT: [[TMP14:%.*]] = select <8 x i1> [[TMP13]], <8 x i64> [[TMP8]], <8 x i64> [[TMP2]]13852; CHECK-NEXT: [[TMP15:%.*]] = bitcast <8 x double> [[TMP10]] to <8 x i64>13853; CHECK-NEXT: [[TMP16:%.*]] = bitcast <8 x double> [[TMP11]] to <8 x i64>13854; CHECK-NEXT: [[TMP17:%.*]] = xor <8 x i64> [[TMP15]], [[TMP16]]13855; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i64> [[TMP17]], [[TMP8]]13856; CHECK-NEXT: [[TMP19:%.*]] = or <8 x i64> [[TMP18]], [[TMP2]]13857; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP12]], <8 x i64> [[TMP19]], <8 x i64> [[TMP14]]13858; CHECK-NEXT: [[TMP20:%.*]] = select <8 x i1> [[TMP13]], <8 x double> [[TMP10]], <8 x double> [[TMP11]]13859; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 813860; CHECK-NEXT: ret <8 x double> [[TMP20]]13861;13862 %res = call <8 x double> @llvm.x86.avx512.mask.vpermi2var.pd.512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 %x3)13863 ret <8 x double> %res13864}13865 13866declare <16 x float> @llvm.x86.avx512.mask.vpermi2var.ps.512(<16 x float>, <16 x i32>, <16 x float>, i16)13867 13868define <16 x float>@test_int_x86_avx512_vpermi2var_ps_512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2) #0 {13869; CHECK-LABEL: @test_int_x86_avx512_vpermi2var_ps_512(13870; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 813871; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 813872; CHECK-NEXT: [[TMP8:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813873; CHECK-NEXT: call void @llvm.donothing()13874; CHECK-NEXT: [[TMP6:%.*]] = trunc <16 x i32> [[TMP8]] to <16 x i4>13875; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[TMP1]] to <16 x float>13876; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP3]] to <16 x float>13877; CHECK-NEXT: [[TMP11:%.*]] = call <16 x float> @llvm.x86.avx512.vpermi2var.ps.512(<16 x float> [[TMP4]], <16 x i32> [[X1:%.*]], <16 x float> [[TMP5]])13878; CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x float> [[TMP11]] to <16 x i32>13879; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x i4> [[TMP6]] to i6413880; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP12]], 013881; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP13:%.*]], label [[TMP14:%.*]], !prof [[PROF1]]13882; CHECK: 10:13883; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13884; CHECK-NEXT: unreachable13885; CHECK: 11:13886; CHECK-NEXT: [[TMP9:%.*]] = call <16 x float> @llvm.x86.avx512.vpermi2var.ps.512(<16 x float> [[X0:%.*]], <16 x i32> [[X1]], <16 x float> [[X2:%.*]])13887; CHECK-NEXT: [[TMP10:%.*]] = bitcast <16 x i32> [[X1]] to <16 x float>13888; CHECK-NEXT: store <16 x i32> [[TMP7]], ptr @__msan_retval_tls, align 813889; CHECK-NEXT: ret <16 x float> [[TMP9]]13890;13891 %res = call <16 x float> @llvm.x86.avx512.mask.vpermi2var.ps.512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 -1)13892 ret <16 x float> %res13893}13894 13895define <16 x float>@test_int_x86_avx512_mask_vpermi2var_ps_512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 %x3) #0 {13896;13897; CHECK-LABEL: @test_int_x86_avx512_mask_vpermi2var_ps_512(13898; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 813899; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 813900; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813901; CHECK-NEXT: [[TMP4:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 813902; CHECK-NEXT: call void @llvm.donothing()13903; CHECK-NEXT: [[TMP7:%.*]] = trunc <16 x i32> [[TMP2]] to <16 x i4>13904; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP1]] to <16 x float>13905; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i32> [[TMP3]] to <16 x float>13906; CHECK-NEXT: [[TMP9:%.*]] = call <16 x float> @llvm.x86.avx512.vpermi2var.ps.512(<16 x float> [[TMP5]], <16 x i32> [[X1:%.*]], <16 x float> [[TMP6]])13907; CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x float> [[TMP9]] to <16 x i32>13908; CHECK-NEXT: [[TMP21:%.*]] = bitcast <16 x i4> [[TMP7]] to i6413909; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP21]], 013910; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP22:%.*]], label [[TMP23:%.*]], !prof [[PROF1]]13911; CHECK: 11:13912; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13913; CHECK-NEXT: unreachable13914; CHECK: 12:13915; CHECK-NEXT: [[TMP10:%.*]] = call <16 x float> @llvm.x86.avx512.vpermi2var.ps.512(<16 x float> [[X0:%.*]], <16 x i32> [[X1]], <16 x float> [[X2:%.*]])13916; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32> [[X1]] to <16 x float>13917; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16 [[TMP4]] to <16 x i1>13918; CHECK-NEXT: [[TMP13:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>13919; CHECK-NEXT: [[TMP14:%.*]] = select <16 x i1> [[TMP13]], <16 x i32> [[TMP8]], <16 x i32> [[TMP2]]13920; CHECK-NEXT: [[TMP15:%.*]] = bitcast <16 x float> [[TMP10]] to <16 x i32>13921; CHECK-NEXT: [[TMP16:%.*]] = bitcast <16 x float> [[TMP11]] to <16 x i32>13922; CHECK-NEXT: [[TMP17:%.*]] = xor <16 x i32> [[TMP15]], [[TMP16]]13923; CHECK-NEXT: [[TMP18:%.*]] = or <16 x i32> [[TMP17]], [[TMP8]]13924; CHECK-NEXT: [[TMP19:%.*]] = or <16 x i32> [[TMP18]], [[TMP2]]13925; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[TMP19]], <16 x i32> [[TMP14]]13926; CHECK-NEXT: [[TMP20:%.*]] = select <16 x i1> [[TMP13]], <16 x float> [[TMP10]], <16 x float> [[TMP11]]13927; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 813928; CHECK-NEXT: ret <16 x float> [[TMP20]]13929;13930 %res = call <16 x float> @llvm.x86.avx512.mask.vpermi2var.ps.512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 %x3)13931 ret <16 x float> %res13932}13933 13934declare <8 x i64> @llvm.x86.avx512.mask.vpermi2var.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)13935 13936define <8 x i64>@test_int_x86_avx512_vpermi2var_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2) #0 {13937; CHECK-LABEL: @test_int_x86_avx512_vpermi2var_q_512(13938; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 813939; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 813940; CHECK-NEXT: [[X1:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813941; CHECK-NEXT: call void @llvm.donothing()13942; CHECK-NEXT: [[TMP8:%.*]] = trunc <8 x i64> [[X1]] to <8 x i3>13943; CHECK-NEXT: [[_MSPROP1:%.*]] = call <8 x i64> @llvm.x86.avx512.vpermi2var.q.512(<8 x i64> [[TMP1]], <8 x i64> [[X3:%.*]], <8 x i64> [[TMP3]])13944; CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i3> [[TMP8]] to i2413945; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i24 [[TMP5]], 013946; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP7:%.*]], label [[TMP9:%.*]], !prof [[PROF1]]13947; CHECK: 7:13948; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13949; CHECK-NEXT: unreachable13950; CHECK: 8:13951; CHECK-NEXT: [[TMP4:%.*]] = call <8 x i64> @llvm.x86.avx512.vpermi2var.q.512(<8 x i64> [[X0:%.*]], <8 x i64> [[X3]], <8 x i64> [[X2:%.*]])13952; CHECK-NEXT: store <8 x i64> [[_MSPROP1]], ptr @__msan_retval_tls, align 813953; CHECK-NEXT: ret <8 x i64> [[TMP4]]13954;13955 %res = call <8 x i64> @llvm.x86.avx512.mask.vpermi2var.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)13956 ret <8 x i64> %res13957}13958 13959define <8 x i64>@test_int_x86_avx512_mask_vpermi2var_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) #0 {13960;13961; CHECK-LABEL: @test_int_x86_avx512_mask_vpermi2var_q_512(13962; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 813963; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 813964; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813965; CHECK-NEXT: [[TMP4:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 813966; CHECK-NEXT: call void @llvm.donothing()13967; CHECK-NEXT: [[TMP13:%.*]] = trunc <8 x i64> [[TMP2]] to <8 x i3>13968; CHECK-NEXT: [[_MSPROP1:%.*]] = call <8 x i64> @llvm.x86.avx512.vpermi2var.q.512(<8 x i64> [[TMP1]], <8 x i64> [[X1:%.*]], <8 x i64> [[TMP3]])13969; CHECK-NEXT: [[TMP14:%.*]] = bitcast <8 x i3> [[TMP13]] to i2413970; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i24 [[TMP14]], 013971; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP15:%.*]], label [[TMP16:%.*]], !prof [[PROF1]]13972; CHECK: 8:13973; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]13974; CHECK-NEXT: unreachable13975; CHECK: 9:13976; CHECK-NEXT: [[TMP5:%.*]] = call <8 x i64> @llvm.x86.avx512.vpermi2var.q.512(<8 x i64> [[X0:%.*]], <8 x i64> [[X1]], <8 x i64> [[X2:%.*]])13977; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP4]] to <8 x i1>13978; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>13979; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP1]], <8 x i64> [[TMP2]]13980; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP5]], [[X1]]13981; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[_MSPROP1]]13982; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], [[TMP2]]13983; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP11]], <8 x i64> [[TMP8]]13984; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP5]], <8 x i64> [[X1]]13985; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 813986; CHECK-NEXT: ret <8 x i64> [[TMP12]]13987;13988 %res = call <8 x i64> @llvm.x86.avx512.mask.vpermi2var.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)13989 ret <8 x i64> %res13990}13991 13992declare <16 x i32> @llvm.x86.avx512.maskz.vpermt2var.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)13993 13994define <16 x i32>@test_int_x86_avx512_maskz_vpermt2var_d_512(<16 x i32> %x0, <16 x i32> %x1, ptr %x2p, i16 %x3) #0 {13995;13996; CHECK-LABEL: @test_int_x86_avx512_maskz_vpermt2var_d_512(13997; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 813998; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 813999; CHECK-NEXT: [[X0:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 814000; CHECK-NEXT: [[TMP4:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 814001; CHECK-NEXT: call void @llvm.donothing()14002; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 014003; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]14004; CHECK: 5:14005; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14006; CHECK-NEXT: unreachable14007; CHECK: 6:14008; CHECK-NEXT: [[X2:%.*]] = load <16 x i32>, ptr [[X2P:%.*]], align 6414009; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[X2P]] to i6414010; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 8796093022208014011; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr14012; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP9]], align 6414013; CHECK-NEXT: [[TMP18:%.*]] = trunc <16 x i32> [[X0]] to <16 x i4>14014; CHECK-NEXT: [[_MSPROP1:%.*]] = call <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32> [[TMP2]], <16 x i32> [[X4:%.*]], <16 x i32> [[_MSLD]])14015; CHECK-NEXT: [[TMP19:%.*]] = bitcast <16 x i4> [[TMP18]] to i6414016; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i64 [[TMP19]], 014017; CHECK-NEXT: br i1 [[_MSCMP1]], label [[TMP20:%.*]], label [[TMP21:%.*]], !prof [[PROF1]]14018; CHECK: 13:14019; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14020; CHECK-NEXT: unreachable14021; CHECK: 14:14022; CHECK-NEXT: [[TMP10:%.*]] = call <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32> [[X1:%.*]], <16 x i32> [[X4]], <16 x i32> [[X2]])14023; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[TMP4]] to <16 x i1>14024; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>14025; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[_MSPROP1]], <16 x i32> zeroinitializer14026; CHECK-NEXT: [[TMP14:%.*]] = xor <16 x i32> [[TMP10]], zeroinitializer14027; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], [[_MSPROP1]]14028; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i32> [[TMP15]], zeroinitializer14029; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP16]], <16 x i32> [[TMP13]]14030; CHECK-NEXT: [[TMP17:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[TMP10]], <16 x i32> zeroinitializer14031; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 814032; CHECK-NEXT: ret <16 x i32> [[TMP17]]14033;14034 %x2 = load <16 x i32>, ptr %x2p14035 %res = call <16 x i32> @llvm.x86.avx512.maskz.vpermt2var.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)14036 ret <16 x i32> %res14037}14038 14039declare <8 x double> @llvm.x86.avx512.maskz.vpermt2var.pd.512(<8 x i64>, <8 x double>, <8 x double>, i8)14040 14041define <8 x double>@test_int_x86_avx512_maskz_vpermt2var_pd_512(<8 x i64> %x0, <8 x double> %x1, ptr %x2ptr, i8 %x3, <8 x double> %extra_param) #0 {14042;14043; CHECK-LABEL: @test_int_x86_avx512_maskz_vpermt2var_pd_512(14044; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 814045; CHECK-NEXT: [[TMP5:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 814046; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 814047; CHECK-NEXT: [[X0:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 814048; CHECK-NEXT: [[TMP4:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 814049; CHECK-NEXT: call void @llvm.donothing()14050; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 014051; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP6:%.*]], label [[TMP12:%.*]], !prof [[PROF1]]14052; CHECK: 6:14053; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14054; CHECK-NEXT: unreachable14055; CHECK: 7:14056; CHECK-NEXT: [[X2S:%.*]] = load double, ptr [[X2PTR:%.*]], align 814057; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[X2PTR]] to i6414058; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 8796093022208014059; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr14060; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP9]], align 814061; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <8 x i64> [[TMP5]], i64 [[_MSLD]], i32 014062; CHECK-NEXT: [[X2INS:%.*]] = insertelement <8 x double> [[EXTRA_PARAM:%.*]], double [[X2S]], i32 014063; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <8 x i64> [[_MSPROP]], <8 x i64> [[TMP5]], <8 x i32> zeroinitializer14064; CHECK-NEXT: [[X2:%.*]] = shufflevector <8 x double> [[X2INS]], <8 x double> [[EXTRA_PARAM]], <8 x i32> zeroinitializer14065; CHECK-NEXT: [[TMP10:%.*]] = trunc <8 x i64> [[X0]] to <8 x i3>14066; CHECK-NEXT: [[TMP11:%.*]] = bitcast <8 x i64> [[TMP2]] to <8 x double>14067; CHECK-NEXT: [[TMP24:%.*]] = bitcast <8 x i64> [[_MSPROP1]] to <8 x double>14068; CHECK-NEXT: [[TMP13:%.*]] = call <8 x double> @llvm.x86.avx512.vpermi2var.pd.512(<8 x double> [[TMP11]], <8 x i64> [[X4:%.*]], <8 x double> [[TMP24]])14069; CHECK-NEXT: [[TMP14:%.*]] = bitcast <8 x double> [[TMP13]] to <8 x i64>14070; CHECK-NEXT: [[TMP25:%.*]] = bitcast <8 x i3> [[TMP10]] to i2414071; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i24 [[TMP25]], 014072; CHECK-NEXT: br i1 [[_MSCMP2]], label [[TMP26:%.*]], label [[TMP27:%.*]], !prof [[PROF1]]14073; CHECK: 17:14074; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14075; CHECK-NEXT: unreachable14076; CHECK: 18:14077; CHECK-NEXT: [[TMP15:%.*]] = call <8 x double> @llvm.x86.avx512.vpermi2var.pd.512(<8 x double> [[X1:%.*]], <8 x i64> [[X4]], <8 x double> [[X2]])14078; CHECK-NEXT: [[TMP16:%.*]] = bitcast i8 [[TMP4]] to <8 x i1>14079; CHECK-NEXT: [[TMP17:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>14080; CHECK-NEXT: [[TMP18:%.*]] = select <8 x i1> [[TMP17]], <8 x i64> [[TMP14]], <8 x i64> zeroinitializer14081; CHECK-NEXT: [[TMP19:%.*]] = bitcast <8 x double> [[TMP15]] to <8 x i64>14082; CHECK-NEXT: [[TMP20:%.*]] = xor <8 x i64> [[TMP19]], zeroinitializer14083; CHECK-NEXT: [[TMP21:%.*]] = or <8 x i64> [[TMP20]], [[TMP14]]14084; CHECK-NEXT: [[TMP22:%.*]] = or <8 x i64> [[TMP21]], zeroinitializer14085; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP16]], <8 x i64> [[TMP22]], <8 x i64> [[TMP18]]14086; CHECK-NEXT: [[TMP23:%.*]] = select <8 x i1> [[TMP17]], <8 x double> [[TMP15]], <8 x double> zeroinitializer14087; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 814088; CHECK-NEXT: ret <8 x double> [[TMP23]]14089;14090 %x2s = load double, ptr %x2ptr14091 %x2ins = insertelement <8 x double> %extra_param, double %x2s, i32 014092 %x2 = shufflevector <8 x double> %x2ins, <8 x double> %extra_param, <8 x i32> zeroinitializer14093 %res = call <8 x double> @llvm.x86.avx512.maskz.vpermt2var.pd.512(<8 x i64> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3)14094 ret <8 x double> %res14095}14096 14097declare <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32>, <16 x float>, <16 x float>, i16)14098 14099define <16 x float>@test_int_x86_avx512_maskz_vpermt2var_ps_512(<16 x i32> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3) #0 {14100;14101; CHECK-LABEL: @test_int_x86_avx512_maskz_vpermt2var_ps_512(14102; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 814103; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 814104; CHECK-NEXT: [[X0:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 814105; CHECK-NEXT: [[TMP4:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 814106; CHECK-NEXT: call void @llvm.donothing()14107; CHECK-NEXT: [[TMP7:%.*]] = trunc <16 x i32> [[X0]] to <16 x i4>14108; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP1]] to <16 x float>14109; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i32> [[TMP3]] to <16 x float>14110; CHECK-NEXT: [[TMP19:%.*]] = call <16 x float> @llvm.x86.avx512.vpermi2var.ps.512(<16 x float> [[TMP5]], <16 x i32> [[X4:%.*]], <16 x float> [[TMP6]])14111; CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x float> [[TMP19]] to <16 x i32>14112; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x i4> [[TMP7]] to i6414113; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP9]], 014114; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP20:%.*]], label [[TMP21:%.*]], !prof [[PROF1]]14115; CHECK: 11:14116; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14117; CHECK-NEXT: unreachable14118; CHECK: 12:14119; CHECK-NEXT: [[TMP10:%.*]] = call <16 x float> @llvm.x86.avx512.vpermi2var.ps.512(<16 x float> [[X1:%.*]], <16 x i32> [[X4]], <16 x float> [[X2:%.*]])14120; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[TMP4]] to <16 x i1>14121; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>14122; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP12]], <16 x i32> [[TMP8]], <16 x i32> zeroinitializer14123; CHECK-NEXT: [[TMP14:%.*]] = bitcast <16 x float> [[TMP10]] to <16 x i32>14124; CHECK-NEXT: [[TMP15:%.*]] = xor <16 x i32> [[TMP14]], zeroinitializer14125; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i32> [[TMP15]], [[TMP8]]14126; CHECK-NEXT: [[TMP17:%.*]] = or <16 x i32> [[TMP16]], zeroinitializer14127; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP17]], <16 x i32> [[TMP13]]14128; CHECK-NEXT: [[TMP18:%.*]] = select <16 x i1> [[TMP12]], <16 x float> [[TMP10]], <16 x float> zeroinitializer14129; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 814130; CHECK-NEXT: ret <16 x float> [[TMP18]]14131;14132 %res = call <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3)14133 ret <16 x float> %res14134}14135 14136 14137declare <8 x i64> @llvm.x86.avx512.maskz.vpermt2var.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)14138 14139define <8 x i64>@test_int_x86_avx512_maskz_vpermt2var_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) #0 {14140;14141; CHECK-LABEL: @test_int_x86_avx512_maskz_vpermt2var_q_512(14142; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 814143; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 814144; CHECK-NEXT: [[X0:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 814145; CHECK-NEXT: [[TMP4:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 814146; CHECK-NEXT: call void @llvm.donothing()14147; CHECK-NEXT: [[TMP13:%.*]] = trunc <8 x i64> [[X0]] to <8 x i3>14148; CHECK-NEXT: [[_MSPROP1:%.*]] = call <8 x i64> @llvm.x86.avx512.vpermi2var.q.512(<8 x i64> [[TMP1]], <8 x i64> [[X4:%.*]], <8 x i64> [[TMP3]])14149; CHECK-NEXT: [[TMP14:%.*]] = bitcast <8 x i3> [[TMP13]] to i2414150; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i24 [[TMP14]], 014151; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP15:%.*]], label [[TMP16:%.*]], !prof [[PROF1]]14152; CHECK: 8:14153; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14154; CHECK-NEXT: unreachable14155; CHECK: 9:14156; CHECK-NEXT: [[TMP5:%.*]] = call <8 x i64> @llvm.x86.avx512.vpermi2var.q.512(<8 x i64> [[X1:%.*]], <8 x i64> [[X4]], <8 x i64> [[X2:%.*]])14157; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP4]] to <8 x i1>14158; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[X3:%.*]] to <8 x i1>14159; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[_MSPROP1]], <8 x i64> zeroinitializer14160; CHECK-NEXT: [[TMP9:%.*]] = xor <8 x i64> [[TMP5]], zeroinitializer14161; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i64> [[TMP9]], [[_MSPROP1]]14162; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i64> [[TMP10]], zeroinitializer14163; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i64> [[TMP11]], <8 x i64> [[TMP8]]14164; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP7]], <8 x i64> [[TMP5]], <8 x i64> zeroinitializer14165; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 814166; CHECK-NEXT: ret <8 x i64> [[TMP12]]14167;14168 %res = call <8 x i64> @llvm.x86.avx512.maskz.vpermt2var.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)14169 ret <8 x i64> %res14170}14171 14172declare <16 x i32> @llvm.x86.avx512.mask.vpermt2var.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)14173 14174define <16 x i32>@test_int_x86_avx512_vpermt2var_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) #0 {14175; CHECK-LABEL: @test_int_x86_avx512_vpermt2var_d_512(14176; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 814177; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 814178; CHECK-NEXT: [[X0:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 814179; CHECK-NEXT: call void @llvm.donothing()14180; CHECK-NEXT: [[TMP8:%.*]] = trunc <16 x i32> [[X0]] to <16 x i4>14181; CHECK-NEXT: [[_MSPROP1:%.*]] = call <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32> [[TMP1]], <16 x i32> [[X3:%.*]], <16 x i32> [[TMP3]])14182; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i4> [[TMP8]] to i6414183; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP5]], 014184; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP7:%.*]], label [[TMP9:%.*]], !prof [[PROF1]]14185; CHECK: 7:14186; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14187; CHECK-NEXT: unreachable14188; CHECK: 8:14189; CHECK-NEXT: [[TMP4:%.*]] = call <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32> [[X1:%.*]], <16 x i32> [[X3]], <16 x i32> [[X2:%.*]])14190; CHECK-NEXT: store <16 x i32> [[_MSPROP1]], ptr @__msan_retval_tls, align 814191; CHECK-NEXT: ret <16 x i32> [[TMP4]]14192;14193 %res = call <16 x i32> @llvm.x86.avx512.mask.vpermt2var.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)14194 ret <16 x i32> %res14195}14196 14197define <16 x i32>@test_int_x86_avx512_mask_vpermt2var_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) #0 {14198;14199; CHECK-LABEL: @test_int_x86_avx512_mask_vpermt2var_d_512(14200; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 814201; CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 814202; CHECK-NEXT: [[X0:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 814203; CHECK-NEXT: [[TMP4:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 814204; CHECK-NEXT: call void @llvm.donothing()14205; CHECK-NEXT: [[TMP13:%.*]] = trunc <16 x i32> [[X0]] to <16 x i4>14206; CHECK-NEXT: [[_MSPROP1:%.*]] = call <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32> [[TMP1]], <16 x i32> [[X4:%.*]], <16 x i32> [[TMP3]])14207; CHECK-NEXT: [[TMP14:%.*]] = bitcast <16 x i4> [[TMP13]] to i6414208; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP14]], 014209; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP15:%.*]], label [[TMP16:%.*]], !prof [[PROF1]]14210; CHECK: 8:14211; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14212; CHECK-NEXT: unreachable14213; CHECK: 9:14214; CHECK-NEXT: [[TMP5:%.*]] = call <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32> [[X1:%.*]], <16 x i32> [[X4]], <16 x i32> [[X2:%.*]])14215; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP4]] to <16 x i1>14216; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>14217; CHECK-NEXT: [[TMP8:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[_MSPROP1]], <16 x i32> [[TMP1]]14218; CHECK-NEXT: [[TMP9:%.*]] = xor <16 x i32> [[TMP5]], [[X1]]14219; CHECK-NEXT: [[TMP10:%.*]] = or <16 x i32> [[TMP9]], [[_MSPROP1]]14220; CHECK-NEXT: [[TMP11:%.*]] = or <16 x i32> [[TMP10]], [[TMP1]]14221; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP6]], <16 x i32> [[TMP11]], <16 x i32> [[TMP8]]14222; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP7]], <16 x i32> [[TMP5]], <16 x i32> [[X1]]14223; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 814224; CHECK-NEXT: ret <16 x i32> [[TMP12]]14225;14226 %res = call <16 x i32> @llvm.x86.avx512.mask.vpermt2var.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)14227 ret <16 x i32> %res14228}14229 14230declare <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)14231declare <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)14232declare <8 x double> @llvm.x86.avx512.mask.mul.pd.512(<8 x double>, <8 x double>, <8 x double>, i8, i32)14233 14234define <16 x float> @test_vsubps_rn(<16 x float> %a0, <16 x float> %a1) #0 {14235; CHECK-LABEL: @test_vsubps_rn(14236; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 814237; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 814238; CHECK-NEXT: call void @llvm.donothing()14239; CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i32> [[TMP1]] to i51214240; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP3]], 014241; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[TMP2]] to i51214242; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP4]], 014243; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]14244; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]14245; CHECK: 5:14246; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14247; CHECK-NEXT: unreachable14248; CHECK: 6:14249; CHECK-NEXT: [[TMP7:%.*]] = call <16 x float> @llvm.x86.avx512.sub.ps.512(<16 x float> [[A0:%.*]], <16 x float> [[A1:%.*]], i32 8)14250; CHECK-NEXT: store <16 x i32> zeroinitializer, ptr @__msan_retval_tls, align 814251; CHECK-NEXT: ret <16 x float> [[TMP7]]14252;14253 %res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1,14254 <16 x float> zeroinitializer, i16 -1, i32 8)14255 ret <16 x float> %res14256}14257 14258define <16 x float> @test_vsubps_rd(<16 x float> %a0, <16 x float> %a1) #0 {14259; CHECK-LABEL: @test_vsubps_rd(14260; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 814261; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 814262; CHECK-NEXT: call void @llvm.donothing()14263; CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i32> [[TMP1]] to i51214264; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP3]], 014265; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[TMP2]] to i51214266; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP4]], 014267; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]14268; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]14269; CHECK: 5:14270; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14271; CHECK-NEXT: unreachable14272; CHECK: 6:14273; CHECK-NEXT: [[TMP7:%.*]] = call <16 x float> @llvm.x86.avx512.sub.ps.512(<16 x float> [[A0:%.*]], <16 x float> [[A1:%.*]], i32 9)14274; CHECK-NEXT: store <16 x i32> zeroinitializer, ptr @__msan_retval_tls, align 814275; CHECK-NEXT: ret <16 x float> [[TMP7]]14276;14277 %res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1,14278 <16 x float> zeroinitializer, i16 -1, i32 9)14279 ret <16 x float> %res14280}14281 14282define <16 x float> @test_vsubps_ru(<16 x float> %a0, <16 x float> %a1) #0 {14283; CHECK-LABEL: @test_vsubps_ru(14284; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 814285; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 814286; CHECK-NEXT: call void @llvm.donothing()14287; CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i32> [[TMP1]] to i51214288; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP3]], 014289; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[TMP2]] to i51214290; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP4]], 014291; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]14292; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]14293; CHECK: 5:14294; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14295; CHECK-NEXT: unreachable14296; CHECK: 6:14297; CHECK-NEXT: [[TMP7:%.*]] = call <16 x float> @llvm.x86.avx512.sub.ps.512(<16 x float> [[A0:%.*]], <16 x float> [[A1:%.*]], i32 10)14298; CHECK-NEXT: store <16 x i32> zeroinitializer, ptr @__msan_retval_tls, align 814299; CHECK-NEXT: ret <16 x float> [[TMP7]]14300;14301 %res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1,14302 <16 x float> zeroinitializer, i16 -1, i32 10)14303 ret <16 x float> %res14304}14305 14306define <16 x float> @test_vsubps_rz(<16 x float> %a0, <16 x float> %a1) #0 {14307; CHECK-LABEL: @test_vsubps_rz(14308; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 814309; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 814310; CHECK-NEXT: call void @llvm.donothing()14311; CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i32> [[TMP1]] to i51214312; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP3]], 014313; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[TMP2]] to i51214314; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP4]], 014315; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]14316; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]14317; CHECK: 5:14318; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14319; CHECK-NEXT: unreachable14320; CHECK: 6:14321; CHECK-NEXT: [[TMP7:%.*]] = call <16 x float> @llvm.x86.avx512.sub.ps.512(<16 x float> [[A0:%.*]], <16 x float> [[A1:%.*]], i32 11)14322; CHECK-NEXT: store <16 x i32> zeroinitializer, ptr @__msan_retval_tls, align 814323; CHECK-NEXT: ret <16 x float> [[TMP7]]14324;14325 %res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1,14326 <16 x float> zeroinitializer, i16 -1, i32 11)14327 ret <16 x float> %res14328}14329 14330define <16 x float> @test_vmulps_rn(<16 x float> %a0, <16 x float> %a1) #0 {14331; CHECK-LABEL: @test_vmulps_rn(14332; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 814333; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 814334; CHECK-NEXT: call void @llvm.donothing()14335; CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i32> [[TMP1]] to i51214336; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP3]], 014337; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[TMP2]] to i51214338; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP4]], 014339; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]14340; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]14341; CHECK: 5:14342; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14343; CHECK-NEXT: unreachable14344; CHECK: 6:14345; CHECK-NEXT: [[TMP7:%.*]] = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> [[A0:%.*]], <16 x float> [[A1:%.*]], i32 8)14346; CHECK-NEXT: store <16 x i32> zeroinitializer, ptr @__msan_retval_tls, align 814347; CHECK-NEXT: ret <16 x float> [[TMP7]]14348;14349 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,14350 <16 x float> zeroinitializer, i16 -1, i32 8)14351 ret <16 x float> %res14352}14353 14354define <16 x float> @test_vmulps_rd(<16 x float> %a0, <16 x float> %a1) #0 {14355; CHECK-LABEL: @test_vmulps_rd(14356; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 814357; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 814358; CHECK-NEXT: call void @llvm.donothing()14359; CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i32> [[TMP1]] to i51214360; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP3]], 014361; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[TMP2]] to i51214362; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP4]], 014363; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]14364; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]14365; CHECK: 5:14366; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14367; CHECK-NEXT: unreachable14368; CHECK: 6:14369; CHECK-NEXT: [[TMP7:%.*]] = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> [[A0:%.*]], <16 x float> [[A1:%.*]], i32 9)14370; CHECK-NEXT: store <16 x i32> zeroinitializer, ptr @__msan_retval_tls, align 814371; CHECK-NEXT: ret <16 x float> [[TMP7]]14372;14373 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,14374 <16 x float> zeroinitializer, i16 -1, i32 9)14375 ret <16 x float> %res14376}14377 14378define <16 x float> @test_vmulps_ru(<16 x float> %a0, <16 x float> %a1) #0 {14379; CHECK-LABEL: @test_vmulps_ru(14380; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 814381; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 814382; CHECK-NEXT: call void @llvm.donothing()14383; CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i32> [[TMP1]] to i51214384; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP3]], 014385; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[TMP2]] to i51214386; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP4]], 014387; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]14388; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]14389; CHECK: 5:14390; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14391; CHECK-NEXT: unreachable14392; CHECK: 6:14393; CHECK-NEXT: [[TMP7:%.*]] = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> [[A0:%.*]], <16 x float> [[A1:%.*]], i32 10)14394; CHECK-NEXT: store <16 x i32> zeroinitializer, ptr @__msan_retval_tls, align 814395; CHECK-NEXT: ret <16 x float> [[TMP7]]14396;14397 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,14398 <16 x float> zeroinitializer, i16 -1, i32 10)14399 ret <16 x float> %res14400}14401 14402define <16 x float> @test_vmulps_rz(<16 x float> %a0, <16 x float> %a1) #0 {14403; CHECK-LABEL: @test_vmulps_rz(14404; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 814405; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 814406; CHECK-NEXT: call void @llvm.donothing()14407; CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i32> [[TMP1]] to i51214408; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP3]], 014409; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[TMP2]] to i51214410; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP4]], 014411; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]14412; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]14413; CHECK: 5:14414; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14415; CHECK-NEXT: unreachable14416; CHECK: 6:14417; CHECK-NEXT: [[TMP7:%.*]] = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> [[A0:%.*]], <16 x float> [[A1:%.*]], i32 11)14418; CHECK-NEXT: store <16 x i32> zeroinitializer, ptr @__msan_retval_tls, align 814419; CHECK-NEXT: ret <16 x float> [[TMP7]]14420;14421 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,14422 <16 x float> zeroinitializer, i16 -1, i32 11)14423 ret <16 x float> %res14424}14425 14426;; mask float14427define <16 x float> @test_vmulps_mask_rn(<16 x float> %a0, <16 x float> %a1, i16 %mask) #0 {14428;14429; CHECK-LABEL: @test_vmulps_mask_rn(14430; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 814431; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 814432; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 814433; CHECK-NEXT: call void @llvm.donothing()14434; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[TMP1]] to i51214435; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP4]], 014436; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP2]] to i51214437; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP5]], 014438; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]14439; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP6:%.*]], label [[TMP7:%.*]], !prof [[PROF1]]14440; CHECK: 6:14441; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14442; CHECK-NEXT: unreachable14443; CHECK: 7:14444; CHECK-NEXT: [[TMP8:%.*]] = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> [[A0:%.*]], <16 x float> [[A1:%.*]], i32 8)14445; CHECK-NEXT: [[TMP9:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>14446; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>14447; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> zeroinitializer, <16 x i32> zeroinitializer14448; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x float> [[TMP8]] to <16 x i32>14449; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i32> [[TMP12]], zeroinitializer14450; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], zeroinitializer14451; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], zeroinitializer14452; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP9]], <16 x i32> [[TMP15]], <16 x i32> [[TMP11]]14453; CHECK-NEXT: [[TMP16:%.*]] = select <16 x i1> [[TMP10]], <16 x float> [[TMP8]], <16 x float> zeroinitializer14454; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 814455; CHECK-NEXT: ret <16 x float> [[TMP16]]14456;14457 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,14458 <16 x float> zeroinitializer, i16 %mask, i32 8)14459 ret <16 x float> %res14460}14461 14462define <16 x float> @test_vmulps_mask_rd(<16 x float> %a0, <16 x float> %a1, i16 %mask) #0 {14463;14464; CHECK-LABEL: @test_vmulps_mask_rd(14465; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 814466; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 814467; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 814468; CHECK-NEXT: call void @llvm.donothing()14469; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[TMP1]] to i51214470; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP4]], 014471; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP2]] to i51214472; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP5]], 014473; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]14474; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP6:%.*]], label [[TMP7:%.*]], !prof [[PROF1]]14475; CHECK: 6:14476; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14477; CHECK-NEXT: unreachable14478; CHECK: 7:14479; CHECK-NEXT: [[TMP8:%.*]] = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> [[A0:%.*]], <16 x float> [[A1:%.*]], i32 9)14480; CHECK-NEXT: [[TMP9:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>14481; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>14482; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> zeroinitializer, <16 x i32> zeroinitializer14483; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x float> [[TMP8]] to <16 x i32>14484; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i32> [[TMP12]], zeroinitializer14485; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], zeroinitializer14486; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], zeroinitializer14487; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP9]], <16 x i32> [[TMP15]], <16 x i32> [[TMP11]]14488; CHECK-NEXT: [[TMP16:%.*]] = select <16 x i1> [[TMP10]], <16 x float> [[TMP8]], <16 x float> zeroinitializer14489; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 814490; CHECK-NEXT: ret <16 x float> [[TMP16]]14491;14492 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,14493 <16 x float> zeroinitializer, i16 %mask, i32 9)14494 ret <16 x float> %res14495}14496 14497define <16 x float> @test_vmulps_mask_ru(<16 x float> %a0, <16 x float> %a1, i16 %mask) #0 {14498;14499; CHECK-LABEL: @test_vmulps_mask_ru(14500; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 814501; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 814502; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 814503; CHECK-NEXT: call void @llvm.donothing()14504; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[TMP1]] to i51214505; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP4]], 014506; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP2]] to i51214507; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP5]], 014508; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]14509; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP6:%.*]], label [[TMP7:%.*]], !prof [[PROF1]]14510; CHECK: 6:14511; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14512; CHECK-NEXT: unreachable14513; CHECK: 7:14514; CHECK-NEXT: [[TMP8:%.*]] = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> [[A0:%.*]], <16 x float> [[A1:%.*]], i32 10)14515; CHECK-NEXT: [[TMP9:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>14516; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>14517; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> zeroinitializer, <16 x i32> zeroinitializer14518; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x float> [[TMP8]] to <16 x i32>14519; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i32> [[TMP12]], zeroinitializer14520; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], zeroinitializer14521; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], zeroinitializer14522; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP9]], <16 x i32> [[TMP15]], <16 x i32> [[TMP11]]14523; CHECK-NEXT: [[TMP16:%.*]] = select <16 x i1> [[TMP10]], <16 x float> [[TMP8]], <16 x float> zeroinitializer14524; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 814525; CHECK-NEXT: ret <16 x float> [[TMP16]]14526;14527 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,14528 <16 x float> zeroinitializer, i16 %mask, i32 10)14529 ret <16 x float> %res14530}14531 14532define <16 x float> @test_vmulps_mask_rz(<16 x float> %a0, <16 x float> %a1, i16 %mask) #0 {14533;14534; CHECK-LABEL: @test_vmulps_mask_rz(14535; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 814536; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 814537; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 814538; CHECK-NEXT: call void @llvm.donothing()14539; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i32> [[TMP1]] to i51214540; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP4]], 014541; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP2]] to i51214542; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP5]], 014543; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]14544; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP6:%.*]], label [[TMP7:%.*]], !prof [[PROF1]]14545; CHECK: 6:14546; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14547; CHECK-NEXT: unreachable14548; CHECK: 7:14549; CHECK-NEXT: [[TMP8:%.*]] = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> [[A0:%.*]], <16 x float> [[A1:%.*]], i32 11)14550; CHECK-NEXT: [[TMP9:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>14551; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>14552; CHECK-NEXT: [[TMP11:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> zeroinitializer, <16 x i32> zeroinitializer14553; CHECK-NEXT: [[TMP12:%.*]] = bitcast <16 x float> [[TMP8]] to <16 x i32>14554; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i32> [[TMP12]], zeroinitializer14555; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], zeroinitializer14556; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], zeroinitializer14557; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP9]], <16 x i32> [[TMP15]], <16 x i32> [[TMP11]]14558; CHECK-NEXT: [[TMP16:%.*]] = select <16 x i1> [[TMP10]], <16 x float> [[TMP8]], <16 x float> zeroinitializer14559; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 814560; CHECK-NEXT: ret <16 x float> [[TMP16]]14561;14562 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,14563 <16 x float> zeroinitializer, i16 %mask, i32 11)14564 ret <16 x float> %res14565}14566 14567;; With Passthru value14568define <16 x float> @test_vmulps_mask_passthru_rn(<16 x float> %a0, <16 x float> %a1, <16 x float> %passthru, i16 %mask) #0 {14569;14570; CHECK-LABEL: @test_vmulps_mask_passthru_rn(14571; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 814572; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 814573; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 814574; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 814575; CHECK-NEXT: call void @llvm.donothing()14576; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP1]] to i51214577; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP5]], 014578; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i32> [[TMP2]] to i51214579; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP6]], 014580; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]14581; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP7:%.*]], label [[TMP8:%.*]], !prof [[PROF1]]14582; CHECK: 7:14583; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14584; CHECK-NEXT: unreachable14585; CHECK: 8:14586; CHECK-NEXT: [[TMP9:%.*]] = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> [[A0:%.*]], <16 x float> [[A1:%.*]], i32 8)14587; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>14588; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>14589; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> zeroinitializer, <16 x i32> [[TMP4]]14590; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x float> [[TMP9]] to <16 x i32>14591; CHECK-NEXT: [[TMP14:%.*]] = bitcast <16 x float> [[PASSTHRU:%.*]] to <16 x i32>14592; CHECK-NEXT: [[TMP15:%.*]] = xor <16 x i32> [[TMP13]], [[TMP14]]14593; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i32> [[TMP15]], zeroinitializer14594; CHECK-NEXT: [[TMP17:%.*]] = or <16 x i32> [[TMP16]], [[TMP4]]14595; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP17]], <16 x i32> [[TMP12]]14596; CHECK-NEXT: [[TMP18:%.*]] = select <16 x i1> [[TMP11]], <16 x float> [[TMP9]], <16 x float> [[PASSTHRU]]14597; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 814598; CHECK-NEXT: ret <16 x float> [[TMP18]]14599;14600 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,14601 <16 x float> %passthru, i16 %mask, i32 8)14602 ret <16 x float> %res14603}14604 14605define <16 x float> @test_vmulps_mask_passthru_rd(<16 x float> %a0, <16 x float> %a1, <16 x float> %passthru, i16 %mask) #0 {14606;14607; CHECK-LABEL: @test_vmulps_mask_passthru_rd(14608; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 814609; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 814610; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 814611; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 814612; CHECK-NEXT: call void @llvm.donothing()14613; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP1]] to i51214614; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP5]], 014615; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i32> [[TMP2]] to i51214616; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP6]], 014617; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]14618; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP7:%.*]], label [[TMP8:%.*]], !prof [[PROF1]]14619; CHECK: 7:14620; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14621; CHECK-NEXT: unreachable14622; CHECK: 8:14623; CHECK-NEXT: [[TMP9:%.*]] = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> [[A0:%.*]], <16 x float> [[A1:%.*]], i32 9)14624; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>14625; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>14626; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> zeroinitializer, <16 x i32> [[TMP4]]14627; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x float> [[TMP9]] to <16 x i32>14628; CHECK-NEXT: [[TMP14:%.*]] = bitcast <16 x float> [[PASSTHRU:%.*]] to <16 x i32>14629; CHECK-NEXT: [[TMP15:%.*]] = xor <16 x i32> [[TMP13]], [[TMP14]]14630; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i32> [[TMP15]], zeroinitializer14631; CHECK-NEXT: [[TMP17:%.*]] = or <16 x i32> [[TMP16]], [[TMP4]]14632; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP17]], <16 x i32> [[TMP12]]14633; CHECK-NEXT: [[TMP18:%.*]] = select <16 x i1> [[TMP11]], <16 x float> [[TMP9]], <16 x float> [[PASSTHRU]]14634; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 814635; CHECK-NEXT: ret <16 x float> [[TMP18]]14636;14637 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,14638 <16 x float> %passthru, i16 %mask, i32 9)14639 ret <16 x float> %res14640}14641 14642define <16 x float> @test_vmulps_mask_passthru_ru(<16 x float> %a0, <16 x float> %a1, <16 x float> %passthru, i16 %mask) #0 {14643;14644; CHECK-LABEL: @test_vmulps_mask_passthru_ru(14645; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 814646; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 814647; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 814648; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 814649; CHECK-NEXT: call void @llvm.donothing()14650; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP1]] to i51214651; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP5]], 014652; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i32> [[TMP2]] to i51214653; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP6]], 014654; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]14655; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP7:%.*]], label [[TMP8:%.*]], !prof [[PROF1]]14656; CHECK: 7:14657; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14658; CHECK-NEXT: unreachable14659; CHECK: 8:14660; CHECK-NEXT: [[TMP9:%.*]] = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> [[A0:%.*]], <16 x float> [[A1:%.*]], i32 10)14661; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>14662; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>14663; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> zeroinitializer, <16 x i32> [[TMP4]]14664; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x float> [[TMP9]] to <16 x i32>14665; CHECK-NEXT: [[TMP14:%.*]] = bitcast <16 x float> [[PASSTHRU:%.*]] to <16 x i32>14666; CHECK-NEXT: [[TMP15:%.*]] = xor <16 x i32> [[TMP13]], [[TMP14]]14667; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i32> [[TMP15]], zeroinitializer14668; CHECK-NEXT: [[TMP17:%.*]] = or <16 x i32> [[TMP16]], [[TMP4]]14669; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP17]], <16 x i32> [[TMP12]]14670; CHECK-NEXT: [[TMP18:%.*]] = select <16 x i1> [[TMP11]], <16 x float> [[TMP9]], <16 x float> [[PASSTHRU]]14671; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 814672; CHECK-NEXT: ret <16 x float> [[TMP18]]14673;14674 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,14675 <16 x float> %passthru, i16 %mask, i32 10)14676 ret <16 x float> %res14677}14678 14679define <16 x float> @test_vmulps_mask_passthru_rz(<16 x float> %a0, <16 x float> %a1, <16 x float> %passthru, i16 %mask) #0 {14680;14681; CHECK-LABEL: @test_vmulps_mask_passthru_rz(14682; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 814683; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 814684; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 814685; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 814686; CHECK-NEXT: call void @llvm.donothing()14687; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i32> [[TMP1]] to i51214688; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP5]], 014689; CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i32> [[TMP2]] to i51214690; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP6]], 014691; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]14692; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP7:%.*]], label [[TMP8:%.*]], !prof [[PROF1]]14693; CHECK: 7:14694; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14695; CHECK-NEXT: unreachable14696; CHECK: 8:14697; CHECK-NEXT: [[TMP9:%.*]] = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> [[A0:%.*]], <16 x float> [[A1:%.*]], i32 11)14698; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>14699; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1>14700; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> zeroinitializer, <16 x i32> [[TMP4]]14701; CHECK-NEXT: [[TMP13:%.*]] = bitcast <16 x float> [[TMP9]] to <16 x i32>14702; CHECK-NEXT: [[TMP14:%.*]] = bitcast <16 x float> [[PASSTHRU:%.*]] to <16 x i32>14703; CHECK-NEXT: [[TMP15:%.*]] = xor <16 x i32> [[TMP13]], [[TMP14]]14704; CHECK-NEXT: [[TMP16:%.*]] = or <16 x i32> [[TMP15]], zeroinitializer14705; CHECK-NEXT: [[TMP17:%.*]] = or <16 x i32> [[TMP16]], [[TMP4]]14706; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP17]], <16 x i32> [[TMP12]]14707; CHECK-NEXT: [[TMP18:%.*]] = select <16 x i1> [[TMP11]], <16 x float> [[TMP9]], <16 x float> [[PASSTHRU]]14708; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 814709; CHECK-NEXT: ret <16 x float> [[TMP18]]14710;14711 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,14712 <16 x float> %passthru, i16 %mask, i32 11)14713 ret <16 x float> %res14714}14715 14716;; mask double14717define <8 x double> @test_vmulpd_mask_rn(<8 x double> %a0, <8 x double> %a1, i8 %mask) #0 {14718;14719; CHECK-LABEL: @test_vmulpd_mask_rn(14720; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 814721; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 814722; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 814723; CHECK-NEXT: call void @llvm.donothing()14724; CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i64> [[TMP1]] to i51214725; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP4]], 014726; CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i64> [[TMP2]] to i51214727; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP5]], 014728; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]14729; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP6:%.*]], label [[TMP7:%.*]], !prof [[PROF1]]14730; CHECK: 6:14731; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14732; CHECK-NEXT: unreachable14733; CHECK: 7:14734; CHECK-NEXT: [[TMP8:%.*]] = call <8 x double> @llvm.x86.avx512.mul.pd.512(<8 x double> [[A0:%.*]], <8 x double> [[A1:%.*]], i32 8)14735; CHECK-NEXT: [[TMP9:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>14736; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>14737; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> zeroinitializer, <8 x i64> zeroinitializer14738; CHECK-NEXT: [[TMP12:%.*]] = bitcast <8 x double> [[TMP8]] to <8 x i64>14739; CHECK-NEXT: [[TMP13:%.*]] = xor <8 x i64> [[TMP12]], zeroinitializer14740; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], zeroinitializer14741; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], zeroinitializer14742; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP9]], <8 x i64> [[TMP15]], <8 x i64> [[TMP11]]14743; CHECK-NEXT: [[TMP16:%.*]] = select <8 x i1> [[TMP10]], <8 x double> [[TMP8]], <8 x double> zeroinitializer14744; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 814745; CHECK-NEXT: ret <8 x double> [[TMP16]]14746;14747 %res = call <8 x double> @llvm.x86.avx512.mask.mul.pd.512(<8 x double> %a0, <8 x double> %a1,14748 <8 x double> zeroinitializer, i8 %mask, i32 8)14749 ret <8 x double> %res14750}14751 14752define <8 x double> @test_vmulpd_mask_rd(<8 x double> %a0, <8 x double> %a1, i8 %mask) #0 {14753;14754; CHECK-LABEL: @test_vmulpd_mask_rd(14755; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 814756; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 814757; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 814758; CHECK-NEXT: call void @llvm.donothing()14759; CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i64> [[TMP1]] to i51214760; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP4]], 014761; CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i64> [[TMP2]] to i51214762; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i512 [[TMP5]], 014763; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]14764; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP6:%.*]], label [[TMP7:%.*]], !prof [[PROF1]]14765; CHECK: 6:14766; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]14767; CHECK-NEXT: unreachable14768; CHECK: 7:14769; CHECK-NEXT: [[TMP8:%.*]] = call <8 x double> @llvm.x86.avx512.mul.pd.512(<8 x double> [[A0:%.*]], <8 x double> [[A1:%.*]], i32 9)14770; CHECK-NEXT: [[TMP9:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>14771; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1>14772; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP10]], <8 x i64> zeroinitializer, <8 x i64> zeroinitializer14773; CHECK-NEXT: [[TMP12:%.*]] = bitcast <8 x double> [[TMP8]] to <8 x i64>14774; CHECK-NEXT: [[TMP13:%.*]] = xor <8 x i64> [[TMP12]], zeroinitializer14775; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i64> [[TMP13]], zeroinitializer14776; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i64> [[TMP14]], zeroinitializer14777; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP9]], <8 x i64> [[TMP15]], <8 x i64> [[TMP11]]14778; CHECK-NEXT: [[TMP16:%.*]] = select <8 x i1> [[TMP10]], <8 x double> [[TMP8]], <8 x double> zeroinitializer14779; CHECK-NEXT: store <8 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 814780; CHECK-NEXT: ret <8 x double> [[TMP16]]14781;14782 %res = call <8 x double> @llvm.x86.avx512.mask.mul.pd.512(<8 x double> %a0, <8 x double> %a1,14783 <8 x double> zeroinitializer, i8 %mask, i32 9)14784 ret <8 x double> %res14785}14786 14787define <8 x double> @test_vmulpd_mask_ru(<8 x double> %a0, <8 x double> %a1, i8 %mask) #0 {14788;14789; CHECK-LABEL: @test_vmulpd_mask_ru(14790; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 814791; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 6File truncated to the first 1 MiB.