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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 62; RUN: opt -S -passes=msan -mattr=+avx512bf16 -mattr=+avx512vl < %s | FileCheck %s3;4; Forked from llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll5;6; Strictly handled:7; - llvm.x86.avx512bf16.cvtne2ps2bf16.128(<4 x float> %A, <4 x float> %B)8; - llvm.x86.avx512bf16.cvtne2ps2bf16.256(<8 x float> %A, <8 x float> %B)9; - llvm.x86.avx512bf16.cvtneps2bf16.256(<8 x float> %A)10; - llvm.x86.avx512bf16.mask.cvtneps2bf16.128(<4 x float> %A, <8 x bfloat> %6, <4 x i1> %4)11;12; Heuristically handled: (none)13 14target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"15target triple = "x86_64-unknown-linux-gnu"16 17declare <8 x bfloat> @llvm.x86.avx512bf16.cvtne2ps2bf16.128(<4 x float>, <4 x float>) #118 19define <2 x i64> @test_mm_cvtne2ps2bf16_128(<4 x float> %A, <4 x float> %B) local_unnamed_addr #0 sanitize_memory {20; CHECK-LABEL: define <2 x i64> @test_mm_cvtne2ps2bf16_128(21; CHECK-SAME: <4 x float> [[A:%.*]], <4 x float> [[B:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {22; CHECK-NEXT: [[ENTRY:.*:]]23; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 824; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 825; CHECK-NEXT: call void @llvm.donothing()26; CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[TMP0]] to i12827; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i128 [[TMP2]], 028; CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i32> [[TMP1]] to i12829; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i128 [[TMP3]], 030; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]31; CHECK-NEXT: br i1 [[_MSOR]], label %[[BB4:.*]], label %[[BB5:.*]], !prof [[PROF1:![0-9]+]]32; CHECK: [[BB4]]:33; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR5:[0-9]+]]34; CHECK-NEXT: unreachable35; CHECK: [[BB5]]:36; CHECK-NEXT: [[TMP6:%.*]] = tail call <8 x bfloat> @llvm.x86.avx512bf16.cvtne2ps2bf16.128(<4 x float> [[A]], <4 x float> [[B]])37; CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x bfloat> [[TMP6]] to <2 x i64>38; CHECK-NEXT: store <2 x i64> zeroinitializer, ptr @__msan_retval_tls, align 839; CHECK-NEXT: ret <2 x i64> [[TMP7]]40;41entry:42 %0 = tail call <8 x bfloat> @llvm.x86.avx512bf16.cvtne2ps2bf16.128(<4 x float> %A, <4 x float> %B) #243 %1 = bitcast <8 x bfloat> %0 to <2 x i64>44 ret <2 x i64> %145}46 47define <2 x i64> @test_mm_maskz_cvtne2ps2bf16_128(<4 x float> %A, <4 x float> %B, i8 zeroext %U) local_unnamed_addr #0 sanitize_memory {48; CHECK-LABEL: define <2 x i64> @test_mm_maskz_cvtne2ps2bf16_128(49; CHECK-SAME: <4 x float> [[A:%.*]], <4 x float> [[B:%.*]], i8 zeroext [[U:%.*]]) local_unnamed_addr #[[ATTR1]] {50; CHECK-NEXT: [[ENTRY:.*:]]51; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 852; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 853; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 854; CHECK-NEXT: call void @llvm.donothing()55; CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i32> [[TMP0]] to i12856; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i128 [[TMP3]], 057; CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x i32> [[TMP1]] to i12858; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i128 [[TMP4]], 059; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]60; CHECK-NEXT: br i1 [[_MSOR]], label %[[BB5:.*]], label %[[BB6:.*]], !prof [[PROF1]]61; CHECK: [[BB5]]:62; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR5]]63; CHECK-NEXT: unreachable64; CHECK: [[BB6]]:65; CHECK-NEXT: [[TMP7:%.*]] = tail call <8 x bfloat> @llvm.x86.avx512bf16.cvtne2ps2bf16.128(<4 x float> [[A]], <4 x float> [[B]])66; CHECK-NEXT: [[TMP8:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>67; CHECK-NEXT: [[TMP9:%.*]] = bitcast i8 [[U]] to <8 x i1>68; CHECK-NEXT: [[TMP10:%.*]] = select <8 x i1> [[TMP9]], <8 x i16> zeroinitializer, <8 x i16> zeroinitializer69; CHECK-NEXT: [[TMP11:%.*]] = bitcast <8 x bfloat> [[TMP7]] to <8 x i16>70; CHECK-NEXT: [[TMP12:%.*]] = xor <8 x i16> [[TMP11]], zeroinitializer71; CHECK-NEXT: [[TMP13:%.*]] = or <8 x i16> [[TMP12]], zeroinitializer72; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i16> [[TMP13]], zeroinitializer73; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP8]], <8 x i16> [[TMP14]], <8 x i16> [[TMP10]]74; CHECK-NEXT: [[TMP15:%.*]] = select <8 x i1> [[TMP9]], <8 x bfloat> [[TMP7]], <8 x bfloat> zeroinitializer75; CHECK-NEXT: [[TMP16:%.*]] = bitcast <8 x i16> [[_MSPROP_SELECT]] to <2 x i64>76; CHECK-NEXT: [[TMP17:%.*]] = bitcast <8 x bfloat> [[TMP15]] to <2 x i64>77; CHECK-NEXT: store <2 x i64> [[TMP16]], ptr @__msan_retval_tls, align 878; CHECK-NEXT: ret <2 x i64> [[TMP17]]79;80entry:81 %0 = tail call <8 x bfloat> @llvm.x86.avx512bf16.cvtne2ps2bf16.128(<4 x float> %A, <4 x float> %B) #282 %1 = bitcast i8 %U to <8 x i1>83 %2 = select <8 x i1> %1, <8 x bfloat> %0, <8 x bfloat> zeroinitializer84 %3 = bitcast <8 x bfloat> %2 to <2 x i64>85 ret <2 x i64> %386}87 88define <2 x i64> @test_mm_mask_cvtne2ps2bf16_128(<2 x i64> %C, i8 zeroext %U, <4 x float> %A, <4 x float> %B) local_unnamed_addr #0 sanitize_memory {89; CHECK-LABEL: define <2 x i64> @test_mm_mask_cvtne2ps2bf16_128(90; CHECK-SAME: <2 x i64> [[C:%.*]], i8 zeroext [[U:%.*]], <4 x float> [[A:%.*]], <4 x float> [[B:%.*]]) local_unnamed_addr #[[ATTR1]] {91; CHECK-NEXT: [[ENTRY:.*:]]92; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 893; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 40), align 894; CHECK-NEXT: [[TMP2:%.*]] = load <2 x i64>, ptr @__msan_param_tls, align 895; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 896; CHECK-NEXT: call void @llvm.donothing()97; CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x i32> [[TMP0]] to i12898; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i128 [[TMP4]], 099; CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i32> [[TMP1]] to i128100; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i128 [[TMP5]], 0101; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]102; CHECK-NEXT: br i1 [[_MSOR]], label %[[BB6:.*]], label %[[BB7:.*]], !prof [[PROF1]]103; CHECK: [[BB6]]:104; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR5]]105; CHECK-NEXT: unreachable106; CHECK: [[BB7]]:107; CHECK-NEXT: [[TMP8:%.*]] = tail call <8 x bfloat> @llvm.x86.avx512bf16.cvtne2ps2bf16.128(<4 x float> [[A]], <4 x float> [[B]])108; CHECK-NEXT: [[TMP9:%.*]] = bitcast <2 x i64> [[TMP2]] to <8 x i16>109; CHECK-NEXT: [[TMP10:%.*]] = bitcast <2 x i64> [[C]] to <8 x bfloat>110; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>111; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8 [[U]] to <8 x i1>112; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP12]], <8 x i16> zeroinitializer, <8 x i16> [[TMP9]]113; CHECK-NEXT: [[TMP14:%.*]] = bitcast <8 x bfloat> [[TMP8]] to <8 x i16>114; CHECK-NEXT: [[TMP15:%.*]] = bitcast <8 x bfloat> [[TMP10]] to <8 x i16>115; CHECK-NEXT: [[TMP16:%.*]] = xor <8 x i16> [[TMP14]], [[TMP15]]116; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i16> [[TMP16]], zeroinitializer117; CHECK-NEXT: [[TMP18:%.*]] = or <8 x i16> [[TMP17]], [[TMP9]]118; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP11]], <8 x i16> [[TMP18]], <8 x i16> [[TMP13]]119; CHECK-NEXT: [[TMP19:%.*]] = select <8 x i1> [[TMP12]], <8 x bfloat> [[TMP8]], <8 x bfloat> [[TMP10]]120; CHECK-NEXT: [[TMP20:%.*]] = bitcast <8 x i16> [[_MSPROP_SELECT]] to <2 x i64>121; CHECK-NEXT: [[TMP21:%.*]] = bitcast <8 x bfloat> [[TMP19]] to <2 x i64>122; CHECK-NEXT: store <2 x i64> [[TMP20]], ptr @__msan_retval_tls, align 8123; CHECK-NEXT: ret <2 x i64> [[TMP21]]124;125entry:126 %0 = tail call <8 x bfloat> @llvm.x86.avx512bf16.cvtne2ps2bf16.128(<4 x float> %A, <4 x float> %B) #2127 %1 = bitcast <2 x i64> %C to <8 x bfloat>128 %2 = bitcast i8 %U to <8 x i1>129 %3 = select <8 x i1> %2, <8 x bfloat> %0, <8 x bfloat> %1130 %4 = bitcast <8 x bfloat> %3 to <2 x i64>131 ret <2 x i64> %4132}133 134declare <16 x bfloat> @llvm.x86.avx512bf16.cvtne2ps2bf16.256(<8 x float>, <8 x float>) #3135 136define <4 x i64> @test_mm256_cvtne2ps2bf16_256(<8 x float> %A, <8 x float> %B) local_unnamed_addr #1 sanitize_memory {137; CHECK-LABEL: define <4 x i64> @test_mm256_cvtne2ps2bf16_256(138; CHECK-SAME: <8 x float> [[A:%.*]], <8 x float> [[B:%.*]]) local_unnamed_addr #[[ATTR1]] {139; CHECK-NEXT: [[ENTRY:.*:]]140; CHECK-NEXT: [[TMP0:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 8141; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 8142; CHECK-NEXT: call void @llvm.donothing()143; CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i32> [[TMP0]] to i256144; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP2]], 0145; CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i32> [[TMP1]] to i256146; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i256 [[TMP3]], 0147; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]148; CHECK-NEXT: br i1 [[_MSOR]], label %[[BB4:.*]], label %[[BB5:.*]], !prof [[PROF1]]149; CHECK: [[BB4]]:150; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR5]]151; CHECK-NEXT: unreachable152; CHECK: [[BB5]]:153; CHECK-NEXT: [[TMP6:%.*]] = tail call <16 x bfloat> @llvm.x86.avx512bf16.cvtne2ps2bf16.256(<8 x float> [[A]], <8 x float> [[B]])154; CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x bfloat> [[TMP6]] to <4 x i64>155; CHECK-NEXT: store <4 x i64> zeroinitializer, ptr @__msan_retval_tls, align 8156; CHECK-NEXT: ret <4 x i64> [[TMP7]]157;158entry:159 %0 = tail call <16 x bfloat> @llvm.x86.avx512bf16.cvtne2ps2bf16.256(<8 x float> %A, <8 x float> %B) #4160 %1 = bitcast <16 x bfloat> %0 to <4 x i64>161 ret <4 x i64> %1162}163 164define <4 x i64> @test_mm256_maskz_cvtne2ps2bf16_256(<8 x float> %A, <8 x float> %B, i16 zeroext %U) local_unnamed_addr #1 sanitize_memory {165; CHECK-LABEL: define <4 x i64> @test_mm256_maskz_cvtne2ps2bf16_256(166; CHECK-SAME: <8 x float> [[A:%.*]], <8 x float> [[B:%.*]], i16 zeroext [[U:%.*]]) local_unnamed_addr #[[ATTR1]] {167; CHECK-NEXT: [[ENTRY:.*:]]168; CHECK-NEXT: [[TMP0:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 8169; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 8170; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8171; CHECK-NEXT: call void @llvm.donothing()172; CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i32> [[TMP0]] to i256173; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP3]], 0174; CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i32> [[TMP1]] to i256175; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i256 [[TMP4]], 0176; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]177; CHECK-NEXT: br i1 [[_MSOR]], label %[[BB5:.*]], label %[[BB6:.*]], !prof [[PROF1]]178; CHECK: [[BB5]]:179; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR5]]180; CHECK-NEXT: unreachable181; CHECK: [[BB6]]:182; CHECK-NEXT: [[TMP7:%.*]] = tail call <16 x bfloat> @llvm.x86.avx512bf16.cvtne2ps2bf16.256(<8 x float> [[A]], <8 x float> [[B]])183; CHECK-NEXT: [[TMP8:%.*]] = bitcast i16 [[TMP2]] to <16 x i1>184; CHECK-NEXT: [[TMP9:%.*]] = bitcast i16 [[U]] to <16 x i1>185; CHECK-NEXT: [[TMP10:%.*]] = select <16 x i1> [[TMP9]], <16 x i16> zeroinitializer, <16 x i16> zeroinitializer186; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x bfloat> [[TMP7]] to <16 x i16>187; CHECK-NEXT: [[TMP12:%.*]] = xor <16 x i16> [[TMP11]], zeroinitializer188; CHECK-NEXT: [[TMP13:%.*]] = or <16 x i16> [[TMP12]], zeroinitializer189; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i16> [[TMP13]], zeroinitializer190; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP8]], <16 x i16> [[TMP14]], <16 x i16> [[TMP10]]191; CHECK-NEXT: [[TMP15:%.*]] = select <16 x i1> [[TMP9]], <16 x bfloat> [[TMP7]], <16 x bfloat> zeroinitializer192; CHECK-NEXT: [[TMP16:%.*]] = bitcast <16 x i16> [[_MSPROP_SELECT]] to <4 x i64>193; CHECK-NEXT: [[TMP17:%.*]] = bitcast <16 x bfloat> [[TMP15]] to <4 x i64>194; CHECK-NEXT: store <4 x i64> [[TMP16]], ptr @__msan_retval_tls, align 8195; CHECK-NEXT: ret <4 x i64> [[TMP17]]196;197entry:198 %0 = tail call <16 x bfloat> @llvm.x86.avx512bf16.cvtne2ps2bf16.256(<8 x float> %A, <8 x float> %B) #4199 %1 = bitcast i16 %U to <16 x i1>200 %2 = select <16 x i1> %1, <16 x bfloat> %0, <16 x bfloat> zeroinitializer201 %3 = bitcast <16 x bfloat> %2 to <4 x i64>202 ret <4 x i64> %3203}204 205define <4 x i64> @test_mm256_mask_cvtne2ps2bf16_256(<4 x i64> %C, i16 zeroext %U, <8 x float> %A, <8 x float> %B) local_unnamed_addr #1 sanitize_memory {206; CHECK-LABEL: define <4 x i64> @test_mm256_mask_cvtne2ps2bf16_256(207; CHECK-SAME: <4 x i64> [[C:%.*]], i16 zeroext [[U:%.*]], <8 x float> [[A:%.*]], <8 x float> [[B:%.*]]) local_unnamed_addr #[[ATTR1]] {208; CHECK-NEXT: [[ENTRY:.*:]]209; CHECK-NEXT: [[TMP0:%.*]] = load <8 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 40), align 8210; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 8211; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i64>, ptr @__msan_param_tls, align 8212; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 8213; CHECK-NEXT: call void @llvm.donothing()214; CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i32> [[TMP0]] to i256215; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP4]], 0216; CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i32> [[TMP1]] to i256217; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i256 [[TMP5]], 0218; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]219; CHECK-NEXT: br i1 [[_MSOR]], label %[[BB6:.*]], label %[[BB7:.*]], !prof [[PROF1]]220; CHECK: [[BB6]]:221; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR5]]222; CHECK-NEXT: unreachable223; CHECK: [[BB7]]:224; CHECK-NEXT: [[TMP8:%.*]] = tail call <16 x bfloat> @llvm.x86.avx512bf16.cvtne2ps2bf16.256(<8 x float> [[A]], <8 x float> [[B]])225; CHECK-NEXT: [[TMP9:%.*]] = bitcast <4 x i64> [[TMP2]] to <16 x i16>226; CHECK-NEXT: [[TMP10:%.*]] = bitcast <4 x i64> [[C]] to <16 x bfloat>227; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>228; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16 [[U]] to <16 x i1>229; CHECK-NEXT: [[TMP13:%.*]] = select <16 x i1> [[TMP12]], <16 x i16> zeroinitializer, <16 x i16> [[TMP9]]230; CHECK-NEXT: [[TMP14:%.*]] = bitcast <16 x bfloat> [[TMP8]] to <16 x i16>231; CHECK-NEXT: [[TMP15:%.*]] = bitcast <16 x bfloat> [[TMP10]] to <16 x i16>232; CHECK-NEXT: [[TMP16:%.*]] = xor <16 x i16> [[TMP14]], [[TMP15]]233; CHECK-NEXT: [[TMP17:%.*]] = or <16 x i16> [[TMP16]], zeroinitializer234; CHECK-NEXT: [[TMP18:%.*]] = or <16 x i16> [[TMP17]], [[TMP9]]235; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP11]], <16 x i16> [[TMP18]], <16 x i16> [[TMP13]]236; CHECK-NEXT: [[TMP19:%.*]] = select <16 x i1> [[TMP12]], <16 x bfloat> [[TMP8]], <16 x bfloat> [[TMP10]]237; CHECK-NEXT: [[TMP20:%.*]] = bitcast <16 x i16> [[_MSPROP_SELECT]] to <4 x i64>238; CHECK-NEXT: [[TMP21:%.*]] = bitcast <16 x bfloat> [[TMP19]] to <4 x i64>239; CHECK-NEXT: store <4 x i64> [[TMP20]], ptr @__msan_retval_tls, align 8240; CHECK-NEXT: ret <4 x i64> [[TMP21]]241;242entry:243 %0 = tail call <16 x bfloat> @llvm.x86.avx512bf16.cvtne2ps2bf16.256(<8 x float> %A, <8 x float> %B) #4244 %1 = bitcast <4 x i64> %C to <16 x bfloat>245 %2 = bitcast i16 %U to <16 x i1>246 %3 = select <16 x i1> %2, <16 x bfloat> %0, <16 x bfloat> %1247 %4 = bitcast <16 x bfloat> %3 to <4 x i64>248 ret <4 x i64> %4249}250 251declare <8 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.256(<8 x float>) #3252 253define <2 x i64> @test_mm256_cvtneps2bf16_256(<8 x float> %A) local_unnamed_addr #2 sanitize_memory {254; CHECK-LABEL: define <2 x i64> @test_mm256_cvtneps2bf16_256(255; CHECK-SAME: <8 x float> [[A:%.*]]) local_unnamed_addr #[[ATTR1]] {256; CHECK-NEXT: [[ENTRY:.*:]]257; CHECK-NEXT: [[TMP0:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 8258; CHECK-NEXT: call void @llvm.donothing()259; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i32> [[TMP0]] to i256260; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP1]], 0261; CHECK-NEXT: br i1 [[_MSCMP]], label %[[BB2:.*]], label %[[BB3:.*]], !prof [[PROF1]]262; CHECK: [[BB2]]:263; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR5]]264; CHECK-NEXT: unreachable265; CHECK: [[BB3]]:266; CHECK-NEXT: [[TMP4:%.*]] = tail call <8 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.256(<8 x float> [[A]])267; CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x bfloat> [[TMP4]] to <2 x i64>268; CHECK-NEXT: store <2 x i64> zeroinitializer, ptr @__msan_retval_tls, align 8269; CHECK-NEXT: ret <2 x i64> [[TMP5]]270;271entry:272 %0 = tail call <8 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.256(<8 x float> %A) #4273 %1 = bitcast <8 x bfloat> %0 to <2 x i64>274 ret <2 x i64> %1275}276 277define <2 x i64> @test_mm256_maskz_cvtneps2bf16_256(<8 x float> %A, i8 zeroext %U) local_unnamed_addr #2 sanitize_memory {278; CHECK-LABEL: define <2 x i64> @test_mm256_maskz_cvtneps2bf16_256(279; CHECK-SAME: <8 x float> [[A:%.*]], i8 zeroext [[U:%.*]]) local_unnamed_addr #[[ATTR1]] {280; CHECK-NEXT: [[ENTRY:.*:]]281; CHECK-NEXT: [[TMP0:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 8282; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 8283; CHECK-NEXT: call void @llvm.donothing()284; CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i32> [[TMP0]] to i256285; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP2]], 0286; CHECK-NEXT: br i1 [[_MSCMP]], label %[[BB3:.*]], label %[[BB4:.*]], !prof [[PROF1]]287; CHECK: [[BB3]]:288; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR5]]289; CHECK-NEXT: unreachable290; CHECK: [[BB4]]:291; CHECK-NEXT: [[TMP5:%.*]] = tail call <8 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.256(<8 x float> [[A]])292; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8 [[TMP1]] to <8 x i1>293; CHECK-NEXT: [[TMP7:%.*]] = bitcast i8 [[U]] to <8 x i1>294; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP7]], <8 x i16> zeroinitializer, <8 x i16> zeroinitializer295; CHECK-NEXT: [[TMP9:%.*]] = bitcast <8 x bfloat> [[TMP5]] to <8 x i16>296; CHECK-NEXT: [[TMP10:%.*]] = xor <8 x i16> [[TMP9]], zeroinitializer297; CHECK-NEXT: [[TMP11:%.*]] = or <8 x i16> [[TMP10]], zeroinitializer298; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i16> [[TMP11]], zeroinitializer299; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP6]], <8 x i16> [[TMP12]], <8 x i16> [[TMP8]]300; CHECK-NEXT: [[TMP13:%.*]] = select <8 x i1> [[TMP7]], <8 x bfloat> [[TMP5]], <8 x bfloat> zeroinitializer301; CHECK-NEXT: [[TMP14:%.*]] = bitcast <8 x i16> [[_MSPROP_SELECT]] to <2 x i64>302; CHECK-NEXT: [[TMP15:%.*]] = bitcast <8 x bfloat> [[TMP13]] to <2 x i64>303; CHECK-NEXT: store <2 x i64> [[TMP14]], ptr @__msan_retval_tls, align 8304; CHECK-NEXT: ret <2 x i64> [[TMP15]]305;306entry:307 %0 = tail call <8 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.256(<8 x float> %A) #4308 %1 = bitcast i8 %U to <8 x i1>309 %2 = select <8 x i1> %1, <8 x bfloat> %0, <8 x bfloat> zeroinitializer310 %3 = bitcast <8 x bfloat> %2 to <2 x i64>311 ret <2 x i64> %3312}313 314define <2 x i64> @test_mm256_mask_cvtneps2bf16_256(<2 x i64> %C, i8 zeroext %U, <8 x float> %A) local_unnamed_addr #2 sanitize_memory {315; CHECK-LABEL: define <2 x i64> @test_mm256_mask_cvtneps2bf16_256(316; CHECK-SAME: <2 x i64> [[C:%.*]], i8 zeroext [[U:%.*]], <8 x float> [[A:%.*]]) local_unnamed_addr #[[ATTR1]] {317; CHECK-NEXT: [[ENTRY:.*:]]318; CHECK-NEXT: [[TMP0:%.*]] = load <8 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 8319; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr @__msan_param_tls, align 8320; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8321; CHECK-NEXT: call void @llvm.donothing()322; CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i32> [[TMP0]] to i256323; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP3]], 0324; CHECK-NEXT: br i1 [[_MSCMP]], label %[[BB4:.*]], label %[[BB5:.*]], !prof [[PROF1]]325; CHECK: [[BB4]]:326; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR5]]327; CHECK-NEXT: unreachable328; CHECK: [[BB5]]:329; CHECK-NEXT: [[TMP6:%.*]] = tail call <8 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.256(<8 x float> [[A]])330; CHECK-NEXT: [[TMP7:%.*]] = bitcast <2 x i64> [[TMP1]] to <8 x i16>331; CHECK-NEXT: [[TMP8:%.*]] = bitcast <2 x i64> [[C]] to <8 x bfloat>332; CHECK-NEXT: [[TMP9:%.*]] = bitcast i8 [[TMP2]] to <8 x i1>333; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[U]] to <8 x i1>334; CHECK-NEXT: [[TMP11:%.*]] = select <8 x i1> [[TMP10]], <8 x i16> zeroinitializer, <8 x i16> [[TMP7]]335; CHECK-NEXT: [[TMP12:%.*]] = bitcast <8 x bfloat> [[TMP6]] to <8 x i16>336; CHECK-NEXT: [[TMP13:%.*]] = bitcast <8 x bfloat> [[TMP8]] to <8 x i16>337; CHECK-NEXT: [[TMP14:%.*]] = xor <8 x i16> [[TMP12]], [[TMP13]]338; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i16> [[TMP14]], zeroinitializer339; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i16> [[TMP15]], [[TMP7]]340; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP9]], <8 x i16> [[TMP16]], <8 x i16> [[TMP11]]341; CHECK-NEXT: [[TMP17:%.*]] = select <8 x i1> [[TMP10]], <8 x bfloat> [[TMP6]], <8 x bfloat> [[TMP8]]342; CHECK-NEXT: [[TMP18:%.*]] = bitcast <8 x i16> [[_MSPROP_SELECT]] to <2 x i64>343; CHECK-NEXT: [[TMP19:%.*]] = bitcast <8 x bfloat> [[TMP17]] to <2 x i64>344; CHECK-NEXT: store <2 x i64> [[TMP18]], ptr @__msan_retval_tls, align 8345; CHECK-NEXT: ret <2 x i64> [[TMP19]]346;347entry:348 %0 = tail call <8 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.256(<8 x float> %A) #4349 %1 = bitcast <2 x i64> %C to <8 x bfloat>350 %2 = bitcast i8 %U to <8 x i1>351 %3 = select <8 x i1> %2, <8 x bfloat> %0, <8 x bfloat> %1352 %4 = bitcast <8 x bfloat> %3 to <2 x i64>353 ret <2 x i64> %4354}355 356declare <8 x bfloat> @llvm.x86.avx512bf16.mask.cvtneps2bf16.128(<4 x float>, <8 x bfloat>, <4 x i1>) #3357 358define <2 x i64> @test_mm128_cvtneps2bf16_128(<4 x float> %A) local_unnamed_addr #2 sanitize_memory {359; CHECK-LABEL: define <2 x i64> @test_mm128_cvtneps2bf16_128(360; CHECK-SAME: <4 x float> [[A:%.*]]) local_unnamed_addr #[[ATTR1]] {361; CHECK-NEXT: [[ENTRY:.*:]]362; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 8363; CHECK-NEXT: call void @llvm.donothing()364; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR5]]365; CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x bfloat> @llvm.x86.avx512bf16.mask.cvtneps2bf16.128(<4 x float> [[A]], <8 x bfloat> poison, <4 x i1> splat (i1 true))366; CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x bfloat> [[TMP1]] to <2 x i64>367; CHECK-NEXT: store <2 x i64> zeroinitializer, ptr @__msan_retval_tls, align 8368; CHECK-NEXT: ret <2 x i64> [[TMP2]]369;370entry:371 %0 = tail call <8 x bfloat> @llvm.x86.avx512bf16.mask.cvtneps2bf16.128(<4 x float> %A, <8 x bfloat> poison, <4 x i1> <i1 true, i1 true, i1 true, i1 true>) #4372 %1 = bitcast <8 x bfloat> %0 to <2 x i64>373 ret <2 x i64> %1374}375 376define <2 x i64> @test_mm128_maskz_cvtneps2bf16_128(<4 x float> %A, i8 zeroext %U) local_unnamed_addr #2 sanitize_memory {377; CHECK-LABEL: define <2 x i64> @test_mm128_maskz_cvtneps2bf16_128(378; CHECK-SAME: <4 x float> [[A:%.*]], i8 zeroext [[U:%.*]]) local_unnamed_addr #[[ATTR1]] {379; CHECK-NEXT: [[ENTRY:.*:]]380; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8381; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 8382; CHECK-NEXT: call void @llvm.donothing()383; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8 [[TMP0]] to <8 x i1>384; CHECK-NEXT: [[TMP3:%.*]] = bitcast i8 [[U]] to <8 x i1>385; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i1> [[TMP2]], <8 x i1> splat (i1 true), <4 x i32> <i32 0, i32 1, i32 2, i32 3>386; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <8 x i1> [[TMP3]], <8 x i1> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>387; CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i32> [[TMP1]] to i128388; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i128 [[TMP5]], 0389; CHECK-NEXT: [[TMP6:%.*]] = bitcast <4 x i1> [[_MSPROP]] to i4390; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i4 [[TMP6]], 0391; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]392; CHECK-NEXT: br i1 [[_MSOR]], label %[[BB7:.*]], label %[[BB8:.*]], !prof [[PROF1]]393; CHECK: [[BB7]]:394; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR5]]395; CHECK-NEXT: unreachable396; CHECK: [[BB8]]:397; CHECK-NEXT: [[TMP9:%.*]] = tail call <8 x bfloat> @llvm.x86.avx512bf16.mask.cvtneps2bf16.128(<4 x float> [[A]], <8 x bfloat> zeroinitializer, <4 x i1> [[TMP4]])398; CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x bfloat> [[TMP9]] to <2 x i64>399; CHECK-NEXT: store <2 x i64> zeroinitializer, ptr @__msan_retval_tls, align 8400; CHECK-NEXT: ret <2 x i64> [[TMP10]]401;402entry:403 %0 = bitcast i8 %U to <8 x i1>404 %1 = shufflevector <8 x i1> %0, <8 x i1> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>405 %2 = tail call <8 x bfloat> @llvm.x86.avx512bf16.mask.cvtneps2bf16.128(<4 x float> %A, <8 x bfloat> zeroinitializer, <4 x i1> %1) #4406 %3 = bitcast <8 x bfloat> %2 to <2 x i64>407 ret <2 x i64> %3408}409 410define <2 x i64> @test_mm128_mask_cvtneps2bf16_128(<2 x i64> %C, i8 zeroext %U, <4 x float> %A) local_unnamed_addr #2 sanitize_memory {411; CHECK-LABEL: define <2 x i64> @test_mm128_mask_cvtneps2bf16_128(412; CHECK-SAME: <2 x i64> [[C:%.*]], i8 zeroext [[U:%.*]], <4 x float> [[A:%.*]]) local_unnamed_addr #[[ATTR1]] {413; CHECK-NEXT: [[ENTRY:.*:]]414; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8415; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr @__msan_param_tls, align 8416; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 8417; CHECK-NEXT: call void @llvm.donothing()418; CHECK-NEXT: [[TMP3:%.*]] = bitcast i8 [[TMP0]] to <8 x i1>419; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8 [[U]] to <8 x i1>420; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <8 x i1> [[TMP3]], <8 x i1> splat (i1 true), <4 x i32> <i32 0, i32 1, i32 2, i32 3>421; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <8 x i1> [[TMP4]], <8 x i1> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>422; CHECK-NEXT: [[TMP6:%.*]] = bitcast <2 x i64> [[TMP1]] to <8 x i16>423; CHECK-NEXT: [[TMP7:%.*]] = bitcast <2 x i64> [[C]] to <8 x bfloat>424; CHECK-NEXT: [[TMP8:%.*]] = bitcast <4 x i32> [[TMP2]] to i128425; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i128 [[TMP8]], 0426; CHECK-NEXT: [[TMP9:%.*]] = bitcast <8 x i16> [[TMP6]] to i128427; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i128 [[TMP9]], 0428; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]429; CHECK-NEXT: [[TMP10:%.*]] = bitcast <4 x i1> [[_MSPROP]] to i4430; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i4 [[TMP10]], 0431; CHECK-NEXT: [[_MSOR3:%.*]] = or i1 [[_MSOR]], [[_MSCMP2]]432; CHECK-NEXT: br i1 [[_MSOR3]], label %[[BB11:.*]], label %[[BB12:.*]], !prof [[PROF1]]433; CHECK: [[BB11]]:434; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR5]]435; CHECK-NEXT: unreachable436; CHECK: [[BB12]]:437; CHECK-NEXT: [[TMP13:%.*]] = tail call <8 x bfloat> @llvm.x86.avx512bf16.mask.cvtneps2bf16.128(<4 x float> [[A]], <8 x bfloat> [[TMP7]], <4 x i1> [[TMP5]])438; CHECK-NEXT: [[TMP14:%.*]] = bitcast <8 x bfloat> [[TMP13]] to <2 x i64>439; CHECK-NEXT: store <2 x i64> zeroinitializer, ptr @__msan_retval_tls, align 8440; CHECK-NEXT: ret <2 x i64> [[TMP14]]441;442entry:443 %0 = bitcast i8 %U to <8 x i1>444 %1 = shufflevector <8 x i1> %0, <8 x i1> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>445 %2 = bitcast <2 x i64> %C to <8 x bfloat>446 %3 = tail call <8 x bfloat> @llvm.x86.avx512bf16.mask.cvtneps2bf16.128(<4 x float> %A, <8 x bfloat> %2, <4 x i1> %1) #4447 %4 = bitcast <8 x bfloat> %3 to <2 x i64>448 ret <2 x i64> %4449}450 451define <2 x i64> @test_mm128_cvtneps2bf16_128_select(<2 x i64> %C, i8 zeroext %U, <4 x float> %A) local_unnamed_addr #2 sanitize_memory {452; CHECK-LABEL: define <2 x i64> @test_mm128_cvtneps2bf16_128_select(453; CHECK-SAME: <2 x i64> [[C:%.*]], i8 zeroext [[U:%.*]], <4 x float> [[A:%.*]]) local_unnamed_addr #[[ATTR1]] {454; CHECK-NEXT: [[ENTRY:.*:]]455; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8456; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr @__msan_param_tls, align 8457; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 8458; CHECK-NEXT: call void @llvm.donothing()459; CHECK-NEXT: [[TMP3:%.*]] = bitcast i8 [[TMP0]] to <8 x i1>460; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8 [[U]] to <8 x i1>461; CHECK-NEXT: [[TMP5:%.*]] = bitcast <2 x i64> [[TMP1]] to <8 x i16>462; CHECK-NEXT: [[TMP6:%.*]] = bitcast <2 x i64> [[C]] to <8 x bfloat>463; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR5]]464; CHECK-NEXT: [[TMP7:%.*]] = tail call <8 x bfloat> @llvm.x86.avx512bf16.mask.cvtneps2bf16.128(<4 x float> [[A]], <8 x bfloat> poison, <4 x i1> splat (i1 true))465; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP4]], <8 x i16> zeroinitializer, <8 x i16> [[TMP5]]466; CHECK-NEXT: [[TMP9:%.*]] = bitcast <8 x bfloat> [[TMP7]] to <8 x i16>467; CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x bfloat> [[TMP6]] to <8 x i16>468; CHECK-NEXT: [[TMP11:%.*]] = xor <8 x i16> [[TMP9]], [[TMP10]]469; CHECK-NEXT: [[TMP12:%.*]] = or <8 x i16> [[TMP11]], zeroinitializer470; CHECK-NEXT: [[TMP13:%.*]] = or <8 x i16> [[TMP12]], [[TMP5]]471; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP3]], <8 x i16> [[TMP13]], <8 x i16> [[TMP8]]472; CHECK-NEXT: [[TMP14:%.*]] = select <8 x i1> [[TMP4]], <8 x bfloat> [[TMP7]], <8 x bfloat> [[TMP6]]473; CHECK-NEXT: [[TMP15:%.*]] = bitcast <8 x i16> [[_MSPROP_SELECT]] to <2 x i64>474; CHECK-NEXT: [[TMP16:%.*]] = bitcast <8 x bfloat> [[TMP14]] to <2 x i64>475; CHECK-NEXT: store <2 x i64> [[TMP15]], ptr @__msan_retval_tls, align 8476; CHECK-NEXT: ret <2 x i64> [[TMP16]]477;478entry:479 %0 = bitcast i8 %U to <8 x i1>480 %1 = bitcast <2 x i64> %C to <8 x bfloat>481 %2 = tail call <8 x bfloat> @llvm.x86.avx512bf16.mask.cvtneps2bf16.128(<4 x float> %A, <8 x bfloat> poison, <4 x i1> <i1 true, i1 true, i1 true, i1 true>) #4482 %3 = select <8 x i1> %0, <8 x bfloat> %2, <8 x bfloat> %1483 %4 = bitcast <8 x bfloat> %3 to <2 x i64>484 ret <2 x i64> %4485}486 487declare <8 x float> @llvm.x86.avx512bf16.dpbf16ps.256(<8 x float>, <16 x bfloat>, <16 x bfloat>) #3488 489define <8 x float> @test_mm256_dpbf16ps_256(<8 x float> %E, <16 x bfloat> %A, <16 x bfloat> %B) local_unnamed_addr #2 sanitize_memory {490; CHECK-LABEL: define <8 x float> @test_mm256_dpbf16ps_256(491; CHECK-SAME: <8 x float> [[E:%.*]], <16 x bfloat> [[A:%.*]], <16 x bfloat> [[B:%.*]]) local_unnamed_addr #[[ATTR1]] {492; CHECK-NEXT: [[ENTRY:.*:]]493; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 8494; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8495; CHECK-NEXT: [[TMP11:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 8496; CHECK-NEXT: call void @llvm.donothing()497; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <16 x i16> [[TMP1]], zeroinitializer498; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <16 x i16> [[TMP2]], zeroinitializer499; CHECK-NEXT: [[TMP5:%.*]] = or <16 x i1> [[TMP3]], [[TMP4]]500; CHECK-NEXT: [[TMP6:%.*]] = sext <16 x i1> [[TMP5]] to <16 x i16>501; CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i16> [[TMP6]] to <8 x i32>502; CHECK-NEXT: [[TMP12:%.*]] = icmp ne <8 x i32> [[TMP7]], zeroinitializer503; CHECK-NEXT: [[TMP9:%.*]] = sext <8 x i1> [[TMP12]] to <8 x i32>504; CHECK-NEXT: [[TMP10:%.*]] = or <8 x i32> [[TMP9]], [[TMP11]]505; CHECK-NEXT: [[TMP8:%.*]] = tail call <8 x float> @llvm.x86.avx512bf16.dpbf16ps.256(<8 x float> [[E]], <16 x bfloat> [[A]], <16 x bfloat> [[B]])506; CHECK-NEXT: store <8 x i32> [[TMP10]], ptr @__msan_retval_tls, align 8507; CHECK-NEXT: ret <8 x float> [[TMP8]]508;509entry:510 %0 = tail call <8 x float> @llvm.x86.avx512bf16.dpbf16ps.256(<8 x float> %E, <16 x bfloat> %A, <16 x bfloat> %B) #4511 ret <8 x float> %0512}513 514define <8 x float> @test_mm256_maskz_dpbf16ps_256(<8 x float> %E, <16 x bfloat> %A, <16 x bfloat> %B, i8 zeroext %U) local_unnamed_addr #2 sanitize_memory {515; CHECK-LABEL: define <8 x float> @test_mm256_maskz_dpbf16ps_256(516; CHECK-SAME: <8 x float> [[E:%.*]], <16 x bfloat> [[A:%.*]], <16 x bfloat> [[B:%.*]], i8 zeroext [[U:%.*]]) local_unnamed_addr #[[ATTR1]] {517; CHECK-NEXT: [[ENTRY:.*:]]518; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 8519; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8520; CHECK-NEXT: [[TMP18:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 8521; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 96), align 8522; CHECK-NEXT: call void @llvm.donothing()523; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <16 x i16> [[TMP1]], zeroinitializer524; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <16 x i16> [[TMP2]], zeroinitializer525; CHECK-NEXT: [[TMP6:%.*]] = or <16 x i1> [[TMP4]], [[TMP5]]526; CHECK-NEXT: [[TMP7:%.*]] = sext <16 x i1> [[TMP6]] to <16 x i16>527; CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i16> [[TMP7]] to <8 x i32>528; CHECK-NEXT: [[TMP19:%.*]] = icmp ne <8 x i32> [[TMP8]], zeroinitializer529; CHECK-NEXT: [[TMP20:%.*]] = sext <8 x i1> [[TMP19]] to <8 x i32>530; CHECK-NEXT: [[TMP21:%.*]] = or <8 x i32> [[TMP20]], [[TMP18]]531; CHECK-NEXT: [[TMP9:%.*]] = tail call <8 x float> @llvm.x86.avx512bf16.dpbf16ps.256(<8 x float> [[E]], <16 x bfloat> [[A]], <16 x bfloat> [[B]])532; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>533; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[U]] to <8 x i1>534; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP11]], <8 x i32> [[TMP21]], <8 x i32> zeroinitializer535; CHECK-NEXT: [[TMP13:%.*]] = bitcast <8 x float> [[TMP9]] to <8 x i32>536; CHECK-NEXT: [[TMP14:%.*]] = xor <8 x i32> [[TMP13]], zeroinitializer537; CHECK-NEXT: [[TMP15:%.*]] = or <8 x i32> [[TMP14]], [[TMP21]]538; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i32> [[TMP15]], zeroinitializer539; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP10]], <8 x i32> [[TMP16]], <8 x i32> [[TMP12]]540; CHECK-NEXT: [[TMP17:%.*]] = select <8 x i1> [[TMP11]], <8 x float> [[TMP9]], <8 x float> zeroinitializer541; CHECK-NEXT: store <8 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8542; CHECK-NEXT: ret <8 x float> [[TMP17]]543;544entry:545 %0 = tail call <8 x float> @llvm.x86.avx512bf16.dpbf16ps.256(<8 x float> %E, <16 x bfloat> %A, <16 x bfloat> %B) #4546 %1 = bitcast i8 %U to <8 x i1>547 %2 = select <8 x i1> %1, <8 x float> %0, <8 x float> zeroinitializer548 ret <8 x float> %2549}550define <8 x float> @test_mm256_mask_dpbf16ps_256(i8 zeroext %U, <8 x float> %E, <16 x bfloat> %A, <16 x bfloat> %B) local_unnamed_addr #2 sanitize_memory {551; CHECK-LABEL: define <8 x float> @test_mm256_mask_dpbf16ps_256(552; CHECK-SAME: i8 zeroext [[U:%.*]], <8 x float> [[E:%.*]], <16 x bfloat> [[A:%.*]], <16 x bfloat> [[B:%.*]]) local_unnamed_addr #[[ATTR1]] {553; CHECK-NEXT: [[ENTRY:.*:]]554; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 40), align 8555; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 8556; CHECK-NEXT: [[TMP0:%.*]] = load <8 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8557; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr @__msan_param_tls, align 8558; CHECK-NEXT: call void @llvm.donothing()559; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <16 x i16> [[TMP1]], zeroinitializer560; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <16 x i16> [[TMP2]], zeroinitializer561; CHECK-NEXT: [[TMP6:%.*]] = or <16 x i1> [[TMP4]], [[TMP5]]562; CHECK-NEXT: [[TMP7:%.*]] = sext <16 x i1> [[TMP6]] to <16 x i16>563; CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i16> [[TMP7]] to <8 x i32>564; CHECK-NEXT: [[TMP19:%.*]] = icmp ne <8 x i32> [[TMP8]], zeroinitializer565; CHECK-NEXT: [[TMP20:%.*]] = sext <8 x i1> [[TMP19]] to <8 x i32>566; CHECK-NEXT: [[TMP21:%.*]] = or <8 x i32> [[TMP20]], [[TMP0]]567; CHECK-NEXT: [[TMP9:%.*]] = tail call <8 x float> @llvm.x86.avx512bf16.dpbf16ps.256(<8 x float> [[E]], <16 x bfloat> [[A]], <16 x bfloat> [[B]])568; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8 [[TMP3]] to <8 x i1>569; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8 [[U]] to <8 x i1>570; CHECK-NEXT: [[TMP12:%.*]] = select <8 x i1> [[TMP11]], <8 x i32> [[TMP21]], <8 x i32> [[TMP0]]571; CHECK-NEXT: [[TMP13:%.*]] = bitcast <8 x float> [[TMP9]] to <8 x i32>572; CHECK-NEXT: [[TMP14:%.*]] = bitcast <8 x float> [[E]] to <8 x i32>573; CHECK-NEXT: [[TMP15:%.*]] = xor <8 x i32> [[TMP13]], [[TMP14]]574; CHECK-NEXT: [[TMP16:%.*]] = or <8 x i32> [[TMP15]], [[TMP21]]575; CHECK-NEXT: [[TMP17:%.*]] = or <8 x i32> [[TMP16]], [[TMP0]]576; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP10]], <8 x i32> [[TMP17]], <8 x i32> [[TMP12]]577; CHECK-NEXT: [[TMP18:%.*]] = select <8 x i1> [[TMP11]], <8 x float> [[TMP9]], <8 x float> [[E]]578; CHECK-NEXT: store <8 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8579; CHECK-NEXT: ret <8 x float> [[TMP18]]580;581entry:582 %0 = tail call <8 x float> @llvm.x86.avx512bf16.dpbf16ps.256(<8 x float> %E, <16 x bfloat> %A, <16 x bfloat> %B) #4583 %1 = bitcast i8 %U to <8 x i1>584 %2 = select <8 x i1> %1, <8 x float> %0, <8 x float> %E585 ret <8 x float> %2586}587 588declare <4 x float> @llvm.x86.avx512bf16.dpbf16ps.128(<4 x float>, <8 x bfloat>, <8 x bfloat>) #3589 590define <4 x float> @test_mm128_dpbf16ps_128(<4 x float> %E, <8 x bfloat> %A, <8 x bfloat> %B) local_unnamed_addr #2 sanitize_memory {591; CHECK-LABEL: define <4 x float> @test_mm128_dpbf16ps_128(592; CHECK-SAME: <4 x float> [[E:%.*]], <8 x bfloat> [[A:%.*]], <8 x bfloat> [[B:%.*]]) local_unnamed_addr #[[ATTR1]] {593; CHECK-NEXT: [[ENTRY:.*:]]594; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8595; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 8596; CHECK-NEXT: [[TMP11:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 8597; CHECK-NEXT: call void @llvm.donothing()598; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <8 x i16> [[TMP1]], zeroinitializer599; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <8 x i16> [[TMP2]], zeroinitializer600; CHECK-NEXT: [[TMP5:%.*]] = or <8 x i1> [[TMP3]], [[TMP4]]601; CHECK-NEXT: [[TMP6:%.*]] = sext <8 x i1> [[TMP5]] to <8 x i16>602; CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i16> [[TMP6]] to <4 x i32>603; CHECK-NEXT: [[TMP12:%.*]] = icmp ne <4 x i32> [[TMP7]], zeroinitializer604; CHECK-NEXT: [[TMP9:%.*]] = sext <4 x i1> [[TMP12]] to <4 x i32>605; CHECK-NEXT: [[TMP10:%.*]] = or <4 x i32> [[TMP9]], [[TMP11]]606; CHECK-NEXT: [[TMP8:%.*]] = tail call <4 x float> @llvm.x86.avx512bf16.dpbf16ps.128(<4 x float> [[E]], <8 x bfloat> [[A]], <8 x bfloat> [[B]])607; CHECK-NEXT: store <4 x i32> [[TMP10]], ptr @__msan_retval_tls, align 8608; CHECK-NEXT: ret <4 x float> [[TMP8]]609;610entry:611 %0 = tail call <4 x float> @llvm.x86.avx512bf16.dpbf16ps.128(<4 x float> %E, <8 x bfloat> %A, <8 x bfloat> %B) #4612 ret <4 x float> %0613}614 615define <4 x float> @test_mm128_maskz_dpbf16ps_128(<4 x float> %E, <8 x bfloat> %A, <8 x bfloat> %B, i4 zeroext %U) local_unnamed_addr #2 sanitize_memory {616; CHECK-LABEL: define <4 x float> @test_mm128_maskz_dpbf16ps_128(617; CHECK-SAME: <4 x float> [[E:%.*]], <8 x bfloat> [[A:%.*]], <8 x bfloat> [[B:%.*]], i4 zeroext [[U:%.*]]) local_unnamed_addr #[[ATTR1]] {618; CHECK-NEXT: [[ENTRY:.*:]]619; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8620; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 8621; CHECK-NEXT: [[TMP18:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 8622; CHECK-NEXT: [[TMP3:%.*]] = load i4, ptr getelementptr (i8, ptr @__msan_param_tls, i64 48), align 8623; CHECK-NEXT: call void @llvm.donothing()624; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <8 x i16> [[TMP1]], zeroinitializer625; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <8 x i16> [[TMP2]], zeroinitializer626; CHECK-NEXT: [[TMP6:%.*]] = or <8 x i1> [[TMP4]], [[TMP5]]627; CHECK-NEXT: [[TMP7:%.*]] = sext <8 x i1> [[TMP6]] to <8 x i16>628; CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x i16> [[TMP7]] to <4 x i32>629; CHECK-NEXT: [[TMP19:%.*]] = icmp ne <4 x i32> [[TMP8]], zeroinitializer630; CHECK-NEXT: [[TMP20:%.*]] = sext <4 x i1> [[TMP19]] to <4 x i32>631; CHECK-NEXT: [[TMP21:%.*]] = or <4 x i32> [[TMP20]], [[TMP18]]632; CHECK-NEXT: [[TMP9:%.*]] = tail call <4 x float> @llvm.x86.avx512bf16.dpbf16ps.128(<4 x float> [[E]], <8 x bfloat> [[A]], <8 x bfloat> [[B]])633; CHECK-NEXT: [[TMP10:%.*]] = bitcast i4 [[TMP3]] to <4 x i1>634; CHECK-NEXT: [[TMP11:%.*]] = bitcast i4 [[U]] to <4 x i1>635; CHECK-NEXT: [[TMP12:%.*]] = select <4 x i1> [[TMP11]], <4 x i32> [[TMP21]], <4 x i32> zeroinitializer636; CHECK-NEXT: [[TMP13:%.*]] = bitcast <4 x float> [[TMP9]] to <4 x i32>637; CHECK-NEXT: [[TMP14:%.*]] = xor <4 x i32> [[TMP13]], zeroinitializer638; CHECK-NEXT: [[TMP15:%.*]] = or <4 x i32> [[TMP14]], [[TMP21]]639; CHECK-NEXT: [[TMP16:%.*]] = or <4 x i32> [[TMP15]], zeroinitializer640; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <4 x i1> [[TMP10]], <4 x i32> [[TMP16]], <4 x i32> [[TMP12]]641; CHECK-NEXT: [[TMP17:%.*]] = select <4 x i1> [[TMP11]], <4 x float> [[TMP9]], <4 x float> zeroinitializer642; CHECK-NEXT: store <4 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8643; CHECK-NEXT: ret <4 x float> [[TMP17]]644;645entry:646 %0 = tail call <4 x float> @llvm.x86.avx512bf16.dpbf16ps.128(<4 x float> %E, <8 x bfloat> %A, <8 x bfloat> %B) #4647 %1 = bitcast i4 %U to <4 x i1>648 %2 = select <4 x i1> %1, <4 x float> %0, <4 x float> zeroinitializer649 ret <4 x float> %2650}651define <4 x float> @test_mm128_mask_dpbf16ps_128(i4 zeroext %U, <4 x float> %E, <8 x bfloat> %A, <8 x bfloat> %B) local_unnamed_addr #2 sanitize_memory {652; CHECK-LABEL: define <4 x float> @test_mm128_mask_dpbf16ps_128(653; CHECK-SAME: i4 zeroext [[U:%.*]], <4 x float> [[E:%.*]], <8 x bfloat> [[A:%.*]], <8 x bfloat> [[B:%.*]]) local_unnamed_addr #[[ATTR1]] {654; CHECK-NEXT: [[ENTRY:.*:]]655; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 8656; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 40), align 8657; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8658; CHECK-NEXT: [[TMP3:%.*]] = load i4, ptr @__msan_param_tls, align 8659; CHECK-NEXT: call void @llvm.donothing()660; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <8 x i16> [[TMP1]], zeroinitializer661; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <8 x i16> [[TMP2]], zeroinitializer662; CHECK-NEXT: [[TMP6:%.*]] = or <8 x i1> [[TMP4]], [[TMP5]]663; CHECK-NEXT: [[TMP7:%.*]] = sext <8 x i1> [[TMP6]] to <8 x i16>664; CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x i16> [[TMP7]] to <4 x i32>665; CHECK-NEXT: [[TMP19:%.*]] = icmp ne <4 x i32> [[TMP8]], zeroinitializer666; CHECK-NEXT: [[TMP20:%.*]] = sext <4 x i1> [[TMP19]] to <4 x i32>667; CHECK-NEXT: [[TMP21:%.*]] = or <4 x i32> [[TMP20]], [[TMP0]]668; CHECK-NEXT: [[TMP9:%.*]] = tail call <4 x float> @llvm.x86.avx512bf16.dpbf16ps.128(<4 x float> [[E]], <8 x bfloat> [[A]], <8 x bfloat> [[B]])669; CHECK-NEXT: [[TMP10:%.*]] = bitcast i4 [[TMP3]] to <4 x i1>670; CHECK-NEXT: [[TMP11:%.*]] = bitcast i4 [[U]] to <4 x i1>671; CHECK-NEXT: [[TMP12:%.*]] = select <4 x i1> [[TMP11]], <4 x i32> [[TMP21]], <4 x i32> [[TMP0]]672; CHECK-NEXT: [[TMP13:%.*]] = bitcast <4 x float> [[TMP9]] to <4 x i32>673; CHECK-NEXT: [[TMP14:%.*]] = bitcast <4 x float> [[E]] to <4 x i32>674; CHECK-NEXT: [[TMP15:%.*]] = xor <4 x i32> [[TMP13]], [[TMP14]]675; CHECK-NEXT: [[TMP16:%.*]] = or <4 x i32> [[TMP15]], [[TMP21]]676; CHECK-NEXT: [[TMP17:%.*]] = or <4 x i32> [[TMP16]], [[TMP0]]677; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <4 x i1> [[TMP10]], <4 x i32> [[TMP17]], <4 x i32> [[TMP12]]678; CHECK-NEXT: [[TMP18:%.*]] = select <4 x i1> [[TMP11]], <4 x float> [[TMP9]], <4 x float> [[E]]679; CHECK-NEXT: store <4 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8680; CHECK-NEXT: ret <4 x float> [[TMP18]]681;682entry:683 %0 = tail call <4 x float> @llvm.x86.avx512bf16.dpbf16ps.128(<4 x float> %E, <8 x bfloat> %A, <8 x bfloat> %B) #4684 %1 = bitcast i4 %U to <4 x i1>685 %2 = select <4 x i1> %1, <4 x float> %0, <4 x float> %E686 ret <4 x float> %2687}688 689define <16 x i16> @test_no_vbroadcast1() sanitize_memory {690; CHECK-LABEL: define <16 x i16> @test_no_vbroadcast1(691; CHECK-SAME: ) #[[ATTR1]] {692; CHECK-NEXT: [[ENTRY:.*:]]693; CHECK-NEXT: call void @llvm.donothing()694; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR5]]695; CHECK-NEXT: [[TMP0:%.*]] = tail call <8 x bfloat> @llvm.x86.avx512bf16.mask.cvtneps2bf16.128(<4 x float> poison, <8 x bfloat> zeroinitializer, <4 x i1> splat (i1 true))696; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x bfloat> [[TMP0]] to <8 x i16>697; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x i16> [[TMP1]], <8 x i16> poison, <16 x i32> zeroinitializer698; CHECK-NEXT: store <16 x i16> zeroinitializer, ptr @__msan_retval_tls, align 8699; CHECK-NEXT: ret <16 x i16> [[TMP2]]700;701entry:702 %0 = tail call <8 x bfloat> @llvm.x86.avx512bf16.mask.cvtneps2bf16.128(<4 x float> poison, <8 x bfloat> zeroinitializer, <4 x i1> <i1 true, i1 true, i1 true, i1 true>)703 %1 = bitcast <8 x bfloat> %0 to <8 x i16>704 %2 = shufflevector <8 x i16> %1, <8 x i16> poison, <16 x i32> zeroinitializer705 ret <16 x i16> %2706}707 708define <16 x bfloat> @test_no_vbroadcast2() nounwind sanitize_memory {709; CHECK-LABEL: define <16 x bfloat> @test_no_vbroadcast2(710; CHECK-SAME: ) #[[ATTR2:[0-9]+]] {711; CHECK-NEXT: [[ENTRY:.*:]]712; CHECK-NEXT: call void @llvm.donothing()713; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR5]]714; CHECK-NEXT: [[TMP0:%.*]] = tail call <8 x bfloat> @llvm.x86.avx512bf16.mask.cvtneps2bf16.128(<4 x float> poison, <8 x bfloat> zeroinitializer, <4 x i1> splat (i1 true))715; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x bfloat> [[TMP0]], <8 x bfloat> poison, <16 x i32> zeroinitializer716; CHECK-NEXT: store <16 x i16> zeroinitializer, ptr @__msan_retval_tls, align 8717; CHECK-NEXT: ret <16 x bfloat> [[TMP1]]718;719entry:720 %0 = tail call <8 x bfloat> @llvm.x86.avx512bf16.mask.cvtneps2bf16.128(<4 x float> poison, <8 x bfloat> zeroinitializer, <4 x i1> <i1 true, i1 true, i1 true, i1 true>)721 %1 = shufflevector <8 x bfloat> %0, <8 x bfloat> poison, <16 x i32> zeroinitializer722 ret <16 x bfloat> %1723}724 725define <16 x i32> @pr83358() sanitize_memory {726; CHECK-LABEL: define <16 x i32> @pr83358(727; CHECK-SAME: ) #[[ATTR1]] {728; CHECK-NEXT: call void @llvm.donothing()729; CHECK-NEXT: [[TMP1:%.*]] = call <8 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.256(<8 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00, float 5.000000e+00, float 6.000000e+00, float 7.000000e+00, float 8.000000e+00>)730; CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x bfloat> [[TMP1]] to <4 x i32>731; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>732; CHECK-NEXT: store <16 x i32> zeroinitializer, ptr @__msan_retval_tls, align 8733; CHECK-NEXT: ret <16 x i32> [[TMP3]]734;735 %1 = call <8 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.256(<8 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00, float 5.000000e+00, float 6.000000e+00, float 7.000000e+00, float 8.000000e+00>)736 %2 = bitcast <8 x bfloat> %1 to <4 x i32>737 %3 = shufflevector <4 x i32> %2, <4 x i32> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>738 ret <16 x i32> %3739}740;.741; CHECK: [[PROF1]] = !{!"branch_weights", i32 1, i32 1048575}742;.743