7054 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt %s -S -mattr=+avx512f -passes=msan 2>&1 | FileCheck %s3;4; Forked from llvm/test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll5;6; Strictly handled:7; - llvm.x86.avx512.dbpsadbw.5128;9; Heuristically handled:10; - llvm.sadd.sat.v32i16, llvm.sadd.sat.v64i811; - llvm.smax.v32i16, llvm.smax.v64i812; - llvm.smin.v32i16, llvm.smin.v64i813; - llvm.ssub.sat.v32i16, llvm.ssub.sat.v64i814; - llvm.uadd.sat.v32i16, llvm.uadd.sat.v64i815; - llvm.umax.v32i16, llvm.umax.v64i816; - llvm.umin.v32i16, llvm.umin.v64i817; - llvm.usub.sat.v32i16, llvm.usub.sat.v64i818; - llvm.x86.avx512.pavg.b.512, llvm.x86.avx512.pavg.w.51219; - llvm.x86.avx512.permvar.hi.51220; - llvm.x86.avx512.pmul.hr.sw.512, llvm.x86.avx512.pmulhu.w.512, llvm.x86.avx512.pmulh.w.51221; - llvm.x86.avx512.psllv.w.512, llvm.x86.avx512.psrav.w.512, llvm.x86.avx512.psrlv.w.51222 23target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"24target triple = "x86_64-unknown-linux-gnu"25 26declare i32 @llvm.x86.avx512.kunpck.wd(i32, i32)27 28define i32 @test_int_x86_avx512_kunpck_wd(i32 %x0, i32 %x1) nounwind #0 {29; CHECK-LABEL: @test_int_x86_avx512_kunpck_wd(30; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 831; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 832; CHECK-NEXT: call void @llvm.donothing()33; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32 [[TMP1]] to <32 x i1>34; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32 [[X0:%.*]] to <32 x i1>35; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[TMP2]] to <32 x i1>36; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[X1:%.*]] to <32 x i1>37; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <32 x i1> [[TMP3]], <32 x i1> [[TMP3]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>38; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <32 x i1> [[TMP4]], <32 x i1> [[TMP4]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>39; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <32 x i1> [[TMP5]], <32 x i1> [[TMP5]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>40; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <32 x i1> [[TMP6]], <32 x i1> [[TMP6]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>41; CHECK-NEXT: [[_MSPROP2:%.*]] = shufflevector <16 x i1> [[_MSPROP1]], <16 x i1> [[_MSPROP]], <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>42; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <16 x i1> [[TMP8]], <16 x i1> [[TMP7]], <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>43; CHECK-NEXT: [[TMP10:%.*]] = bitcast <32 x i1> [[_MSPROP2]] to i3244; CHECK-NEXT: [[TMP11:%.*]] = bitcast <32 x i1> [[TMP9]] to i3245; CHECK-NEXT: store i32 [[TMP10]], ptr @__msan_retval_tls, align 846; CHECK-NEXT: ret i32 [[TMP11]]47;48 %res = call i32 @llvm.x86.avx512.kunpck.wd(i32 %x0, i32 %x1)49 ret i32 %res50}51 52declare i64 @llvm.x86.avx512.kunpck.dq(i64, i64)53 54define i64 @test_int_x86_avx512_kunpck_qd(i64 %x0, i64 %x1) nounwind #0 {55; CHECK-LABEL: @test_int_x86_avx512_kunpck_qd(56; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 857; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 858; CHECK-NEXT: call void @llvm.donothing()59; CHECK-NEXT: [[TMP3:%.*]] = bitcast i64 [[TMP1]] to <64 x i1>60; CHECK-NEXT: [[TMP4:%.*]] = bitcast i64 [[X0:%.*]] to <64 x i1>61; CHECK-NEXT: [[TMP5:%.*]] = bitcast i64 [[TMP2]] to <64 x i1>62; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[X1:%.*]] to <64 x i1>63; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <64 x i1> [[TMP3]], <64 x i1> [[TMP3]], <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>64; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <64 x i1> [[TMP4]], <64 x i1> [[TMP4]], <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>65; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <64 x i1> [[TMP5]], <64 x i1> [[TMP5]], <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>66; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <64 x i1> [[TMP6]], <64 x i1> [[TMP6]], <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>67; CHECK-NEXT: [[_MSPROP2:%.*]] = shufflevector <32 x i1> [[_MSPROP1]], <32 x i1> [[_MSPROP]], <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>68; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <32 x i1> [[TMP8]], <32 x i1> [[TMP7]], <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>69; CHECK-NEXT: [[TMP10:%.*]] = bitcast <64 x i1> [[_MSPROP2]] to i6470; CHECK-NEXT: [[TMP11:%.*]] = bitcast <64 x i1> [[TMP9]] to i6471; CHECK-NEXT: store i64 [[TMP10]], ptr @__msan_retval_tls, align 872; CHECK-NEXT: ret i64 [[TMP11]]73;74 %res = call i64 @llvm.x86.avx512.kunpck.dq(i64 %x0, i64 %x1)75 ret i64 %res76}77 78declare <64 x i8> @llvm.x86.avx512.mask.pbroadcast.b.gpr.512(i8, <64 x i8>, i64)79 80define { <64 x i8>, <64 x i8>, <64 x i8> } @test_int_x86_avx512_mask_pbroadcast_b_gpr_512(i8 %x0, <64 x i8> %x1, i64 %mask) nounwind #0 {81; CHECK-LABEL: @test_int_x86_avx512_mask_pbroadcast_b_gpr_512(82; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @__msan_param_tls, align 883; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 884; CHECK-NEXT: [[TMP3:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 885; CHECK-NEXT: call void @llvm.donothing()86; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <64 x i8> splat (i8 -1), i8 [[TMP1]], i64 087; CHECK-NEXT: [[DOTSPLATINSERT3:%.*]] = insertelement <64 x i8> poison, i8 [[X0:%.*]], i64 088; CHECK-NEXT: [[_MSPROP5:%.*]] = shufflevector <64 x i8> [[_MSPROP]], <64 x i8> splat (i8 -1), <64 x i32> zeroinitializer89; CHECK-NEXT: [[DOTSPLAT4:%.*]] = shufflevector <64 x i8> [[DOTSPLATINSERT3]], <64 x i8> poison, <64 x i32> zeroinitializer90; CHECK-NEXT: [[_MSPROP6:%.*]] = insertelement <64 x i8> splat (i8 -1), i8 [[TMP1]], i64 091; CHECK-NEXT: [[DOTSPLATINSERT1:%.*]] = insertelement <64 x i8> poison, i8 [[X0]], i64 092; CHECK-NEXT: [[_MSPROP7:%.*]] = shufflevector <64 x i8> [[_MSPROP6]], <64 x i8> splat (i8 -1), <64 x i32> zeroinitializer93; CHECK-NEXT: [[DOTSPLAT2:%.*]] = shufflevector <64 x i8> [[DOTSPLATINSERT1]], <64 x i8> poison, <64 x i32> zeroinitializer94; CHECK-NEXT: [[TMP4:%.*]] = bitcast i64 [[TMP2]] to <64 x i1>95; CHECK-NEXT: [[TMP5:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>96; CHECK-NEXT: [[TMP6:%.*]] = select <64 x i1> [[TMP5]], <64 x i8> [[_MSPROP7]], <64 x i8> [[TMP3]]97; CHECK-NEXT: [[TMP7:%.*]] = xor <64 x i8> [[DOTSPLAT2]], [[X1:%.*]]98; CHECK-NEXT: [[TMP8:%.*]] = or <64 x i8> [[TMP7]], [[_MSPROP7]]99; CHECK-NEXT: [[TMP9:%.*]] = or <64 x i8> [[TMP8]], [[TMP3]]100; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP4]], <64 x i8> [[TMP9]], <64 x i8> [[TMP6]]101; CHECK-NEXT: [[TMP10:%.*]] = select <64 x i1> [[TMP5]], <64 x i8> [[DOTSPLAT2]], <64 x i8> [[X1]]102; CHECK-NEXT: [[_MSPROP8:%.*]] = insertelement <64 x i8> splat (i8 -1), i8 [[TMP1]], i64 0103; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <64 x i8> poison, i8 [[X0]], i64 0104; CHECK-NEXT: [[_MSPROP9:%.*]] = shufflevector <64 x i8> [[_MSPROP8]], <64 x i8> splat (i8 -1), <64 x i32> zeroinitializer105; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <64 x i8> [[DOTSPLATINSERT]], <64 x i8> poison, <64 x i32> zeroinitializer106; CHECK-NEXT: [[TMP11:%.*]] = bitcast i64 [[TMP2]] to <64 x i1>107; CHECK-NEXT: [[TMP12:%.*]] = bitcast i64 [[MASK]] to <64 x i1>108; CHECK-NEXT: [[TMP13:%.*]] = select <64 x i1> [[TMP12]], <64 x i8> [[_MSPROP9]], <64 x i8> zeroinitializer109; CHECK-NEXT: [[TMP14:%.*]] = xor <64 x i8> [[DOTSPLAT]], zeroinitializer110; CHECK-NEXT: [[TMP15:%.*]] = or <64 x i8> [[TMP14]], [[_MSPROP9]]111; CHECK-NEXT: [[TMP16:%.*]] = or <64 x i8> [[TMP15]], zeroinitializer112; CHECK-NEXT: [[_MSPROP_SELECT10:%.*]] = select <64 x i1> [[TMP11]], <64 x i8> [[TMP16]], <64 x i8> [[TMP13]]113; CHECK-NEXT: [[TMP17:%.*]] = select <64 x i1> [[TMP12]], <64 x i8> [[DOTSPLAT]], <64 x i8> zeroinitializer114; CHECK-NEXT: [[TMP18:%.*]] = insertvalue { <64 x i8>, <64 x i8>, <64 x i8> } { <64 x i8> splat (i8 -1), <64 x i8> splat (i8 -1), <64 x i8> splat (i8 -1) }, <64 x i8> [[_MSPROP5]], 0115; CHECK-NEXT: [[RES3:%.*]] = insertvalue { <64 x i8>, <64 x i8>, <64 x i8> } poison, <64 x i8> [[DOTSPLAT4]], 0116; CHECK-NEXT: [[TMP19:%.*]] = insertvalue { <64 x i8>, <64 x i8>, <64 x i8> } [[TMP18]], <64 x i8> [[_MSPROP_SELECT]], 1117; CHECK-NEXT: [[RES4:%.*]] = insertvalue { <64 x i8>, <64 x i8>, <64 x i8> } [[RES3]], <64 x i8> [[TMP10]], 1118; CHECK-NEXT: [[TMP20:%.*]] = insertvalue { <64 x i8>, <64 x i8>, <64 x i8> } [[TMP19]], <64 x i8> [[_MSPROP_SELECT10]], 2119; CHECK-NEXT: [[RES5:%.*]] = insertvalue { <64 x i8>, <64 x i8>, <64 x i8> } [[RES4]], <64 x i8> [[TMP17]], 2120; CHECK-NEXT: store { <64 x i8>, <64 x i8>, <64 x i8> } [[TMP20]], ptr @__msan_retval_tls, align 8121; CHECK-NEXT: ret { <64 x i8>, <64 x i8>, <64 x i8> } [[RES5]]122;123 %res = call <64 x i8> @llvm.x86.avx512.mask.pbroadcast.b.gpr.512(i8 %x0, <64 x i8> %x1, i64 -1)124 %res1 = call <64 x i8> @llvm.x86.avx512.mask.pbroadcast.b.gpr.512(i8 %x0, <64 x i8> %x1, i64 %mask)125 %res2 = call <64 x i8> @llvm.x86.avx512.mask.pbroadcast.b.gpr.512(i8 %x0, <64 x i8> zeroinitializer, i64 %mask)126 %res3 = insertvalue { <64 x i8>, <64 x i8>, <64 x i8> } poison, <64 x i8> %res, 0127 %res4 = insertvalue { <64 x i8>, <64 x i8>, <64 x i8> } %res3, <64 x i8> %res1, 1128 %res5 = insertvalue { <64 x i8>, <64 x i8>, <64 x i8> } %res4, <64 x i8> %res2, 2129 ret { <64 x i8>, <64 x i8>, <64 x i8> } %res5130}131 132declare <32 x i16> @llvm.x86.avx512.mask.pbroadcast.w.gpr.512(i16, <32 x i16>, i32)133 134define { <32 x i16>, <32 x i16>, <32 x i16> } @test_int_x86_avx512_mask_pbroadcast_w_gpr_512(i16 %x0, <32 x i16> %x1, i32 %mask) nounwind #0 {135; CHECK-LABEL: @test_int_x86_avx512_mask_pbroadcast_w_gpr_512(136; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8137; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 8138; CHECK-NEXT: [[TMP3:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8139; CHECK-NEXT: call void @llvm.donothing()140; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <32 x i16> splat (i16 -1), i16 [[TMP1]], i64 0141; CHECK-NEXT: [[DOTSPLATINSERT3:%.*]] = insertelement <32 x i16> poison, i16 [[X0:%.*]], i64 0142; CHECK-NEXT: [[_MSPROP5:%.*]] = shufflevector <32 x i16> [[_MSPROP]], <32 x i16> splat (i16 -1), <32 x i32> zeroinitializer143; CHECK-NEXT: [[DOTSPLAT4:%.*]] = shufflevector <32 x i16> [[DOTSPLATINSERT3]], <32 x i16> poison, <32 x i32> zeroinitializer144; CHECK-NEXT: [[_MSPROP6:%.*]] = insertelement <32 x i16> splat (i16 -1), i16 [[TMP1]], i64 0145; CHECK-NEXT: [[DOTSPLATINSERT1:%.*]] = insertelement <32 x i16> poison, i16 [[X0]], i64 0146; CHECK-NEXT: [[_MSPROP7:%.*]] = shufflevector <32 x i16> [[_MSPROP6]], <32 x i16> splat (i16 -1), <32 x i32> zeroinitializer147; CHECK-NEXT: [[DOTSPLAT2:%.*]] = shufflevector <32 x i16> [[DOTSPLATINSERT1]], <32 x i16> poison, <32 x i32> zeroinitializer148; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32 [[TMP2]] to <32 x i1>149; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>150; CHECK-NEXT: [[TMP6:%.*]] = select <32 x i1> [[TMP5]], <32 x i16> [[_MSPROP7]], <32 x i16> [[TMP3]]151; CHECK-NEXT: [[TMP7:%.*]] = xor <32 x i16> [[DOTSPLAT2]], [[X1:%.*]]152; CHECK-NEXT: [[TMP8:%.*]] = or <32 x i16> [[TMP7]], [[_MSPROP7]]153; CHECK-NEXT: [[TMP9:%.*]] = or <32 x i16> [[TMP8]], [[TMP3]]154; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP4]], <32 x i16> [[TMP9]], <32 x i16> [[TMP6]]155; CHECK-NEXT: [[TMP10:%.*]] = select <32 x i1> [[TMP5]], <32 x i16> [[DOTSPLAT2]], <32 x i16> [[X1]]156; CHECK-NEXT: [[_MSPROP8:%.*]] = insertelement <32 x i16> splat (i16 -1), i16 [[TMP1]], i64 0157; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <32 x i16> poison, i16 [[X0]], i64 0158; CHECK-NEXT: [[_MSPROP9:%.*]] = shufflevector <32 x i16> [[_MSPROP8]], <32 x i16> splat (i16 -1), <32 x i32> zeroinitializer159; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <32 x i16> [[DOTSPLATINSERT]], <32 x i16> poison, <32 x i32> zeroinitializer160; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32 [[TMP2]] to <32 x i1>161; CHECK-NEXT: [[TMP12:%.*]] = bitcast i32 [[MASK]] to <32 x i1>162; CHECK-NEXT: [[TMP13:%.*]] = select <32 x i1> [[TMP12]], <32 x i16> [[_MSPROP9]], <32 x i16> zeroinitializer163; CHECK-NEXT: [[TMP14:%.*]] = xor <32 x i16> [[DOTSPLAT]], zeroinitializer164; CHECK-NEXT: [[TMP15:%.*]] = or <32 x i16> [[TMP14]], [[_MSPROP9]]165; CHECK-NEXT: [[TMP16:%.*]] = or <32 x i16> [[TMP15]], zeroinitializer166; CHECK-NEXT: [[_MSPROP_SELECT10:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[TMP16]], <32 x i16> [[TMP13]]167; CHECK-NEXT: [[TMP17:%.*]] = select <32 x i1> [[TMP12]], <32 x i16> [[DOTSPLAT]], <32 x i16> zeroinitializer168; CHECK-NEXT: [[TMP18:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } { <32 x i16> splat (i16 -1), <32 x i16> splat (i16 -1), <32 x i16> splat (i16 -1) }, <32 x i16> [[_MSPROP5]], 0169; CHECK-NEXT: [[RES3:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } poison, <32 x i16> [[DOTSPLAT4]], 0170; CHECK-NEXT: [[TMP19:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[TMP18]], <32 x i16> [[_MSPROP_SELECT]], 1171; CHECK-NEXT: [[RES4:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[RES3]], <32 x i16> [[TMP10]], 1172; CHECK-NEXT: [[TMP20:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[TMP19]], <32 x i16> [[_MSPROP_SELECT10]], 2173; CHECK-NEXT: [[RES5:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[RES4]], <32 x i16> [[TMP17]], 2174; CHECK-NEXT: store { <32 x i16>, <32 x i16>, <32 x i16> } [[TMP20]], ptr @__msan_retval_tls, align 8175; CHECK-NEXT: ret { <32 x i16>, <32 x i16>, <32 x i16> } [[RES5]]176;177 %res = call <32 x i16> @llvm.x86.avx512.mask.pbroadcast.w.gpr.512(i16 %x0, <32 x i16> %x1, i32 -1)178 %res1 = call <32 x i16> @llvm.x86.avx512.mask.pbroadcast.w.gpr.512(i16 %x0, <32 x i16> %x1, i32 %mask)179 %res2 = call <32 x i16> @llvm.x86.avx512.mask.pbroadcast.w.gpr.512(i16 %x0, <32 x i16> zeroinitializer, i32 %mask)180 %res3 = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } poison, <32 x i16> %res, 0181 %res4 = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } %res3, <32 x i16> %res1, 1182 %res5 = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } %res4, <32 x i16> %res2, 2183 ret { <32 x i16>, <32 x i16>, <32 x i16> } %res5184 }185 186declare void @llvm.x86.avx512.mask.storeu.b.512(ptr, <64 x i8>, i64)187 188define void @test_int_x86_avx512_mask_storeu_b_512(ptr %ptr1, ptr %ptr2, <64 x i8> %x1, i64 %x2) nounwind #0 {189; CHECK-LABEL: @test_int_x86_avx512_mask_storeu_b_512(190; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 8191; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8192; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr @__msan_param_tls, align 8193; CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8194; CHECK-NEXT: call void @llvm.donothing()195; CHECK-NEXT: [[TMP5:%.*]] = bitcast i64 [[TMP1]] to <64 x i1>196; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[X2:%.*]] to <64 x i1>197; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR1:%.*]] to i64198; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080199; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr200; CHECK-NEXT: call void @llvm.masked.store.v64i8.p0(<64 x i8> [[TMP2]], ptr align 1 [[TMP9]], <64 x i1> [[TMP6]])201; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP3]], 0202; CHECK-NEXT: [[TMP10:%.*]] = bitcast <64 x i1> [[TMP5]] to i64203; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i64 [[TMP10]], 0204; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]205; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF1:![0-9]+]]206; CHECK: 11:207; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7:[0-9]+]]208; CHECK-NEXT: unreachable209; CHECK: 12:210; CHECK-NEXT: call void @llvm.masked.store.v64i8.p0(<64 x i8> [[X1:%.*]], ptr align 1 [[PTR1]], <64 x i1> [[TMP6]])211; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i64 [[TMP4]], 0212; CHECK-NEXT: br i1 [[_MSCMP2]], label [[TMP13:%.*]], label [[TMP14:%.*]], !prof [[PROF1]]213; CHECK: 13:214; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]215; CHECK-NEXT: unreachable216; CHECK: 14:217; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[PTR2:%.*]] to i64218; CHECK-NEXT: [[TMP16:%.*]] = xor i64 [[TMP15]], 87960930222080219; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr220; CHECK-NEXT: store <64 x i8> [[TMP2]], ptr [[TMP17]], align 1221; CHECK-NEXT: store <64 x i8> [[X1]], ptr [[PTR2]], align 1222; CHECK-NEXT: ret void223;224 call void @llvm.x86.avx512.mask.storeu.b.512(ptr %ptr1, <64 x i8> %x1, i64 %x2)225 call void @llvm.x86.avx512.mask.storeu.b.512(ptr %ptr2, <64 x i8> %x1, i64 -1)226 ret void227}228 229declare void @llvm.x86.avx512.mask.storeu.w.512(ptr, <32 x i16>, i32)230 231define void @test_int_x86_avx512_mask_storeu_w_512(ptr %ptr1, ptr %ptr2, <32 x i16> %x1, i32 %x2) nounwind #0 {232; CHECK-LABEL: @test_int_x86_avx512_mask_storeu_w_512(233; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 8234; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8235; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr @__msan_param_tls, align 8236; CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8237; CHECK-NEXT: call void @llvm.donothing()238; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[TMP1]] to <32 x i1>239; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[X2:%.*]] to <32 x i1>240; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR1:%.*]] to i64241; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080242; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr243; CHECK-NEXT: call void @llvm.masked.store.v32i16.p0(<32 x i16> [[TMP2]], ptr align 1 [[TMP9]], <32 x i1> [[TMP6]])244; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP3]], 0245; CHECK-NEXT: [[TMP10:%.*]] = bitcast <32 x i1> [[TMP5]] to i32246; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i32 [[TMP10]], 0247; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]248; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF1]]249; CHECK: 11:250; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]251; CHECK-NEXT: unreachable252; CHECK: 12:253; CHECK-NEXT: call void @llvm.masked.store.v32i16.p0(<32 x i16> [[X1:%.*]], ptr align 1 [[PTR1]], <32 x i1> [[TMP6]])254; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i64 [[TMP4]], 0255; CHECK-NEXT: br i1 [[_MSCMP2]], label [[TMP13:%.*]], label [[TMP14:%.*]], !prof [[PROF1]]256; CHECK: 13:257; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]258; CHECK-NEXT: unreachable259; CHECK: 14:260; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[PTR2:%.*]] to i64261; CHECK-NEXT: [[TMP16:%.*]] = xor i64 [[TMP15]], 87960930222080262; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr263; CHECK-NEXT: store <32 x i16> [[TMP2]], ptr [[TMP17]], align 1264; CHECK-NEXT: store <32 x i16> [[X1]], ptr [[PTR2]], align 1265; CHECK-NEXT: ret void266;267 call void @llvm.x86.avx512.mask.storeu.w.512(ptr %ptr1, <32 x i16> %x1, i32 %x2)268 call void @llvm.x86.avx512.mask.storeu.w.512(ptr %ptr2, <32 x i16> %x1, i32 -1)269 ret void270}271 272declare <32 x i16> @llvm.x86.avx512.mask.loadu.w.512(ptr, <32 x i16>, i32)273 274define { <32 x i16>, <32 x i16>, <32 x i16> } @test_int_x86_avx512_mask_loadu_w_512(ptr %ptr, ptr %ptr2, <32 x i16> %x1, i32 %mask) nounwind #0 {275; CHECK-LABEL: @test_int_x86_avx512_mask_loadu_w_512(276; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8277; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 8278; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8279; CHECK-NEXT: call void @llvm.donothing()280; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0281; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]282; CHECK: 4:283; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]284; CHECK-NEXT: unreachable285; CHECK: 5:286; CHECK-NEXT: [[TMP6:%.*]] = load <32 x i16>, ptr [[PTR:%.*]], align 1287; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR]] to i64288; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080289; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr290; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP9]], align 1291; CHECK-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP2]] to <32 x i1>292; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>293; CHECK-NEXT: [[TMP12:%.*]] = ptrtoint ptr [[PTR2:%.*]] to i64294; CHECK-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], 87960930222080295; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr296; CHECK-NEXT: [[_MSMASKEDLD:%.*]] = call <32 x i16> @llvm.masked.load.v32i16.p0(ptr align 1 [[TMP14]], <32 x i1> [[TMP11]], <32 x i16> [[_MSLD]])297; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i64 [[TMP3]], 0298; CHECK-NEXT: [[TMP15:%.*]] = bitcast <32 x i1> [[TMP10]] to i32299; CHECK-NEXT: [[_MSCMP3:%.*]] = icmp ne i32 [[TMP15]], 0300; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP2]], [[_MSCMP3]]301; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP16:%.*]], label [[TMP17:%.*]], !prof [[PROF1]]302; CHECK: 16:303; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]304; CHECK-NEXT: unreachable305; CHECK: 17:306; CHECK-NEXT: [[TMP18:%.*]] = call <32 x i16> @llvm.masked.load.v32i16.p0(ptr align 1 [[PTR2]], <32 x i1> [[TMP11]], <32 x i16> [[TMP6]])307; CHECK-NEXT: [[TMP19:%.*]] = bitcast i32 [[TMP2]] to <32 x i1>308; CHECK-NEXT: [[TMP20:%.*]] = bitcast i32 [[MASK]] to <32 x i1>309; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[PTR]] to i64310; CHECK-NEXT: [[TMP22:%.*]] = xor i64 [[TMP21]], 87960930222080311; CHECK-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr312; CHECK-NEXT: [[_MSMASKEDLD1:%.*]] = call <32 x i16> @llvm.masked.load.v32i16.p0(ptr align 1 [[TMP23]], <32 x i1> [[TMP20]], <32 x i16> zeroinitializer)313; CHECK-NEXT: [[_MSCMP4:%.*]] = icmp ne i64 [[TMP1]], 0314; CHECK-NEXT: [[TMP24:%.*]] = bitcast <32 x i1> [[TMP19]] to i32315; CHECK-NEXT: [[_MSCMP5:%.*]] = icmp ne i32 [[TMP24]], 0316; CHECK-NEXT: [[_MSOR6:%.*]] = or i1 [[_MSCMP4]], [[_MSCMP5]]317; CHECK-NEXT: br i1 [[_MSOR6]], label [[TMP25:%.*]], label [[TMP26:%.*]], !prof [[PROF1]]318; CHECK: 25:319; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]320; CHECK-NEXT: unreachable321; CHECK: 26:322; CHECK-NEXT: [[TMP27:%.*]] = call <32 x i16> @llvm.masked.load.v32i16.p0(ptr align 1 [[PTR]], <32 x i1> [[TMP20]], <32 x i16> zeroinitializer)323; CHECK-NEXT: [[TMP28:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } { <32 x i16> splat (i16 -1), <32 x i16> splat (i16 -1), <32 x i16> splat (i16 -1) }, <32 x i16> [[_MSLD]], 0324; CHECK-NEXT: [[RES3:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } poison, <32 x i16> [[TMP6]], 0325; CHECK-NEXT: [[TMP29:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[TMP28]], <32 x i16> [[_MSMASKEDLD]], 1326; CHECK-NEXT: [[RES4:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[RES3]], <32 x i16> [[TMP18]], 1327; CHECK-NEXT: [[TMP30:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[TMP29]], <32 x i16> [[_MSMASKEDLD1]], 2328; CHECK-NEXT: [[RES5:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[RES4]], <32 x i16> [[TMP27]], 2329; CHECK-NEXT: store { <32 x i16>, <32 x i16>, <32 x i16> } [[TMP30]], ptr @__msan_retval_tls, align 8330; CHECK-NEXT: ret { <32 x i16>, <32 x i16>, <32 x i16> } [[RES5]]331;332 %res = call <32 x i16> @llvm.x86.avx512.mask.loadu.w.512(ptr %ptr, <32 x i16> %x1, i32 -1)333 %res1 = call <32 x i16> @llvm.x86.avx512.mask.loadu.w.512(ptr %ptr2, <32 x i16> %res, i32 %mask)334 %res2 = call <32 x i16> @llvm.x86.avx512.mask.loadu.w.512(ptr %ptr, <32 x i16> zeroinitializer, i32 %mask)335 %res3 = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } poison, <32 x i16> %res, 0336 %res4 = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } %res3, <32 x i16> %res1, 1337 %res5 = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } %res4, <32 x i16> %res2, 2338 ret { <32 x i16>, <32 x i16>, <32 x i16> } %res5339}340 341declare <64 x i8> @llvm.x86.avx512.mask.loadu.b.512(ptr, <64 x i8>, i64)342 343define { <64 x i8>, <64 x i8>, <64 x i8> } @test_int_x86_avx512_mask_loadu_b_512(ptr %ptr, ptr %ptr2, <64 x i8> %x1, i64 %mask) nounwind #0 {344; CHECK-LABEL: @test_int_x86_avx512_mask_loadu_b_512(345; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8346; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 8347; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8348; CHECK-NEXT: call void @llvm.donothing()349; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0350; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]351; CHECK: 4:352; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]353; CHECK-NEXT: unreachable354; CHECK: 5:355; CHECK-NEXT: [[TMP6:%.*]] = load <64 x i8>, ptr [[PTR:%.*]], align 1356; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR]] to i64357; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080358; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr359; CHECK-NEXT: [[_MSLD:%.*]] = load <64 x i8>, ptr [[TMP9]], align 1360; CHECK-NEXT: [[TMP10:%.*]] = bitcast i64 [[TMP2]] to <64 x i1>361; CHECK-NEXT: [[TMP11:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>362; CHECK-NEXT: [[TMP12:%.*]] = ptrtoint ptr [[PTR2:%.*]] to i64363; CHECK-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], 87960930222080364; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr365; CHECK-NEXT: [[_MSMASKEDLD:%.*]] = call <64 x i8> @llvm.masked.load.v64i8.p0(ptr align 1 [[TMP14]], <64 x i1> [[TMP11]], <64 x i8> [[_MSLD]])366; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i64 [[TMP3]], 0367; CHECK-NEXT: [[TMP15:%.*]] = bitcast <64 x i1> [[TMP10]] to i64368; CHECK-NEXT: [[_MSCMP3:%.*]] = icmp ne i64 [[TMP15]], 0369; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP2]], [[_MSCMP3]]370; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP16:%.*]], label [[TMP17:%.*]], !prof [[PROF1]]371; CHECK: 16:372; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]373; CHECK-NEXT: unreachable374; CHECK: 17:375; CHECK-NEXT: [[TMP18:%.*]] = call <64 x i8> @llvm.masked.load.v64i8.p0(ptr align 1 [[PTR2]], <64 x i1> [[TMP11]], <64 x i8> [[TMP6]])376; CHECK-NEXT: [[TMP19:%.*]] = bitcast i64 [[TMP2]] to <64 x i1>377; CHECK-NEXT: [[TMP20:%.*]] = bitcast i64 [[MASK]] to <64 x i1>378; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[PTR]] to i64379; CHECK-NEXT: [[TMP22:%.*]] = xor i64 [[TMP21]], 87960930222080380; CHECK-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr381; CHECK-NEXT: [[_MSMASKEDLD1:%.*]] = call <64 x i8> @llvm.masked.load.v64i8.p0(ptr align 1 [[TMP23]], <64 x i1> [[TMP20]], <64 x i8> zeroinitializer)382; CHECK-NEXT: [[_MSCMP4:%.*]] = icmp ne i64 [[TMP1]], 0383; CHECK-NEXT: [[TMP24:%.*]] = bitcast <64 x i1> [[TMP19]] to i64384; CHECK-NEXT: [[_MSCMP5:%.*]] = icmp ne i64 [[TMP24]], 0385; CHECK-NEXT: [[_MSOR6:%.*]] = or i1 [[_MSCMP4]], [[_MSCMP5]]386; CHECK-NEXT: br i1 [[_MSOR6]], label [[TMP25:%.*]], label [[TMP26:%.*]], !prof [[PROF1]]387; CHECK: 25:388; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]389; CHECK-NEXT: unreachable390; CHECK: 26:391; CHECK-NEXT: [[TMP27:%.*]] = call <64 x i8> @llvm.masked.load.v64i8.p0(ptr align 1 [[PTR]], <64 x i1> [[TMP20]], <64 x i8> zeroinitializer)392; CHECK-NEXT: [[TMP28:%.*]] = insertvalue { <64 x i8>, <64 x i8>, <64 x i8> } { <64 x i8> splat (i8 -1), <64 x i8> splat (i8 -1), <64 x i8> splat (i8 -1) }, <64 x i8> [[_MSLD]], 0393; CHECK-NEXT: [[RES3:%.*]] = insertvalue { <64 x i8>, <64 x i8>, <64 x i8> } poison, <64 x i8> [[TMP6]], 0394; CHECK-NEXT: [[TMP29:%.*]] = insertvalue { <64 x i8>, <64 x i8>, <64 x i8> } [[TMP28]], <64 x i8> [[_MSMASKEDLD]], 1395; CHECK-NEXT: [[RES4:%.*]] = insertvalue { <64 x i8>, <64 x i8>, <64 x i8> } [[RES3]], <64 x i8> [[TMP18]], 1396; CHECK-NEXT: [[TMP30:%.*]] = insertvalue { <64 x i8>, <64 x i8>, <64 x i8> } [[TMP29]], <64 x i8> [[_MSMASKEDLD1]], 2397; CHECK-NEXT: [[RES5:%.*]] = insertvalue { <64 x i8>, <64 x i8>, <64 x i8> } [[RES4]], <64 x i8> [[TMP27]], 2398; CHECK-NEXT: store { <64 x i8>, <64 x i8>, <64 x i8> } [[TMP30]], ptr @__msan_retval_tls, align 8399; CHECK-NEXT: ret { <64 x i8>, <64 x i8>, <64 x i8> } [[RES5]]400;401 %res = call <64 x i8> @llvm.x86.avx512.mask.loadu.b.512(ptr %ptr, <64 x i8> %x1, i64 -1)402 %res1 = call <64 x i8> @llvm.x86.avx512.mask.loadu.b.512(ptr %ptr2, <64 x i8> %res, i64 %mask)403 %res2 = call <64 x i8> @llvm.x86.avx512.mask.loadu.b.512(ptr %ptr, <64 x i8> zeroinitializer, i64 %mask)404 %res3 = insertvalue { <64 x i8>, <64 x i8>, <64 x i8> } poison, <64 x i8> %res, 0405 %res4 = insertvalue { <64 x i8>, <64 x i8>, <64 x i8> } %res3, <64 x i8> %res1, 1406 %res5 = insertvalue { <64 x i8>, <64 x i8>, <64 x i8> } %res4, <64 x i8> %res2, 2407 ret { <64 x i8>, <64 x i8>, <64 x i8> } %res5408}409 410declare <8 x i64> @llvm.x86.avx512.psll.dq.512(<8 x i64>, i32)411 412define { <8 x i64>, <8 x i64> } @test_int_x86_avx512_psll_dq_512(<8 x i64> %x0) nounwind #0 {413; CHECK-LABEL: @test_int_x86_avx512_psll_dq_512(414; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 8415; CHECK-NEXT: call void @llvm.donothing()416; CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i64> [[TMP1]] to <64 x i8>417; CHECK-NEXT: [[CAST2:%.*]] = bitcast <8 x i64> [[X0:%.*]] to <64 x i8>418; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <64 x i8> zeroinitializer, <64 x i8> [[TMP2]], <64 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119>419; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <64 x i8> zeroinitializer, <64 x i8> [[CAST2]], <64 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119>420; CHECK-NEXT: [[TMP4:%.*]] = bitcast <64 x i8> [[_MSPROP]] to <8 x i64>421; CHECK-NEXT: [[CAST3:%.*]] = bitcast <64 x i8> [[TMP3]] to <8 x i64>422; CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i64> [[TMP1]] to <64 x i8>423; CHECK-NEXT: [[CAST:%.*]] = bitcast <8 x i64> [[X0]] to <64 x i8>424; CHECK-NEXT: [[_MSPROP4:%.*]] = shufflevector <64 x i8> zeroinitializer, <64 x i8> [[TMP5]], <64 x i32> <i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123>425; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <64 x i8> zeroinitializer, <64 x i8> [[CAST]], <64 x i32> <i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123>426; CHECK-NEXT: [[TMP7:%.*]] = bitcast <64 x i8> [[_MSPROP4]] to <8 x i64>427; CHECK-NEXT: [[CAST1:%.*]] = bitcast <64 x i8> [[TMP6]] to <8 x i64>428; CHECK-NEXT: [[TMP8:%.*]] = insertvalue { <8 x i64>, <8 x i64> } { <8 x i64> splat (i64 -1), <8 x i64> splat (i64 -1) }, <8 x i64> [[TMP4]], 0429; CHECK-NEXT: [[RES2:%.*]] = insertvalue { <8 x i64>, <8 x i64> } poison, <8 x i64> [[CAST3]], 0430; CHECK-NEXT: [[TMP9:%.*]] = insertvalue { <8 x i64>, <8 x i64> } [[TMP8]], <8 x i64> [[TMP7]], 1431; CHECK-NEXT: [[RES3:%.*]] = insertvalue { <8 x i64>, <8 x i64> } [[RES2]], <8 x i64> [[CAST1]], 1432; CHECK-NEXT: store { <8 x i64>, <8 x i64> } [[TMP9]], ptr @__msan_retval_tls, align 8433; CHECK-NEXT: ret { <8 x i64>, <8 x i64> } [[RES3]]434;435 %res = call <8 x i64> @llvm.x86.avx512.psll.dq.512(<8 x i64> %x0, i32 8)436 %res1 = call <8 x i64> @llvm.x86.avx512.psll.dq.512(<8 x i64> %x0, i32 4)437 %res2 = insertvalue { <8 x i64>, <8 x i64> } poison, <8 x i64> %res, 0438 %res3 = insertvalue { <8 x i64>, <8 x i64> } %res2, <8 x i64> %res1, 1439 ret { <8 x i64>, <8 x i64> } %res3440}441 442define <8 x i64> @test_int_x86_avx512_psll_load_dq_512(ptr %p0) nounwind #0 {443; CHECK-LABEL: @test_int_x86_avx512_psll_load_dq_512(444; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8445; CHECK-NEXT: call void @llvm.donothing()446; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0447; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF1]]448; CHECK: 2:449; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]450; CHECK-NEXT: unreachable451; CHECK: 3:452; CHECK-NEXT: [[X0:%.*]] = load <8 x i64>, ptr [[P0:%.*]], align 64453; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[P0]] to i64454; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080455; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr456; CHECK-NEXT: [[_MSLD:%.*]] = load <8 x i64>, ptr [[TMP6]], align 64457; CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i64> [[_MSLD]] to <64 x i8>458; CHECK-NEXT: [[CAST:%.*]] = bitcast <8 x i64> [[X0]] to <64 x i8>459; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <64 x i8> zeroinitializer, <64 x i8> [[TMP7]], <64 x i32> <i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123>460; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <64 x i8> zeroinitializer, <64 x i8> [[CAST]], <64 x i32> <i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123>461; CHECK-NEXT: [[TMP9:%.*]] = bitcast <64 x i8> [[_MSPROP]] to <8 x i64>462; CHECK-NEXT: [[CAST1:%.*]] = bitcast <64 x i8> [[TMP8]] to <8 x i64>463; CHECK-NEXT: store <8 x i64> [[TMP9]], ptr @__msan_retval_tls, align 8464; CHECK-NEXT: ret <8 x i64> [[CAST1]]465;466 %x0 = load <8 x i64>, ptr%p0467 %res = call <8 x i64> @llvm.x86.avx512.psll.dq.512(<8 x i64> %x0, i32 4)468 ret <8 x i64> %res469}470 471declare <8 x i64> @llvm.x86.avx512.psrl.dq.512(<8 x i64>, i32)472 473define { <8 x i64>, <8 x i64> } @test_int_x86_avx512_psrl_dq_512(<8 x i64> %x0) nounwind #0 {474; CHECK-LABEL: @test_int_x86_avx512_psrl_dq_512(475; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i64>, ptr @__msan_param_tls, align 8476; CHECK-NEXT: call void @llvm.donothing()477; CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i64> [[TMP1]] to <64 x i8>478; CHECK-NEXT: [[CAST2:%.*]] = bitcast <8 x i64> [[X0:%.*]] to <64 x i8>479; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <64 x i8> [[TMP2]], <64 x i8> zeroinitializer, <64 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119>480; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <64 x i8> [[CAST2]], <64 x i8> zeroinitializer, <64 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119>481; CHECK-NEXT: [[TMP4:%.*]] = bitcast <64 x i8> [[_MSPROP]] to <8 x i64>482; CHECK-NEXT: [[CAST3:%.*]] = bitcast <64 x i8> [[TMP3]] to <8 x i64>483; CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i64> [[TMP1]] to <64 x i8>484; CHECK-NEXT: [[CAST:%.*]] = bitcast <8 x i64> [[X0]] to <64 x i8>485; CHECK-NEXT: [[_MSPROP4:%.*]] = shufflevector <64 x i8> [[TMP5]], <64 x i8> zeroinitializer, <64 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 66, i32 67, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 82, i32 83, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 98, i32 99, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113, i32 114, i32 115>486; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <64 x i8> [[CAST]], <64 x i8> zeroinitializer, <64 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 66, i32 67, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 82, i32 83, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 98, i32 99, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113, i32 114, i32 115>487; CHECK-NEXT: [[TMP7:%.*]] = bitcast <64 x i8> [[_MSPROP4]] to <8 x i64>488; CHECK-NEXT: [[CAST1:%.*]] = bitcast <64 x i8> [[TMP6]] to <8 x i64>489; CHECK-NEXT: [[TMP8:%.*]] = insertvalue { <8 x i64>, <8 x i64> } { <8 x i64> splat (i64 -1), <8 x i64> splat (i64 -1) }, <8 x i64> [[TMP4]], 0490; CHECK-NEXT: [[RES2:%.*]] = insertvalue { <8 x i64>, <8 x i64> } poison, <8 x i64> [[CAST3]], 0491; CHECK-NEXT: [[TMP9:%.*]] = insertvalue { <8 x i64>, <8 x i64> } [[TMP8]], <8 x i64> [[TMP7]], 1492; CHECK-NEXT: [[RES3:%.*]] = insertvalue { <8 x i64>, <8 x i64> } [[RES2]], <8 x i64> [[CAST1]], 1493; CHECK-NEXT: store { <8 x i64>, <8 x i64> } [[TMP9]], ptr @__msan_retval_tls, align 8494; CHECK-NEXT: ret { <8 x i64>, <8 x i64> } [[RES3]]495;496 %res = call <8 x i64> @llvm.x86.avx512.psrl.dq.512(<8 x i64> %x0, i32 8)497 %res1 = call <8 x i64> @llvm.x86.avx512.psrl.dq.512(<8 x i64> %x0, i32 4)498 %res2 = insertvalue { <8 x i64>, <8 x i64> } poison, <8 x i64> %res, 0499 %res3 = insertvalue { <8 x i64>, <8 x i64> } %res2, <8 x i64> %res1, 1500 ret { <8 x i64>, <8 x i64> } %res3501}502 503define <8 x i64> @test_int_x86_avx512_psrl_load_dq_512(ptr %p0) nounwind #0 {504; CHECK-LABEL: @test_int_x86_avx512_psrl_load_dq_512(505; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8506; CHECK-NEXT: call void @llvm.donothing()507; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0508; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF1]]509; CHECK: 2:510; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]511; CHECK-NEXT: unreachable512; CHECK: 3:513; CHECK-NEXT: [[X0:%.*]] = load <8 x i64>, ptr [[P0:%.*]], align 64514; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[P0]] to i64515; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080516; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr517; CHECK-NEXT: [[_MSLD:%.*]] = load <8 x i64>, ptr [[TMP6]], align 64518; CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i64> [[_MSLD]] to <64 x i8>519; CHECK-NEXT: [[CAST:%.*]] = bitcast <8 x i64> [[X0]] to <64 x i8>520; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <64 x i8> [[TMP7]], <64 x i8> zeroinitializer, <64 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 66, i32 67, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 82, i32 83, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 98, i32 99, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113, i32 114, i32 115>521; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <64 x i8> [[CAST]], <64 x i8> zeroinitializer, <64 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 66, i32 67, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 82, i32 83, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 98, i32 99, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113, i32 114, i32 115>522; CHECK-NEXT: [[TMP9:%.*]] = bitcast <64 x i8> [[_MSPROP]] to <8 x i64>523; CHECK-NEXT: [[CAST1:%.*]] = bitcast <64 x i8> [[TMP8]] to <8 x i64>524; CHECK-NEXT: store <8 x i64> [[TMP9]], ptr @__msan_retval_tls, align 8525; CHECK-NEXT: ret <8 x i64> [[CAST1]]526;527 %x0 = load <8 x i64>, ptr%p0528 %res = call <8 x i64> @llvm.x86.avx512.psrl.dq.512(<8 x i64> %x0, i32 4)529 ret <8 x i64> %res530}531 532declare <64 x i8> @llvm.x86.avx512.mask.palignr.512(<64 x i8>, <64 x i8>, i32, <64 x i8>, i64)533 534define <64 x i8> @test_int_x86_avx512_palignr_512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x3) nounwind #0 {535; CHECK-LABEL: @test_int_x86_avx512_palignr_512(536; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8537; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 8538; CHECK-NEXT: call void @llvm.donothing()539; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <64 x i8> [[TMP1]], <64 x i8> [[TMP2]], <64 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113>540; CHECK-NEXT: [[PALIGNR:%.*]] = shufflevector <64 x i8> [[X1:%.*]], <64 x i8> [[X0:%.*]], <64 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113>541; CHECK-NEXT: store <64 x i8> [[_MSPROP]], ptr @__msan_retval_tls, align 8542; CHECK-NEXT: ret <64 x i8> [[PALIGNR]]543;544 %res = call <64 x i8> @llvm.x86.avx512.mask.palignr.512(<64 x i8> %x0, <64 x i8> %x1, i32 2, <64 x i8> %x3, i64 -1)545 ret <64 x i8> %res546}547 548define <64 x i8> @test_int_x86_avx512_mask_palignr_512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x3, i64 %x4) nounwind #0 {549; CHECK-LABEL: @test_int_x86_avx512_mask_palignr_512(550; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8551; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 8552; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 8553; CHECK-NEXT: [[TMP4:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 8554; CHECK-NEXT: call void @llvm.donothing()555; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <64 x i8> [[TMP1]], <64 x i8> [[TMP2]], <64 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113>556; CHECK-NEXT: [[PALIGNR:%.*]] = shufflevector <64 x i8> [[X1:%.*]], <64 x i8> [[X0:%.*]], <64 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113>557; CHECK-NEXT: [[TMP5:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>558; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[X4:%.*]] to <64 x i1>559; CHECK-NEXT: [[TMP7:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[_MSPROP]], <64 x i8> [[TMP4]]560; CHECK-NEXT: [[TMP8:%.*]] = xor <64 x i8> [[PALIGNR]], [[X3:%.*]]561; CHECK-NEXT: [[TMP9:%.*]] = or <64 x i8> [[TMP8]], [[_MSPROP]]562; CHECK-NEXT: [[TMP10:%.*]] = or <64 x i8> [[TMP9]], [[TMP4]]563; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP5]], <64 x i8> [[TMP10]], <64 x i8> [[TMP7]]564; CHECK-NEXT: [[TMP11:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[PALIGNR]], <64 x i8> [[X3]]565; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8566; CHECK-NEXT: ret <64 x i8> [[TMP11]]567;568 %res = call <64 x i8> @llvm.x86.avx512.mask.palignr.512(<64 x i8> %x0, <64 x i8> %x1, i32 2, <64 x i8> %x3, i64 %x4)569 ret <64 x i8> %res570}571 572define <64 x i8> @test_int_x86_avx512_maskz_palignr_512(<64 x i8> %x0, <64 x i8> %x1, i64 %x4) nounwind #0 {573; CHECK-LABEL: @test_int_x86_avx512_maskz_palignr_512(574; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8575; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 8576; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 8577; CHECK-NEXT: call void @llvm.donothing()578; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <64 x i8> [[TMP1]], <64 x i8> [[TMP2]], <64 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113>579; CHECK-NEXT: [[PALIGNR:%.*]] = shufflevector <64 x i8> [[X1:%.*]], <64 x i8> [[X0:%.*]], <64 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113>580; CHECK-NEXT: [[TMP4:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>581; CHECK-NEXT: [[TMP5:%.*]] = bitcast i64 [[X4:%.*]] to <64 x i1>582; CHECK-NEXT: [[TMP6:%.*]] = select <64 x i1> [[TMP5]], <64 x i8> [[_MSPROP]], <64 x i8> zeroinitializer583; CHECK-NEXT: [[TMP7:%.*]] = xor <64 x i8> [[PALIGNR]], zeroinitializer584; CHECK-NEXT: [[TMP8:%.*]] = or <64 x i8> [[TMP7]], [[_MSPROP]]585; CHECK-NEXT: [[TMP9:%.*]] = or <64 x i8> [[TMP8]], zeroinitializer586; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP4]], <64 x i8> [[TMP9]], <64 x i8> [[TMP6]]587; CHECK-NEXT: [[TMP10:%.*]] = select <64 x i1> [[TMP5]], <64 x i8> [[PALIGNR]], <64 x i8> zeroinitializer588; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8589; CHECK-NEXT: ret <64 x i8> [[TMP10]]590;591 %res = call <64 x i8> @llvm.x86.avx512.mask.palignr.512(<64 x i8> %x0, <64 x i8> %x1, i32 2, <64 x i8> zeroinitializer, i64 %x4)592 ret <64 x i8> %res593}594 595declare <32 x i16> @llvm.x86.avx512.mask.pshufh.w.512(<32 x i16>, i32, <32 x i16>, i32)596 597define <32 x i16> @test_int_x86_avx512_pshufh_w_512(<32 x i16> %x0, i32 %x1, <32 x i16> %x2) nounwind #0 {598; CHECK-LABEL: @test_int_x86_avx512_pshufh_w_512(599; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 8600; CHECK-NEXT: call void @llvm.donothing()601; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <32 x i16> [[TMP1]], <32 x i16> [[TMP1]], <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 4, i32 4, i32 4, i32 8, i32 9, i32 10, i32 11, i32 15, i32 12, i32 12, i32 12, i32 16, i32 17, i32 18, i32 19, i32 23, i32 20, i32 20, i32 20, i32 24, i32 25, i32 26, i32 27, i32 31, i32 28, i32 28, i32 28>602; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <32 x i16> [[X0:%.*]], <32 x i16> [[X0]], <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 4, i32 4, i32 4, i32 8, i32 9, i32 10, i32 11, i32 15, i32 12, i32 12, i32 12, i32 16, i32 17, i32 18, i32 19, i32 23, i32 20, i32 20, i32 20, i32 24, i32 25, i32 26, i32 27, i32 31, i32 28, i32 28, i32 28>603; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 8604; CHECK-NEXT: ret <32 x i16> [[TMP2]]605;606 %res = call <32 x i16> @llvm.x86.avx512.mask.pshufh.w.512(<32 x i16> %x0, i32 3, <32 x i16> %x2, i32 -1)607 ret <32 x i16> %res608}609 610define <32 x i16> @test_int_x86_avx512_mask_pshufh_w_512(<32 x i16> %x0, i32 %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {611; CHECK-LABEL: @test_int_x86_avx512_mask_pshufh_w_512(612; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 8613; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 8614; CHECK-NEXT: [[TMP3:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 8615; CHECK-NEXT: call void @llvm.donothing()616; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <32 x i16> [[TMP1]], <32 x i16> [[TMP1]], <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 4, i32 4, i32 4, i32 8, i32 9, i32 10, i32 11, i32 15, i32 12, i32 12, i32 12, i32 16, i32 17, i32 18, i32 19, i32 23, i32 20, i32 20, i32 20, i32 24, i32 25, i32 26, i32 27, i32 31, i32 28, i32 28, i32 28>617; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <32 x i16> [[X0:%.*]], <32 x i16> [[X0]], <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 4, i32 4, i32 4, i32 8, i32 9, i32 10, i32 11, i32 15, i32 12, i32 12, i32 12, i32 16, i32 17, i32 18, i32 19, i32 23, i32 20, i32 20, i32 20, i32 24, i32 25, i32 26, i32 27, i32 31, i32 28, i32 28, i32 28>618; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[TMP2]] to <32 x i1>619; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>620; CHECK-NEXT: [[TMP7:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP3]]621; CHECK-NEXT: [[TMP8:%.*]] = xor <32 x i16> [[TMP4]], [[X2:%.*]]622; CHECK-NEXT: [[TMP9:%.*]] = or <32 x i16> [[TMP8]], [[_MSPROP]]623; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[TMP3]]624; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP5]], <32 x i16> [[TMP10]], <32 x i16> [[TMP7]]625; CHECK-NEXT: [[TMP11:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP4]], <32 x i16> [[X2]]626; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8627; CHECK-NEXT: ret <32 x i16> [[TMP11]]628;629 %res = call <32 x i16> @llvm.x86.avx512.mask.pshufh.w.512(<32 x i16> %x0, i32 3, <32 x i16> %x2, i32 %x3)630 ret <32 x i16> %res631}632 633define <32 x i16> @test_int_x86_avx512_maskz_pshufh_w_512(<32 x i16> %x0, i32 %x3) nounwind #0 {634; CHECK-LABEL: @test_int_x86_avx512_maskz_pshufh_w_512(635; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 8636; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8637; CHECK-NEXT: call void @llvm.donothing()638; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <32 x i16> [[TMP1]], <32 x i16> [[TMP1]], <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 4, i32 4, i32 4, i32 8, i32 9, i32 10, i32 11, i32 15, i32 12, i32 12, i32 12, i32 16, i32 17, i32 18, i32 19, i32 23, i32 20, i32 20, i32 20, i32 24, i32 25, i32 26, i32 27, i32 31, i32 28, i32 28, i32 28>639; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <32 x i16> [[X0:%.*]], <32 x i16> [[X0]], <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 4, i32 4, i32 4, i32 8, i32 9, i32 10, i32 11, i32 15, i32 12, i32 12, i32 12, i32 16, i32 17, i32 18, i32 19, i32 23, i32 20, i32 20, i32 20, i32 24, i32 25, i32 26, i32 27, i32 31, i32 28, i32 28, i32 28>640; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32 [[TMP2]] to <32 x i1>641; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>642; CHECK-NEXT: [[TMP6:%.*]] = select <32 x i1> [[TMP5]], <32 x i16> [[_MSPROP]], <32 x i16> zeroinitializer643; CHECK-NEXT: [[TMP7:%.*]] = xor <32 x i16> [[TMP3]], zeroinitializer644; CHECK-NEXT: [[TMP8:%.*]] = or <32 x i16> [[TMP7]], [[_MSPROP]]645; CHECK-NEXT: [[TMP9:%.*]] = or <32 x i16> [[TMP8]], zeroinitializer646; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP4]], <32 x i16> [[TMP9]], <32 x i16> [[TMP6]]647; CHECK-NEXT: [[TMP10:%.*]] = select <32 x i1> [[TMP5]], <32 x i16> [[TMP3]], <32 x i16> zeroinitializer648; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8649; CHECK-NEXT: ret <32 x i16> [[TMP10]]650;651 %res = call <32 x i16> @llvm.x86.avx512.mask.pshufh.w.512(<32 x i16> %x0, i32 3, <32 x i16> zeroinitializer, i32 %x3)652 ret <32 x i16> %res653}654 655declare <32 x i16> @llvm.x86.avx512.mask.pshufl.w.512(<32 x i16>, i32, <32 x i16>, i32)656 657define <32 x i16> @test_int_x86_avx512_pshufl_w_512(<32 x i16> %x0, i32 %x1, <32 x i16> %x2) nounwind #0 {658; CHECK-LABEL: @test_int_x86_avx512_pshufl_w_512(659; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 8660; CHECK-NEXT: call void @llvm.donothing()661; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <32 x i16> [[TMP1]], <32 x i16> [[TMP1]], <32 x i32> <i32 3, i32 0, i32 0, i32 0, i32 4, i32 5, i32 6, i32 7, i32 11, i32 8, i32 8, i32 8, i32 12, i32 13, i32 14, i32 15, i32 19, i32 16, i32 16, i32 16, i32 20, i32 21, i32 22, i32 23, i32 27, i32 24, i32 24, i32 24, i32 28, i32 29, i32 30, i32 31>662; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <32 x i16> [[X0:%.*]], <32 x i16> [[X0]], <32 x i32> <i32 3, i32 0, i32 0, i32 0, i32 4, i32 5, i32 6, i32 7, i32 11, i32 8, i32 8, i32 8, i32 12, i32 13, i32 14, i32 15, i32 19, i32 16, i32 16, i32 16, i32 20, i32 21, i32 22, i32 23, i32 27, i32 24, i32 24, i32 24, i32 28, i32 29, i32 30, i32 31>663; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 8664; CHECK-NEXT: ret <32 x i16> [[TMP2]]665;666 %res = call <32 x i16> @llvm.x86.avx512.mask.pshufl.w.512(<32 x i16> %x0, i32 3, <32 x i16> %x2, i32 -1)667 ret <32 x i16> %res668}669 670define <32 x i16> @test_int_x86_avx512_mask_pshufl_w_512(<32 x i16> %x0, i32 %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {671; CHECK-LABEL: @test_int_x86_avx512_mask_pshufl_w_512(672; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 8673; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 8674; CHECK-NEXT: [[TMP3:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 8675; CHECK-NEXT: call void @llvm.donothing()676; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <32 x i16> [[TMP1]], <32 x i16> [[TMP1]], <32 x i32> <i32 3, i32 0, i32 0, i32 0, i32 4, i32 5, i32 6, i32 7, i32 11, i32 8, i32 8, i32 8, i32 12, i32 13, i32 14, i32 15, i32 19, i32 16, i32 16, i32 16, i32 20, i32 21, i32 22, i32 23, i32 27, i32 24, i32 24, i32 24, i32 28, i32 29, i32 30, i32 31>677; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <32 x i16> [[X0:%.*]], <32 x i16> [[X0]], <32 x i32> <i32 3, i32 0, i32 0, i32 0, i32 4, i32 5, i32 6, i32 7, i32 11, i32 8, i32 8, i32 8, i32 12, i32 13, i32 14, i32 15, i32 19, i32 16, i32 16, i32 16, i32 20, i32 21, i32 22, i32 23, i32 27, i32 24, i32 24, i32 24, i32 28, i32 29, i32 30, i32 31>678; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[TMP2]] to <32 x i1>679; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>680; CHECK-NEXT: [[TMP7:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP3]]681; CHECK-NEXT: [[TMP8:%.*]] = xor <32 x i16> [[TMP4]], [[X2:%.*]]682; CHECK-NEXT: [[TMP9:%.*]] = or <32 x i16> [[TMP8]], [[_MSPROP]]683; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[TMP3]]684; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP5]], <32 x i16> [[TMP10]], <32 x i16> [[TMP7]]685; CHECK-NEXT: [[TMP11:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP4]], <32 x i16> [[X2]]686; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8687; CHECK-NEXT: ret <32 x i16> [[TMP11]]688;689 %res = call <32 x i16> @llvm.x86.avx512.mask.pshufl.w.512(<32 x i16> %x0, i32 3, <32 x i16> %x2, i32 %x3)690 ret <32 x i16> %res691}692 693define <32 x i16> @test_int_x86_avx512_maskz_pshufl_w_512(<32 x i16> %x0, i32 %x3) nounwind #0 {694; CHECK-LABEL: @test_int_x86_avx512_maskz_pshufl_w_512(695; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 8696; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8697; CHECK-NEXT: call void @llvm.donothing()698; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <32 x i16> [[TMP1]], <32 x i16> [[TMP1]], <32 x i32> <i32 3, i32 0, i32 0, i32 0, i32 4, i32 5, i32 6, i32 7, i32 11, i32 8, i32 8, i32 8, i32 12, i32 13, i32 14, i32 15, i32 19, i32 16, i32 16, i32 16, i32 20, i32 21, i32 22, i32 23, i32 27, i32 24, i32 24, i32 24, i32 28, i32 29, i32 30, i32 31>699; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <32 x i16> [[X0:%.*]], <32 x i16> [[X0]], <32 x i32> <i32 3, i32 0, i32 0, i32 0, i32 4, i32 5, i32 6, i32 7, i32 11, i32 8, i32 8, i32 8, i32 12, i32 13, i32 14, i32 15, i32 19, i32 16, i32 16, i32 16, i32 20, i32 21, i32 22, i32 23, i32 27, i32 24, i32 24, i32 24, i32 28, i32 29, i32 30, i32 31>700; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32 [[TMP2]] to <32 x i1>701; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>702; CHECK-NEXT: [[TMP6:%.*]] = select <32 x i1> [[TMP5]], <32 x i16> [[_MSPROP]], <32 x i16> zeroinitializer703; CHECK-NEXT: [[TMP7:%.*]] = xor <32 x i16> [[TMP3]], zeroinitializer704; CHECK-NEXT: [[TMP8:%.*]] = or <32 x i16> [[TMP7]], [[_MSPROP]]705; CHECK-NEXT: [[TMP9:%.*]] = or <32 x i16> [[TMP8]], zeroinitializer706; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP4]], <32 x i16> [[TMP9]], <32 x i16> [[TMP6]]707; CHECK-NEXT: [[TMP10:%.*]] = select <32 x i1> [[TMP5]], <32 x i16> [[TMP3]], <32 x i16> zeroinitializer708; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8709; CHECK-NEXT: ret <32 x i16> [[TMP10]]710;711 %res = call <32 x i16> @llvm.x86.avx512.mask.pshufl.w.512(<32 x i16> %x0, i32 3, <32 x i16> zeroinitializer, i32 %x3)712 ret <32 x i16> %res713}714 715define i64 @test_pcmpeq_b(<64 x i8> %a, <64 x i8> %b) nounwind #0 {716; CHECK-LABEL: @test_pcmpeq_b(717; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 8718; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8719; CHECK-NEXT: call void @llvm.donothing()720; CHECK-NEXT: [[TMP3:%.*]] = xor <64 x i8> [[A:%.*]], [[B:%.*]]721; CHECK-NEXT: [[TMP4:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]722; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <64 x i8> [[TMP4]], zeroinitializer723; CHECK-NEXT: [[TMP6:%.*]] = xor <64 x i8> [[TMP4]], splat (i8 -1)724; CHECK-NEXT: [[TMP7:%.*]] = and <64 x i8> [[TMP6]], [[TMP3]]725; CHECK-NEXT: [[TMP8:%.*]] = icmp eq <64 x i8> [[TMP7]], zeroinitializer726; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <64 x i1> [[TMP5]], [[TMP8]]727; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <64 x i8> [[A]], [[B]]728; CHECK-NEXT: [[TMP10:%.*]] = bitcast <64 x i1> [[_MSPROP_ICMP]] to i64729; CHECK-NEXT: [[TMP11:%.*]] = bitcast <64 x i1> [[TMP9]] to i64730; CHECK-NEXT: store i64 [[TMP10]], ptr @__msan_retval_tls, align 8731; CHECK-NEXT: ret i64 [[TMP11]]732;733 %res = call i64 @llvm.x86.avx512.mask.pcmpeq.b.512(<64 x i8> %a, <64 x i8> %b, i64 -1)734 ret i64 %res735}736 737define i64 @test_mask_pcmpeq_b(<64 x i8> %a, <64 x i8> %b, i64 %mask) nounwind #0 {738; CHECK-LABEL: @test_mask_pcmpeq_b(739; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 8740; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8741; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 8742; CHECK-NEXT: call void @llvm.donothing()743; CHECK-NEXT: [[TMP4:%.*]] = xor <64 x i8> [[A:%.*]], [[B:%.*]]744; CHECK-NEXT: [[TMP5:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]745; CHECK-NEXT: [[TMP6:%.*]] = icmp ne <64 x i8> [[TMP5]], zeroinitializer746; CHECK-NEXT: [[TMP7:%.*]] = xor <64 x i8> [[TMP5]], splat (i8 -1)747; CHECK-NEXT: [[TMP8:%.*]] = and <64 x i8> [[TMP7]], [[TMP4]]748; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <64 x i8> [[TMP8]], zeroinitializer749; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <64 x i1> [[TMP6]], [[TMP9]]750; CHECK-NEXT: [[TMP10:%.*]] = icmp eq <64 x i8> [[A]], [[B]]751; CHECK-NEXT: [[TMP11:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>752; CHECK-NEXT: [[TMP12:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>753; CHECK-NEXT: [[TMP13:%.*]] = and <64 x i1> [[_MSPROP_ICMP]], [[TMP11]]754; CHECK-NEXT: [[TMP14:%.*]] = and <64 x i1> [[TMP10]], [[TMP11]]755; CHECK-NEXT: [[TMP15:%.*]] = and <64 x i1> [[_MSPROP_ICMP]], [[TMP12]]756; CHECK-NEXT: [[TMP16:%.*]] = or <64 x i1> [[TMP13]], [[TMP14]]757; CHECK-NEXT: [[TMP17:%.*]] = or <64 x i1> [[TMP16]], [[TMP15]]758; CHECK-NEXT: [[TMP18:%.*]] = and <64 x i1> [[TMP10]], [[TMP12]]759; CHECK-NEXT: [[TMP19:%.*]] = bitcast <64 x i1> [[TMP17]] to i64760; CHECK-NEXT: [[TMP20:%.*]] = bitcast <64 x i1> [[TMP18]] to i64761; CHECK-NEXT: store i64 [[TMP19]], ptr @__msan_retval_tls, align 8762; CHECK-NEXT: ret i64 [[TMP20]]763;764 %res = call i64 @llvm.x86.avx512.mask.pcmpeq.b.512(<64 x i8> %a, <64 x i8> %b, i64 %mask)765 ret i64 %res766}767 768declare i64 @llvm.x86.avx512.mask.pcmpeq.b.512(<64 x i8>, <64 x i8>, i64)769 770define i32 @test_pcmpeq_w(<32 x i16> %a, <32 x i16> %b) nounwind #0 {771; CHECK-LABEL: @test_pcmpeq_w(772; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 8773; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8774; CHECK-NEXT: call void @llvm.donothing()775; CHECK-NEXT: [[TMP3:%.*]] = xor <32 x i16> [[A:%.*]], [[B:%.*]]776; CHECK-NEXT: [[TMP4:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]777; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <32 x i16> [[TMP4]], zeroinitializer778; CHECK-NEXT: [[TMP6:%.*]] = xor <32 x i16> [[TMP4]], splat (i16 -1)779; CHECK-NEXT: [[TMP7:%.*]] = and <32 x i16> [[TMP6]], [[TMP3]]780; CHECK-NEXT: [[TMP8:%.*]] = icmp eq <32 x i16> [[TMP7]], zeroinitializer781; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <32 x i1> [[TMP5]], [[TMP8]]782; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <32 x i16> [[A]], [[B]]783; CHECK-NEXT: [[TMP10:%.*]] = bitcast <32 x i1> [[_MSPROP_ICMP]] to i32784; CHECK-NEXT: [[TMP11:%.*]] = bitcast <32 x i1> [[TMP9]] to i32785; CHECK-NEXT: store i32 [[TMP10]], ptr @__msan_retval_tls, align 8786; CHECK-NEXT: ret i32 [[TMP11]]787;788 %res = call i32 @llvm.x86.avx512.mask.pcmpeq.w.512(<32 x i16> %a, <32 x i16> %b, i32 -1)789 ret i32 %res790}791 792define i32 @test_mask_pcmpeq_w(<32 x i16> %a, <32 x i16> %b, i32 %mask) nounwind #0 {793; CHECK-LABEL: @test_mask_pcmpeq_w(794; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 8795; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8796; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 8797; CHECK-NEXT: call void @llvm.donothing()798; CHECK-NEXT: [[TMP4:%.*]] = xor <32 x i16> [[A:%.*]], [[B:%.*]]799; CHECK-NEXT: [[TMP5:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]800; CHECK-NEXT: [[TMP6:%.*]] = icmp ne <32 x i16> [[TMP5]], zeroinitializer801; CHECK-NEXT: [[TMP7:%.*]] = xor <32 x i16> [[TMP5]], splat (i16 -1)802; CHECK-NEXT: [[TMP8:%.*]] = and <32 x i16> [[TMP7]], [[TMP4]]803; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <32 x i16> [[TMP8]], zeroinitializer804; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <32 x i1> [[TMP6]], [[TMP9]]805; CHECK-NEXT: [[TMP10:%.*]] = icmp eq <32 x i16> [[A]], [[B]]806; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>807; CHECK-NEXT: [[TMP12:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>808; CHECK-NEXT: [[TMP13:%.*]] = and <32 x i1> [[_MSPROP_ICMP]], [[TMP11]]809; CHECK-NEXT: [[TMP14:%.*]] = and <32 x i1> [[TMP10]], [[TMP11]]810; CHECK-NEXT: [[TMP15:%.*]] = and <32 x i1> [[_MSPROP_ICMP]], [[TMP12]]811; CHECK-NEXT: [[TMP16:%.*]] = or <32 x i1> [[TMP13]], [[TMP14]]812; CHECK-NEXT: [[TMP17:%.*]] = or <32 x i1> [[TMP16]], [[TMP15]]813; CHECK-NEXT: [[TMP18:%.*]] = and <32 x i1> [[TMP10]], [[TMP12]]814; CHECK-NEXT: [[TMP19:%.*]] = bitcast <32 x i1> [[TMP17]] to i32815; CHECK-NEXT: [[TMP20:%.*]] = bitcast <32 x i1> [[TMP18]] to i32816; CHECK-NEXT: store i32 [[TMP19]], ptr @__msan_retval_tls, align 8817; CHECK-NEXT: ret i32 [[TMP20]]818;819 %res = call i32 @llvm.x86.avx512.mask.pcmpeq.w.512(<32 x i16> %a, <32 x i16> %b, i32 %mask)820 ret i32 %res821}822 823declare i32 @llvm.x86.avx512.mask.pcmpeq.w.512(<32 x i16>, <32 x i16>, i32)824 825define i64 @test_pcmpgt_b(<64 x i8> %a, <64 x i8> %b) nounwind #0 {826; CHECK-LABEL: @test_pcmpgt_b(827; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 8828; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8829; CHECK-NEXT: call void @llvm.donothing()830; CHECK-NEXT: [[TMP3:%.*]] = xor <64 x i8> [[A:%.*]], splat (i8 -128)831; CHECK-NEXT: [[TMP4:%.*]] = xor <64 x i8> [[TMP1]], splat (i8 -1)832; CHECK-NEXT: [[TMP5:%.*]] = and <64 x i8> [[TMP3]], [[TMP4]]833; CHECK-NEXT: [[TMP6:%.*]] = or <64 x i8> [[TMP3]], [[TMP1]]834; CHECK-NEXT: [[TMP7:%.*]] = xor <64 x i8> [[B:%.*]], splat (i8 -128)835; CHECK-NEXT: [[TMP8:%.*]] = xor <64 x i8> [[TMP2]], splat (i8 -1)836; CHECK-NEXT: [[TMP9:%.*]] = and <64 x i8> [[TMP7]], [[TMP8]]837; CHECK-NEXT: [[TMP10:%.*]] = or <64 x i8> [[TMP7]], [[TMP2]]838; CHECK-NEXT: [[TMP11:%.*]] = icmp ugt <64 x i8> [[TMP5]], [[TMP10]]839; CHECK-NEXT: [[TMP12:%.*]] = icmp ugt <64 x i8> [[TMP6]], [[TMP9]]840; CHECK-NEXT: [[TMP13:%.*]] = xor <64 x i1> [[TMP11]], [[TMP12]]841; CHECK-NEXT: [[TMP14:%.*]] = icmp sgt <64 x i8> [[A]], [[B]]842; CHECK-NEXT: [[TMP15:%.*]] = bitcast <64 x i1> [[TMP13]] to i64843; CHECK-NEXT: [[TMP16:%.*]] = bitcast <64 x i1> [[TMP14]] to i64844; CHECK-NEXT: store i64 [[TMP15]], ptr @__msan_retval_tls, align 8845; CHECK-NEXT: ret i64 [[TMP16]]846;847 %res = call i64 @llvm.x86.avx512.mask.pcmpgt.b.512(<64 x i8> %a, <64 x i8> %b, i64 -1)848 ret i64 %res849}850 851define i64 @test_mask_pcmpgt_b(<64 x i8> %a, <64 x i8> %b, i64 %mask) nounwind #0 {852; CHECK-LABEL: @test_mask_pcmpgt_b(853; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 8854; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8855; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 8856; CHECK-NEXT: call void @llvm.donothing()857; CHECK-NEXT: [[TMP4:%.*]] = xor <64 x i8> [[A:%.*]], splat (i8 -128)858; CHECK-NEXT: [[TMP5:%.*]] = xor <64 x i8> [[TMP1]], splat (i8 -1)859; CHECK-NEXT: [[TMP6:%.*]] = and <64 x i8> [[TMP4]], [[TMP5]]860; CHECK-NEXT: [[TMP7:%.*]] = or <64 x i8> [[TMP4]], [[TMP1]]861; CHECK-NEXT: [[TMP8:%.*]] = xor <64 x i8> [[B:%.*]], splat (i8 -128)862; CHECK-NEXT: [[TMP9:%.*]] = xor <64 x i8> [[TMP2]], splat (i8 -1)863; CHECK-NEXT: [[TMP10:%.*]] = and <64 x i8> [[TMP8]], [[TMP9]]864; CHECK-NEXT: [[TMP11:%.*]] = or <64 x i8> [[TMP8]], [[TMP2]]865; CHECK-NEXT: [[TMP12:%.*]] = icmp ugt <64 x i8> [[TMP6]], [[TMP11]]866; CHECK-NEXT: [[TMP13:%.*]] = icmp ugt <64 x i8> [[TMP7]], [[TMP10]]867; CHECK-NEXT: [[TMP14:%.*]] = xor <64 x i1> [[TMP12]], [[TMP13]]868; CHECK-NEXT: [[TMP15:%.*]] = icmp sgt <64 x i8> [[A]], [[B]]869; CHECK-NEXT: [[TMP16:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>870; CHECK-NEXT: [[TMP17:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>871; CHECK-NEXT: [[TMP18:%.*]] = and <64 x i1> [[TMP14]], [[TMP16]]872; CHECK-NEXT: [[TMP19:%.*]] = and <64 x i1> [[TMP15]], [[TMP16]]873; CHECK-NEXT: [[TMP20:%.*]] = and <64 x i1> [[TMP14]], [[TMP17]]874; CHECK-NEXT: [[TMP21:%.*]] = or <64 x i1> [[TMP18]], [[TMP19]]875; CHECK-NEXT: [[TMP22:%.*]] = or <64 x i1> [[TMP21]], [[TMP20]]876; CHECK-NEXT: [[TMP23:%.*]] = and <64 x i1> [[TMP15]], [[TMP17]]877; CHECK-NEXT: [[TMP24:%.*]] = bitcast <64 x i1> [[TMP22]] to i64878; CHECK-NEXT: [[TMP25:%.*]] = bitcast <64 x i1> [[TMP23]] to i64879; CHECK-NEXT: store i64 [[TMP24]], ptr @__msan_retval_tls, align 8880; CHECK-NEXT: ret i64 [[TMP25]]881;882 %res = call i64 @llvm.x86.avx512.mask.pcmpgt.b.512(<64 x i8> %a, <64 x i8> %b, i64 %mask)883 ret i64 %res884}885 886declare i64 @llvm.x86.avx512.mask.pcmpgt.b.512(<64 x i8>, <64 x i8>, i64)887 888define i32 @test_pcmpgt_w(<32 x i16> %a, <32 x i16> %b) nounwind #0 {889; CHECK-LABEL: @test_pcmpgt_w(890; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 8891; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8892; CHECK-NEXT: call void @llvm.donothing()893; CHECK-NEXT: [[TMP3:%.*]] = xor <32 x i16> [[A:%.*]], splat (i16 -32768)894; CHECK-NEXT: [[TMP4:%.*]] = xor <32 x i16> [[TMP1]], splat (i16 -1)895; CHECK-NEXT: [[TMP5:%.*]] = and <32 x i16> [[TMP3]], [[TMP4]]896; CHECK-NEXT: [[TMP6:%.*]] = or <32 x i16> [[TMP3]], [[TMP1]]897; CHECK-NEXT: [[TMP7:%.*]] = xor <32 x i16> [[B:%.*]], splat (i16 -32768)898; CHECK-NEXT: [[TMP8:%.*]] = xor <32 x i16> [[TMP2]], splat (i16 -1)899; CHECK-NEXT: [[TMP9:%.*]] = and <32 x i16> [[TMP7]], [[TMP8]]900; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP7]], [[TMP2]]901; CHECK-NEXT: [[TMP11:%.*]] = icmp ugt <32 x i16> [[TMP5]], [[TMP10]]902; CHECK-NEXT: [[TMP12:%.*]] = icmp ugt <32 x i16> [[TMP6]], [[TMP9]]903; CHECK-NEXT: [[TMP13:%.*]] = xor <32 x i1> [[TMP11]], [[TMP12]]904; CHECK-NEXT: [[TMP14:%.*]] = icmp sgt <32 x i16> [[A]], [[B]]905; CHECK-NEXT: [[TMP15:%.*]] = bitcast <32 x i1> [[TMP13]] to i32906; CHECK-NEXT: [[TMP16:%.*]] = bitcast <32 x i1> [[TMP14]] to i32907; CHECK-NEXT: store i32 [[TMP15]], ptr @__msan_retval_tls, align 8908; CHECK-NEXT: ret i32 [[TMP16]]909;910 %res = call i32 @llvm.x86.avx512.mask.pcmpgt.w.512(<32 x i16> %a, <32 x i16> %b, i32 -1)911 ret i32 %res912}913 914define i32 @test_mask_pcmpgt_w(<32 x i16> %a, <32 x i16> %b, i32 %mask) nounwind #0 {915; CHECK-LABEL: @test_mask_pcmpgt_w(916; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 8917; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8918; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 8919; CHECK-NEXT: call void @llvm.donothing()920; CHECK-NEXT: [[TMP4:%.*]] = xor <32 x i16> [[A:%.*]], splat (i16 -32768)921; CHECK-NEXT: [[TMP5:%.*]] = xor <32 x i16> [[TMP1]], splat (i16 -1)922; CHECK-NEXT: [[TMP6:%.*]] = and <32 x i16> [[TMP4]], [[TMP5]]923; CHECK-NEXT: [[TMP7:%.*]] = or <32 x i16> [[TMP4]], [[TMP1]]924; CHECK-NEXT: [[TMP8:%.*]] = xor <32 x i16> [[B:%.*]], splat (i16 -32768)925; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i16> [[TMP2]], splat (i16 -1)926; CHECK-NEXT: [[TMP10:%.*]] = and <32 x i16> [[TMP8]], [[TMP9]]927; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP8]], [[TMP2]]928; CHECK-NEXT: [[TMP12:%.*]] = icmp ugt <32 x i16> [[TMP6]], [[TMP11]]929; CHECK-NEXT: [[TMP13:%.*]] = icmp ugt <32 x i16> [[TMP7]], [[TMP10]]930; CHECK-NEXT: [[TMP14:%.*]] = xor <32 x i1> [[TMP12]], [[TMP13]]931; CHECK-NEXT: [[TMP15:%.*]] = icmp sgt <32 x i16> [[A]], [[B]]932; CHECK-NEXT: [[TMP16:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>933; CHECK-NEXT: [[TMP17:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>934; CHECK-NEXT: [[TMP18:%.*]] = and <32 x i1> [[TMP14]], [[TMP16]]935; CHECK-NEXT: [[TMP19:%.*]] = and <32 x i1> [[TMP15]], [[TMP16]]936; CHECK-NEXT: [[TMP20:%.*]] = and <32 x i1> [[TMP14]], [[TMP17]]937; CHECK-NEXT: [[TMP21:%.*]] = or <32 x i1> [[TMP18]], [[TMP19]]938; CHECK-NEXT: [[TMP22:%.*]] = or <32 x i1> [[TMP21]], [[TMP20]]939; CHECK-NEXT: [[TMP23:%.*]] = and <32 x i1> [[TMP15]], [[TMP17]]940; CHECK-NEXT: [[TMP24:%.*]] = bitcast <32 x i1> [[TMP22]] to i32941; CHECK-NEXT: [[TMP25:%.*]] = bitcast <32 x i1> [[TMP23]] to i32942; CHECK-NEXT: store i32 [[TMP24]], ptr @__msan_retval_tls, align 8943; CHECK-NEXT: ret i32 [[TMP25]]944;945 %res = call i32 @llvm.x86.avx512.mask.pcmpgt.w.512(<32 x i16> %a, <32 x i16> %b, i32 %mask)946 ret i32 %res947}948 949declare i32 @llvm.x86.avx512.mask.pcmpgt.w.512(<32 x i16>, <32 x i16>, i32)950 951declare <64 x i8> @llvm.x86.avx512.mask.punpckhb.w.512(<64 x i8>, <64 x i8>, <64 x i8>, i64)952 953define <64 x i8> @test_int_x86_avx512_punpckhb_w_512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2) nounwind #0 {954; CHECK-LABEL: @test_int_x86_avx512_punpckhb_w_512(955; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 8956; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8957; CHECK-NEXT: call void @llvm.donothing()958; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <64 x i8> [[TMP1]], <64 x i8> [[TMP2]], <64 x i32> <i32 8, i32 72, i32 9, i32 73, i32 10, i32 74, i32 11, i32 75, i32 12, i32 76, i32 13, i32 77, i32 14, i32 78, i32 15, i32 79, i32 24, i32 88, i32 25, i32 89, i32 26, i32 90, i32 27, i32 91, i32 28, i32 92, i32 29, i32 93, i32 30, i32 94, i32 31, i32 95, i32 40, i32 104, i32 41, i32 105, i32 42, i32 106, i32 43, i32 107, i32 44, i32 108, i32 45, i32 109, i32 46, i32 110, i32 47, i32 111, i32 56, i32 120, i32 57, i32 121, i32 58, i32 122, i32 59, i32 123, i32 60, i32 124, i32 61, i32 125, i32 62, i32 126, i32 63, i32 127>959; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <64 x i8> [[X0:%.*]], <64 x i8> [[X1:%.*]], <64 x i32> <i32 8, i32 72, i32 9, i32 73, i32 10, i32 74, i32 11, i32 75, i32 12, i32 76, i32 13, i32 77, i32 14, i32 78, i32 15, i32 79, i32 24, i32 88, i32 25, i32 89, i32 26, i32 90, i32 27, i32 91, i32 28, i32 92, i32 29, i32 93, i32 30, i32 94, i32 31, i32 95, i32 40, i32 104, i32 41, i32 105, i32 42, i32 106, i32 43, i32 107, i32 44, i32 108, i32 45, i32 109, i32 46, i32 110, i32 47, i32 111, i32 56, i32 120, i32 57, i32 121, i32 58, i32 122, i32 59, i32 123, i32 60, i32 124, i32 61, i32 125, i32 62, i32 126, i32 63, i32 127>960; CHECK-NEXT: store <64 x i8> [[_MSPROP]], ptr @__msan_retval_tls, align 8961; CHECK-NEXT: ret <64 x i8> [[TMP3]]962;963 %res = call <64 x i8> @llvm.x86.avx512.mask.punpckhb.w.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 -1)964 ret <64 x i8> %res965}966 967define <64 x i8> @test_int_x86_avx512_mask_punpckhb_w_512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3) nounwind #0 {968; CHECK-LABEL: @test_int_x86_avx512_mask_punpckhb_w_512(969; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 8970; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8971; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 8972; CHECK-NEXT: [[TMP4:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 8973; CHECK-NEXT: call void @llvm.donothing()974; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <64 x i8> [[TMP1]], <64 x i8> [[TMP2]], <64 x i32> <i32 8, i32 72, i32 9, i32 73, i32 10, i32 74, i32 11, i32 75, i32 12, i32 76, i32 13, i32 77, i32 14, i32 78, i32 15, i32 79, i32 24, i32 88, i32 25, i32 89, i32 26, i32 90, i32 27, i32 91, i32 28, i32 92, i32 29, i32 93, i32 30, i32 94, i32 31, i32 95, i32 40, i32 104, i32 41, i32 105, i32 42, i32 106, i32 43, i32 107, i32 44, i32 108, i32 45, i32 109, i32 46, i32 110, i32 47, i32 111, i32 56, i32 120, i32 57, i32 121, i32 58, i32 122, i32 59, i32 123, i32 60, i32 124, i32 61, i32 125, i32 62, i32 126, i32 63, i32 127>975; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <64 x i8> [[X0:%.*]], <64 x i8> [[X1:%.*]], <64 x i32> <i32 8, i32 72, i32 9, i32 73, i32 10, i32 74, i32 11, i32 75, i32 12, i32 76, i32 13, i32 77, i32 14, i32 78, i32 15, i32 79, i32 24, i32 88, i32 25, i32 89, i32 26, i32 90, i32 27, i32 91, i32 28, i32 92, i32 29, i32 93, i32 30, i32 94, i32 31, i32 95, i32 40, i32 104, i32 41, i32 105, i32 42, i32 106, i32 43, i32 107, i32 44, i32 108, i32 45, i32 109, i32 46, i32 110, i32 47, i32 111, i32 56, i32 120, i32 57, i32 121, i32 58, i32 122, i32 59, i32 123, i32 60, i32 124, i32 61, i32 125, i32 62, i32 126, i32 63, i32 127>976; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>977; CHECK-NEXT: [[TMP7:%.*]] = bitcast i64 [[X3:%.*]] to <64 x i1>978; CHECK-NEXT: [[TMP8:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[_MSPROP]], <64 x i8> [[TMP4]]979; CHECK-NEXT: [[TMP9:%.*]] = xor <64 x i8> [[TMP5]], [[X2:%.*]]980; CHECK-NEXT: [[TMP10:%.*]] = or <64 x i8> [[TMP9]], [[_MSPROP]]981; CHECK-NEXT: [[TMP11:%.*]] = or <64 x i8> [[TMP10]], [[TMP4]]982; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[TMP11]], <64 x i8> [[TMP8]]983; CHECK-NEXT: [[TMP12:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[TMP5]], <64 x i8> [[X2]]984; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8985; CHECK-NEXT: ret <64 x i8> [[TMP12]]986;987 %res = call <64 x i8> @llvm.x86.avx512.mask.punpckhb.w.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3)988 ret <64 x i8> %res989}990 991declare <64 x i8> @llvm.x86.avx512.mask.punpcklb.w.512(<64 x i8>, <64 x i8>, <64 x i8>, i64)992 993define <64 x i8> @test_int_x86_avx512_punpcklb_w_512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2) nounwind #0 {994; CHECK-LABEL: @test_int_x86_avx512_punpcklb_w_512(995; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 8996; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8997; CHECK-NEXT: call void @llvm.donothing()998; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <64 x i8> [[TMP1]], <64 x i8> [[TMP2]], <64 x i32> <i32 0, i32 64, i32 1, i32 65, i32 2, i32 66, i32 3, i32 67, i32 4, i32 68, i32 5, i32 69, i32 6, i32 70, i32 7, i32 71, i32 16, i32 80, i32 17, i32 81, i32 18, i32 82, i32 19, i32 83, i32 20, i32 84, i32 21, i32 85, i32 22, i32 86, i32 23, i32 87, i32 32, i32 96, i32 33, i32 97, i32 34, i32 98, i32 35, i32 99, i32 36, i32 100, i32 37, i32 101, i32 38, i32 102, i32 39, i32 103, i32 48, i32 112, i32 49, i32 113, i32 50, i32 114, i32 51, i32 115, i32 52, i32 116, i32 53, i32 117, i32 54, i32 118, i32 55, i32 119>999; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <64 x i8> [[X0:%.*]], <64 x i8> [[X1:%.*]], <64 x i32> <i32 0, i32 64, i32 1, i32 65, i32 2, i32 66, i32 3, i32 67, i32 4, i32 68, i32 5, i32 69, i32 6, i32 70, i32 7, i32 71, i32 16, i32 80, i32 17, i32 81, i32 18, i32 82, i32 19, i32 83, i32 20, i32 84, i32 21, i32 85, i32 22, i32 86, i32 23, i32 87, i32 32, i32 96, i32 33, i32 97, i32 34, i32 98, i32 35, i32 99, i32 36, i32 100, i32 37, i32 101, i32 38, i32 102, i32 39, i32 103, i32 48, i32 112, i32 49, i32 113, i32 50, i32 114, i32 51, i32 115, i32 52, i32 116, i32 53, i32 117, i32 54, i32 118, i32 55, i32 119>1000; CHECK-NEXT: store <64 x i8> [[_MSPROP]], ptr @__msan_retval_tls, align 81001; CHECK-NEXT: ret <64 x i8> [[TMP3]]1002;1003 %res = call <64 x i8> @llvm.x86.avx512.mask.punpcklb.w.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 -1)1004 ret <64 x i8> %res1005}1006 1007define <64 x i8> @test_int_x86_avx512_mask_punpcklb_w_512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3) nounwind #0 {1008; CHECK-LABEL: @test_int_x86_avx512_mask_punpcklb_w_512(1009; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 81010; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81011; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 81012; CHECK-NEXT: [[TMP4:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 81013; CHECK-NEXT: call void @llvm.donothing()1014; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <64 x i8> [[TMP1]], <64 x i8> [[TMP2]], <64 x i32> <i32 0, i32 64, i32 1, i32 65, i32 2, i32 66, i32 3, i32 67, i32 4, i32 68, i32 5, i32 69, i32 6, i32 70, i32 7, i32 71, i32 16, i32 80, i32 17, i32 81, i32 18, i32 82, i32 19, i32 83, i32 20, i32 84, i32 21, i32 85, i32 22, i32 86, i32 23, i32 87, i32 32, i32 96, i32 33, i32 97, i32 34, i32 98, i32 35, i32 99, i32 36, i32 100, i32 37, i32 101, i32 38, i32 102, i32 39, i32 103, i32 48, i32 112, i32 49, i32 113, i32 50, i32 114, i32 51, i32 115, i32 52, i32 116, i32 53, i32 117, i32 54, i32 118, i32 55, i32 119>1015; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <64 x i8> [[X0:%.*]], <64 x i8> [[X1:%.*]], <64 x i32> <i32 0, i32 64, i32 1, i32 65, i32 2, i32 66, i32 3, i32 67, i32 4, i32 68, i32 5, i32 69, i32 6, i32 70, i32 7, i32 71, i32 16, i32 80, i32 17, i32 81, i32 18, i32 82, i32 19, i32 83, i32 20, i32 84, i32 21, i32 85, i32 22, i32 86, i32 23, i32 87, i32 32, i32 96, i32 33, i32 97, i32 34, i32 98, i32 35, i32 99, i32 36, i32 100, i32 37, i32 101, i32 38, i32 102, i32 39, i32 103, i32 48, i32 112, i32 49, i32 113, i32 50, i32 114, i32 51, i32 115, i32 52, i32 116, i32 53, i32 117, i32 54, i32 118, i32 55, i32 119>1016; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>1017; CHECK-NEXT: [[TMP7:%.*]] = bitcast i64 [[X3:%.*]] to <64 x i1>1018; CHECK-NEXT: [[TMP8:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[_MSPROP]], <64 x i8> [[TMP4]]1019; CHECK-NEXT: [[TMP9:%.*]] = xor <64 x i8> [[TMP5]], [[X2:%.*]]1020; CHECK-NEXT: [[TMP10:%.*]] = or <64 x i8> [[TMP9]], [[_MSPROP]]1021; CHECK-NEXT: [[TMP11:%.*]] = or <64 x i8> [[TMP10]], [[TMP4]]1022; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[TMP11]], <64 x i8> [[TMP8]]1023; CHECK-NEXT: [[TMP12:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[TMP5]], <64 x i8> [[X2]]1024; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81025; CHECK-NEXT: ret <64 x i8> [[TMP12]]1026;1027 %res = call <64 x i8> @llvm.x86.avx512.mask.punpcklb.w.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3)1028 ret <64 x i8> %res1029}1030 1031declare <32 x i16> @llvm.x86.avx512.mask.punpckhw.d.512(<32 x i16>, <32 x i16>, <32 x i16>, i32)1032 1033define <32 x i16> @test_int_x86_avx512_punpckhw_d_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2) nounwind #0 {1034; CHECK-LABEL: @test_int_x86_avx512_punpckhw_d_512(1035; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81036; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81037; CHECK-NEXT: call void @llvm.donothing()1038; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <32 x i16> [[TMP1]], <32 x i16> [[TMP2]], <32 x i32> <i32 4, i32 36, i32 5, i32 37, i32 6, i32 38, i32 7, i32 39, i32 12, i32 44, i32 13, i32 45, i32 14, i32 46, i32 15, i32 47, i32 20, i32 52, i32 21, i32 53, i32 22, i32 54, i32 23, i32 55, i32 28, i32 60, i32 29, i32 61, i32 30, i32 62, i32 31, i32 63>1039; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]], <32 x i32> <i32 4, i32 36, i32 5, i32 37, i32 6, i32 38, i32 7, i32 39, i32 12, i32 44, i32 13, i32 45, i32 14, i32 46, i32 15, i32 47, i32 20, i32 52, i32 21, i32 53, i32 22, i32 54, i32 23, i32 55, i32 28, i32 60, i32 29, i32 61, i32 30, i32 62, i32 31, i32 63>1040; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 81041; CHECK-NEXT: ret <32 x i16> [[TMP3]]1042;1043 %res = call <32 x i16> @llvm.x86.avx512.mask.punpckhw.d.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 -1)1044 ret <32 x i16> %res1045}1046 1047define <32 x i16> @test_int_x86_avx512_mask_punpckhw_d_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {1048; CHECK-LABEL: @test_int_x86_avx512_mask_punpckhw_d_512(1049; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81050; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81051; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 81052; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 81053; CHECK-NEXT: call void @llvm.donothing()1054; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <32 x i16> [[TMP1]], <32 x i16> [[TMP2]], <32 x i32> <i32 4, i32 36, i32 5, i32 37, i32 6, i32 38, i32 7, i32 39, i32 12, i32 44, i32 13, i32 45, i32 14, i32 46, i32 15, i32 47, i32 20, i32 52, i32 21, i32 53, i32 22, i32 54, i32 23, i32 55, i32 28, i32 60, i32 29, i32 61, i32 30, i32 62, i32 31, i32 63>1055; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]], <32 x i32> <i32 4, i32 36, i32 5, i32 37, i32 6, i32 38, i32 7, i32 39, i32 12, i32 44, i32 13, i32 45, i32 14, i32 46, i32 15, i32 47, i32 20, i32 52, i32 21, i32 53, i32 22, i32 54, i32 23, i32 55, i32 28, i32 60, i32 29, i32 61, i32 30, i32 62, i32 31, i32 63>1056; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>1057; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>1058; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]1059; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i16> [[TMP5]], [[X2:%.*]]1060; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[_MSPROP]]1061; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP4]]1062; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP11]], <32 x i16> [[TMP8]]1063; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP5]], <32 x i16> [[X2]]1064; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81065; CHECK-NEXT: ret <32 x i16> [[TMP12]]1066;1067 %res = call <32 x i16> @llvm.x86.avx512.mask.punpckhw.d.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3)1068 ret <32 x i16> %res1069}1070 1071declare <32 x i16> @llvm.x86.avx512.mask.punpcklw.d.512(<32 x i16>, <32 x i16>, <32 x i16>, i32)1072 1073define <32 x i16> @test_int_x86_avx512_punpcklw_d_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2) nounwind #0 {1074; CHECK-LABEL: @test_int_x86_avx512_punpcklw_d_512(1075; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81076; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81077; CHECK-NEXT: call void @llvm.donothing()1078; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <32 x i16> [[TMP1]], <32 x i16> [[TMP2]], <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 8, i32 40, i32 9, i32 41, i32 10, i32 42, i32 11, i32 43, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 24, i32 56, i32 25, i32 57, i32 26, i32 58, i32 27, i32 59>1079; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]], <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 8, i32 40, i32 9, i32 41, i32 10, i32 42, i32 11, i32 43, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 24, i32 56, i32 25, i32 57, i32 26, i32 58, i32 27, i32 59>1080; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 81081; CHECK-NEXT: ret <32 x i16> [[TMP3]]1082;1083 %res = call <32 x i16> @llvm.x86.avx512.mask.punpcklw.d.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 -1)1084 ret <32 x i16> %res1085}1086 1087define <32 x i16> @test_int_x86_avx512_mask_punpcklw_d_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {1088; CHECK-LABEL: @test_int_x86_avx512_mask_punpcklw_d_512(1089; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81090; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81091; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 81092; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 81093; CHECK-NEXT: call void @llvm.donothing()1094; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <32 x i16> [[TMP1]], <32 x i16> [[TMP2]], <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 8, i32 40, i32 9, i32 41, i32 10, i32 42, i32 11, i32 43, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 24, i32 56, i32 25, i32 57, i32 26, i32 58, i32 27, i32 59>1095; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]], <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 8, i32 40, i32 9, i32 41, i32 10, i32 42, i32 11, i32 43, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 24, i32 56, i32 25, i32 57, i32 26, i32 58, i32 27, i32 59>1096; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>1097; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>1098; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]1099; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i16> [[TMP5]], [[X2:%.*]]1100; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[_MSPROP]]1101; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP4]]1102; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP11]], <32 x i16> [[TMP8]]1103; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP5]], <32 x i16> [[X2]]1104; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81105; CHECK-NEXT: ret <32 x i16> [[TMP12]]1106;1107 %res = call <32 x i16> @llvm.x86.avx512.mask.punpcklw.d.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3)1108 ret <32 x i16> %res1109}1110 1111declare <64 x i8> @llvm.x86.avx512.mask.pmaxs.b.512(<64 x i8>, <64 x i8>, <64 x i8>, i64)1112 1113define <64 x i8> @test_int_x86_avx512_pmaxs_b_512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2) nounwind #0 {1114; CHECK-LABEL: @test_int_x86_avx512_pmaxs_b_512(1115; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 81116; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81117; CHECK-NEXT: call void @llvm.donothing()1118; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]1119; CHECK-NEXT: [[TMP3:%.*]] = call <64 x i8> @llvm.smax.v64i8(<64 x i8> [[X0:%.*]], <64 x i8> [[X1:%.*]])1120; CHECK-NEXT: store <64 x i8> [[_MSPROP]], ptr @__msan_retval_tls, align 81121; CHECK-NEXT: ret <64 x i8> [[TMP3]]1122;1123 %res = call <64 x i8> @llvm.x86.avx512.mask.pmaxs.b.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 -1)1124 ret <64 x i8> %res1125}1126 1127define <64 x i8> @test_int_x86_avx512_mask_pmaxs_b_512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3) nounwind #0 {1128; CHECK-LABEL: @test_int_x86_avx512_mask_pmaxs_b_512(1129; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 81130; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81131; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 81132; CHECK-NEXT: [[TMP4:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 81133; CHECK-NEXT: call void @llvm.donothing()1134; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]1135; CHECK-NEXT: [[TMP5:%.*]] = call <64 x i8> @llvm.smax.v64i8(<64 x i8> [[X0:%.*]], <64 x i8> [[X1:%.*]])1136; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>1137; CHECK-NEXT: [[TMP7:%.*]] = bitcast i64 [[X3:%.*]] to <64 x i1>1138; CHECK-NEXT: [[TMP8:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[_MSPROP]], <64 x i8> [[TMP4]]1139; CHECK-NEXT: [[TMP9:%.*]] = xor <64 x i8> [[TMP5]], [[X2:%.*]]1140; CHECK-NEXT: [[TMP10:%.*]] = or <64 x i8> [[TMP9]], [[_MSPROP]]1141; CHECK-NEXT: [[TMP11:%.*]] = or <64 x i8> [[TMP10]], [[TMP4]]1142; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[TMP11]], <64 x i8> [[TMP8]]1143; CHECK-NEXT: [[TMP12:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[TMP5]], <64 x i8> [[X2]]1144; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81145; CHECK-NEXT: ret <64 x i8> [[TMP12]]1146;1147 %res = call <64 x i8> @llvm.x86.avx512.mask.pmaxs.b.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3)1148 ret <64 x i8> %res1149}1150 1151declare <32 x i16> @llvm.x86.avx512.mask.pmaxs.w.512(<32 x i16>, <32 x i16>, <32 x i16>, i32)1152 1153define <32 x i16> @test_int_x86_avx512_pmaxs_w_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2) nounwind #0 {1154; CHECK-LABEL: @test_int_x86_avx512_pmaxs_w_512(1155; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81156; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81157; CHECK-NEXT: call void @llvm.donothing()1158; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]1159; CHECK-NEXT: [[TMP3:%.*]] = call <32 x i16> @llvm.smax.v32i16(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])1160; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 81161; CHECK-NEXT: ret <32 x i16> [[TMP3]]1162;1163 %res = call <32 x i16> @llvm.x86.avx512.mask.pmaxs.w.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 -1)1164 ret <32 x i16> %res1165}1166 1167define <32 x i16> @test_int_x86_avx512_mask_pmaxs_w_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {1168; CHECK-LABEL: @test_int_x86_avx512_mask_pmaxs_w_512(1169; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81170; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81171; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 81172; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 81173; CHECK-NEXT: call void @llvm.donothing()1174; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]1175; CHECK-NEXT: [[TMP5:%.*]] = call <32 x i16> @llvm.smax.v32i16(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])1176; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>1177; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>1178; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]1179; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i16> [[TMP5]], [[X2:%.*]]1180; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[_MSPROP]]1181; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP4]]1182; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP11]], <32 x i16> [[TMP8]]1183; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP5]], <32 x i16> [[X2]]1184; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81185; CHECK-NEXT: ret <32 x i16> [[TMP12]]1186;1187 %res = call <32 x i16> @llvm.x86.avx512.mask.pmaxs.w.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3)1188 ret <32 x i16> %res1189}1190 1191declare <64 x i8> @llvm.x86.avx512.mask.pmaxu.b.512(<64 x i8>, <64 x i8>, <64 x i8>, i64)1192 1193define <64 x i8> @test_int_x86_avx512_pmaxu_b_512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2) nounwind #0 {1194; CHECK-LABEL: @test_int_x86_avx512_pmaxu_b_512(1195; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 81196; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81197; CHECK-NEXT: call void @llvm.donothing()1198; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]1199; CHECK-NEXT: [[TMP3:%.*]] = call <64 x i8> @llvm.umax.v64i8(<64 x i8> [[X0:%.*]], <64 x i8> [[X1:%.*]])1200; CHECK-NEXT: store <64 x i8> [[_MSPROP]], ptr @__msan_retval_tls, align 81201; CHECK-NEXT: ret <64 x i8> [[TMP3]]1202;1203 %res = call <64 x i8> @llvm.x86.avx512.mask.pmaxu.b.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 -1)1204 ret <64 x i8> %res1205}1206 1207define <64 x i8> @test_int_x86_avx512_mask_pmaxu_b_512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3) nounwind #0 {1208; CHECK-LABEL: @test_int_x86_avx512_mask_pmaxu_b_512(1209; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 81210; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81211; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 81212; CHECK-NEXT: [[TMP4:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 81213; CHECK-NEXT: call void @llvm.donothing()1214; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]1215; CHECK-NEXT: [[TMP5:%.*]] = call <64 x i8> @llvm.umax.v64i8(<64 x i8> [[X0:%.*]], <64 x i8> [[X1:%.*]])1216; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>1217; CHECK-NEXT: [[TMP7:%.*]] = bitcast i64 [[X3:%.*]] to <64 x i1>1218; CHECK-NEXT: [[TMP8:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[_MSPROP]], <64 x i8> [[TMP4]]1219; CHECK-NEXT: [[TMP9:%.*]] = xor <64 x i8> [[TMP5]], [[X2:%.*]]1220; CHECK-NEXT: [[TMP10:%.*]] = or <64 x i8> [[TMP9]], [[_MSPROP]]1221; CHECK-NEXT: [[TMP11:%.*]] = or <64 x i8> [[TMP10]], [[TMP4]]1222; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[TMP11]], <64 x i8> [[TMP8]]1223; CHECK-NEXT: [[TMP12:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[TMP5]], <64 x i8> [[X2]]1224; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81225; CHECK-NEXT: ret <64 x i8> [[TMP12]]1226;1227 %res = call <64 x i8> @llvm.x86.avx512.mask.pmaxu.b.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3)1228 ret <64 x i8> %res1229}1230 1231declare <32 x i16> @llvm.x86.avx512.mask.pmaxu.w.512(<32 x i16>, <32 x i16>, <32 x i16>, i32)1232 1233define <32 x i16> @test_int_x86_avx512_pmaxu_w_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2) nounwind #0 {1234; CHECK-LABEL: @test_int_x86_avx512_pmaxu_w_512(1235; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81236; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81237; CHECK-NEXT: call void @llvm.donothing()1238; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]1239; CHECK-NEXT: [[TMP3:%.*]] = call <32 x i16> @llvm.umax.v32i16(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])1240; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 81241; CHECK-NEXT: ret <32 x i16> [[TMP3]]1242;1243 %res = call <32 x i16> @llvm.x86.avx512.mask.pmaxu.w.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 -1)1244 ret <32 x i16> %res1245}1246 1247define <32 x i16> @test_int_x86_avx512_mask_pmaxu_w_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {1248; CHECK-LABEL: @test_int_x86_avx512_mask_pmaxu_w_512(1249; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81250; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81251; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 81252; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 81253; CHECK-NEXT: call void @llvm.donothing()1254; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]1255; CHECK-NEXT: [[TMP5:%.*]] = call <32 x i16> @llvm.umax.v32i16(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])1256; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>1257; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>1258; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]1259; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i16> [[TMP5]], [[X2:%.*]]1260; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[_MSPROP]]1261; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP4]]1262; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP11]], <32 x i16> [[TMP8]]1263; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP5]], <32 x i16> [[X2]]1264; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81265; CHECK-NEXT: ret <32 x i16> [[TMP12]]1266;1267 %res = call <32 x i16> @llvm.x86.avx512.mask.pmaxu.w.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3)1268 ret <32 x i16> %res1269}1270 1271declare <64 x i8> @llvm.x86.avx512.mask.pmins.b.512(<64 x i8>, <64 x i8>, <64 x i8>, i64)1272 1273define <64 x i8> @test_int_x86_avx512_pmins_b_512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2) nounwind #0 {1274; CHECK-LABEL: @test_int_x86_avx512_pmins_b_512(1275; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 81276; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81277; CHECK-NEXT: call void @llvm.donothing()1278; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]1279; CHECK-NEXT: [[TMP3:%.*]] = call <64 x i8> @llvm.smin.v64i8(<64 x i8> [[X0:%.*]], <64 x i8> [[X1:%.*]])1280; CHECK-NEXT: store <64 x i8> [[_MSPROP]], ptr @__msan_retval_tls, align 81281; CHECK-NEXT: ret <64 x i8> [[TMP3]]1282;1283 %res = call <64 x i8> @llvm.x86.avx512.mask.pmins.b.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 -1)1284 ret <64 x i8> %res1285}1286 1287define <64 x i8> @test_int_x86_avx512_mask_pmins_b_512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3) nounwind #0 {1288; CHECK-LABEL: @test_int_x86_avx512_mask_pmins_b_512(1289; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 81290; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81291; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 81292; CHECK-NEXT: [[TMP4:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 81293; CHECK-NEXT: call void @llvm.donothing()1294; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]1295; CHECK-NEXT: [[TMP5:%.*]] = call <64 x i8> @llvm.smin.v64i8(<64 x i8> [[X0:%.*]], <64 x i8> [[X1:%.*]])1296; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>1297; CHECK-NEXT: [[TMP7:%.*]] = bitcast i64 [[X3:%.*]] to <64 x i1>1298; CHECK-NEXT: [[TMP8:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[_MSPROP]], <64 x i8> [[TMP4]]1299; CHECK-NEXT: [[TMP9:%.*]] = xor <64 x i8> [[TMP5]], [[X2:%.*]]1300; CHECK-NEXT: [[TMP10:%.*]] = or <64 x i8> [[TMP9]], [[_MSPROP]]1301; CHECK-NEXT: [[TMP11:%.*]] = or <64 x i8> [[TMP10]], [[TMP4]]1302; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[TMP11]], <64 x i8> [[TMP8]]1303; CHECK-NEXT: [[TMP12:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[TMP5]], <64 x i8> [[X2]]1304; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81305; CHECK-NEXT: ret <64 x i8> [[TMP12]]1306;1307 %res = call <64 x i8> @llvm.x86.avx512.mask.pmins.b.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3)1308 ret <64 x i8> %res1309}1310 1311declare <32 x i16> @llvm.x86.avx512.mask.pmins.w.512(<32 x i16>, <32 x i16>, <32 x i16>, i32)1312 1313define <32 x i16> @test_int_x86_avx512_pmins_w_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2) nounwind #0 {1314; CHECK-LABEL: @test_int_x86_avx512_pmins_w_512(1315; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81316; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81317; CHECK-NEXT: call void @llvm.donothing()1318; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]1319; CHECK-NEXT: [[TMP3:%.*]] = call <32 x i16> @llvm.smin.v32i16(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])1320; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 81321; CHECK-NEXT: ret <32 x i16> [[TMP3]]1322;1323 %res = call <32 x i16> @llvm.x86.avx512.mask.pmins.w.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 -1)1324 ret <32 x i16> %res1325}1326 1327define <32 x i16> @test_int_x86_avx512_mask_pmins_w_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {1328; CHECK-LABEL: @test_int_x86_avx512_mask_pmins_w_512(1329; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81330; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81331; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 81332; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 81333; CHECK-NEXT: call void @llvm.donothing()1334; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]1335; CHECK-NEXT: [[TMP5:%.*]] = call <32 x i16> @llvm.smin.v32i16(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])1336; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>1337; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>1338; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]1339; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i16> [[TMP5]], [[X2:%.*]]1340; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[_MSPROP]]1341; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP4]]1342; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP11]], <32 x i16> [[TMP8]]1343; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP5]], <32 x i16> [[X2]]1344; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81345; CHECK-NEXT: ret <32 x i16> [[TMP12]]1346;1347 %res = call <32 x i16> @llvm.x86.avx512.mask.pmins.w.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3)1348 ret <32 x i16> %res1349}1350 1351declare <64 x i8> @llvm.x86.avx512.mask.pminu.b.512(<64 x i8>, <64 x i8>, <64 x i8>, i64)1352 1353define <64 x i8> @test_int_x86_avx512_pminu_b_512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2) nounwind #0 {1354; CHECK-LABEL: @test_int_x86_avx512_pminu_b_512(1355; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 81356; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81357; CHECK-NEXT: call void @llvm.donothing()1358; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]1359; CHECK-NEXT: [[TMP3:%.*]] = call <64 x i8> @llvm.umin.v64i8(<64 x i8> [[X0:%.*]], <64 x i8> [[X1:%.*]])1360; CHECK-NEXT: store <64 x i8> [[_MSPROP]], ptr @__msan_retval_tls, align 81361; CHECK-NEXT: ret <64 x i8> [[TMP3]]1362;1363 %res = call <64 x i8> @llvm.x86.avx512.mask.pminu.b.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 -1)1364 ret <64 x i8> %res1365}1366 1367define <64 x i8> @test_int_x86_avx512_mask_pminu_b_512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3) nounwind #0 {1368; CHECK-LABEL: @test_int_x86_avx512_mask_pminu_b_512(1369; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 81370; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81371; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 81372; CHECK-NEXT: [[TMP4:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 81373; CHECK-NEXT: call void @llvm.donothing()1374; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]1375; CHECK-NEXT: [[TMP5:%.*]] = call <64 x i8> @llvm.umin.v64i8(<64 x i8> [[X0:%.*]], <64 x i8> [[X1:%.*]])1376; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>1377; CHECK-NEXT: [[TMP7:%.*]] = bitcast i64 [[X3:%.*]] to <64 x i1>1378; CHECK-NEXT: [[TMP8:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[_MSPROP]], <64 x i8> [[TMP4]]1379; CHECK-NEXT: [[TMP9:%.*]] = xor <64 x i8> [[TMP5]], [[X2:%.*]]1380; CHECK-NEXT: [[TMP10:%.*]] = or <64 x i8> [[TMP9]], [[_MSPROP]]1381; CHECK-NEXT: [[TMP11:%.*]] = or <64 x i8> [[TMP10]], [[TMP4]]1382; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[TMP11]], <64 x i8> [[TMP8]]1383; CHECK-NEXT: [[TMP12:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[TMP5]], <64 x i8> [[X2]]1384; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81385; CHECK-NEXT: ret <64 x i8> [[TMP12]]1386;1387 %res = call <64 x i8> @llvm.x86.avx512.mask.pminu.b.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3)1388 ret <64 x i8> %res1389}1390 1391declare <32 x i16> @llvm.x86.avx512.mask.pminu.w.512(<32 x i16>, <32 x i16>, <32 x i16>, i32)1392 1393define <32 x i16> @test_int_x86_avx512_pminu_w_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2) nounwind #0 {1394; CHECK-LABEL: @test_int_x86_avx512_pminu_w_512(1395; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81396; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81397; CHECK-NEXT: call void @llvm.donothing()1398; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]1399; CHECK-NEXT: [[TMP3:%.*]] = call <32 x i16> @llvm.umin.v32i16(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])1400; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 81401; CHECK-NEXT: ret <32 x i16> [[TMP3]]1402;1403 %res = call <32 x i16> @llvm.x86.avx512.mask.pminu.w.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 -1)1404 ret <32 x i16> %res1405}1406 1407define <32 x i16> @test_int_x86_avx512_mask_pminu_w_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {1408; CHECK-LABEL: @test_int_x86_avx512_mask_pminu_w_512(1409; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81410; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81411; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 81412; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 81413; CHECK-NEXT: call void @llvm.donothing()1414; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]1415; CHECK-NEXT: [[TMP5:%.*]] = call <32 x i16> @llvm.umin.v32i16(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])1416; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>1417; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>1418; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]1419; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i16> [[TMP5]], [[X2:%.*]]1420; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[_MSPROP]]1421; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP4]]1422; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP11]], <32 x i16> [[TMP8]]1423; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP5]], <32 x i16> [[X2]]1424; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81425; CHECK-NEXT: ret <32 x i16> [[TMP12]]1426;1427 %res = call <32 x i16> @llvm.x86.avx512.mask.pminu.w.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3)1428 ret <32 x i16> %res1429}1430 1431declare <32 x i16> @llvm.x86.avx512.mask.pmovzxb.w.512(<32 x i8>, <32 x i16>, i32)1432 1433define <32 x i16> @test_int_x86_avx512_pmovzxb_w_512(<32 x i8> %x0, <32 x i16> %x1) nounwind #0 {1434; CHECK-LABEL: @test_int_x86_avx512_pmovzxb_w_512(1435; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i8>, ptr @__msan_param_tls, align 81436; CHECK-NEXT: call void @llvm.donothing()1437; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <32 x i8> [[TMP1]], <32 x i8> splat (i8 -1), <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>1438; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <32 x i8> [[X0:%.*]], <32 x i8> poison, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>1439; CHECK-NEXT: [[_MSPROP1:%.*]] = zext <32 x i8> [[_MSPROP]] to <32 x i16>1440; CHECK-NEXT: [[TMP3:%.*]] = zext <32 x i8> [[TMP2]] to <32 x i16>1441; CHECK-NEXT: store <32 x i16> [[_MSPROP1]], ptr @__msan_retval_tls, align 81442; CHECK-NEXT: ret <32 x i16> [[TMP3]]1443;1444 %res = call <32 x i16> @llvm.x86.avx512.mask.pmovzxb.w.512(<32 x i8> %x0, <32 x i16> %x1, i32 -1)1445 ret <32 x i16> %res1446}1447 1448define <32 x i16> @test_int_x86_avx512_mask_pmovzxb_w_512(<32 x i8> %x0, <32 x i16> %x1, i32 %x2) nounwind #0 {1449; CHECK-LABEL: @test_int_x86_avx512_mask_pmovzxb_w_512(1450; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i8>, ptr @__msan_param_tls, align 81451; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 96), align 81452; CHECK-NEXT: [[TMP3:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 81453; CHECK-NEXT: call void @llvm.donothing()1454; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <32 x i8> [[TMP1]], <32 x i8> splat (i8 -1), <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>1455; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <32 x i8> [[X0:%.*]], <32 x i8> poison, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>1456; CHECK-NEXT: [[_MSPROP1:%.*]] = zext <32 x i8> [[_MSPROP]] to <32 x i16>1457; CHECK-NEXT: [[TMP5:%.*]] = zext <32 x i8> [[TMP4]] to <32 x i16>1458; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP2]] to <32 x i1>1459; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[X2:%.*]] to <32 x i1>1460; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[_MSPROP1]], <32 x i16> [[TMP3]]1461; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i16> [[TMP5]], [[X1:%.*]]1462; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[_MSPROP1]]1463; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP3]]1464; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP11]], <32 x i16> [[TMP8]]1465; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP5]], <32 x i16> [[X1]]1466; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81467; CHECK-NEXT: ret <32 x i16> [[TMP12]]1468;1469 %res = call <32 x i16> @llvm.x86.avx512.mask.pmovzxb.w.512(<32 x i8> %x0, <32 x i16> %x1, i32 %x2)1470 ret <32 x i16> %res1471}1472 1473define <32 x i16> @test_int_x86_avx512_maskz_pmovzxb_w_512(<32 x i8> %x0, i32 %x2) nounwind #0 {1474; CHECK-LABEL: @test_int_x86_avx512_maskz_pmovzxb_w_512(1475; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i8>, ptr @__msan_param_tls, align 81476; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 81477; CHECK-NEXT: call void @llvm.donothing()1478; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <32 x i8> [[TMP1]], <32 x i8> splat (i8 -1), <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>1479; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <32 x i8> [[X0:%.*]], <32 x i8> poison, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>1480; CHECK-NEXT: [[_MSPROP1:%.*]] = zext <32 x i8> [[_MSPROP]] to <32 x i16>1481; CHECK-NEXT: [[TMP4:%.*]] = zext <32 x i8> [[TMP3]] to <32 x i16>1482; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[TMP2]] to <32 x i1>1483; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[X2:%.*]] to <32 x i1>1484; CHECK-NEXT: [[TMP7:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[_MSPROP1]], <32 x i16> zeroinitializer1485; CHECK-NEXT: [[TMP8:%.*]] = xor <32 x i16> [[TMP4]], zeroinitializer1486; CHECK-NEXT: [[TMP9:%.*]] = or <32 x i16> [[TMP8]], [[_MSPROP1]]1487; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], zeroinitializer1488; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP5]], <32 x i16> [[TMP10]], <32 x i16> [[TMP7]]1489; CHECK-NEXT: [[TMP11:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP4]], <32 x i16> zeroinitializer1490; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81491; CHECK-NEXT: ret <32 x i16> [[TMP11]]1492;1493 %res = call <32 x i16> @llvm.x86.avx512.mask.pmovzxb.w.512(<32 x i8> %x0, <32 x i16> zeroinitializer, i32 %x2)1494 ret <32 x i16> %res1495}1496 1497declare <32 x i16> @llvm.x86.avx512.mask.pmovsxb.w.512(<32 x i8>, <32 x i16>, i32)1498 1499define <32 x i16> @test_int_x86_avx512_pmovsxb_w_512(<32 x i8> %x0, <32 x i16> %x1) nounwind #0 {1500; CHECK-LABEL: @test_int_x86_avx512_pmovsxb_w_512(1501; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i8>, ptr @__msan_param_tls, align 81502; CHECK-NEXT: call void @llvm.donothing()1503; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <32 x i8> [[TMP1]], <32 x i8> splat (i8 -1), <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>1504; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <32 x i8> [[X0:%.*]], <32 x i8> poison, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>1505; CHECK-NEXT: [[_MSPROP1:%.*]] = sext <32 x i8> [[_MSPROP]] to <32 x i16>1506; CHECK-NEXT: [[TMP3:%.*]] = sext <32 x i8> [[TMP2]] to <32 x i16>1507; CHECK-NEXT: store <32 x i16> [[_MSPROP1]], ptr @__msan_retval_tls, align 81508; CHECK-NEXT: ret <32 x i16> [[TMP3]]1509;1510 %res = call <32 x i16> @llvm.x86.avx512.mask.pmovsxb.w.512(<32 x i8> %x0, <32 x i16> %x1, i32 -1)1511 ret <32 x i16> %res1512}1513 1514define <32 x i16> @test_int_x86_avx512_mask_pmovsxb_w_512(<32 x i8> %x0, <32 x i16> %x1, i32 %x2) nounwind #0 {1515; CHECK-LABEL: @test_int_x86_avx512_mask_pmovsxb_w_512(1516; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i8>, ptr @__msan_param_tls, align 81517; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 96), align 81518; CHECK-NEXT: [[TMP3:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 81519; CHECK-NEXT: call void @llvm.donothing()1520; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <32 x i8> [[TMP1]], <32 x i8> splat (i8 -1), <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>1521; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <32 x i8> [[X0:%.*]], <32 x i8> poison, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>1522; CHECK-NEXT: [[_MSPROP1:%.*]] = sext <32 x i8> [[_MSPROP]] to <32 x i16>1523; CHECK-NEXT: [[TMP5:%.*]] = sext <32 x i8> [[TMP4]] to <32 x i16>1524; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP2]] to <32 x i1>1525; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[X2:%.*]] to <32 x i1>1526; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[_MSPROP1]], <32 x i16> [[TMP3]]1527; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i16> [[TMP5]], [[X1:%.*]]1528; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[_MSPROP1]]1529; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP3]]1530; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP11]], <32 x i16> [[TMP8]]1531; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP5]], <32 x i16> [[X1]]1532; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81533; CHECK-NEXT: ret <32 x i16> [[TMP12]]1534;1535 %res = call <32 x i16> @llvm.x86.avx512.mask.pmovsxb.w.512(<32 x i8> %x0, <32 x i16> %x1, i32 %x2)1536 ret <32 x i16> %res1537}1538 1539define <32 x i16> @test_int_x86_avx512_maskz_pmovsxb_w_512(<32 x i8> %x0, i32 %x2) nounwind #0 {1540; CHECK-LABEL: @test_int_x86_avx512_maskz_pmovsxb_w_512(1541; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i8>, ptr @__msan_param_tls, align 81542; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 81543; CHECK-NEXT: call void @llvm.donothing()1544; CHECK-NEXT: [[_MSPROP:%.*]] = shufflevector <32 x i8> [[TMP1]], <32 x i8> splat (i8 -1), <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>1545; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <32 x i8> [[X0:%.*]], <32 x i8> poison, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>1546; CHECK-NEXT: [[_MSPROP1:%.*]] = sext <32 x i8> [[_MSPROP]] to <32 x i16>1547; CHECK-NEXT: [[TMP4:%.*]] = sext <32 x i8> [[TMP3]] to <32 x i16>1548; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[TMP2]] to <32 x i1>1549; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[X2:%.*]] to <32 x i1>1550; CHECK-NEXT: [[TMP7:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[_MSPROP1]], <32 x i16> zeroinitializer1551; CHECK-NEXT: [[TMP8:%.*]] = xor <32 x i16> [[TMP4]], zeroinitializer1552; CHECK-NEXT: [[TMP9:%.*]] = or <32 x i16> [[TMP8]], [[_MSPROP1]]1553; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], zeroinitializer1554; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP5]], <32 x i16> [[TMP10]], <32 x i16> [[TMP7]]1555; CHECK-NEXT: [[TMP11:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP4]], <32 x i16> zeroinitializer1556; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81557; CHECK-NEXT: ret <32 x i16> [[TMP11]]1558;1559 %res = call <32 x i16> @llvm.x86.avx512.mask.pmovsxb.w.512(<32 x i8> %x0, <32 x i16> zeroinitializer, i32 %x2)1560 ret <32 x i16> %res1561}1562 1563declare <32 x i16> @llvm.x86.avx512.mask.psrl.w.512(<32 x i16>, <8 x i16>, <32 x i16>, i32)1564 1565define <32 x i16> @test_int_x86_avx512_psrl_w_512(<32 x i16> %x0, <8 x i16> %x1, <32 x i16> %x2) nounwind #0 {1566; CHECK-LABEL: @test_int_x86_avx512_psrl_w_512(1567; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81568; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81569; CHECK-NEXT: call void @llvm.donothing()1570; CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP2]] to i1281571; CHECK-NEXT: [[TMP4:%.*]] = trunc i128 [[TMP3]] to i641572; CHECK-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP4]], 01573; CHECK-NEXT: [[TMP6:%.*]] = sext i1 [[TMP5]] to i5121574; CHECK-NEXT: [[TMP7:%.*]] = bitcast i512 [[TMP6]] to <32 x i16>1575; CHECK-NEXT: [[TMP8:%.*]] = call <32 x i16> @llvm.x86.avx512.psrl.w.512(<32 x i16> [[TMP1]], <8 x i16> [[X1:%.*]])1576; CHECK-NEXT: [[TMP9:%.*]] = or <32 x i16> [[TMP8]], [[TMP7]]1577; CHECK-NEXT: [[TMP10:%.*]] = call <32 x i16> @llvm.x86.avx512.psrl.w.512(<32 x i16> [[X0:%.*]], <8 x i16> [[X1]])1578; CHECK-NEXT: store <32 x i16> [[TMP9]], ptr @__msan_retval_tls, align 81579; CHECK-NEXT: ret <32 x i16> [[TMP10]]1580;1581 %res = call <32 x i16> @llvm.x86.avx512.mask.psrl.w.512(<32 x i16> %x0, <8 x i16> %x1, <32 x i16> %x2, i32 -1)1582 ret <32 x i16> %res1583}1584 1585define <32 x i16> @test_int_x86_avx512_mask_psrl_w_512(<32 x i16> %x0, <8 x i16> %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {1586; CHECK-LABEL: @test_int_x86_avx512_mask_psrl_w_512(1587; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81588; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81589; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 81590; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 81591; CHECK-NEXT: call void @llvm.donothing()1592; CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP2]] to i1281593; CHECK-NEXT: [[TMP6:%.*]] = trunc i128 [[TMP5]] to i641594; CHECK-NEXT: [[TMP7:%.*]] = icmp ne i64 [[TMP6]], 01595; CHECK-NEXT: [[TMP8:%.*]] = sext i1 [[TMP7]] to i5121596; CHECK-NEXT: [[TMP9:%.*]] = bitcast i512 [[TMP8]] to <32 x i16>1597; CHECK-NEXT: [[TMP10:%.*]] = call <32 x i16> @llvm.x86.avx512.psrl.w.512(<32 x i16> [[TMP1]], <8 x i16> [[X1:%.*]])1598; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP9]]1599; CHECK-NEXT: [[TMP12:%.*]] = call <32 x i16> @llvm.x86.avx512.psrl.w.512(<32 x i16> [[X0:%.*]], <8 x i16> [[X1]])1600; CHECK-NEXT: [[TMP13:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>1601; CHECK-NEXT: [[TMP14:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>1602; CHECK-NEXT: [[TMP15:%.*]] = select <32 x i1> [[TMP14]], <32 x i16> [[TMP11]], <32 x i16> [[TMP4]]1603; CHECK-NEXT: [[TMP16:%.*]] = xor <32 x i16> [[TMP12]], [[X2:%.*]]1604; CHECK-NEXT: [[TMP17:%.*]] = or <32 x i16> [[TMP16]], [[TMP11]]1605; CHECK-NEXT: [[TMP18:%.*]] = or <32 x i16> [[TMP17]], [[TMP4]]1606; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP13]], <32 x i16> [[TMP18]], <32 x i16> [[TMP15]]1607; CHECK-NEXT: [[TMP19:%.*]] = select <32 x i1> [[TMP14]], <32 x i16> [[TMP12]], <32 x i16> [[X2]]1608; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81609; CHECK-NEXT: ret <32 x i16> [[TMP19]]1610;1611 %res = call <32 x i16> @llvm.x86.avx512.mask.psrl.w.512(<32 x i16> %x0, <8 x i16> %x1, <32 x i16> %x2, i32 %x3)1612 ret <32 x i16> %res1613}1614 1615define <32 x i16> @test_int_x86_avx512_maskz_psrl_w_512(<32 x i16> %x0, <8 x i16> %x1, i32 %x3) nounwind #0 {1616; CHECK-LABEL: @test_int_x86_avx512_maskz_psrl_w_512(1617; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81618; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81619; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 81620; CHECK-NEXT: call void @llvm.donothing()1621; CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i16> [[TMP2]] to i1281622; CHECK-NEXT: [[TMP5:%.*]] = trunc i128 [[TMP4]] to i641623; CHECK-NEXT: [[TMP6:%.*]] = icmp ne i64 [[TMP5]], 01624; CHECK-NEXT: [[TMP7:%.*]] = sext i1 [[TMP6]] to i5121625; CHECK-NEXT: [[TMP8:%.*]] = bitcast i512 [[TMP7]] to <32 x i16>1626; CHECK-NEXT: [[TMP9:%.*]] = call <32 x i16> @llvm.x86.avx512.psrl.w.512(<32 x i16> [[TMP1]], <8 x i16> [[X1:%.*]])1627; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[TMP8]]1628; CHECK-NEXT: [[TMP11:%.*]] = call <32 x i16> @llvm.x86.avx512.psrl.w.512(<32 x i16> [[X0:%.*]], <8 x i16> [[X1]])1629; CHECK-NEXT: [[TMP12:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>1630; CHECK-NEXT: [[TMP13:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>1631; CHECK-NEXT: [[TMP14:%.*]] = select <32 x i1> [[TMP13]], <32 x i16> [[TMP10]], <32 x i16> zeroinitializer1632; CHECK-NEXT: [[TMP15:%.*]] = xor <32 x i16> [[TMP11]], zeroinitializer1633; CHECK-NEXT: [[TMP16:%.*]] = or <32 x i16> [[TMP15]], [[TMP10]]1634; CHECK-NEXT: [[TMP17:%.*]] = or <32 x i16> [[TMP16]], zeroinitializer1635; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP12]], <32 x i16> [[TMP17]], <32 x i16> [[TMP14]]1636; CHECK-NEXT: [[TMP18:%.*]] = select <32 x i1> [[TMP13]], <32 x i16> [[TMP11]], <32 x i16> zeroinitializer1637; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81638; CHECK-NEXT: ret <32 x i16> [[TMP18]]1639;1640 %res = call <32 x i16> @llvm.x86.avx512.mask.psrl.w.512(<32 x i16> %x0, <8 x i16> %x1, <32 x i16> zeroinitializer, i32 %x3)1641 ret <32 x i16> %res1642}1643 1644declare <32 x i16> @llvm.x86.avx512.mask.psrl.wi.512(<32 x i16>, i32, <32 x i16>, i32)1645 1646define { <32 x i16>, <32 x i16>, <32 x i16> } @test_int_x86_avx512_mask_psrl_wi_512(<32 x i16> %x0, i32 %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {1647; CHECK-LABEL: @test_int_x86_avx512_mask_psrl_wi_512(1648; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81649; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 81650; CHECK-NEXT: [[TMP3:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 81651; CHECK-NEXT: call void @llvm.donothing()1652; CHECK-NEXT: [[TMP4:%.*]] = call <32 x i16> @llvm.x86.avx512.psrli.w.512(<32 x i16> [[TMP1]], i32 3)1653; CHECK-NEXT: [[TMP5:%.*]] = or <32 x i16> [[TMP4]], zeroinitializer1654; CHECK-NEXT: [[TMP6:%.*]] = call <32 x i16> @llvm.x86.avx512.psrli.w.512(<32 x i16> [[X0:%.*]], i32 3)1655; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[TMP2]] to <32 x i1>1656; CHECK-NEXT: [[TMP8:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>1657; CHECK-NEXT: [[TMP9:%.*]] = select <32 x i1> [[TMP8]], <32 x i16> [[TMP5]], <32 x i16> [[TMP3]]1658; CHECK-NEXT: [[TMP10:%.*]] = xor <32 x i16> [[TMP6]], [[X2:%.*]]1659; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP5]]1660; CHECK-NEXT: [[TMP12:%.*]] = or <32 x i16> [[TMP11]], [[TMP3]]1661; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP12]], <32 x i16> [[TMP9]]1662; CHECK-NEXT: [[TMP13:%.*]] = select <32 x i1> [[TMP8]], <32 x i16> [[TMP6]], <32 x i16> [[X2]]1663; CHECK-NEXT: [[TMP14:%.*]] = call <32 x i16> @llvm.x86.avx512.psrli.w.512(<32 x i16> [[TMP1]], i32 4)1664; CHECK-NEXT: [[TMP15:%.*]] = or <32 x i16> [[TMP14]], zeroinitializer1665; CHECK-NEXT: [[TMP16:%.*]] = call <32 x i16> @llvm.x86.avx512.psrli.w.512(<32 x i16> [[X0]], i32 4)1666; CHECK-NEXT: [[TMP17:%.*]] = call <32 x i16> @llvm.x86.avx512.psrli.w.512(<32 x i16> [[TMP1]], i32 5)1667; CHECK-NEXT: [[TMP18:%.*]] = or <32 x i16> [[TMP17]], zeroinitializer1668; CHECK-NEXT: [[TMP19:%.*]] = call <32 x i16> @llvm.x86.avx512.psrli.w.512(<32 x i16> [[X0]], i32 5)1669; CHECK-NEXT: [[TMP20:%.*]] = bitcast i32 [[TMP2]] to <32 x i1>1670; CHECK-NEXT: [[TMP21:%.*]] = bitcast i32 [[X3]] to <32 x i1>1671; CHECK-NEXT: [[TMP22:%.*]] = select <32 x i1> [[TMP21]], <32 x i16> [[TMP18]], <32 x i16> zeroinitializer1672; CHECK-NEXT: [[TMP23:%.*]] = xor <32 x i16> [[TMP19]], zeroinitializer1673; CHECK-NEXT: [[TMP24:%.*]] = or <32 x i16> [[TMP23]], [[TMP18]]1674; CHECK-NEXT: [[TMP25:%.*]] = or <32 x i16> [[TMP24]], zeroinitializer1675; CHECK-NEXT: [[_MSPROP_SELECT1:%.*]] = select <32 x i1> [[TMP20]], <32 x i16> [[TMP25]], <32 x i16> [[TMP22]]1676; CHECK-NEXT: [[TMP26:%.*]] = select <32 x i1> [[TMP21]], <32 x i16> [[TMP19]], <32 x i16> zeroinitializer1677; CHECK-NEXT: [[TMP27:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } { <32 x i16> splat (i16 -1), <32 x i16> splat (i16 -1), <32 x i16> splat (i16 -1) }, <32 x i16> [[_MSPROP_SELECT]], 01678; CHECK-NEXT: [[RES3:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } poison, <32 x i16> [[TMP13]], 01679; CHECK-NEXT: [[TMP28:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[TMP27]], <32 x i16> [[TMP15]], 11680; CHECK-NEXT: [[RES4:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[RES3]], <32 x i16> [[TMP16]], 11681; CHECK-NEXT: [[TMP29:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[TMP28]], <32 x i16> [[_MSPROP_SELECT1]], 21682; CHECK-NEXT: [[RES5:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[RES4]], <32 x i16> [[TMP26]], 21683; CHECK-NEXT: store { <32 x i16>, <32 x i16>, <32 x i16> } [[TMP29]], ptr @__msan_retval_tls, align 81684; CHECK-NEXT: ret { <32 x i16>, <32 x i16>, <32 x i16> } [[RES5]]1685;1686 %res = call <32 x i16> @llvm.x86.avx512.mask.psrl.wi.512(<32 x i16> %x0, i32 3, <32 x i16> %x2, i32 %x3)1687 %res1 = call <32 x i16> @llvm.x86.avx512.mask.psrl.wi.512(<32 x i16> %x0, i32 4, <32 x i16> %x2, i32 -1)1688 %res2 = call <32 x i16> @llvm.x86.avx512.mask.psrl.wi.512(<32 x i16> %x0, i32 5, <32 x i16> zeroinitializer, i32 %x3)1689 %res3 = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } poison, <32 x i16> %res, 01690 %res4 = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } %res3, <32 x i16> %res1, 11691 %res5 = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } %res4, <32 x i16> %res2, 21692 ret { <32 x i16>, <32 x i16>, <32 x i16> } %res51693}1694 1695declare <32 x i16> @llvm.x86.avx512.mask.psra.w.512(<32 x i16>, <8 x i16>, <32 x i16>, i32)1696 1697define <32 x i16> @test_int_x86_avx512_psra_w_512(<32 x i16> %x0, <8 x i16> %x1, <32 x i16> %x2) nounwind #0 {1698; CHECK-LABEL: @test_int_x86_avx512_psra_w_512(1699; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81700; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81701; CHECK-NEXT: call void @llvm.donothing()1702; CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP2]] to i1281703; CHECK-NEXT: [[TMP4:%.*]] = trunc i128 [[TMP3]] to i641704; CHECK-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP4]], 01705; CHECK-NEXT: [[TMP6:%.*]] = sext i1 [[TMP5]] to i5121706; CHECK-NEXT: [[TMP7:%.*]] = bitcast i512 [[TMP6]] to <32 x i16>1707; CHECK-NEXT: [[TMP8:%.*]] = call <32 x i16> @llvm.x86.avx512.psra.w.512(<32 x i16> [[TMP1]], <8 x i16> [[X1:%.*]])1708; CHECK-NEXT: [[TMP9:%.*]] = or <32 x i16> [[TMP8]], [[TMP7]]1709; CHECK-NEXT: [[TMP10:%.*]] = call <32 x i16> @llvm.x86.avx512.psra.w.512(<32 x i16> [[X0:%.*]], <8 x i16> [[X1]])1710; CHECK-NEXT: store <32 x i16> [[TMP9]], ptr @__msan_retval_tls, align 81711; CHECK-NEXT: ret <32 x i16> [[TMP10]]1712;1713 %res = call <32 x i16> @llvm.x86.avx512.mask.psra.w.512(<32 x i16> %x0, <8 x i16> %x1, <32 x i16> %x2, i32 -1)1714 ret <32 x i16> %res1715}1716 1717define <32 x i16> @test_int_x86_avx512_mask_psra_w_512(<32 x i16> %x0, <8 x i16> %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {1718; CHECK-LABEL: @test_int_x86_avx512_mask_psra_w_512(1719; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81720; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81721; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 81722; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 81723; CHECK-NEXT: call void @llvm.donothing()1724; CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP2]] to i1281725; CHECK-NEXT: [[TMP6:%.*]] = trunc i128 [[TMP5]] to i641726; CHECK-NEXT: [[TMP7:%.*]] = icmp ne i64 [[TMP6]], 01727; CHECK-NEXT: [[TMP8:%.*]] = sext i1 [[TMP7]] to i5121728; CHECK-NEXT: [[TMP9:%.*]] = bitcast i512 [[TMP8]] to <32 x i16>1729; CHECK-NEXT: [[TMP10:%.*]] = call <32 x i16> @llvm.x86.avx512.psra.w.512(<32 x i16> [[TMP1]], <8 x i16> [[X1:%.*]])1730; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP9]]1731; CHECK-NEXT: [[TMP12:%.*]] = call <32 x i16> @llvm.x86.avx512.psra.w.512(<32 x i16> [[X0:%.*]], <8 x i16> [[X1]])1732; CHECK-NEXT: [[TMP13:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>1733; CHECK-NEXT: [[TMP14:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>1734; CHECK-NEXT: [[TMP15:%.*]] = select <32 x i1> [[TMP14]], <32 x i16> [[TMP11]], <32 x i16> [[TMP4]]1735; CHECK-NEXT: [[TMP16:%.*]] = xor <32 x i16> [[TMP12]], [[X2:%.*]]1736; CHECK-NEXT: [[TMP17:%.*]] = or <32 x i16> [[TMP16]], [[TMP11]]1737; CHECK-NEXT: [[TMP18:%.*]] = or <32 x i16> [[TMP17]], [[TMP4]]1738; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP13]], <32 x i16> [[TMP18]], <32 x i16> [[TMP15]]1739; CHECK-NEXT: [[TMP19:%.*]] = select <32 x i1> [[TMP14]], <32 x i16> [[TMP12]], <32 x i16> [[X2]]1740; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81741; CHECK-NEXT: ret <32 x i16> [[TMP19]]1742;1743 %res = call <32 x i16> @llvm.x86.avx512.mask.psra.w.512(<32 x i16> %x0, <8 x i16> %x1, <32 x i16> %x2, i32 %x3)1744 ret <32 x i16> %res1745}1746 1747define <32 x i16> @test_int_x86_avx512_maskz_psra_w_512(<32 x i16> %x0, <8 x i16> %x1, i32 %x3) nounwind #0 {1748; CHECK-LABEL: @test_int_x86_avx512_maskz_psra_w_512(1749; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81750; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81751; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 81752; CHECK-NEXT: call void @llvm.donothing()1753; CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i16> [[TMP2]] to i1281754; CHECK-NEXT: [[TMP5:%.*]] = trunc i128 [[TMP4]] to i641755; CHECK-NEXT: [[TMP6:%.*]] = icmp ne i64 [[TMP5]], 01756; CHECK-NEXT: [[TMP7:%.*]] = sext i1 [[TMP6]] to i5121757; CHECK-NEXT: [[TMP8:%.*]] = bitcast i512 [[TMP7]] to <32 x i16>1758; CHECK-NEXT: [[TMP9:%.*]] = call <32 x i16> @llvm.x86.avx512.psra.w.512(<32 x i16> [[TMP1]], <8 x i16> [[X1:%.*]])1759; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[TMP8]]1760; CHECK-NEXT: [[TMP11:%.*]] = call <32 x i16> @llvm.x86.avx512.psra.w.512(<32 x i16> [[X0:%.*]], <8 x i16> [[X1]])1761; CHECK-NEXT: [[TMP12:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>1762; CHECK-NEXT: [[TMP13:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>1763; CHECK-NEXT: [[TMP14:%.*]] = select <32 x i1> [[TMP13]], <32 x i16> [[TMP10]], <32 x i16> zeroinitializer1764; CHECK-NEXT: [[TMP15:%.*]] = xor <32 x i16> [[TMP11]], zeroinitializer1765; CHECK-NEXT: [[TMP16:%.*]] = or <32 x i16> [[TMP15]], [[TMP10]]1766; CHECK-NEXT: [[TMP17:%.*]] = or <32 x i16> [[TMP16]], zeroinitializer1767; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP12]], <32 x i16> [[TMP17]], <32 x i16> [[TMP14]]1768; CHECK-NEXT: [[TMP18:%.*]] = select <32 x i1> [[TMP13]], <32 x i16> [[TMP11]], <32 x i16> zeroinitializer1769; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81770; CHECK-NEXT: ret <32 x i16> [[TMP18]]1771;1772 %res = call <32 x i16> @llvm.x86.avx512.mask.psra.w.512(<32 x i16> %x0, <8 x i16> %x1, <32 x i16> zeroinitializer, i32 %x3)1773 ret <32 x i16> %res1774}1775 1776declare <32 x i16> @llvm.x86.avx512.mask.psra.wi.512(<32 x i16>, i32, <32 x i16>, i32)1777 1778define { <32 x i16>, <32 x i16>, <32 x i16> } @test_int_x86_avx512_mask_psra_wi_512(<32 x i16> %x0, i32 %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {1779; CHECK-LABEL: @test_int_x86_avx512_mask_psra_wi_512(1780; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81781; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 81782; CHECK-NEXT: [[TMP3:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 81783; CHECK-NEXT: call void @llvm.donothing()1784; CHECK-NEXT: [[TMP4:%.*]] = call <32 x i16> @llvm.x86.avx512.psrai.w.512(<32 x i16> [[TMP1]], i32 3)1785; CHECK-NEXT: [[TMP5:%.*]] = or <32 x i16> [[TMP4]], zeroinitializer1786; CHECK-NEXT: [[TMP6:%.*]] = call <32 x i16> @llvm.x86.avx512.psrai.w.512(<32 x i16> [[X0:%.*]], i32 3)1787; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[TMP2]] to <32 x i1>1788; CHECK-NEXT: [[TMP8:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>1789; CHECK-NEXT: [[TMP9:%.*]] = select <32 x i1> [[TMP8]], <32 x i16> [[TMP5]], <32 x i16> [[TMP3]]1790; CHECK-NEXT: [[TMP10:%.*]] = xor <32 x i16> [[TMP6]], [[X2:%.*]]1791; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP5]]1792; CHECK-NEXT: [[TMP12:%.*]] = or <32 x i16> [[TMP11]], [[TMP3]]1793; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP12]], <32 x i16> [[TMP9]]1794; CHECK-NEXT: [[TMP13:%.*]] = select <32 x i1> [[TMP8]], <32 x i16> [[TMP6]], <32 x i16> [[X2]]1795; CHECK-NEXT: [[TMP14:%.*]] = call <32 x i16> @llvm.x86.avx512.psrai.w.512(<32 x i16> [[TMP1]], i32 4)1796; CHECK-NEXT: [[TMP15:%.*]] = or <32 x i16> [[TMP14]], zeroinitializer1797; CHECK-NEXT: [[TMP16:%.*]] = call <32 x i16> @llvm.x86.avx512.psrai.w.512(<32 x i16> [[X0]], i32 4)1798; CHECK-NEXT: [[TMP17:%.*]] = bitcast i32 [[TMP2]] to <32 x i1>1799; CHECK-NEXT: [[TMP18:%.*]] = bitcast i32 [[X3]] to <32 x i1>1800; CHECK-NEXT: [[TMP19:%.*]] = select <32 x i1> [[TMP18]], <32 x i16> [[TMP15]], <32 x i16> zeroinitializer1801; CHECK-NEXT: [[TMP20:%.*]] = xor <32 x i16> [[TMP16]], zeroinitializer1802; CHECK-NEXT: [[TMP21:%.*]] = or <32 x i16> [[TMP20]], [[TMP15]]1803; CHECK-NEXT: [[TMP22:%.*]] = or <32 x i16> [[TMP21]], zeroinitializer1804; CHECK-NEXT: [[_MSPROP_SELECT1:%.*]] = select <32 x i1> [[TMP17]], <32 x i16> [[TMP22]], <32 x i16> [[TMP19]]1805; CHECK-NEXT: [[TMP23:%.*]] = select <32 x i1> [[TMP18]], <32 x i16> [[TMP16]], <32 x i16> zeroinitializer1806; CHECK-NEXT: [[TMP24:%.*]] = call <32 x i16> @llvm.x86.avx512.psrai.w.512(<32 x i16> [[TMP1]], i32 5)1807; CHECK-NEXT: [[TMP25:%.*]] = or <32 x i16> [[TMP24]], zeroinitializer1808; CHECK-NEXT: [[TMP26:%.*]] = call <32 x i16> @llvm.x86.avx512.psrai.w.512(<32 x i16> [[X0]], i32 5)1809; CHECK-NEXT: [[TMP27:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } { <32 x i16> splat (i16 -1), <32 x i16> splat (i16 -1), <32 x i16> splat (i16 -1) }, <32 x i16> [[_MSPROP_SELECT]], 01810; CHECK-NEXT: [[RES3:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } poison, <32 x i16> [[TMP13]], 01811; CHECK-NEXT: [[TMP28:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[TMP27]], <32 x i16> [[_MSPROP_SELECT1]], 11812; CHECK-NEXT: [[RES4:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[RES3]], <32 x i16> [[TMP23]], 11813; CHECK-NEXT: [[TMP29:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[TMP28]], <32 x i16> [[TMP25]], 21814; CHECK-NEXT: [[RES5:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[RES4]], <32 x i16> [[TMP26]], 21815; CHECK-NEXT: store { <32 x i16>, <32 x i16>, <32 x i16> } [[TMP29]], ptr @__msan_retval_tls, align 81816; CHECK-NEXT: ret { <32 x i16>, <32 x i16>, <32 x i16> } [[RES5]]1817;1818 %res = call <32 x i16> @llvm.x86.avx512.mask.psra.wi.512(<32 x i16> %x0, i32 3, <32 x i16> %x2, i32 %x3)1819 %res1 = call <32 x i16> @llvm.x86.avx512.mask.psra.wi.512(<32 x i16> %x0, i32 4, <32 x i16> zeroinitializer, i32 %x3)1820 %res2 = call <32 x i16> @llvm.x86.avx512.mask.psra.wi.512(<32 x i16> %x0, i32 5, <32 x i16> %x2, i32 -1)1821 %res3 = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } poison, <32 x i16> %res, 01822 %res4 = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } %res3, <32 x i16> %res1, 11823 %res5 = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } %res4, <32 x i16> %res2, 21824 ret { <32 x i16>, <32 x i16>, <32 x i16> } %res51825}1826 1827declare <32 x i16> @llvm.x86.avx512.mask.psll.w.512(<32 x i16>, <8 x i16>, <32 x i16>, i32)1828 1829define <32 x i16> @test_int_x86_avx512_psll_w_512(<32 x i16> %x0, <8 x i16> %x1, <32 x i16> %x2) nounwind #0 {1830; CHECK-LABEL: @test_int_x86_avx512_psll_w_512(1831; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81832; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81833; CHECK-NEXT: call void @llvm.donothing()1834; CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP2]] to i1281835; CHECK-NEXT: [[TMP4:%.*]] = trunc i128 [[TMP3]] to i641836; CHECK-NEXT: [[TMP5:%.*]] = icmp ne i64 [[TMP4]], 01837; CHECK-NEXT: [[TMP6:%.*]] = sext i1 [[TMP5]] to i5121838; CHECK-NEXT: [[TMP7:%.*]] = bitcast i512 [[TMP6]] to <32 x i16>1839; CHECK-NEXT: [[TMP8:%.*]] = call <32 x i16> @llvm.x86.avx512.psll.w.512(<32 x i16> [[TMP1]], <8 x i16> [[X1:%.*]])1840; CHECK-NEXT: [[TMP9:%.*]] = or <32 x i16> [[TMP8]], [[TMP7]]1841; CHECK-NEXT: [[TMP10:%.*]] = call <32 x i16> @llvm.x86.avx512.psll.w.512(<32 x i16> [[X0:%.*]], <8 x i16> [[X1]])1842; CHECK-NEXT: store <32 x i16> [[TMP9]], ptr @__msan_retval_tls, align 81843; CHECK-NEXT: ret <32 x i16> [[TMP10]]1844;1845 %res = call <32 x i16> @llvm.x86.avx512.mask.psll.w.512(<32 x i16> %x0, <8 x i16> %x1, <32 x i16> %x2, i32 -1)1846 ret <32 x i16> %res1847}1848 1849define <32 x i16> @test_int_x86_avx512_mask_psll_w_512(<32 x i16> %x0, <8 x i16> %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {1850; CHECK-LABEL: @test_int_x86_avx512_mask_psll_w_512(1851; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81852; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81853; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 144), align 81854; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 81855; CHECK-NEXT: call void @llvm.donothing()1856; CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP2]] to i1281857; CHECK-NEXT: [[TMP6:%.*]] = trunc i128 [[TMP5]] to i641858; CHECK-NEXT: [[TMP7:%.*]] = icmp ne i64 [[TMP6]], 01859; CHECK-NEXT: [[TMP8:%.*]] = sext i1 [[TMP7]] to i5121860; CHECK-NEXT: [[TMP9:%.*]] = bitcast i512 [[TMP8]] to <32 x i16>1861; CHECK-NEXT: [[TMP10:%.*]] = call <32 x i16> @llvm.x86.avx512.psll.w.512(<32 x i16> [[TMP1]], <8 x i16> [[X1:%.*]])1862; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP9]]1863; CHECK-NEXT: [[TMP12:%.*]] = call <32 x i16> @llvm.x86.avx512.psll.w.512(<32 x i16> [[X0:%.*]], <8 x i16> [[X1]])1864; CHECK-NEXT: [[TMP13:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>1865; CHECK-NEXT: [[TMP14:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>1866; CHECK-NEXT: [[TMP15:%.*]] = select <32 x i1> [[TMP14]], <32 x i16> [[TMP11]], <32 x i16> [[TMP4]]1867; CHECK-NEXT: [[TMP16:%.*]] = xor <32 x i16> [[TMP12]], [[X2:%.*]]1868; CHECK-NEXT: [[TMP17:%.*]] = or <32 x i16> [[TMP16]], [[TMP11]]1869; CHECK-NEXT: [[TMP18:%.*]] = or <32 x i16> [[TMP17]], [[TMP4]]1870; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP13]], <32 x i16> [[TMP18]], <32 x i16> [[TMP15]]1871; CHECK-NEXT: [[TMP19:%.*]] = select <32 x i1> [[TMP14]], <32 x i16> [[TMP12]], <32 x i16> [[X2]]1872; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81873; CHECK-NEXT: ret <32 x i16> [[TMP19]]1874;1875 %res = call <32 x i16> @llvm.x86.avx512.mask.psll.w.512(<32 x i16> %x0, <8 x i16> %x1, <32 x i16> %x2, i32 %x3)1876 ret <32 x i16> %res1877}1878 1879define <32 x i16> @test_int_x86_avx512_maskz_psll_w_512(<32 x i16> %x0, <8 x i16> %x1, i32 %x3) nounwind #0 {1880; CHECK-LABEL: @test_int_x86_avx512_maskz_psll_w_512(1881; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81882; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81883; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 80), align 81884; CHECK-NEXT: call void @llvm.donothing()1885; CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i16> [[TMP2]] to i1281886; CHECK-NEXT: [[TMP5:%.*]] = trunc i128 [[TMP4]] to i641887; CHECK-NEXT: [[TMP6:%.*]] = icmp ne i64 [[TMP5]], 01888; CHECK-NEXT: [[TMP7:%.*]] = sext i1 [[TMP6]] to i5121889; CHECK-NEXT: [[TMP8:%.*]] = bitcast i512 [[TMP7]] to <32 x i16>1890; CHECK-NEXT: [[TMP9:%.*]] = call <32 x i16> @llvm.x86.avx512.psll.w.512(<32 x i16> [[TMP1]], <8 x i16> [[X1:%.*]])1891; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[TMP8]]1892; CHECK-NEXT: [[TMP11:%.*]] = call <32 x i16> @llvm.x86.avx512.psll.w.512(<32 x i16> [[X0:%.*]], <8 x i16> [[X1]])1893; CHECK-NEXT: [[TMP12:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>1894; CHECK-NEXT: [[TMP13:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>1895; CHECK-NEXT: [[TMP14:%.*]] = select <32 x i1> [[TMP13]], <32 x i16> [[TMP10]], <32 x i16> zeroinitializer1896; CHECK-NEXT: [[TMP15:%.*]] = xor <32 x i16> [[TMP11]], zeroinitializer1897; CHECK-NEXT: [[TMP16:%.*]] = or <32 x i16> [[TMP15]], [[TMP10]]1898; CHECK-NEXT: [[TMP17:%.*]] = or <32 x i16> [[TMP16]], zeroinitializer1899; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP12]], <32 x i16> [[TMP17]], <32 x i16> [[TMP14]]1900; CHECK-NEXT: [[TMP18:%.*]] = select <32 x i1> [[TMP13]], <32 x i16> [[TMP11]], <32 x i16> zeroinitializer1901; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81902; CHECK-NEXT: ret <32 x i16> [[TMP18]]1903;1904 %res = call <32 x i16> @llvm.x86.avx512.mask.psll.w.512(<32 x i16> %x0, <8 x i16> %x1, <32 x i16> zeroinitializer, i32 %x3)1905 ret <32 x i16> %res1906}1907 1908declare <32 x i16> @llvm.x86.avx512.mask.psll.wi.512(<32 x i16>, i32, <32 x i16>, i32)1909 1910define { <32 x i16>, <32 x i16>, <32 x i16> } @test_int_x86_avx512_mask_psll_wi_512(<32 x i16> %x0, i32 %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {1911; CHECK-LABEL: @test_int_x86_avx512_mask_psll_wi_512(1912; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 81913; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 81914; CHECK-NEXT: [[TMP3:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 81915; CHECK-NEXT: call void @llvm.donothing()1916; CHECK-NEXT: [[TMP4:%.*]] = call <32 x i16> @llvm.x86.avx512.pslli.w.512(<32 x i16> [[TMP1]], i32 3)1917; CHECK-NEXT: [[TMP5:%.*]] = or <32 x i16> [[TMP4]], zeroinitializer1918; CHECK-NEXT: [[TMP6:%.*]] = call <32 x i16> @llvm.x86.avx512.pslli.w.512(<32 x i16> [[X0:%.*]], i32 3)1919; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[TMP2]] to <32 x i1>1920; CHECK-NEXT: [[TMP8:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>1921; CHECK-NEXT: [[TMP9:%.*]] = select <32 x i1> [[TMP8]], <32 x i16> [[TMP5]], <32 x i16> [[TMP3]]1922; CHECK-NEXT: [[TMP10:%.*]] = xor <32 x i16> [[TMP6]], [[X2:%.*]]1923; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP5]]1924; CHECK-NEXT: [[TMP12:%.*]] = or <32 x i16> [[TMP11]], [[TMP3]]1925; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP12]], <32 x i16> [[TMP9]]1926; CHECK-NEXT: [[TMP13:%.*]] = select <32 x i1> [[TMP8]], <32 x i16> [[TMP6]], <32 x i16> [[X2]]1927; CHECK-NEXT: [[TMP14:%.*]] = call <32 x i16> @llvm.x86.avx512.pslli.w.512(<32 x i16> [[TMP1]], i32 4)1928; CHECK-NEXT: [[TMP15:%.*]] = or <32 x i16> [[TMP14]], zeroinitializer1929; CHECK-NEXT: [[TMP16:%.*]] = call <32 x i16> @llvm.x86.avx512.pslli.w.512(<32 x i16> [[X0]], i32 4)1930; CHECK-NEXT: [[TMP17:%.*]] = bitcast i32 [[TMP2]] to <32 x i1>1931; CHECK-NEXT: [[TMP18:%.*]] = bitcast i32 [[X3]] to <32 x i1>1932; CHECK-NEXT: [[TMP19:%.*]] = select <32 x i1> [[TMP18]], <32 x i16> [[TMP15]], <32 x i16> zeroinitializer1933; CHECK-NEXT: [[TMP20:%.*]] = xor <32 x i16> [[TMP16]], zeroinitializer1934; CHECK-NEXT: [[TMP21:%.*]] = or <32 x i16> [[TMP20]], [[TMP15]]1935; CHECK-NEXT: [[TMP22:%.*]] = or <32 x i16> [[TMP21]], zeroinitializer1936; CHECK-NEXT: [[_MSPROP_SELECT1:%.*]] = select <32 x i1> [[TMP17]], <32 x i16> [[TMP22]], <32 x i16> [[TMP19]]1937; CHECK-NEXT: [[TMP23:%.*]] = select <32 x i1> [[TMP18]], <32 x i16> [[TMP16]], <32 x i16> zeroinitializer1938; CHECK-NEXT: [[TMP24:%.*]] = call <32 x i16> @llvm.x86.avx512.pslli.w.512(<32 x i16> [[TMP1]], i32 5)1939; CHECK-NEXT: [[TMP25:%.*]] = or <32 x i16> [[TMP24]], zeroinitializer1940; CHECK-NEXT: [[TMP26:%.*]] = call <32 x i16> @llvm.x86.avx512.pslli.w.512(<32 x i16> [[X0]], i32 5)1941; CHECK-NEXT: [[TMP27:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } { <32 x i16> splat (i16 -1), <32 x i16> splat (i16 -1), <32 x i16> splat (i16 -1) }, <32 x i16> [[_MSPROP_SELECT]], 01942; CHECK-NEXT: [[RES3:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } poison, <32 x i16> [[TMP13]], 01943; CHECK-NEXT: [[TMP28:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[TMP27]], <32 x i16> [[_MSPROP_SELECT1]], 11944; CHECK-NEXT: [[RES4:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[RES3]], <32 x i16> [[TMP23]], 11945; CHECK-NEXT: [[TMP29:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[TMP28]], <32 x i16> [[TMP25]], 21946; CHECK-NEXT: [[RES5:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[RES4]], <32 x i16> [[TMP26]], 21947; CHECK-NEXT: store { <32 x i16>, <32 x i16>, <32 x i16> } [[TMP29]], ptr @__msan_retval_tls, align 81948; CHECK-NEXT: ret { <32 x i16>, <32 x i16>, <32 x i16> } [[RES5]]1949;1950 %res = call <32 x i16> @llvm.x86.avx512.mask.psll.wi.512(<32 x i16> %x0, i32 3, <32 x i16> %x2, i32 %x3)1951 %res1 = call <32 x i16> @llvm.x86.avx512.mask.psll.wi.512(<32 x i16> %x0, i32 4, <32 x i16> zeroinitializer, i32 %x3)1952 %res2 = call <32 x i16> @llvm.x86.avx512.mask.psll.wi.512(<32 x i16> %x0, i32 5, <32 x i16> %x2, i32 -1)1953 %res3 = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } poison, <32 x i16> %res, 01954 %res4 = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } %res3, <32 x i16> %res1, 11955 %res5 = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } %res4, <32 x i16> %res2, 21956 ret { <32 x i16>, <32 x i16>, <32 x i16> } %res51957}1958 1959declare <64 x i8> @llvm.x86.avx512.mask.pshuf.b.512(<64 x i8>, <64 x i8>, <64 x i8>, i64)1960 1961define <64 x i8> @test_int_x86_avx512_pshuf_b_512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2) nounwind #0 {1962; CHECK-LABEL: @test_int_x86_avx512_pshuf_b_512(1963; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 81964; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81965; CHECK-NEXT: call void @llvm.donothing()1966; CHECK-NEXT: [[TMP4:%.*]] = call <64 x i8> @llvm.x86.avx512.pshuf.b.512(<64 x i8> [[TMP1]], <64 x i8> [[X1:%.*]])1967; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP2]], [[TMP4]]1968; CHECK-NEXT: [[TMP3:%.*]] = call <64 x i8> @llvm.x86.avx512.pshuf.b.512(<64 x i8> [[X0:%.*]], <64 x i8> [[X1]])1969; CHECK-NEXT: store <64 x i8> [[_MSPROP]], ptr @__msan_retval_tls, align 81970; CHECK-NEXT: ret <64 x i8> [[TMP3]]1971;1972 %res = call <64 x i8> @llvm.x86.avx512.mask.pshuf.b.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 -1)1973 ret <64 x i8> %res1974}1975 1976define <64 x i8> @test_int_x86_avx512_mask_pshuf_b_512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3) nounwind #0 {1977; CHECK-LABEL: @test_int_x86_avx512_mask_pshuf_b_512(1978; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 81979; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81980; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 81981; CHECK-NEXT: [[TMP4:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 81982; CHECK-NEXT: call void @llvm.donothing()1983; CHECK-NEXT: [[TMP13:%.*]] = call <64 x i8> @llvm.x86.avx512.pshuf.b.512(<64 x i8> [[TMP1]], <64 x i8> [[X1:%.*]])1984; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP2]], [[TMP13]]1985; CHECK-NEXT: [[TMP5:%.*]] = call <64 x i8> @llvm.x86.avx512.pshuf.b.512(<64 x i8> [[X0:%.*]], <64 x i8> [[X1]])1986; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>1987; CHECK-NEXT: [[TMP7:%.*]] = bitcast i64 [[X3:%.*]] to <64 x i1>1988; CHECK-NEXT: [[TMP8:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[_MSPROP]], <64 x i8> [[TMP4]]1989; CHECK-NEXT: [[TMP9:%.*]] = xor <64 x i8> [[TMP5]], [[X2:%.*]]1990; CHECK-NEXT: [[TMP10:%.*]] = or <64 x i8> [[TMP9]], [[_MSPROP]]1991; CHECK-NEXT: [[TMP11:%.*]] = or <64 x i8> [[TMP10]], [[TMP4]]1992; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[TMP11]], <64 x i8> [[TMP8]]1993; CHECK-NEXT: [[TMP12:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[TMP5]], <64 x i8> [[X2]]1994; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81995; CHECK-NEXT: ret <64 x i8> [[TMP12]]1996;1997 %res = call <64 x i8> @llvm.x86.avx512.mask.pshuf.b.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3)1998 ret <64 x i8> %res1999}2000 2001 2002declare <64 x i8> @llvm.x86.avx512.cvtmask2b.512(i64)2003 2004define <64 x i8> @test_int_x86_avx512_cvtmask2b_512(i64 %x0) nounwind #0 {2005; CHECK-LABEL: @test_int_x86_avx512_cvtmask2b_512(2006; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 82007; CHECK-NEXT: call void @llvm.donothing()2008; CHECK-NEXT: [[TMP2:%.*]] = bitcast i64 [[TMP1]] to <64 x i1>2009; CHECK-NEXT: [[TMP3:%.*]] = bitcast i64 [[X0:%.*]] to <64 x i1>2010; CHECK-NEXT: [[_MSPROP:%.*]] = sext <64 x i1> [[TMP2]] to <64 x i8>2011; CHECK-NEXT: [[VPMOVM2:%.*]] = sext <64 x i1> [[TMP3]] to <64 x i8>2012; CHECK-NEXT: store <64 x i8> [[_MSPROP]], ptr @__msan_retval_tls, align 82013; CHECK-NEXT: ret <64 x i8> [[VPMOVM2]]2014;2015 %res = call <64 x i8> @llvm.x86.avx512.cvtmask2b.512(i64 %x0)2016 ret <64 x i8> %res2017}2018 2019declare <32 x i16> @llvm.x86.avx512.cvtmask2w.512(i32)2020 2021define <32 x i16> @test_int_x86_avx512_cvtmask2w_512(i32 %x0) nounwind #0 {2022; CHECK-LABEL: @test_int_x86_avx512_cvtmask2w_512(2023; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 82024; CHECK-NEXT: call void @llvm.donothing()2025; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32 [[TMP1]] to <32 x i1>2026; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32 [[X0:%.*]] to <32 x i1>2027; CHECK-NEXT: [[_MSPROP:%.*]] = sext <32 x i1> [[TMP2]] to <32 x i16>2028; CHECK-NEXT: [[VPMOVM2:%.*]] = sext <32 x i1> [[TMP3]] to <32 x i16>2029; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 82030; CHECK-NEXT: ret <32 x i16> [[VPMOVM2]]2031;2032 %res = call <32 x i16> @llvm.x86.avx512.cvtmask2w.512(i32 %x0)2033 ret <32 x i16> %res2034}2035define <32 x i16> @test_mask_packs_epi32_rr_512(<16 x i32> %a, <16 x i32> %b) nounwind #0 {2036; CHECK-LABEL: @test_mask_packs_epi32_rr_512(2037; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82038; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82039; CHECK-NEXT: call void @llvm.donothing()2040; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <16 x i32> [[TMP1]], zeroinitializer2041; CHECK-NEXT: [[A:%.*]] = sext <16 x i1> [[TMP3]] to <16 x i32>2042; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer2043; CHECK-NEXT: [[B:%.*]] = sext <16 x i1> [[TMP5]] to <16 x i32>2044; CHECK-NEXT: [[TMP7:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[A]], <16 x i32> [[B]])2045; CHECK-NEXT: [[TMP8:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[A1:%.*]], <16 x i32> [[B1:%.*]])2046; CHECK-NEXT: store <32 x i16> [[TMP7]], ptr @__msan_retval_tls, align 82047; CHECK-NEXT: ret <32 x i16> [[TMP8]]2048;2049 %res = call <32 x i16> @llvm.x86.avx512.mask.packssdw.512(<16 x i32> %a, <16 x i32> %b, <32 x i16> zeroinitializer, i32 -1)2050 ret <32 x i16> %res2051}2052 2053define <32 x i16> @test_mask_packs_epi32_rrk_512(<16 x i32> %a, <16 x i32> %b, <32 x i16> %passThru, i32 %mask) nounwind #0 {2054; CHECK-LABEL: @test_mask_packs_epi32_rrk_512(2055; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82056; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82057; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 82058; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82059; CHECK-NEXT: call void @llvm.donothing()2060; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <16 x i32> [[TMP1]], zeroinitializer2061; CHECK-NEXT: [[A:%.*]] = sext <16 x i1> [[TMP5]] to <16 x i32>2062; CHECK-NEXT: [[TMP7:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer2063; CHECK-NEXT: [[B:%.*]] = sext <16 x i1> [[TMP7]] to <16 x i32>2064; CHECK-NEXT: [[TMP9:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[A]], <16 x i32> [[B]])2065; CHECK-NEXT: [[TMP17:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[A1:%.*]], <16 x i32> [[B1:%.*]])2066; CHECK-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>2067; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>2068; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[TMP9]], <32 x i16> [[TMP4]]2069; CHECK-NEXT: [[TMP13:%.*]] = xor <32 x i16> [[TMP17]], [[PASSTHRU:%.*]]2070; CHECK-NEXT: [[TMP14:%.*]] = or <32 x i16> [[TMP13]], [[TMP9]]2071; CHECK-NEXT: [[TMP15:%.*]] = or <32 x i16> [[TMP14]], [[TMP4]]2072; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP10]], <32 x i16> [[TMP15]], <32 x i16> [[TMP12]]2073; CHECK-NEXT: [[TMP16:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[TMP17]], <32 x i16> [[PASSTHRU]]2074; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82075; CHECK-NEXT: ret <32 x i16> [[TMP16]]2076;2077 %res = call <32 x i16> @llvm.x86.avx512.mask.packssdw.512(<16 x i32> %a, <16 x i32> %b, <32 x i16> %passThru, i32 %mask)2078 ret <32 x i16> %res2079}2080 2081define <32 x i16> @test_mask_packs_epi32_rrkz_512(<16 x i32> %a, <16 x i32> %b, i32 %mask) nounwind #0 {2082; CHECK-LABEL: @test_mask_packs_epi32_rrkz_512(2083; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82084; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82085; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82086; CHECK-NEXT: call void @llvm.donothing()2087; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <16 x i32> [[TMP1]], zeroinitializer2088; CHECK-NEXT: [[A:%.*]] = sext <16 x i1> [[TMP4]] to <16 x i32>2089; CHECK-NEXT: [[TMP6:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer2090; CHECK-NEXT: [[B:%.*]] = sext <16 x i1> [[TMP6]] to <16 x i32>2091; CHECK-NEXT: [[TMP8:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[A]], <16 x i32> [[B]])2092; CHECK-NEXT: [[TMP16:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[A1:%.*]], <16 x i32> [[B1:%.*]])2093; CHECK-NEXT: [[TMP9:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>2094; CHECK-NEXT: [[TMP10:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>2095; CHECK-NEXT: [[TMP11:%.*]] = select <32 x i1> [[TMP10]], <32 x i16> [[TMP8]], <32 x i16> zeroinitializer2096; CHECK-NEXT: [[TMP12:%.*]] = xor <32 x i16> [[TMP16]], zeroinitializer2097; CHECK-NEXT: [[TMP13:%.*]] = or <32 x i16> [[TMP12]], [[TMP8]]2098; CHECK-NEXT: [[TMP14:%.*]] = or <32 x i16> [[TMP13]], zeroinitializer2099; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP9]], <32 x i16> [[TMP14]], <32 x i16> [[TMP11]]2100; CHECK-NEXT: [[TMP15:%.*]] = select <32 x i1> [[TMP10]], <32 x i16> [[TMP16]], <32 x i16> zeroinitializer2101; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82102; CHECK-NEXT: ret <32 x i16> [[TMP15]]2103;2104 %res = call <32 x i16> @llvm.x86.avx512.mask.packssdw.512(<16 x i32> %a, <16 x i32> %b, <32 x i16> zeroinitializer, i32 %mask)2105 ret <32 x i16> %res2106}2107 2108define <32 x i16> @test_mask_packs_epi32_rm_512(<16 x i32> %a, ptr %ptr_b) nounwind #0 {2109; CHECK-LABEL: @test_mask_packs_epi32_rm_512(2110; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82111; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82112; CHECK-NEXT: call void @llvm.donothing()2113; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 02114; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]2115; CHECK: 3:2116; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]2117; CHECK-NEXT: unreachable2118; CHECK: 4:2119; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 642120; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i642121; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220802122; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr2123; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP7]], align 642124; CHECK-NEXT: [[TMP8:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer2125; CHECK-NEXT: [[TMP13:%.*]] = sext <16 x i1> [[TMP8]] to <16 x i32>2126; CHECK-NEXT: [[TMP10:%.*]] = icmp ne <16 x i32> [[_MSLD]], zeroinitializer2127; CHECK-NEXT: [[TMP11:%.*]] = sext <16 x i1> [[TMP10]] to <16 x i32>2128; CHECK-NEXT: [[TMP9:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[TMP13]], <16 x i32> [[TMP11]])2129; CHECK-NEXT: [[TMP12:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[A:%.*]], <16 x i32> [[B]])2130; CHECK-NEXT: store <32 x i16> [[TMP9]], ptr @__msan_retval_tls, align 82131; CHECK-NEXT: ret <32 x i16> [[TMP12]]2132;2133 %b = load <16 x i32>, ptr %ptr_b2134 %res = call <32 x i16> @llvm.x86.avx512.mask.packssdw.512(<16 x i32> %a, <16 x i32> %b, <32 x i16> zeroinitializer, i32 -1)2135 ret <32 x i16> %res2136}2137 2138define <32 x i16> @test_mask_packs_epi32_rmk_512(<16 x i32> %a, ptr %ptr_b, <32 x i16> %passThru, i32 %mask) nounwind #0 {2139; CHECK-LABEL: @test_mask_packs_epi32_rmk_512(2140; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82141; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82142; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 82143; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 82144; CHECK-NEXT: call void @llvm.donothing()2145; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 02146; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]2147; CHECK: 5:2148; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]2149; CHECK-NEXT: unreachable2150; CHECK: 6:2151; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 642152; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i642153; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220802154; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr2155; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP9]], align 642156; CHECK-NEXT: [[TMP10:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer2157; CHECK-NEXT: [[TMP22:%.*]] = sext <16 x i1> [[TMP10]] to <16 x i32>2158; CHECK-NEXT: [[TMP12:%.*]] = icmp ne <16 x i32> [[_MSLD]], zeroinitializer2159; CHECK-NEXT: [[TMP13:%.*]] = sext <16 x i1> [[TMP12]] to <16 x i32>2160; CHECK-NEXT: [[TMP11:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[TMP22]], <16 x i32> [[TMP13]])2161; CHECK-NEXT: [[TMP14:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[A:%.*]], <16 x i32> [[B]])2162; CHECK-NEXT: [[TMP15:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>2163; CHECK-NEXT: [[TMP16:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>2164; CHECK-NEXT: [[TMP17:%.*]] = select <32 x i1> [[TMP16]], <32 x i16> [[TMP11]], <32 x i16> [[TMP4]]2165; CHECK-NEXT: [[TMP18:%.*]] = xor <32 x i16> [[TMP14]], [[PASSTHRU:%.*]]2166; CHECK-NEXT: [[TMP19:%.*]] = or <32 x i16> [[TMP18]], [[TMP11]]2167; CHECK-NEXT: [[TMP20:%.*]] = or <32 x i16> [[TMP19]], [[TMP4]]2168; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP15]], <32 x i16> [[TMP20]], <32 x i16> [[TMP17]]2169; CHECK-NEXT: [[TMP21:%.*]] = select <32 x i1> [[TMP16]], <32 x i16> [[TMP14]], <32 x i16> [[PASSTHRU]]2170; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82171; CHECK-NEXT: ret <32 x i16> [[TMP21]]2172;2173 %b = load <16 x i32>, ptr %ptr_b2174 %res = call <32 x i16> @llvm.x86.avx512.mask.packssdw.512(<16 x i32> %a, <16 x i32> %b, <32 x i16> %passThru, i32 %mask)2175 ret <32 x i16> %res2176}2177 2178define <32 x i16> @test_mask_packs_epi32_rmkz_512(<16 x i32> %a, ptr %ptr_b, i32 %mask) nounwind #0 {2179; CHECK-LABEL: @test_mask_packs_epi32_rmkz_512(2180; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82181; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82182; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 82183; CHECK-NEXT: call void @llvm.donothing()2184; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 02185; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]2186; CHECK: 4:2187; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]2188; CHECK-NEXT: unreachable2189; CHECK: 5:2190; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 642191; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i642192; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220802193; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr2194; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP8]], align 642195; CHECK-NEXT: [[TMP9:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer2196; CHECK-NEXT: [[TMP21:%.*]] = sext <16 x i1> [[TMP9]] to <16 x i32>2197; CHECK-NEXT: [[TMP11:%.*]] = icmp ne <16 x i32> [[_MSLD]], zeroinitializer2198; CHECK-NEXT: [[TMP12:%.*]] = sext <16 x i1> [[TMP11]] to <16 x i32>2199; CHECK-NEXT: [[TMP10:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[TMP21]], <16 x i32> [[TMP12]])2200; CHECK-NEXT: [[TMP13:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[A:%.*]], <16 x i32> [[B]])2201; CHECK-NEXT: [[TMP14:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>2202; CHECK-NEXT: [[TMP15:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>2203; CHECK-NEXT: [[TMP16:%.*]] = select <32 x i1> [[TMP15]], <32 x i16> [[TMP10]], <32 x i16> zeroinitializer2204; CHECK-NEXT: [[TMP17:%.*]] = xor <32 x i16> [[TMP13]], zeroinitializer2205; CHECK-NEXT: [[TMP18:%.*]] = or <32 x i16> [[TMP17]], [[TMP10]]2206; CHECK-NEXT: [[TMP19:%.*]] = or <32 x i16> [[TMP18]], zeroinitializer2207; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP14]], <32 x i16> [[TMP19]], <32 x i16> [[TMP16]]2208; CHECK-NEXT: [[TMP20:%.*]] = select <32 x i1> [[TMP15]], <32 x i16> [[TMP13]], <32 x i16> zeroinitializer2209; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82210; CHECK-NEXT: ret <32 x i16> [[TMP20]]2211;2212 %b = load <16 x i32>, ptr %ptr_b2213 %res = call <32 x i16> @llvm.x86.avx512.mask.packssdw.512(<16 x i32> %a, <16 x i32> %b, <32 x i16> zeroinitializer, i32 %mask)2214 ret <32 x i16> %res2215}2216 2217define <32 x i16> @test_mask_packs_epi32_rmb_512(<16 x i32> %a, ptr %ptr_b) nounwind #0 {2218; CHECK-LABEL: @test_mask_packs_epi32_rmb_512(2219; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82220; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82221; CHECK-NEXT: call void @llvm.donothing()2222; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 02223; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]2224; CHECK: 3:2225; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]2226; CHECK-NEXT: unreachable2227; CHECK: 4:2228; CHECK-NEXT: [[Q:%.*]] = load i32, ptr [[PTR_B:%.*]], align 42229; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i642230; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220802231; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr2232; CHECK-NEXT: [[_MSLD:%.*]] = load i32, ptr [[TMP7]], align 42233; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <16 x i32> splat (i32 -1), i32 [[_MSLD]], i32 02234; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i32> poison, i32 [[Q]], i32 02235; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <16 x i32> [[_MSPROP]], <16 x i32> splat (i32 -1), <16 x i32> zeroinitializer2236; CHECK-NEXT: [[B:%.*]] = shufflevector <16 x i32> [[VECINIT_I]], <16 x i32> poison, <16 x i32> zeroinitializer2237; CHECK-NEXT: [[TMP8:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer2238; CHECK-NEXT: [[TMP13:%.*]] = sext <16 x i1> [[TMP8]] to <16 x i32>2239; CHECK-NEXT: [[TMP10:%.*]] = icmp ne <16 x i32> [[_MSPROP1]], zeroinitializer2240; CHECK-NEXT: [[TMP11:%.*]] = sext <16 x i1> [[TMP10]] to <16 x i32>2241; CHECK-NEXT: [[TMP9:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[TMP13]], <16 x i32> [[TMP11]])2242; CHECK-NEXT: [[TMP12:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[A:%.*]], <16 x i32> [[B]])2243; CHECK-NEXT: store <32 x i16> [[TMP9]], ptr @__msan_retval_tls, align 82244; CHECK-NEXT: ret <32 x i16> [[TMP12]]2245;2246 %q = load i32, ptr %ptr_b2247 %vecinit.i = insertelement <16 x i32> poison, i32 %q, i32 02248 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> poison, <16 x i32> zeroinitializer2249 %res = call <32 x i16> @llvm.x86.avx512.mask.packssdw.512(<16 x i32> %a, <16 x i32> %b, <32 x i16> zeroinitializer, i32 -1)2250 ret <32 x i16> %res2251}2252 2253define <32 x i16> @test_mask_packs_epi32_rmbk_512(<16 x i32> %a, ptr %ptr_b, <32 x i16> %passThru, i32 %mask) nounwind #0 {2254; CHECK-LABEL: @test_mask_packs_epi32_rmbk_512(2255; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82256; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82257; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 82258; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 82259; CHECK-NEXT: call void @llvm.donothing()2260; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 02261; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]2262; CHECK: 5:2263; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]2264; CHECK-NEXT: unreachable2265; CHECK: 6:2266; CHECK-NEXT: [[Q:%.*]] = load i32, ptr [[PTR_B:%.*]], align 42267; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i642268; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220802269; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr2270; CHECK-NEXT: [[_MSLD:%.*]] = load i32, ptr [[TMP9]], align 42271; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <16 x i32> splat (i32 -1), i32 [[_MSLD]], i32 02272; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i32> poison, i32 [[Q]], i32 02273; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <16 x i32> [[_MSPROP]], <16 x i32> splat (i32 -1), <16 x i32> zeroinitializer2274; CHECK-NEXT: [[B:%.*]] = shufflevector <16 x i32> [[VECINIT_I]], <16 x i32> poison, <16 x i32> zeroinitializer2275; CHECK-NEXT: [[TMP10:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer2276; CHECK-NEXT: [[TMP22:%.*]] = sext <16 x i1> [[TMP10]] to <16 x i32>2277; CHECK-NEXT: [[TMP12:%.*]] = icmp ne <16 x i32> [[_MSPROP1]], zeroinitializer2278; CHECK-NEXT: [[TMP13:%.*]] = sext <16 x i1> [[TMP12]] to <16 x i32>2279; CHECK-NEXT: [[TMP11:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[TMP22]], <16 x i32> [[TMP13]])2280; CHECK-NEXT: [[TMP14:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[A:%.*]], <16 x i32> [[B]])2281; CHECK-NEXT: [[TMP15:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>2282; CHECK-NEXT: [[TMP16:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>2283; CHECK-NEXT: [[TMP17:%.*]] = select <32 x i1> [[TMP16]], <32 x i16> [[TMP11]], <32 x i16> [[TMP4]]2284; CHECK-NEXT: [[TMP18:%.*]] = xor <32 x i16> [[TMP14]], [[PASSTHRU:%.*]]2285; CHECK-NEXT: [[TMP19:%.*]] = or <32 x i16> [[TMP18]], [[TMP11]]2286; CHECK-NEXT: [[TMP20:%.*]] = or <32 x i16> [[TMP19]], [[TMP4]]2287; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP15]], <32 x i16> [[TMP20]], <32 x i16> [[TMP17]]2288; CHECK-NEXT: [[TMP21:%.*]] = select <32 x i1> [[TMP16]], <32 x i16> [[TMP14]], <32 x i16> [[PASSTHRU]]2289; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82290; CHECK-NEXT: ret <32 x i16> [[TMP21]]2291;2292 %q = load i32, ptr %ptr_b2293 %vecinit.i = insertelement <16 x i32> poison, i32 %q, i32 02294 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> poison, <16 x i32> zeroinitializer2295 %res = call <32 x i16> @llvm.x86.avx512.mask.packssdw.512(<16 x i32> %a, <16 x i32> %b, <32 x i16> %passThru, i32 %mask)2296 ret <32 x i16> %res2297}2298 2299define <32 x i16> @test_mask_packs_epi32_rmbkz_512(<16 x i32> %a, ptr %ptr_b, i32 %mask) nounwind #0 {2300; CHECK-LABEL: @test_mask_packs_epi32_rmbkz_512(2301; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82302; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82303; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 82304; CHECK-NEXT: call void @llvm.donothing()2305; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 02306; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]2307; CHECK: 4:2308; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]2309; CHECK-NEXT: unreachable2310; CHECK: 5:2311; CHECK-NEXT: [[Q:%.*]] = load i32, ptr [[PTR_B:%.*]], align 42312; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i642313; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220802314; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr2315; CHECK-NEXT: [[_MSLD:%.*]] = load i32, ptr [[TMP8]], align 42316; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <16 x i32> splat (i32 -1), i32 [[_MSLD]], i32 02317; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i32> poison, i32 [[Q]], i32 02318; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <16 x i32> [[_MSPROP]], <16 x i32> splat (i32 -1), <16 x i32> zeroinitializer2319; CHECK-NEXT: [[B:%.*]] = shufflevector <16 x i32> [[VECINIT_I]], <16 x i32> poison, <16 x i32> zeroinitializer2320; CHECK-NEXT: [[TMP9:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer2321; CHECK-NEXT: [[TMP21:%.*]] = sext <16 x i1> [[TMP9]] to <16 x i32>2322; CHECK-NEXT: [[TMP11:%.*]] = icmp ne <16 x i32> [[_MSPROP1]], zeroinitializer2323; CHECK-NEXT: [[TMP12:%.*]] = sext <16 x i1> [[TMP11]] to <16 x i32>2324; CHECK-NEXT: [[TMP10:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[TMP21]], <16 x i32> [[TMP12]])2325; CHECK-NEXT: [[TMP13:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[A:%.*]], <16 x i32> [[B]])2326; CHECK-NEXT: [[TMP14:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>2327; CHECK-NEXT: [[TMP15:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>2328; CHECK-NEXT: [[TMP16:%.*]] = select <32 x i1> [[TMP15]], <32 x i16> [[TMP10]], <32 x i16> zeroinitializer2329; CHECK-NEXT: [[TMP17:%.*]] = xor <32 x i16> [[TMP13]], zeroinitializer2330; CHECK-NEXT: [[TMP18:%.*]] = or <32 x i16> [[TMP17]], [[TMP10]]2331; CHECK-NEXT: [[TMP19:%.*]] = or <32 x i16> [[TMP18]], zeroinitializer2332; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP14]], <32 x i16> [[TMP19]], <32 x i16> [[TMP16]]2333; CHECK-NEXT: [[TMP20:%.*]] = select <32 x i1> [[TMP15]], <32 x i16> [[TMP13]], <32 x i16> zeroinitializer2334; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82335; CHECK-NEXT: ret <32 x i16> [[TMP20]]2336;2337 %q = load i32, ptr %ptr_b2338 %vecinit.i = insertelement <16 x i32> poison, i32 %q, i32 02339 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> poison, <16 x i32> zeroinitializer2340 %res = call <32 x i16> @llvm.x86.avx512.mask.packssdw.512(<16 x i32> %a, <16 x i32> %b, <32 x i16> zeroinitializer, i32 %mask)2341 ret <32 x i16> %res2342}2343 2344declare <32 x i16> @llvm.x86.avx512.mask.packssdw.512(<16 x i32>, <16 x i32>, <32 x i16>, i32)2345 2346define <64 x i8> @test_mask_packs_epi16_rr_512(<32 x i16> %a, <32 x i16> %b) nounwind #0 {2347; CHECK-LABEL: @test_mask_packs_epi16_rr_512(2348; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 82349; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82350; CHECK-NEXT: call void @llvm.donothing()2351; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <32 x i16> [[TMP1]], zeroinitializer2352; CHECK-NEXT: [[A:%.*]] = sext <32 x i1> [[TMP3]] to <32 x i16>2353; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <32 x i16> [[TMP2]], zeroinitializer2354; CHECK-NEXT: [[B:%.*]] = sext <32 x i1> [[TMP5]] to <32 x i16>2355; CHECK-NEXT: [[TMP7:%.*]] = call <64 x i8> @llvm.x86.avx512.packsswb.512(<32 x i16> [[A]], <32 x i16> [[B]])2356; CHECK-NEXT: [[TMP8:%.*]] = call <64 x i8> @llvm.x86.avx512.packsswb.512(<32 x i16> [[A1:%.*]], <32 x i16> [[B1:%.*]])2357; CHECK-NEXT: store <64 x i8> [[TMP7]], ptr @__msan_retval_tls, align 82358; CHECK-NEXT: ret <64 x i8> [[TMP8]]2359;2360 %res = call <64 x i8> @llvm.x86.avx512.mask.packsswb.512(<32 x i16> %a, <32 x i16> %b, <64 x i8> zeroinitializer, i64 -1)2361 ret <64 x i8> %res2362}2363 2364define <64 x i8> @test_mask_packs_epi16_rrk_512(<32 x i16> %a, <32 x i16> %b, <64 x i8> %passThru, i64 %mask) nounwind #0 {2365; CHECK-LABEL: @test_mask_packs_epi16_rrk_512(2366; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 82367; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82368; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 82369; CHECK-NEXT: [[TMP4:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82370; CHECK-NEXT: call void @llvm.donothing()2371; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <32 x i16> [[TMP1]], zeroinitializer2372; CHECK-NEXT: [[A:%.*]] = sext <32 x i1> [[TMP5]] to <32 x i16>2373; CHECK-NEXT: [[TMP7:%.*]] = icmp ne <32 x i16> [[TMP2]], zeroinitializer2374; CHECK-NEXT: [[B:%.*]] = sext <32 x i1> [[TMP7]] to <32 x i16>2375; CHECK-NEXT: [[TMP9:%.*]] = call <64 x i8> @llvm.x86.avx512.packsswb.512(<32 x i16> [[A]], <32 x i16> [[B]])2376; CHECK-NEXT: [[TMP17:%.*]] = call <64 x i8> @llvm.x86.avx512.packsswb.512(<32 x i16> [[A1:%.*]], <32 x i16> [[B1:%.*]])2377; CHECK-NEXT: [[TMP10:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>2378; CHECK-NEXT: [[TMP11:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>2379; CHECK-NEXT: [[TMP12:%.*]] = select <64 x i1> [[TMP11]], <64 x i8> [[TMP9]], <64 x i8> [[TMP4]]2380; CHECK-NEXT: [[TMP13:%.*]] = xor <64 x i8> [[TMP17]], [[PASSTHRU:%.*]]2381; CHECK-NEXT: [[TMP14:%.*]] = or <64 x i8> [[TMP13]], [[TMP9]]2382; CHECK-NEXT: [[TMP15:%.*]] = or <64 x i8> [[TMP14]], [[TMP4]]2383; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP10]], <64 x i8> [[TMP15]], <64 x i8> [[TMP12]]2384; CHECK-NEXT: [[TMP16:%.*]] = select <64 x i1> [[TMP11]], <64 x i8> [[TMP17]], <64 x i8> [[PASSTHRU]]2385; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82386; CHECK-NEXT: ret <64 x i8> [[TMP16]]2387;2388 %res = call <64 x i8> @llvm.x86.avx512.mask.packsswb.512(<32 x i16> %a, <32 x i16> %b, <64 x i8> %passThru, i64 %mask)2389 ret <64 x i8> %res2390}2391 2392define <64 x i8> @test_mask_packs_epi16_rrkz_512(<32 x i16> %a, <32 x i16> %b, i64 %mask) nounwind #0 {2393; CHECK-LABEL: @test_mask_packs_epi16_rrkz_512(2394; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 82395; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82396; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82397; CHECK-NEXT: call void @llvm.donothing()2398; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <32 x i16> [[TMP1]], zeroinitializer2399; CHECK-NEXT: [[A:%.*]] = sext <32 x i1> [[TMP4]] to <32 x i16>2400; CHECK-NEXT: [[TMP6:%.*]] = icmp ne <32 x i16> [[TMP2]], zeroinitializer2401; CHECK-NEXT: [[B:%.*]] = sext <32 x i1> [[TMP6]] to <32 x i16>2402; CHECK-NEXT: [[TMP8:%.*]] = call <64 x i8> @llvm.x86.avx512.packsswb.512(<32 x i16> [[A]], <32 x i16> [[B]])2403; CHECK-NEXT: [[TMP16:%.*]] = call <64 x i8> @llvm.x86.avx512.packsswb.512(<32 x i16> [[A1:%.*]], <32 x i16> [[B1:%.*]])2404; CHECK-NEXT: [[TMP9:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>2405; CHECK-NEXT: [[TMP10:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>2406; CHECK-NEXT: [[TMP11:%.*]] = select <64 x i1> [[TMP10]], <64 x i8> [[TMP8]], <64 x i8> zeroinitializer2407; CHECK-NEXT: [[TMP12:%.*]] = xor <64 x i8> [[TMP16]], zeroinitializer2408; CHECK-NEXT: [[TMP13:%.*]] = or <64 x i8> [[TMP12]], [[TMP8]]2409; CHECK-NEXT: [[TMP14:%.*]] = or <64 x i8> [[TMP13]], zeroinitializer2410; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP9]], <64 x i8> [[TMP14]], <64 x i8> [[TMP11]]2411; CHECK-NEXT: [[TMP15:%.*]] = select <64 x i1> [[TMP10]], <64 x i8> [[TMP16]], <64 x i8> zeroinitializer2412; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82413; CHECK-NEXT: ret <64 x i8> [[TMP15]]2414;2415 %res = call <64 x i8> @llvm.x86.avx512.mask.packsswb.512(<32 x i16> %a, <32 x i16> %b, <64 x i8> zeroinitializer, i64 %mask)2416 ret <64 x i8> %res2417}2418 2419define <64 x i8> @test_mask_packs_epi16_rm_512(<32 x i16> %a, ptr %ptr_b) nounwind #0 {2420; CHECK-LABEL: @test_mask_packs_epi16_rm_512(2421; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82422; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 82423; CHECK-NEXT: call void @llvm.donothing()2424; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 02425; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]2426; CHECK: 3:2427; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]2428; CHECK-NEXT: unreachable2429; CHECK: 4:2430; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 642431; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i642432; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220802433; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr2434; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP7]], align 642435; CHECK-NEXT: [[TMP8:%.*]] = icmp ne <32 x i16> [[TMP2]], zeroinitializer2436; CHECK-NEXT: [[TMP13:%.*]] = sext <32 x i1> [[TMP8]] to <32 x i16>2437; CHECK-NEXT: [[TMP10:%.*]] = icmp ne <32 x i16> [[_MSLD]], zeroinitializer2438; CHECK-NEXT: [[TMP11:%.*]] = sext <32 x i1> [[TMP10]] to <32 x i16>2439; CHECK-NEXT: [[TMP9:%.*]] = call <64 x i8> @llvm.x86.avx512.packsswb.512(<32 x i16> [[TMP13]], <32 x i16> [[TMP11]])2440; CHECK-NEXT: [[TMP12:%.*]] = call <64 x i8> @llvm.x86.avx512.packsswb.512(<32 x i16> [[A:%.*]], <32 x i16> [[B]])2441; CHECK-NEXT: store <64 x i8> [[TMP9]], ptr @__msan_retval_tls, align 82442; CHECK-NEXT: ret <64 x i8> [[TMP12]]2443;2444 %b = load <32 x i16>, ptr %ptr_b2445 %res = call <64 x i8> @llvm.x86.avx512.mask.packsswb.512(<32 x i16> %a, <32 x i16> %b, <64 x i8> zeroinitializer, i64 -1)2446 ret <64 x i8> %res2447}2448 2449define <64 x i8> @test_mask_packs_epi16_rmk_512(<32 x i16> %a, ptr %ptr_b, <64 x i8> %passThru, i64 %mask) nounwind #0 {2450; CHECK-LABEL: @test_mask_packs_epi16_rmk_512(2451; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82452; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 82453; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 82454; CHECK-NEXT: [[TMP4:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 82455; CHECK-NEXT: call void @llvm.donothing()2456; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 02457; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]2458; CHECK: 5:2459; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]2460; CHECK-NEXT: unreachable2461; CHECK: 6:2462; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 642463; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i642464; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220802465; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr2466; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP9]], align 642467; CHECK-NEXT: [[TMP10:%.*]] = icmp ne <32 x i16> [[TMP2]], zeroinitializer2468; CHECK-NEXT: [[TMP22:%.*]] = sext <32 x i1> [[TMP10]] to <32 x i16>2469; CHECK-NEXT: [[TMP12:%.*]] = icmp ne <32 x i16> [[_MSLD]], zeroinitializer2470; CHECK-NEXT: [[TMP13:%.*]] = sext <32 x i1> [[TMP12]] to <32 x i16>2471; CHECK-NEXT: [[TMP11:%.*]] = call <64 x i8> @llvm.x86.avx512.packsswb.512(<32 x i16> [[TMP22]], <32 x i16> [[TMP13]])2472; CHECK-NEXT: [[TMP14:%.*]] = call <64 x i8> @llvm.x86.avx512.packsswb.512(<32 x i16> [[A:%.*]], <32 x i16> [[B]])2473; CHECK-NEXT: [[TMP15:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>2474; CHECK-NEXT: [[TMP16:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>2475; CHECK-NEXT: [[TMP17:%.*]] = select <64 x i1> [[TMP16]], <64 x i8> [[TMP11]], <64 x i8> [[TMP4]]2476; CHECK-NEXT: [[TMP18:%.*]] = xor <64 x i8> [[TMP14]], [[PASSTHRU:%.*]]2477; CHECK-NEXT: [[TMP19:%.*]] = or <64 x i8> [[TMP18]], [[TMP11]]2478; CHECK-NEXT: [[TMP20:%.*]] = or <64 x i8> [[TMP19]], [[TMP4]]2479; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP15]], <64 x i8> [[TMP20]], <64 x i8> [[TMP17]]2480; CHECK-NEXT: [[TMP21:%.*]] = select <64 x i1> [[TMP16]], <64 x i8> [[TMP14]], <64 x i8> [[PASSTHRU]]2481; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82482; CHECK-NEXT: ret <64 x i8> [[TMP21]]2483;2484 %b = load <32 x i16>, ptr %ptr_b2485 %res = call <64 x i8> @llvm.x86.avx512.mask.packsswb.512(<32 x i16> %a, <32 x i16> %b, <64 x i8> %passThru, i64 %mask)2486 ret <64 x i8> %res2487}2488 2489define <64 x i8> @test_mask_packs_epi16_rmkz_512(<32 x i16> %a, ptr %ptr_b, i64 %mask) nounwind #0 {2490; CHECK-LABEL: @test_mask_packs_epi16_rmkz_512(2491; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82492; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 82493; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 82494; CHECK-NEXT: call void @llvm.donothing()2495; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 02496; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]2497; CHECK: 4:2498; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]2499; CHECK-NEXT: unreachable2500; CHECK: 5:2501; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 642502; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i642503; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220802504; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr2505; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP8]], align 642506; CHECK-NEXT: [[TMP9:%.*]] = icmp ne <32 x i16> [[TMP2]], zeroinitializer2507; CHECK-NEXT: [[TMP21:%.*]] = sext <32 x i1> [[TMP9]] to <32 x i16>2508; CHECK-NEXT: [[TMP11:%.*]] = icmp ne <32 x i16> [[_MSLD]], zeroinitializer2509; CHECK-NEXT: [[TMP12:%.*]] = sext <32 x i1> [[TMP11]] to <32 x i16>2510; CHECK-NEXT: [[TMP10:%.*]] = call <64 x i8> @llvm.x86.avx512.packsswb.512(<32 x i16> [[TMP21]], <32 x i16> [[TMP12]])2511; CHECK-NEXT: [[TMP13:%.*]] = call <64 x i8> @llvm.x86.avx512.packsswb.512(<32 x i16> [[A:%.*]], <32 x i16> [[B]])2512; CHECK-NEXT: [[TMP14:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>2513; CHECK-NEXT: [[TMP15:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>2514; CHECK-NEXT: [[TMP16:%.*]] = select <64 x i1> [[TMP15]], <64 x i8> [[TMP10]], <64 x i8> zeroinitializer2515; CHECK-NEXT: [[TMP17:%.*]] = xor <64 x i8> [[TMP13]], zeroinitializer2516; CHECK-NEXT: [[TMP18:%.*]] = or <64 x i8> [[TMP17]], [[TMP10]]2517; CHECK-NEXT: [[TMP19:%.*]] = or <64 x i8> [[TMP18]], zeroinitializer2518; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP14]], <64 x i8> [[TMP19]], <64 x i8> [[TMP16]]2519; CHECK-NEXT: [[TMP20:%.*]] = select <64 x i1> [[TMP15]], <64 x i8> [[TMP13]], <64 x i8> zeroinitializer2520; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82521; CHECK-NEXT: ret <64 x i8> [[TMP20]]2522;2523 %b = load <32 x i16>, ptr %ptr_b2524 %res = call <64 x i8> @llvm.x86.avx512.mask.packsswb.512(<32 x i16> %a, <32 x i16> %b, <64 x i8> zeroinitializer, i64 %mask)2525 ret <64 x i8> %res2526}2527 2528declare <64 x i8> @llvm.x86.avx512.mask.packsswb.512(<32 x i16>, <32 x i16>, <64 x i8>, i64)2529 2530 2531define <32 x i16> @test_mask_packus_epi32_rr_512(<16 x i32> %a, <16 x i32> %b) nounwind #0 {2532; CHECK-LABEL: @test_mask_packus_epi32_rr_512(2533; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82534; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82535; CHECK-NEXT: call void @llvm.donothing()2536; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <16 x i32> [[TMP1]], zeroinitializer2537; CHECK-NEXT: [[TMP8:%.*]] = sext <16 x i1> [[TMP3]] to <16 x i32>2538; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer2539; CHECK-NEXT: [[TMP6:%.*]] = sext <16 x i1> [[TMP5]] to <16 x i32>2540; CHECK-NEXT: [[TMP4:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[TMP8]], <16 x i32> [[TMP6]])2541; CHECK-NEXT: [[TMP7:%.*]] = call <32 x i16> @llvm.x86.avx512.packusdw.512(<16 x i32> [[A:%.*]], <16 x i32> [[B:%.*]])2542; CHECK-NEXT: store <32 x i16> [[TMP4]], ptr @__msan_retval_tls, align 82543; CHECK-NEXT: ret <32 x i16> [[TMP7]]2544;2545 %res = call <32 x i16> @llvm.x86.avx512.mask.packusdw.512(<16 x i32> %a, <16 x i32> %b, <32 x i16> zeroinitializer, i32 -1)2546 ret <32 x i16> %res2547}2548 2549define <32 x i16> @test_mask_packus_epi32_rrk_512(<16 x i32> %a, <16 x i32> %b, <32 x i16> %passThru, i32 %mask) nounwind #0 {2550; CHECK-LABEL: @test_mask_packus_epi32_rrk_512(2551; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82552; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82553; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 82554; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82555; CHECK-NEXT: call void @llvm.donothing()2556; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <16 x i32> [[TMP1]], zeroinitializer2557; CHECK-NEXT: [[TMP17:%.*]] = sext <16 x i1> [[TMP5]] to <16 x i32>2558; CHECK-NEXT: [[TMP7:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer2559; CHECK-NEXT: [[TMP8:%.*]] = sext <16 x i1> [[TMP7]] to <16 x i32>2560; CHECK-NEXT: [[TMP6:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[TMP17]], <16 x i32> [[TMP8]])2561; CHECK-NEXT: [[TMP9:%.*]] = call <32 x i16> @llvm.x86.avx512.packusdw.512(<16 x i32> [[A:%.*]], <16 x i32> [[B:%.*]])2562; CHECK-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>2563; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>2564; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[TMP6]], <32 x i16> [[TMP4]]2565; CHECK-NEXT: [[TMP13:%.*]] = xor <32 x i16> [[TMP9]], [[PASSTHRU:%.*]]2566; CHECK-NEXT: [[TMP14:%.*]] = or <32 x i16> [[TMP13]], [[TMP6]]2567; CHECK-NEXT: [[TMP15:%.*]] = or <32 x i16> [[TMP14]], [[TMP4]]2568; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP10]], <32 x i16> [[TMP15]], <32 x i16> [[TMP12]]2569; CHECK-NEXT: [[TMP16:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[TMP9]], <32 x i16> [[PASSTHRU]]2570; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82571; CHECK-NEXT: ret <32 x i16> [[TMP16]]2572;2573 %res = call <32 x i16> @llvm.x86.avx512.mask.packusdw.512(<16 x i32> %a, <16 x i32> %b, <32 x i16> %passThru, i32 %mask)2574 ret <32 x i16> %res2575}2576 2577define <32 x i16> @test_mask_packus_epi32_rrkz_512(<16 x i32> %a, <16 x i32> %b, i32 %mask) nounwind #0 {2578; CHECK-LABEL: @test_mask_packus_epi32_rrkz_512(2579; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82580; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82581; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82582; CHECK-NEXT: call void @llvm.donothing()2583; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <16 x i32> [[TMP1]], zeroinitializer2584; CHECK-NEXT: [[TMP16:%.*]] = sext <16 x i1> [[TMP4]] to <16 x i32>2585; CHECK-NEXT: [[TMP6:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer2586; CHECK-NEXT: [[TMP7:%.*]] = sext <16 x i1> [[TMP6]] to <16 x i32>2587; CHECK-NEXT: [[TMP5:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[TMP16]], <16 x i32> [[TMP7]])2588; CHECK-NEXT: [[TMP8:%.*]] = call <32 x i16> @llvm.x86.avx512.packusdw.512(<16 x i32> [[A:%.*]], <16 x i32> [[B:%.*]])2589; CHECK-NEXT: [[TMP9:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>2590; CHECK-NEXT: [[TMP10:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>2591; CHECK-NEXT: [[TMP11:%.*]] = select <32 x i1> [[TMP10]], <32 x i16> [[TMP5]], <32 x i16> zeroinitializer2592; CHECK-NEXT: [[TMP12:%.*]] = xor <32 x i16> [[TMP8]], zeroinitializer2593; CHECK-NEXT: [[TMP13:%.*]] = or <32 x i16> [[TMP12]], [[TMP5]]2594; CHECK-NEXT: [[TMP14:%.*]] = or <32 x i16> [[TMP13]], zeroinitializer2595; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP9]], <32 x i16> [[TMP14]], <32 x i16> [[TMP11]]2596; CHECK-NEXT: [[TMP15:%.*]] = select <32 x i1> [[TMP10]], <32 x i16> [[TMP8]], <32 x i16> zeroinitializer2597; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82598; CHECK-NEXT: ret <32 x i16> [[TMP15]]2599;2600 %res = call <32 x i16> @llvm.x86.avx512.mask.packusdw.512(<16 x i32> %a, <16 x i32> %b, <32 x i16> zeroinitializer, i32 %mask)2601 ret <32 x i16> %res2602}2603 2604define <32 x i16> @test_mask_packus_epi32_rm_512(<16 x i32> %a, ptr %ptr_b) nounwind #0 {2605; CHECK-LABEL: @test_mask_packus_epi32_rm_512(2606; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82607; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82608; CHECK-NEXT: call void @llvm.donothing()2609; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 02610; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]2611; CHECK: 3:2612; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]2613; CHECK-NEXT: unreachable2614; CHECK: 4:2615; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 642616; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i642617; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220802618; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr2619; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP7]], align 642620; CHECK-NEXT: [[TMP8:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer2621; CHECK-NEXT: [[TMP13:%.*]] = sext <16 x i1> [[TMP8]] to <16 x i32>2622; CHECK-NEXT: [[TMP10:%.*]] = icmp ne <16 x i32> [[_MSLD]], zeroinitializer2623; CHECK-NEXT: [[TMP11:%.*]] = sext <16 x i1> [[TMP10]] to <16 x i32>2624; CHECK-NEXT: [[TMP9:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[TMP13]], <16 x i32> [[TMP11]])2625; CHECK-NEXT: [[TMP12:%.*]] = call <32 x i16> @llvm.x86.avx512.packusdw.512(<16 x i32> [[A:%.*]], <16 x i32> [[B]])2626; CHECK-NEXT: store <32 x i16> [[TMP9]], ptr @__msan_retval_tls, align 82627; CHECK-NEXT: ret <32 x i16> [[TMP12]]2628;2629 %b = load <16 x i32>, ptr %ptr_b2630 %res = call <32 x i16> @llvm.x86.avx512.mask.packusdw.512(<16 x i32> %a, <16 x i32> %b, <32 x i16> zeroinitializer, i32 -1)2631 ret <32 x i16> %res2632}2633 2634define <32 x i16> @test_mask_packus_epi32_rmk_512(<16 x i32> %a, ptr %ptr_b, <32 x i16> %passThru, i32 %mask) nounwind #0 {2635; CHECK-LABEL: @test_mask_packus_epi32_rmk_512(2636; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82637; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82638; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 82639; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 82640; CHECK-NEXT: call void @llvm.donothing()2641; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 02642; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]2643; CHECK: 5:2644; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]2645; CHECK-NEXT: unreachable2646; CHECK: 6:2647; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 642648; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i642649; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220802650; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr2651; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP9]], align 642652; CHECK-NEXT: [[TMP10:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer2653; CHECK-NEXT: [[TMP22:%.*]] = sext <16 x i1> [[TMP10]] to <16 x i32>2654; CHECK-NEXT: [[TMP12:%.*]] = icmp ne <16 x i32> [[_MSLD]], zeroinitializer2655; CHECK-NEXT: [[TMP13:%.*]] = sext <16 x i1> [[TMP12]] to <16 x i32>2656; CHECK-NEXT: [[TMP11:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[TMP22]], <16 x i32> [[TMP13]])2657; CHECK-NEXT: [[TMP14:%.*]] = call <32 x i16> @llvm.x86.avx512.packusdw.512(<16 x i32> [[A:%.*]], <16 x i32> [[B]])2658; CHECK-NEXT: [[TMP15:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>2659; CHECK-NEXT: [[TMP16:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>2660; CHECK-NEXT: [[TMP17:%.*]] = select <32 x i1> [[TMP16]], <32 x i16> [[TMP11]], <32 x i16> [[TMP4]]2661; CHECK-NEXT: [[TMP18:%.*]] = xor <32 x i16> [[TMP14]], [[PASSTHRU:%.*]]2662; CHECK-NEXT: [[TMP19:%.*]] = or <32 x i16> [[TMP18]], [[TMP11]]2663; CHECK-NEXT: [[TMP20:%.*]] = or <32 x i16> [[TMP19]], [[TMP4]]2664; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP15]], <32 x i16> [[TMP20]], <32 x i16> [[TMP17]]2665; CHECK-NEXT: [[TMP21:%.*]] = select <32 x i1> [[TMP16]], <32 x i16> [[TMP14]], <32 x i16> [[PASSTHRU]]2666; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82667; CHECK-NEXT: ret <32 x i16> [[TMP21]]2668;2669 %b = load <16 x i32>, ptr %ptr_b2670 %res = call <32 x i16> @llvm.x86.avx512.mask.packusdw.512(<16 x i32> %a, <16 x i32> %b, <32 x i16> %passThru, i32 %mask)2671 ret <32 x i16> %res2672}2673 2674define <32 x i16> @test_mask_packus_epi32_rmkz_512(<16 x i32> %a, ptr %ptr_b, i32 %mask) nounwind #0 {2675; CHECK-LABEL: @test_mask_packus_epi32_rmkz_512(2676; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82677; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82678; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 82679; CHECK-NEXT: call void @llvm.donothing()2680; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 02681; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]2682; CHECK: 4:2683; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]2684; CHECK-NEXT: unreachable2685; CHECK: 5:2686; CHECK-NEXT: [[B:%.*]] = load <16 x i32>, ptr [[PTR_B:%.*]], align 642687; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i642688; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220802689; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr2690; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP8]], align 642691; CHECK-NEXT: [[TMP9:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer2692; CHECK-NEXT: [[TMP21:%.*]] = sext <16 x i1> [[TMP9]] to <16 x i32>2693; CHECK-NEXT: [[TMP11:%.*]] = icmp ne <16 x i32> [[_MSLD]], zeroinitializer2694; CHECK-NEXT: [[TMP12:%.*]] = sext <16 x i1> [[TMP11]] to <16 x i32>2695; CHECK-NEXT: [[TMP10:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[TMP21]], <16 x i32> [[TMP12]])2696; CHECK-NEXT: [[TMP13:%.*]] = call <32 x i16> @llvm.x86.avx512.packusdw.512(<16 x i32> [[A:%.*]], <16 x i32> [[B]])2697; CHECK-NEXT: [[TMP14:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>2698; CHECK-NEXT: [[TMP15:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>2699; CHECK-NEXT: [[TMP16:%.*]] = select <32 x i1> [[TMP15]], <32 x i16> [[TMP10]], <32 x i16> zeroinitializer2700; CHECK-NEXT: [[TMP17:%.*]] = xor <32 x i16> [[TMP13]], zeroinitializer2701; CHECK-NEXT: [[TMP18:%.*]] = or <32 x i16> [[TMP17]], [[TMP10]]2702; CHECK-NEXT: [[TMP19:%.*]] = or <32 x i16> [[TMP18]], zeroinitializer2703; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP14]], <32 x i16> [[TMP19]], <32 x i16> [[TMP16]]2704; CHECK-NEXT: [[TMP20:%.*]] = select <32 x i1> [[TMP15]], <32 x i16> [[TMP13]], <32 x i16> zeroinitializer2705; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82706; CHECK-NEXT: ret <32 x i16> [[TMP20]]2707;2708 %b = load <16 x i32>, ptr %ptr_b2709 %res = call <32 x i16> @llvm.x86.avx512.mask.packusdw.512(<16 x i32> %a, <16 x i32> %b, <32 x i16> zeroinitializer, i32 %mask)2710 ret <32 x i16> %res2711}2712 2713define <32 x i16> @test_mask_packus_epi32_rmb_512(<16 x i32> %a, ptr %ptr_b) nounwind #0 {2714; CHECK-LABEL: @test_mask_packus_epi32_rmb_512(2715; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82716; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82717; CHECK-NEXT: call void @llvm.donothing()2718; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 02719; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]2720; CHECK: 3:2721; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]2722; CHECK-NEXT: unreachable2723; CHECK: 4:2724; CHECK-NEXT: [[Q:%.*]] = load i32, ptr [[PTR_B:%.*]], align 42725; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i642726; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220802727; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr2728; CHECK-NEXT: [[_MSLD:%.*]] = load i32, ptr [[TMP7]], align 42729; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <16 x i32> splat (i32 -1), i32 [[_MSLD]], i32 02730; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i32> poison, i32 [[Q]], i32 02731; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <16 x i32> [[_MSPROP]], <16 x i32> splat (i32 -1), <16 x i32> zeroinitializer2732; CHECK-NEXT: [[B:%.*]] = shufflevector <16 x i32> [[VECINIT_I]], <16 x i32> poison, <16 x i32> zeroinitializer2733; CHECK-NEXT: [[TMP8:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer2734; CHECK-NEXT: [[TMP13:%.*]] = sext <16 x i1> [[TMP8]] to <16 x i32>2735; CHECK-NEXT: [[TMP10:%.*]] = icmp ne <16 x i32> [[_MSPROP1]], zeroinitializer2736; CHECK-NEXT: [[TMP11:%.*]] = sext <16 x i1> [[TMP10]] to <16 x i32>2737; CHECK-NEXT: [[TMP9:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[TMP13]], <16 x i32> [[TMP11]])2738; CHECK-NEXT: [[TMP12:%.*]] = call <32 x i16> @llvm.x86.avx512.packusdw.512(<16 x i32> [[A:%.*]], <16 x i32> [[B]])2739; CHECK-NEXT: store <32 x i16> [[TMP9]], ptr @__msan_retval_tls, align 82740; CHECK-NEXT: ret <32 x i16> [[TMP12]]2741;2742 %q = load i32, ptr %ptr_b2743 %vecinit.i = insertelement <16 x i32> poison, i32 %q, i32 02744 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> poison, <16 x i32> zeroinitializer2745 %res = call <32 x i16> @llvm.x86.avx512.mask.packusdw.512(<16 x i32> %a, <16 x i32> %b, <32 x i16> zeroinitializer, i32 -1)2746 ret <32 x i16> %res2747}2748 2749define <32 x i16> @test_mask_packus_epi32_rmbk_512(<16 x i32> %a, ptr %ptr_b, <32 x i16> %passThru, i32 %mask) nounwind #0 {2750; CHECK-LABEL: @test_mask_packus_epi32_rmbk_512(2751; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82752; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82753; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 82754; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 82755; CHECK-NEXT: call void @llvm.donothing()2756; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 02757; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]2758; CHECK: 5:2759; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]2760; CHECK-NEXT: unreachable2761; CHECK: 6:2762; CHECK-NEXT: [[Q:%.*]] = load i32, ptr [[PTR_B:%.*]], align 42763; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i642764; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220802765; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr2766; CHECK-NEXT: [[_MSLD:%.*]] = load i32, ptr [[TMP9]], align 42767; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <16 x i32> splat (i32 -1), i32 [[_MSLD]], i32 02768; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i32> poison, i32 [[Q]], i32 02769; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <16 x i32> [[_MSPROP]], <16 x i32> splat (i32 -1), <16 x i32> zeroinitializer2770; CHECK-NEXT: [[B:%.*]] = shufflevector <16 x i32> [[VECINIT_I]], <16 x i32> poison, <16 x i32> zeroinitializer2771; CHECK-NEXT: [[TMP10:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer2772; CHECK-NEXT: [[TMP22:%.*]] = sext <16 x i1> [[TMP10]] to <16 x i32>2773; CHECK-NEXT: [[TMP12:%.*]] = icmp ne <16 x i32> [[_MSPROP1]], zeroinitializer2774; CHECK-NEXT: [[TMP13:%.*]] = sext <16 x i1> [[TMP12]] to <16 x i32>2775; CHECK-NEXT: [[TMP11:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[TMP22]], <16 x i32> [[TMP13]])2776; CHECK-NEXT: [[TMP14:%.*]] = call <32 x i16> @llvm.x86.avx512.packusdw.512(<16 x i32> [[A:%.*]], <16 x i32> [[B]])2777; CHECK-NEXT: [[TMP15:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>2778; CHECK-NEXT: [[TMP16:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>2779; CHECK-NEXT: [[TMP17:%.*]] = select <32 x i1> [[TMP16]], <32 x i16> [[TMP11]], <32 x i16> [[TMP4]]2780; CHECK-NEXT: [[TMP18:%.*]] = xor <32 x i16> [[TMP14]], [[PASSTHRU:%.*]]2781; CHECK-NEXT: [[TMP19:%.*]] = or <32 x i16> [[TMP18]], [[TMP11]]2782; CHECK-NEXT: [[TMP20:%.*]] = or <32 x i16> [[TMP19]], [[TMP4]]2783; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP15]], <32 x i16> [[TMP20]], <32 x i16> [[TMP17]]2784; CHECK-NEXT: [[TMP21:%.*]] = select <32 x i1> [[TMP16]], <32 x i16> [[TMP14]], <32 x i16> [[PASSTHRU]]2785; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82786; CHECK-NEXT: ret <32 x i16> [[TMP21]]2787;2788 %q = load i32, ptr %ptr_b2789 %vecinit.i = insertelement <16 x i32> poison, i32 %q, i32 02790 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> poison, <16 x i32> zeroinitializer2791 %res = call <32 x i16> @llvm.x86.avx512.mask.packusdw.512(<16 x i32> %a, <16 x i32> %b, <32 x i16> %passThru, i32 %mask)2792 ret <32 x i16> %res2793}2794 2795define <32 x i16> @test_mask_packus_epi32_rmbkz_512(<16 x i32> %a, ptr %ptr_b, i32 %mask) nounwind #0 {2796; CHECK-LABEL: @test_mask_packus_epi32_rmbkz_512(2797; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82798; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 82799; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 82800; CHECK-NEXT: call void @llvm.donothing()2801; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 02802; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]2803; CHECK: 4:2804; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]2805; CHECK-NEXT: unreachable2806; CHECK: 5:2807; CHECK-NEXT: [[Q:%.*]] = load i32, ptr [[PTR_B:%.*]], align 42808; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i642809; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220802810; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr2811; CHECK-NEXT: [[_MSLD:%.*]] = load i32, ptr [[TMP8]], align 42812; CHECK-NEXT: [[_MSPROP:%.*]] = insertelement <16 x i32> splat (i32 -1), i32 [[_MSLD]], i32 02813; CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i32> poison, i32 [[Q]], i32 02814; CHECK-NEXT: [[_MSPROP1:%.*]] = shufflevector <16 x i32> [[_MSPROP]], <16 x i32> splat (i32 -1), <16 x i32> zeroinitializer2815; CHECK-NEXT: [[B:%.*]] = shufflevector <16 x i32> [[VECINIT_I]], <16 x i32> poison, <16 x i32> zeroinitializer2816; CHECK-NEXT: [[TMP9:%.*]] = icmp ne <16 x i32> [[TMP2]], zeroinitializer2817; CHECK-NEXT: [[TMP21:%.*]] = sext <16 x i1> [[TMP9]] to <16 x i32>2818; CHECK-NEXT: [[TMP11:%.*]] = icmp ne <16 x i32> [[_MSPROP1]], zeroinitializer2819; CHECK-NEXT: [[TMP12:%.*]] = sext <16 x i1> [[TMP11]] to <16 x i32>2820; CHECK-NEXT: [[TMP10:%.*]] = call <32 x i16> @llvm.x86.avx512.packssdw.512(<16 x i32> [[TMP21]], <16 x i32> [[TMP12]])2821; CHECK-NEXT: [[TMP13:%.*]] = call <32 x i16> @llvm.x86.avx512.packusdw.512(<16 x i32> [[A:%.*]], <16 x i32> [[B]])2822; CHECK-NEXT: [[TMP14:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>2823; CHECK-NEXT: [[TMP15:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>2824; CHECK-NEXT: [[TMP16:%.*]] = select <32 x i1> [[TMP15]], <32 x i16> [[TMP10]], <32 x i16> zeroinitializer2825; CHECK-NEXT: [[TMP17:%.*]] = xor <32 x i16> [[TMP13]], zeroinitializer2826; CHECK-NEXT: [[TMP18:%.*]] = or <32 x i16> [[TMP17]], [[TMP10]]2827; CHECK-NEXT: [[TMP19:%.*]] = or <32 x i16> [[TMP18]], zeroinitializer2828; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP14]], <32 x i16> [[TMP19]], <32 x i16> [[TMP16]]2829; CHECK-NEXT: [[TMP20:%.*]] = select <32 x i1> [[TMP15]], <32 x i16> [[TMP13]], <32 x i16> zeroinitializer2830; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82831; CHECK-NEXT: ret <32 x i16> [[TMP20]]2832;2833 %q = load i32, ptr %ptr_b2834 %vecinit.i = insertelement <16 x i32> poison, i32 %q, i32 02835 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> poison, <16 x i32> zeroinitializer2836 %res = call <32 x i16> @llvm.x86.avx512.mask.packusdw.512(<16 x i32> %a, <16 x i32> %b, <32 x i16> zeroinitializer, i32 %mask)2837 ret <32 x i16> %res2838}2839 2840declare <32 x i16> @llvm.x86.avx512.mask.packusdw.512(<16 x i32>, <16 x i32>, <32 x i16>, i32)2841 2842define <64 x i8> @test_mask_packus_epi16_rr_512(<32 x i16> %a, <32 x i16> %b) nounwind #0 {2843; CHECK-LABEL: @test_mask_packus_epi16_rr_512(2844; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 82845; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82846; CHECK-NEXT: call void @llvm.donothing()2847; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <32 x i16> [[TMP1]], zeroinitializer2848; CHECK-NEXT: [[TMP8:%.*]] = sext <32 x i1> [[TMP3]] to <32 x i16>2849; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <32 x i16> [[TMP2]], zeroinitializer2850; CHECK-NEXT: [[TMP6:%.*]] = sext <32 x i1> [[TMP5]] to <32 x i16>2851; CHECK-NEXT: [[TMP4:%.*]] = call <64 x i8> @llvm.x86.avx512.packsswb.512(<32 x i16> [[TMP8]], <32 x i16> [[TMP6]])2852; CHECK-NEXT: [[TMP7:%.*]] = call <64 x i8> @llvm.x86.avx512.packuswb.512(<32 x i16> [[A:%.*]], <32 x i16> [[B:%.*]])2853; CHECK-NEXT: store <64 x i8> [[TMP4]], ptr @__msan_retval_tls, align 82854; CHECK-NEXT: ret <64 x i8> [[TMP7]]2855;2856 %res = call <64 x i8> @llvm.x86.avx512.mask.packuswb.512(<32 x i16> %a, <32 x i16> %b, <64 x i8> zeroinitializer, i64 -1)2857 ret <64 x i8> %res2858}2859 2860define <64 x i8> @test_mask_packus_epi16_rrk_512(<32 x i16> %a, <32 x i16> %b, <64 x i8> %passThru, i64 %mask) nounwind #0 {2861; CHECK-LABEL: @test_mask_packus_epi16_rrk_512(2862; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 82863; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82864; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 82865; CHECK-NEXT: [[TMP4:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82866; CHECK-NEXT: call void @llvm.donothing()2867; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <32 x i16> [[TMP1]], zeroinitializer2868; CHECK-NEXT: [[TMP17:%.*]] = sext <32 x i1> [[TMP5]] to <32 x i16>2869; CHECK-NEXT: [[TMP7:%.*]] = icmp ne <32 x i16> [[TMP2]], zeroinitializer2870; CHECK-NEXT: [[TMP8:%.*]] = sext <32 x i1> [[TMP7]] to <32 x i16>2871; CHECK-NEXT: [[TMP6:%.*]] = call <64 x i8> @llvm.x86.avx512.packsswb.512(<32 x i16> [[TMP17]], <32 x i16> [[TMP8]])2872; CHECK-NEXT: [[TMP9:%.*]] = call <64 x i8> @llvm.x86.avx512.packuswb.512(<32 x i16> [[A:%.*]], <32 x i16> [[B:%.*]])2873; CHECK-NEXT: [[TMP10:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>2874; CHECK-NEXT: [[TMP11:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>2875; CHECK-NEXT: [[TMP12:%.*]] = select <64 x i1> [[TMP11]], <64 x i8> [[TMP6]], <64 x i8> [[TMP4]]2876; CHECK-NEXT: [[TMP13:%.*]] = xor <64 x i8> [[TMP9]], [[PASSTHRU:%.*]]2877; CHECK-NEXT: [[TMP14:%.*]] = or <64 x i8> [[TMP13]], [[TMP6]]2878; CHECK-NEXT: [[TMP15:%.*]] = or <64 x i8> [[TMP14]], [[TMP4]]2879; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP10]], <64 x i8> [[TMP15]], <64 x i8> [[TMP12]]2880; CHECK-NEXT: [[TMP16:%.*]] = select <64 x i1> [[TMP11]], <64 x i8> [[TMP9]], <64 x i8> [[PASSTHRU]]2881; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82882; CHECK-NEXT: ret <64 x i8> [[TMP16]]2883;2884 %res = call <64 x i8> @llvm.x86.avx512.mask.packuswb.512(<32 x i16> %a, <32 x i16> %b, <64 x i8> %passThru, i64 %mask)2885 ret <64 x i8> %res2886}2887 2888define <64 x i8> @test_mask_packus_epi16_rrkz_512(<32 x i16> %a, <32 x i16> %b, i64 %mask) nounwind #0 {2889; CHECK-LABEL: @test_mask_packus_epi16_rrkz_512(2890; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 82891; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82892; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 82893; CHECK-NEXT: call void @llvm.donothing()2894; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <32 x i16> [[TMP1]], zeroinitializer2895; CHECK-NEXT: [[TMP16:%.*]] = sext <32 x i1> [[TMP4]] to <32 x i16>2896; CHECK-NEXT: [[TMP6:%.*]] = icmp ne <32 x i16> [[TMP2]], zeroinitializer2897; CHECK-NEXT: [[TMP7:%.*]] = sext <32 x i1> [[TMP6]] to <32 x i16>2898; CHECK-NEXT: [[TMP5:%.*]] = call <64 x i8> @llvm.x86.avx512.packsswb.512(<32 x i16> [[TMP16]], <32 x i16> [[TMP7]])2899; CHECK-NEXT: [[TMP8:%.*]] = call <64 x i8> @llvm.x86.avx512.packuswb.512(<32 x i16> [[A:%.*]], <32 x i16> [[B:%.*]])2900; CHECK-NEXT: [[TMP9:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>2901; CHECK-NEXT: [[TMP10:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>2902; CHECK-NEXT: [[TMP11:%.*]] = select <64 x i1> [[TMP10]], <64 x i8> [[TMP5]], <64 x i8> zeroinitializer2903; CHECK-NEXT: [[TMP12:%.*]] = xor <64 x i8> [[TMP8]], zeroinitializer2904; CHECK-NEXT: [[TMP13:%.*]] = or <64 x i8> [[TMP12]], [[TMP5]]2905; CHECK-NEXT: [[TMP14:%.*]] = or <64 x i8> [[TMP13]], zeroinitializer2906; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP9]], <64 x i8> [[TMP14]], <64 x i8> [[TMP11]]2907; CHECK-NEXT: [[TMP15:%.*]] = select <64 x i1> [[TMP10]], <64 x i8> [[TMP8]], <64 x i8> zeroinitializer2908; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82909; CHECK-NEXT: ret <64 x i8> [[TMP15]]2910;2911 %res = call <64 x i8> @llvm.x86.avx512.mask.packuswb.512(<32 x i16> %a, <32 x i16> %b, <64 x i8> zeroinitializer, i64 %mask)2912 ret <64 x i8> %res2913}2914 2915define <64 x i8> @test_mask_packus_epi16_rm_512(<32 x i16> %a, ptr %ptr_b) nounwind #0 {2916; CHECK-LABEL: @test_mask_packus_epi16_rm_512(2917; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82918; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 82919; CHECK-NEXT: call void @llvm.donothing()2920; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 02921; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]2922; CHECK: 3:2923; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]2924; CHECK-NEXT: unreachable2925; CHECK: 4:2926; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 642927; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i642928; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220802929; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr2930; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP7]], align 642931; CHECK-NEXT: [[TMP8:%.*]] = icmp ne <32 x i16> [[TMP2]], zeroinitializer2932; CHECK-NEXT: [[TMP13:%.*]] = sext <32 x i1> [[TMP8]] to <32 x i16>2933; CHECK-NEXT: [[TMP10:%.*]] = icmp ne <32 x i16> [[_MSLD]], zeroinitializer2934; CHECK-NEXT: [[TMP11:%.*]] = sext <32 x i1> [[TMP10]] to <32 x i16>2935; CHECK-NEXT: [[TMP9:%.*]] = call <64 x i8> @llvm.x86.avx512.packsswb.512(<32 x i16> [[TMP13]], <32 x i16> [[TMP11]])2936; CHECK-NEXT: [[TMP12:%.*]] = call <64 x i8> @llvm.x86.avx512.packuswb.512(<32 x i16> [[A:%.*]], <32 x i16> [[B]])2937; CHECK-NEXT: store <64 x i8> [[TMP9]], ptr @__msan_retval_tls, align 82938; CHECK-NEXT: ret <64 x i8> [[TMP12]]2939;2940 %b = load <32 x i16>, ptr %ptr_b2941 %res = call <64 x i8> @llvm.x86.avx512.mask.packuswb.512(<32 x i16> %a, <32 x i16> %b, <64 x i8> zeroinitializer, i64 -1)2942 ret <64 x i8> %res2943}2944 2945define <64 x i8> @test_mask_packus_epi16_rmk_512(<32 x i16> %a, ptr %ptr_b, <64 x i8> %passThru, i64 %mask) nounwind #0 {2946; CHECK-LABEL: @test_mask_packus_epi16_rmk_512(2947; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82948; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 82949; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 82950; CHECK-NEXT: [[TMP4:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 82951; CHECK-NEXT: call void @llvm.donothing()2952; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 02953; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]2954; CHECK: 5:2955; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]2956; CHECK-NEXT: unreachable2957; CHECK: 6:2958; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 642959; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i642960; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220802961; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr2962; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP9]], align 642963; CHECK-NEXT: [[TMP10:%.*]] = icmp ne <32 x i16> [[TMP2]], zeroinitializer2964; CHECK-NEXT: [[TMP22:%.*]] = sext <32 x i1> [[TMP10]] to <32 x i16>2965; CHECK-NEXT: [[TMP12:%.*]] = icmp ne <32 x i16> [[_MSLD]], zeroinitializer2966; CHECK-NEXT: [[TMP13:%.*]] = sext <32 x i1> [[TMP12]] to <32 x i16>2967; CHECK-NEXT: [[TMP11:%.*]] = call <64 x i8> @llvm.x86.avx512.packsswb.512(<32 x i16> [[TMP22]], <32 x i16> [[TMP13]])2968; CHECK-NEXT: [[TMP14:%.*]] = call <64 x i8> @llvm.x86.avx512.packuswb.512(<32 x i16> [[A:%.*]], <32 x i16> [[B]])2969; CHECK-NEXT: [[TMP15:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>2970; CHECK-NEXT: [[TMP16:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>2971; CHECK-NEXT: [[TMP17:%.*]] = select <64 x i1> [[TMP16]], <64 x i8> [[TMP11]], <64 x i8> [[TMP4]]2972; CHECK-NEXT: [[TMP18:%.*]] = xor <64 x i8> [[TMP14]], [[PASSTHRU:%.*]]2973; CHECK-NEXT: [[TMP19:%.*]] = or <64 x i8> [[TMP18]], [[TMP11]]2974; CHECK-NEXT: [[TMP20:%.*]] = or <64 x i8> [[TMP19]], [[TMP4]]2975; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP15]], <64 x i8> [[TMP20]], <64 x i8> [[TMP17]]2976; CHECK-NEXT: [[TMP21:%.*]] = select <64 x i1> [[TMP16]], <64 x i8> [[TMP14]], <64 x i8> [[PASSTHRU]]2977; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 82978; CHECK-NEXT: ret <64 x i8> [[TMP21]]2979;2980 %b = load <32 x i16>, ptr %ptr_b2981 %res = call <64 x i8> @llvm.x86.avx512.mask.packuswb.512(<32 x i16> %a, <32 x i16> %b, <64 x i8> %passThru, i64 %mask)2982 ret <64 x i8> %res2983}2984 2985define <64 x i8> @test_mask_packus_epi16_rmkz_512(<32 x i16> %a, ptr %ptr_b, i64 %mask) nounwind #0 {2986; CHECK-LABEL: @test_mask_packus_epi16_rmkz_512(2987; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 82988; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 82989; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 82990; CHECK-NEXT: call void @llvm.donothing()2991; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 02992; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]2993; CHECK: 4:2994; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]2995; CHECK-NEXT: unreachable2996; CHECK: 5:2997; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 642998; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i642999; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220803000; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr3001; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP8]], align 643002; CHECK-NEXT: [[TMP9:%.*]] = icmp ne <32 x i16> [[TMP2]], zeroinitializer3003; CHECK-NEXT: [[TMP21:%.*]] = sext <32 x i1> [[TMP9]] to <32 x i16>3004; CHECK-NEXT: [[TMP11:%.*]] = icmp ne <32 x i16> [[_MSLD]], zeroinitializer3005; CHECK-NEXT: [[TMP12:%.*]] = sext <32 x i1> [[TMP11]] to <32 x i16>3006; CHECK-NEXT: [[TMP10:%.*]] = call <64 x i8> @llvm.x86.avx512.packsswb.512(<32 x i16> [[TMP21]], <32 x i16> [[TMP12]])3007; CHECK-NEXT: [[TMP13:%.*]] = call <64 x i8> @llvm.x86.avx512.packuswb.512(<32 x i16> [[A:%.*]], <32 x i16> [[B]])3008; CHECK-NEXT: [[TMP14:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>3009; CHECK-NEXT: [[TMP15:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>3010; CHECK-NEXT: [[TMP16:%.*]] = select <64 x i1> [[TMP15]], <64 x i8> [[TMP10]], <64 x i8> zeroinitializer3011; CHECK-NEXT: [[TMP17:%.*]] = xor <64 x i8> [[TMP13]], zeroinitializer3012; CHECK-NEXT: [[TMP18:%.*]] = or <64 x i8> [[TMP17]], [[TMP10]]3013; CHECK-NEXT: [[TMP19:%.*]] = or <64 x i8> [[TMP18]], zeroinitializer3014; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP14]], <64 x i8> [[TMP19]], <64 x i8> [[TMP16]]3015; CHECK-NEXT: [[TMP20:%.*]] = select <64 x i1> [[TMP15]], <64 x i8> [[TMP13]], <64 x i8> zeroinitializer3016; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 83017; CHECK-NEXT: ret <64 x i8> [[TMP20]]3018;3019 %b = load <32 x i16>, ptr %ptr_b3020 %res = call <64 x i8> @llvm.x86.avx512.mask.packuswb.512(<32 x i16> %a, <32 x i16> %b, <64 x i8> zeroinitializer, i64 %mask)3021 ret <64 x i8> %res3022}3023 3024declare <64 x i8> @llvm.x86.avx512.mask.packuswb.512(<32 x i16>, <32 x i16>, <64 x i8>, i64)3025 3026define i64 @test_cmp_b_512(<64 x i8> %a0, <64 x i8> %a1) nounwind #0 {3027; CHECK-LABEL: @test_cmp_b_512(3028; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 83029; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83030; CHECK-NEXT: call void @llvm.donothing()3031; CHECK-NEXT: [[TMP3:%.*]] = xor <64 x i8> [[A0:%.*]], [[A1:%.*]]3032; CHECK-NEXT: [[TMP4:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]3033; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <64 x i8> [[TMP4]], zeroinitializer3034; CHECK-NEXT: [[TMP6:%.*]] = xor <64 x i8> [[TMP4]], splat (i8 -1)3035; CHECK-NEXT: [[TMP7:%.*]] = and <64 x i8> [[TMP6]], [[TMP3]]3036; CHECK-NEXT: [[TMP8:%.*]] = icmp eq <64 x i8> [[TMP7]], zeroinitializer3037; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <64 x i1> [[TMP5]], [[TMP8]]3038; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <64 x i8> [[A0]], [[A1]]3039; CHECK-NEXT: [[TMP10:%.*]] = bitcast <64 x i1> [[_MSPROP_ICMP]] to i643040; CHECK-NEXT: [[TMP11:%.*]] = bitcast <64 x i1> [[TMP9]] to i643041; CHECK-NEXT: [[TMP12:%.*]] = xor <64 x i8> [[A0]], splat (i8 -128)3042; CHECK-NEXT: [[TMP13:%.*]] = xor <64 x i8> [[TMP1]], splat (i8 -1)3043; CHECK-NEXT: [[TMP14:%.*]] = and <64 x i8> [[TMP12]], [[TMP13]]3044; CHECK-NEXT: [[TMP15:%.*]] = or <64 x i8> [[TMP12]], [[TMP1]]3045; CHECK-NEXT: [[TMP16:%.*]] = xor <64 x i8> [[A1]], splat (i8 -128)3046; CHECK-NEXT: [[TMP17:%.*]] = xor <64 x i8> [[TMP2]], splat (i8 -1)3047; CHECK-NEXT: [[TMP18:%.*]] = and <64 x i8> [[TMP16]], [[TMP17]]3048; CHECK-NEXT: [[TMP19:%.*]] = or <64 x i8> [[TMP16]], [[TMP2]]3049; CHECK-NEXT: [[TMP20:%.*]] = icmp ult <64 x i8> [[TMP14]], [[TMP19]]3050; CHECK-NEXT: [[TMP21:%.*]] = icmp ult <64 x i8> [[TMP15]], [[TMP18]]3051; CHECK-NEXT: [[TMP22:%.*]] = xor <64 x i1> [[TMP20]], [[TMP21]]3052; CHECK-NEXT: [[TMP23:%.*]] = icmp slt <64 x i8> [[A0]], [[A1]]3053; CHECK-NEXT: [[TMP24:%.*]] = bitcast <64 x i1> [[TMP22]] to i643054; CHECK-NEXT: [[TMP25:%.*]] = bitcast <64 x i1> [[TMP23]] to i643055; CHECK-NEXT: [[_MSPROP:%.*]] = or i64 [[TMP10]], [[TMP24]]3056; CHECK-NEXT: [[RET1:%.*]] = add i64 [[TMP11]], [[TMP25]]3057; CHECK-NEXT: [[TMP26:%.*]] = xor <64 x i8> [[A0]], splat (i8 -128)3058; CHECK-NEXT: [[TMP27:%.*]] = xor <64 x i8> [[TMP1]], splat (i8 -1)3059; CHECK-NEXT: [[TMP28:%.*]] = and <64 x i8> [[TMP26]], [[TMP27]]3060; CHECK-NEXT: [[TMP29:%.*]] = or <64 x i8> [[TMP26]], [[TMP1]]3061; CHECK-NEXT: [[TMP30:%.*]] = xor <64 x i8> [[A1]], splat (i8 -128)3062; CHECK-NEXT: [[TMP31:%.*]] = xor <64 x i8> [[TMP2]], splat (i8 -1)3063; CHECK-NEXT: [[TMP32:%.*]] = and <64 x i8> [[TMP30]], [[TMP31]]3064; CHECK-NEXT: [[TMP33:%.*]] = or <64 x i8> [[TMP30]], [[TMP2]]3065; CHECK-NEXT: [[TMP34:%.*]] = icmp ule <64 x i8> [[TMP28]], [[TMP33]]3066; CHECK-NEXT: [[TMP35:%.*]] = icmp ule <64 x i8> [[TMP29]], [[TMP32]]3067; CHECK-NEXT: [[TMP36:%.*]] = xor <64 x i1> [[TMP34]], [[TMP35]]3068; CHECK-NEXT: [[TMP37:%.*]] = icmp sle <64 x i8> [[A0]], [[A1]]3069; CHECK-NEXT: [[TMP38:%.*]] = bitcast <64 x i1> [[TMP36]] to i643070; CHECK-NEXT: [[TMP39:%.*]] = bitcast <64 x i1> [[TMP37]] to i643071; CHECK-NEXT: [[_MSPROP1:%.*]] = or i64 [[_MSPROP]], [[TMP38]]3072; CHECK-NEXT: [[RET2:%.*]] = add i64 [[RET1]], [[TMP39]]3073; CHECK-NEXT: [[_MSPROP2:%.*]] = or i64 [[_MSPROP1]], 03074; CHECK-NEXT: [[RET3:%.*]] = add i64 [[RET2]], 03075; CHECK-NEXT: [[TMP40:%.*]] = xor <64 x i8> [[A0]], [[A1]]3076; CHECK-NEXT: [[TMP41:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]3077; CHECK-NEXT: [[TMP42:%.*]] = icmp ne <64 x i8> [[TMP41]], zeroinitializer3078; CHECK-NEXT: [[TMP43:%.*]] = xor <64 x i8> [[TMP41]], splat (i8 -1)3079; CHECK-NEXT: [[TMP44:%.*]] = and <64 x i8> [[TMP43]], [[TMP40]]3080; CHECK-NEXT: [[TMP45:%.*]] = icmp eq <64 x i8> [[TMP44]], zeroinitializer3081; CHECK-NEXT: [[_MSPROP_ICMP3:%.*]] = and <64 x i1> [[TMP42]], [[TMP45]]3082; CHECK-NEXT: [[TMP46:%.*]] = icmp ne <64 x i8> [[A0]], [[A1]]3083; CHECK-NEXT: [[TMP47:%.*]] = bitcast <64 x i1> [[_MSPROP_ICMP3]] to i643084; CHECK-NEXT: [[TMP48:%.*]] = bitcast <64 x i1> [[TMP46]] to i643085; CHECK-NEXT: [[_MSPROP4:%.*]] = or i64 [[_MSPROP2]], [[TMP47]]3086; CHECK-NEXT: [[RET4:%.*]] = add i64 [[RET3]], [[TMP48]]3087; CHECK-NEXT: [[TMP49:%.*]] = xor <64 x i8> [[A0]], splat (i8 -128)3088; CHECK-NEXT: [[TMP50:%.*]] = xor <64 x i8> [[TMP1]], splat (i8 -1)3089; CHECK-NEXT: [[TMP51:%.*]] = and <64 x i8> [[TMP49]], [[TMP50]]3090; CHECK-NEXT: [[TMP52:%.*]] = or <64 x i8> [[TMP49]], [[TMP1]]3091; CHECK-NEXT: [[TMP53:%.*]] = xor <64 x i8> [[A1]], splat (i8 -128)3092; CHECK-NEXT: [[TMP54:%.*]] = xor <64 x i8> [[TMP2]], splat (i8 -1)3093; CHECK-NEXT: [[TMP55:%.*]] = and <64 x i8> [[TMP53]], [[TMP54]]3094; CHECK-NEXT: [[TMP56:%.*]] = or <64 x i8> [[TMP53]], [[TMP2]]3095; CHECK-NEXT: [[TMP57:%.*]] = icmp uge <64 x i8> [[TMP51]], [[TMP56]]3096; CHECK-NEXT: [[TMP58:%.*]] = icmp uge <64 x i8> [[TMP52]], [[TMP55]]3097; CHECK-NEXT: [[TMP59:%.*]] = xor <64 x i1> [[TMP57]], [[TMP58]]3098; CHECK-NEXT: [[TMP60:%.*]] = icmp sge <64 x i8> [[A0]], [[A1]]3099; CHECK-NEXT: [[TMP61:%.*]] = bitcast <64 x i1> [[TMP59]] to i643100; CHECK-NEXT: [[TMP62:%.*]] = bitcast <64 x i1> [[TMP60]] to i643101; CHECK-NEXT: [[_MSPROP5:%.*]] = or i64 [[_MSPROP4]], [[TMP61]]3102; CHECK-NEXT: [[RET5:%.*]] = add i64 [[RET4]], [[TMP62]]3103; CHECK-NEXT: [[TMP63:%.*]] = xor <64 x i8> [[A0]], splat (i8 -128)3104; CHECK-NEXT: [[TMP64:%.*]] = xor <64 x i8> [[TMP1]], splat (i8 -1)3105; CHECK-NEXT: [[TMP65:%.*]] = and <64 x i8> [[TMP63]], [[TMP64]]3106; CHECK-NEXT: [[TMP66:%.*]] = or <64 x i8> [[TMP63]], [[TMP1]]3107; CHECK-NEXT: [[TMP67:%.*]] = xor <64 x i8> [[A1]], splat (i8 -128)3108; CHECK-NEXT: [[TMP68:%.*]] = xor <64 x i8> [[TMP2]], splat (i8 -1)3109; CHECK-NEXT: [[TMP69:%.*]] = and <64 x i8> [[TMP67]], [[TMP68]]3110; CHECK-NEXT: [[TMP70:%.*]] = or <64 x i8> [[TMP67]], [[TMP2]]3111; CHECK-NEXT: [[TMP71:%.*]] = icmp ugt <64 x i8> [[TMP65]], [[TMP70]]3112; CHECK-NEXT: [[TMP72:%.*]] = icmp ugt <64 x i8> [[TMP66]], [[TMP69]]3113; CHECK-NEXT: [[TMP73:%.*]] = xor <64 x i1> [[TMP71]], [[TMP72]]3114; CHECK-NEXT: [[TMP74:%.*]] = icmp sgt <64 x i8> [[A0]], [[A1]]3115; CHECK-NEXT: [[TMP75:%.*]] = bitcast <64 x i1> [[TMP73]] to i643116; CHECK-NEXT: [[TMP76:%.*]] = bitcast <64 x i1> [[TMP74]] to i643117; CHECK-NEXT: [[_MSPROP6:%.*]] = or i64 [[_MSPROP5]], [[TMP75]]3118; CHECK-NEXT: [[RET6:%.*]] = add i64 [[RET5]], [[TMP76]]3119; CHECK-NEXT: [[_MSPROP7:%.*]] = or i64 [[_MSPROP6]], 03120; CHECK-NEXT: [[RET7:%.*]] = add i64 [[RET6]], -13121; CHECK-NEXT: store i64 [[_MSPROP7]], ptr @__msan_retval_tls, align 83122; CHECK-NEXT: ret i64 [[RET7]]3123;3124 %res0 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 0, i64 -1)3125 %res1 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 1, i64 -1)3126 %ret1 = add i64 %res0, %res13127 %res2 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 2, i64 -1)3128 %ret2 = add i64 %ret1, %res23129 %res3 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 3, i64 -1)3130 %ret3 = add i64 %ret2, %res33131 %res4 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 4, i64 -1)3132 %ret4 = add i64 %ret3, %res43133 %res5 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 5, i64 -1)3134 %ret5 = add i64 %ret4, %res53135 %res6 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 6, i64 -1)3136 %ret6 = add i64 %ret5, %res63137 %res7 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 7, i64 -1)3138 %ret7 = add i64 %ret6, %res73139 ret i64 %ret73140}3141 3142define i64 @test_mask_cmp_b_512(<64 x i8> %a0, <64 x i8> %a1, i64 %mask) nounwind #0 {3143; CHECK-LABEL: @test_mask_cmp_b_512(3144; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 83145; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83146; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 83147; CHECK-NEXT: call void @llvm.donothing()3148; CHECK-NEXT: [[TMP4:%.*]] = xor <64 x i8> [[A0:%.*]], [[A1:%.*]]3149; CHECK-NEXT: [[TMP5:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]3150; CHECK-NEXT: [[TMP6:%.*]] = icmp ne <64 x i8> [[TMP5]], zeroinitializer3151; CHECK-NEXT: [[TMP7:%.*]] = xor <64 x i8> [[TMP5]], splat (i8 -1)3152; CHECK-NEXT: [[TMP8:%.*]] = and <64 x i8> [[TMP7]], [[TMP4]]3153; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <64 x i8> [[TMP8]], zeroinitializer3154; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <64 x i1> [[TMP6]], [[TMP9]]3155; CHECK-NEXT: [[TMP10:%.*]] = icmp eq <64 x i8> [[A0]], [[A1]]3156; CHECK-NEXT: [[TMP11:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>3157; CHECK-NEXT: [[TMP12:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>3158; CHECK-NEXT: [[TMP13:%.*]] = and <64 x i1> [[_MSPROP_ICMP]], [[TMP11]]3159; CHECK-NEXT: [[TMP14:%.*]] = and <64 x i1> [[TMP10]], [[TMP11]]3160; CHECK-NEXT: [[TMP15:%.*]] = and <64 x i1> [[_MSPROP_ICMP]], [[TMP12]]3161; CHECK-NEXT: [[TMP16:%.*]] = or <64 x i1> [[TMP13]], [[TMP14]]3162; CHECK-NEXT: [[TMP17:%.*]] = or <64 x i1> [[TMP16]], [[TMP15]]3163; CHECK-NEXT: [[TMP18:%.*]] = and <64 x i1> [[TMP10]], [[TMP12]]3164; CHECK-NEXT: [[TMP19:%.*]] = bitcast <64 x i1> [[TMP17]] to i643165; CHECK-NEXT: [[TMP20:%.*]] = bitcast <64 x i1> [[TMP18]] to i643166; CHECK-NEXT: [[TMP21:%.*]] = xor <64 x i8> [[A0]], splat (i8 -128)3167; CHECK-NEXT: [[TMP22:%.*]] = xor <64 x i8> [[TMP1]], splat (i8 -1)3168; CHECK-NEXT: [[TMP23:%.*]] = and <64 x i8> [[TMP21]], [[TMP22]]3169; CHECK-NEXT: [[TMP24:%.*]] = or <64 x i8> [[TMP21]], [[TMP1]]3170; CHECK-NEXT: [[TMP25:%.*]] = xor <64 x i8> [[A1]], splat (i8 -128)3171; CHECK-NEXT: [[TMP26:%.*]] = xor <64 x i8> [[TMP2]], splat (i8 -1)3172; CHECK-NEXT: [[TMP27:%.*]] = and <64 x i8> [[TMP25]], [[TMP26]]3173; CHECK-NEXT: [[TMP28:%.*]] = or <64 x i8> [[TMP25]], [[TMP2]]3174; CHECK-NEXT: [[TMP29:%.*]] = icmp ult <64 x i8> [[TMP23]], [[TMP28]]3175; CHECK-NEXT: [[TMP30:%.*]] = icmp ult <64 x i8> [[TMP24]], [[TMP27]]3176; CHECK-NEXT: [[TMP31:%.*]] = xor <64 x i1> [[TMP29]], [[TMP30]]3177; CHECK-NEXT: [[TMP32:%.*]] = icmp slt <64 x i8> [[A0]], [[A1]]3178; CHECK-NEXT: [[TMP33:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>3179; CHECK-NEXT: [[TMP34:%.*]] = bitcast i64 [[MASK]] to <64 x i1>3180; CHECK-NEXT: [[TMP35:%.*]] = and <64 x i1> [[TMP31]], [[TMP33]]3181; CHECK-NEXT: [[TMP36:%.*]] = and <64 x i1> [[TMP32]], [[TMP33]]3182; CHECK-NEXT: [[TMP37:%.*]] = and <64 x i1> [[TMP31]], [[TMP34]]3183; CHECK-NEXT: [[TMP38:%.*]] = or <64 x i1> [[TMP35]], [[TMP36]]3184; CHECK-NEXT: [[TMP39:%.*]] = or <64 x i1> [[TMP38]], [[TMP37]]3185; CHECK-NEXT: [[TMP40:%.*]] = and <64 x i1> [[TMP32]], [[TMP34]]3186; CHECK-NEXT: [[TMP41:%.*]] = bitcast <64 x i1> [[TMP39]] to i643187; CHECK-NEXT: [[TMP42:%.*]] = bitcast <64 x i1> [[TMP40]] to i643188; CHECK-NEXT: [[_MSPROP:%.*]] = or i64 [[TMP19]], [[TMP41]]3189; CHECK-NEXT: [[RET1:%.*]] = add i64 [[TMP20]], [[TMP42]]3190; CHECK-NEXT: [[TMP43:%.*]] = xor <64 x i8> [[A0]], splat (i8 -128)3191; CHECK-NEXT: [[TMP44:%.*]] = xor <64 x i8> [[TMP1]], splat (i8 -1)3192; CHECK-NEXT: [[TMP45:%.*]] = and <64 x i8> [[TMP43]], [[TMP44]]3193; CHECK-NEXT: [[TMP46:%.*]] = or <64 x i8> [[TMP43]], [[TMP1]]3194; CHECK-NEXT: [[TMP47:%.*]] = xor <64 x i8> [[A1]], splat (i8 -128)3195; CHECK-NEXT: [[TMP48:%.*]] = xor <64 x i8> [[TMP2]], splat (i8 -1)3196; CHECK-NEXT: [[TMP49:%.*]] = and <64 x i8> [[TMP47]], [[TMP48]]3197; CHECK-NEXT: [[TMP50:%.*]] = or <64 x i8> [[TMP47]], [[TMP2]]3198; CHECK-NEXT: [[TMP51:%.*]] = icmp ule <64 x i8> [[TMP45]], [[TMP50]]3199; CHECK-NEXT: [[TMP52:%.*]] = icmp ule <64 x i8> [[TMP46]], [[TMP49]]3200; CHECK-NEXT: [[TMP53:%.*]] = xor <64 x i1> [[TMP51]], [[TMP52]]3201; CHECK-NEXT: [[TMP54:%.*]] = icmp sle <64 x i8> [[A0]], [[A1]]3202; CHECK-NEXT: [[TMP55:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>3203; CHECK-NEXT: [[TMP56:%.*]] = bitcast i64 [[MASK]] to <64 x i1>3204; CHECK-NEXT: [[TMP57:%.*]] = and <64 x i1> [[TMP53]], [[TMP55]]3205; CHECK-NEXT: [[TMP58:%.*]] = and <64 x i1> [[TMP54]], [[TMP55]]3206; CHECK-NEXT: [[TMP59:%.*]] = and <64 x i1> [[TMP53]], [[TMP56]]3207; CHECK-NEXT: [[TMP60:%.*]] = or <64 x i1> [[TMP57]], [[TMP58]]3208; CHECK-NEXT: [[TMP61:%.*]] = or <64 x i1> [[TMP60]], [[TMP59]]3209; CHECK-NEXT: [[TMP62:%.*]] = and <64 x i1> [[TMP54]], [[TMP56]]3210; CHECK-NEXT: [[TMP63:%.*]] = bitcast <64 x i1> [[TMP61]] to i643211; CHECK-NEXT: [[TMP64:%.*]] = bitcast <64 x i1> [[TMP62]] to i643212; CHECK-NEXT: [[_MSPROP1:%.*]] = or i64 [[_MSPROP]], [[TMP63]]3213; CHECK-NEXT: [[RET2:%.*]] = add i64 [[RET1]], [[TMP64]]3214; CHECK-NEXT: [[TMP65:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>3215; CHECK-NEXT: [[TMP66:%.*]] = bitcast i64 [[MASK]] to <64 x i1>3216; CHECK-NEXT: [[TMP67:%.*]] = and <64 x i1> zeroinitializer, [[TMP65]]3217; CHECK-NEXT: [[TMP68:%.*]] = and <64 x i1> zeroinitializer, [[TMP65]]3218; CHECK-NEXT: [[TMP69:%.*]] = and <64 x i1> zeroinitializer, [[TMP66]]3219; CHECK-NEXT: [[TMP70:%.*]] = or <64 x i1> [[TMP67]], [[TMP68]]3220; CHECK-NEXT: [[TMP71:%.*]] = or <64 x i1> [[TMP70]], [[TMP69]]3221; CHECK-NEXT: [[TMP72:%.*]] = and <64 x i1> zeroinitializer, [[TMP66]]3222; CHECK-NEXT: [[TMP73:%.*]] = bitcast <64 x i1> [[TMP71]] to i643223; CHECK-NEXT: [[TMP74:%.*]] = bitcast <64 x i1> [[TMP72]] to i643224; CHECK-NEXT: [[_MSPROP2:%.*]] = or i64 [[_MSPROP1]], [[TMP73]]3225; CHECK-NEXT: [[RET3:%.*]] = add i64 [[RET2]], [[TMP74]]3226; CHECK-NEXT: [[TMP75:%.*]] = xor <64 x i8> [[A0]], [[A1]]3227; CHECK-NEXT: [[TMP76:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]3228; CHECK-NEXT: [[TMP77:%.*]] = icmp ne <64 x i8> [[TMP76]], zeroinitializer3229; CHECK-NEXT: [[TMP78:%.*]] = xor <64 x i8> [[TMP76]], splat (i8 -1)3230; CHECK-NEXT: [[TMP79:%.*]] = and <64 x i8> [[TMP78]], [[TMP75]]3231; CHECK-NEXT: [[TMP80:%.*]] = icmp eq <64 x i8> [[TMP79]], zeroinitializer3232; CHECK-NEXT: [[_MSPROP_ICMP3:%.*]] = and <64 x i1> [[TMP77]], [[TMP80]]3233; CHECK-NEXT: [[TMP81:%.*]] = icmp ne <64 x i8> [[A0]], [[A1]]3234; CHECK-NEXT: [[TMP82:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>3235; CHECK-NEXT: [[TMP83:%.*]] = bitcast i64 [[MASK]] to <64 x i1>3236; CHECK-NEXT: [[TMP84:%.*]] = and <64 x i1> [[_MSPROP_ICMP3]], [[TMP82]]3237; CHECK-NEXT: [[TMP85:%.*]] = and <64 x i1> [[TMP81]], [[TMP82]]3238; CHECK-NEXT: [[TMP86:%.*]] = and <64 x i1> [[_MSPROP_ICMP3]], [[TMP83]]3239; CHECK-NEXT: [[TMP87:%.*]] = or <64 x i1> [[TMP84]], [[TMP85]]3240; CHECK-NEXT: [[TMP88:%.*]] = or <64 x i1> [[TMP87]], [[TMP86]]3241; CHECK-NEXT: [[TMP89:%.*]] = and <64 x i1> [[TMP81]], [[TMP83]]3242; CHECK-NEXT: [[TMP90:%.*]] = bitcast <64 x i1> [[TMP88]] to i643243; CHECK-NEXT: [[TMP91:%.*]] = bitcast <64 x i1> [[TMP89]] to i643244; CHECK-NEXT: [[_MSPROP4:%.*]] = or i64 [[_MSPROP2]], [[TMP90]]3245; CHECK-NEXT: [[RET4:%.*]] = add i64 [[RET3]], [[TMP91]]3246; CHECK-NEXT: [[TMP92:%.*]] = xor <64 x i8> [[A0]], splat (i8 -128)3247; CHECK-NEXT: [[TMP93:%.*]] = xor <64 x i8> [[TMP1]], splat (i8 -1)3248; CHECK-NEXT: [[TMP94:%.*]] = and <64 x i8> [[TMP92]], [[TMP93]]3249; CHECK-NEXT: [[TMP95:%.*]] = or <64 x i8> [[TMP92]], [[TMP1]]3250; CHECK-NEXT: [[TMP96:%.*]] = xor <64 x i8> [[A1]], splat (i8 -128)3251; CHECK-NEXT: [[TMP97:%.*]] = xor <64 x i8> [[TMP2]], splat (i8 -1)3252; CHECK-NEXT: [[TMP98:%.*]] = and <64 x i8> [[TMP96]], [[TMP97]]3253; CHECK-NEXT: [[TMP99:%.*]] = or <64 x i8> [[TMP96]], [[TMP2]]3254; CHECK-NEXT: [[TMP100:%.*]] = icmp uge <64 x i8> [[TMP94]], [[TMP99]]3255; CHECK-NEXT: [[TMP101:%.*]] = icmp uge <64 x i8> [[TMP95]], [[TMP98]]3256; CHECK-NEXT: [[TMP102:%.*]] = xor <64 x i1> [[TMP100]], [[TMP101]]3257; CHECK-NEXT: [[TMP103:%.*]] = icmp sge <64 x i8> [[A0]], [[A1]]3258; CHECK-NEXT: [[TMP104:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>3259; CHECK-NEXT: [[TMP105:%.*]] = bitcast i64 [[MASK]] to <64 x i1>3260; CHECK-NEXT: [[TMP106:%.*]] = and <64 x i1> [[TMP102]], [[TMP104]]3261; CHECK-NEXT: [[TMP107:%.*]] = and <64 x i1> [[TMP103]], [[TMP104]]3262; CHECK-NEXT: [[TMP108:%.*]] = and <64 x i1> [[TMP102]], [[TMP105]]3263; CHECK-NEXT: [[TMP109:%.*]] = or <64 x i1> [[TMP106]], [[TMP107]]3264; CHECK-NEXT: [[TMP110:%.*]] = or <64 x i1> [[TMP109]], [[TMP108]]3265; CHECK-NEXT: [[TMP111:%.*]] = and <64 x i1> [[TMP103]], [[TMP105]]3266; CHECK-NEXT: [[TMP112:%.*]] = bitcast <64 x i1> [[TMP110]] to i643267; CHECK-NEXT: [[TMP113:%.*]] = bitcast <64 x i1> [[TMP111]] to i643268; CHECK-NEXT: [[_MSPROP5:%.*]] = or i64 [[_MSPROP4]], [[TMP112]]3269; CHECK-NEXT: [[RET5:%.*]] = add i64 [[RET4]], [[TMP113]]3270; CHECK-NEXT: [[TMP114:%.*]] = xor <64 x i8> [[A0]], splat (i8 -128)3271; CHECK-NEXT: [[TMP115:%.*]] = xor <64 x i8> [[TMP1]], splat (i8 -1)3272; CHECK-NEXT: [[TMP116:%.*]] = and <64 x i8> [[TMP114]], [[TMP115]]3273; CHECK-NEXT: [[TMP117:%.*]] = or <64 x i8> [[TMP114]], [[TMP1]]3274; CHECK-NEXT: [[TMP118:%.*]] = xor <64 x i8> [[A1]], splat (i8 -128)3275; CHECK-NEXT: [[TMP119:%.*]] = xor <64 x i8> [[TMP2]], splat (i8 -1)3276; CHECK-NEXT: [[TMP120:%.*]] = and <64 x i8> [[TMP118]], [[TMP119]]3277; CHECK-NEXT: [[TMP121:%.*]] = or <64 x i8> [[TMP118]], [[TMP2]]3278; CHECK-NEXT: [[TMP122:%.*]] = icmp ugt <64 x i8> [[TMP116]], [[TMP121]]3279; CHECK-NEXT: [[TMP123:%.*]] = icmp ugt <64 x i8> [[TMP117]], [[TMP120]]3280; CHECK-NEXT: [[TMP124:%.*]] = xor <64 x i1> [[TMP122]], [[TMP123]]3281; CHECK-NEXT: [[TMP125:%.*]] = icmp sgt <64 x i8> [[A0]], [[A1]]3282; CHECK-NEXT: [[TMP126:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>3283; CHECK-NEXT: [[TMP127:%.*]] = bitcast i64 [[MASK]] to <64 x i1>3284; CHECK-NEXT: [[TMP128:%.*]] = and <64 x i1> [[TMP124]], [[TMP126]]3285; CHECK-NEXT: [[TMP129:%.*]] = and <64 x i1> [[TMP125]], [[TMP126]]3286; CHECK-NEXT: [[TMP130:%.*]] = and <64 x i1> [[TMP124]], [[TMP127]]3287; CHECK-NEXT: [[TMP131:%.*]] = or <64 x i1> [[TMP128]], [[TMP129]]3288; CHECK-NEXT: [[TMP132:%.*]] = or <64 x i1> [[TMP131]], [[TMP130]]3289; CHECK-NEXT: [[TMP133:%.*]] = and <64 x i1> [[TMP125]], [[TMP127]]3290; CHECK-NEXT: [[TMP134:%.*]] = bitcast <64 x i1> [[TMP132]] to i643291; CHECK-NEXT: [[TMP135:%.*]] = bitcast <64 x i1> [[TMP133]] to i643292; CHECK-NEXT: [[_MSPROP6:%.*]] = or i64 [[_MSPROP5]], [[TMP134]]3293; CHECK-NEXT: [[RET6:%.*]] = add i64 [[RET5]], [[TMP135]]3294; CHECK-NEXT: [[TMP136:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>3295; CHECK-NEXT: [[TMP137:%.*]] = bitcast i64 [[MASK]] to <64 x i1>3296; CHECK-NEXT: [[TMP138:%.*]] = and <64 x i1> zeroinitializer, [[TMP136]]3297; CHECK-NEXT: [[TMP139:%.*]] = and <64 x i1> splat (i1 true), [[TMP136]]3298; CHECK-NEXT: [[TMP140:%.*]] = and <64 x i1> zeroinitializer, [[TMP137]]3299; CHECK-NEXT: [[TMP141:%.*]] = or <64 x i1> [[TMP138]], [[TMP139]]3300; CHECK-NEXT: [[TMP142:%.*]] = or <64 x i1> [[TMP141]], [[TMP140]]3301; CHECK-NEXT: [[TMP143:%.*]] = and <64 x i1> splat (i1 true), [[TMP137]]3302; CHECK-NEXT: [[TMP144:%.*]] = bitcast <64 x i1> [[TMP142]] to i643303; CHECK-NEXT: [[TMP145:%.*]] = bitcast <64 x i1> [[TMP143]] to i643304; CHECK-NEXT: [[_MSPROP7:%.*]] = or i64 [[_MSPROP6]], [[TMP144]]3305; CHECK-NEXT: [[RET7:%.*]] = add i64 [[RET6]], [[TMP145]]3306; CHECK-NEXT: store i64 [[_MSPROP7]], ptr @__msan_retval_tls, align 83307; CHECK-NEXT: ret i64 [[RET7]]3308;3309 %res0 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 0, i64 %mask)3310 %res1 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 1, i64 %mask)3311 %ret1 = add i64 %res0, %res13312 %res2 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 2, i64 %mask)3313 %ret2 = add i64 %ret1, %res23314 %res3 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 3, i64 %mask)3315 %ret3 = add i64 %ret2, %res33316 %res4 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 4, i64 %mask)3317 %ret4 = add i64 %ret3, %res43318 %res5 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 5, i64 %mask)3319 %ret5 = add i64 %ret4, %res53320 %res6 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 6, i64 %mask)3321 %ret6 = add i64 %ret5, %res63322 %res7 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 7, i64 %mask)3323 %ret7 = add i64 %ret6, %res73324 ret i64 %ret73325}3326 3327declare i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8>, <64 x i8>, i32, i64) nounwind readnone3328 3329define i64 @test_ucmp_b_512(<64 x i8> %a0, <64 x i8> %a1) nounwind #0 {3330; CHECK-LABEL: @test_ucmp_b_512(3331; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 83332; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83333; CHECK-NEXT: call void @llvm.donothing()3334; CHECK-NEXT: [[TMP3:%.*]] = xor <64 x i8> [[A0:%.*]], [[A1:%.*]]3335; CHECK-NEXT: [[TMP4:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]3336; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <64 x i8> [[TMP4]], zeroinitializer3337; CHECK-NEXT: [[TMP6:%.*]] = xor <64 x i8> [[TMP4]], splat (i8 -1)3338; CHECK-NEXT: [[TMP7:%.*]] = and <64 x i8> [[TMP6]], [[TMP3]]3339; CHECK-NEXT: [[TMP8:%.*]] = icmp eq <64 x i8> [[TMP7]], zeroinitializer3340; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <64 x i1> [[TMP5]], [[TMP8]]3341; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <64 x i8> [[A0]], [[A1]]3342; CHECK-NEXT: [[TMP10:%.*]] = bitcast <64 x i1> [[_MSPROP_ICMP]] to i643343; CHECK-NEXT: [[TMP11:%.*]] = bitcast <64 x i1> [[TMP9]] to i643344; CHECK-NEXT: [[TMP12:%.*]] = xor <64 x i8> [[TMP1]], splat (i8 -1)3345; CHECK-NEXT: [[TMP13:%.*]] = and <64 x i8> [[A0]], [[TMP12]]3346; CHECK-NEXT: [[TMP14:%.*]] = or <64 x i8> [[A0]], [[TMP1]]3347; CHECK-NEXT: [[TMP15:%.*]] = xor <64 x i8> [[TMP2]], splat (i8 -1)3348; CHECK-NEXT: [[TMP16:%.*]] = and <64 x i8> [[A1]], [[TMP15]]3349; CHECK-NEXT: [[TMP17:%.*]] = or <64 x i8> [[A1]], [[TMP2]]3350; CHECK-NEXT: [[TMP18:%.*]] = icmp ult <64 x i8> [[TMP13]], [[TMP17]]3351; CHECK-NEXT: [[TMP19:%.*]] = icmp ult <64 x i8> [[TMP14]], [[TMP16]]3352; CHECK-NEXT: [[TMP20:%.*]] = xor <64 x i1> [[TMP18]], [[TMP19]]3353; CHECK-NEXT: [[TMP21:%.*]] = icmp ult <64 x i8> [[A0]], [[A1]]3354; CHECK-NEXT: [[TMP22:%.*]] = bitcast <64 x i1> [[TMP20]] to i643355; CHECK-NEXT: [[TMP23:%.*]] = bitcast <64 x i1> [[TMP21]] to i643356; CHECK-NEXT: [[_MSPROP:%.*]] = or i64 [[TMP10]], [[TMP22]]3357; CHECK-NEXT: [[RET1:%.*]] = add i64 [[TMP11]], [[TMP23]]3358; CHECK-NEXT: [[TMP24:%.*]] = xor <64 x i8> [[TMP1]], splat (i8 -1)3359; CHECK-NEXT: [[TMP25:%.*]] = and <64 x i8> [[A0]], [[TMP24]]3360; CHECK-NEXT: [[TMP26:%.*]] = or <64 x i8> [[A0]], [[TMP1]]3361; CHECK-NEXT: [[TMP27:%.*]] = xor <64 x i8> [[TMP2]], splat (i8 -1)3362; CHECK-NEXT: [[TMP28:%.*]] = and <64 x i8> [[A1]], [[TMP27]]3363; CHECK-NEXT: [[TMP29:%.*]] = or <64 x i8> [[A1]], [[TMP2]]3364; CHECK-NEXT: [[TMP30:%.*]] = icmp ule <64 x i8> [[TMP25]], [[TMP29]]3365; CHECK-NEXT: [[TMP31:%.*]] = icmp ule <64 x i8> [[TMP26]], [[TMP28]]3366; CHECK-NEXT: [[TMP32:%.*]] = xor <64 x i1> [[TMP30]], [[TMP31]]3367; CHECK-NEXT: [[TMP33:%.*]] = icmp ule <64 x i8> [[A0]], [[A1]]3368; CHECK-NEXT: [[TMP34:%.*]] = bitcast <64 x i1> [[TMP32]] to i643369; CHECK-NEXT: [[TMP35:%.*]] = bitcast <64 x i1> [[TMP33]] to i643370; CHECK-NEXT: [[_MSPROP1:%.*]] = or i64 [[_MSPROP]], [[TMP34]]3371; CHECK-NEXT: [[RET2:%.*]] = add i64 [[RET1]], [[TMP35]]3372; CHECK-NEXT: [[_MSPROP2:%.*]] = or i64 [[_MSPROP1]], 03373; CHECK-NEXT: [[RET3:%.*]] = add i64 [[RET2]], 03374; CHECK-NEXT: [[TMP36:%.*]] = xor <64 x i8> [[A0]], [[A1]]3375; CHECK-NEXT: [[TMP37:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]3376; CHECK-NEXT: [[TMP38:%.*]] = icmp ne <64 x i8> [[TMP37]], zeroinitializer3377; CHECK-NEXT: [[TMP39:%.*]] = xor <64 x i8> [[TMP37]], splat (i8 -1)3378; CHECK-NEXT: [[TMP40:%.*]] = and <64 x i8> [[TMP39]], [[TMP36]]3379; CHECK-NEXT: [[TMP41:%.*]] = icmp eq <64 x i8> [[TMP40]], zeroinitializer3380; CHECK-NEXT: [[_MSPROP_ICMP3:%.*]] = and <64 x i1> [[TMP38]], [[TMP41]]3381; CHECK-NEXT: [[TMP42:%.*]] = icmp ne <64 x i8> [[A0]], [[A1]]3382; CHECK-NEXT: [[TMP43:%.*]] = bitcast <64 x i1> [[_MSPROP_ICMP3]] to i643383; CHECK-NEXT: [[TMP44:%.*]] = bitcast <64 x i1> [[TMP42]] to i643384; CHECK-NEXT: [[_MSPROP4:%.*]] = or i64 [[_MSPROP2]], [[TMP43]]3385; CHECK-NEXT: [[RET4:%.*]] = add i64 [[RET3]], [[TMP44]]3386; CHECK-NEXT: [[TMP45:%.*]] = xor <64 x i8> [[TMP1]], splat (i8 -1)3387; CHECK-NEXT: [[TMP46:%.*]] = and <64 x i8> [[A0]], [[TMP45]]3388; CHECK-NEXT: [[TMP47:%.*]] = or <64 x i8> [[A0]], [[TMP1]]3389; CHECK-NEXT: [[TMP48:%.*]] = xor <64 x i8> [[TMP2]], splat (i8 -1)3390; CHECK-NEXT: [[TMP49:%.*]] = and <64 x i8> [[A1]], [[TMP48]]3391; CHECK-NEXT: [[TMP50:%.*]] = or <64 x i8> [[A1]], [[TMP2]]3392; CHECK-NEXT: [[TMP51:%.*]] = icmp uge <64 x i8> [[TMP46]], [[TMP50]]3393; CHECK-NEXT: [[TMP52:%.*]] = icmp uge <64 x i8> [[TMP47]], [[TMP49]]3394; CHECK-NEXT: [[TMP53:%.*]] = xor <64 x i1> [[TMP51]], [[TMP52]]3395; CHECK-NEXT: [[TMP54:%.*]] = icmp uge <64 x i8> [[A0]], [[A1]]3396; CHECK-NEXT: [[TMP55:%.*]] = bitcast <64 x i1> [[TMP53]] to i643397; CHECK-NEXT: [[TMP56:%.*]] = bitcast <64 x i1> [[TMP54]] to i643398; CHECK-NEXT: [[_MSPROP5:%.*]] = or i64 [[_MSPROP4]], [[TMP55]]3399; CHECK-NEXT: [[RET5:%.*]] = add i64 [[RET4]], [[TMP56]]3400; CHECK-NEXT: [[TMP57:%.*]] = xor <64 x i8> [[TMP1]], splat (i8 -1)3401; CHECK-NEXT: [[TMP58:%.*]] = and <64 x i8> [[A0]], [[TMP57]]3402; CHECK-NEXT: [[TMP59:%.*]] = or <64 x i8> [[A0]], [[TMP1]]3403; CHECK-NEXT: [[TMP60:%.*]] = xor <64 x i8> [[TMP2]], splat (i8 -1)3404; CHECK-NEXT: [[TMP61:%.*]] = and <64 x i8> [[A1]], [[TMP60]]3405; CHECK-NEXT: [[TMP62:%.*]] = or <64 x i8> [[A1]], [[TMP2]]3406; CHECK-NEXT: [[TMP63:%.*]] = icmp ugt <64 x i8> [[TMP58]], [[TMP62]]3407; CHECK-NEXT: [[TMP64:%.*]] = icmp ugt <64 x i8> [[TMP59]], [[TMP61]]3408; CHECK-NEXT: [[TMP65:%.*]] = xor <64 x i1> [[TMP63]], [[TMP64]]3409; CHECK-NEXT: [[TMP66:%.*]] = icmp ugt <64 x i8> [[A0]], [[A1]]3410; CHECK-NEXT: [[TMP67:%.*]] = bitcast <64 x i1> [[TMP65]] to i643411; CHECK-NEXT: [[TMP68:%.*]] = bitcast <64 x i1> [[TMP66]] to i643412; CHECK-NEXT: [[_MSPROP6:%.*]] = or i64 [[_MSPROP5]], [[TMP67]]3413; CHECK-NEXT: [[RET6:%.*]] = add i64 [[RET5]], [[TMP68]]3414; CHECK-NEXT: [[_MSPROP7:%.*]] = or i64 [[_MSPROP6]], 03415; CHECK-NEXT: [[RET7:%.*]] = add i64 [[RET6]], -13416; CHECK-NEXT: store i64 [[_MSPROP7]], ptr @__msan_retval_tls, align 83417; CHECK-NEXT: ret i64 [[RET7]]3418;3419 %res0 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 0, i64 -1)3420 %res1 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 1, i64 -1)3421 %ret1 = add i64 %res0, %res13422 %res2 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 2, i64 -1)3423 %ret2 = add i64 %ret1, %res23424 %res3 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 3, i64 -1)3425 %ret3 = add i64 %ret2, %res33426 %res4 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 4, i64 -1)3427 %ret4 = add i64 %ret3, %res43428 %res5 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 5, i64 -1)3429 %ret5 = add i64 %ret4, %res53430 %res6 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 6, i64 -1)3431 %ret6 = add i64 %ret5, %res63432 %res7 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 7, i64 -1)3433 %ret7 = add i64 %ret6, %res73434 ret i64 %ret73435}3436 3437define i64 @test_mask_x86_avx512_ucmp_b_512(<64 x i8> %a0, <64 x i8> %a1, i64 %mask) nounwind #0 {3438; CHECK-LABEL: @test_mask_x86_avx512_ucmp_b_512(3439; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 83440; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83441; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 83442; CHECK-NEXT: call void @llvm.donothing()3443; CHECK-NEXT: [[TMP4:%.*]] = xor <64 x i8> [[A0:%.*]], [[A1:%.*]]3444; CHECK-NEXT: [[TMP5:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]3445; CHECK-NEXT: [[TMP6:%.*]] = icmp ne <64 x i8> [[TMP5]], zeroinitializer3446; CHECK-NEXT: [[TMP7:%.*]] = xor <64 x i8> [[TMP5]], splat (i8 -1)3447; CHECK-NEXT: [[TMP8:%.*]] = and <64 x i8> [[TMP7]], [[TMP4]]3448; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <64 x i8> [[TMP8]], zeroinitializer3449; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <64 x i1> [[TMP6]], [[TMP9]]3450; CHECK-NEXT: [[TMP10:%.*]] = icmp eq <64 x i8> [[A0]], [[A1]]3451; CHECK-NEXT: [[TMP11:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>3452; CHECK-NEXT: [[TMP12:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>3453; CHECK-NEXT: [[TMP13:%.*]] = and <64 x i1> [[_MSPROP_ICMP]], [[TMP11]]3454; CHECK-NEXT: [[TMP14:%.*]] = and <64 x i1> [[TMP10]], [[TMP11]]3455; CHECK-NEXT: [[TMP15:%.*]] = and <64 x i1> [[_MSPROP_ICMP]], [[TMP12]]3456; CHECK-NEXT: [[TMP16:%.*]] = or <64 x i1> [[TMP13]], [[TMP14]]3457; CHECK-NEXT: [[TMP17:%.*]] = or <64 x i1> [[TMP16]], [[TMP15]]3458; CHECK-NEXT: [[TMP18:%.*]] = and <64 x i1> [[TMP10]], [[TMP12]]3459; CHECK-NEXT: [[TMP19:%.*]] = bitcast <64 x i1> [[TMP17]] to i643460; CHECK-NEXT: [[TMP20:%.*]] = bitcast <64 x i1> [[TMP18]] to i643461; CHECK-NEXT: [[TMP21:%.*]] = xor <64 x i8> [[TMP1]], splat (i8 -1)3462; CHECK-NEXT: [[TMP22:%.*]] = and <64 x i8> [[A0]], [[TMP21]]3463; CHECK-NEXT: [[TMP23:%.*]] = or <64 x i8> [[A0]], [[TMP1]]3464; CHECK-NEXT: [[TMP24:%.*]] = xor <64 x i8> [[TMP2]], splat (i8 -1)3465; CHECK-NEXT: [[TMP25:%.*]] = and <64 x i8> [[A1]], [[TMP24]]3466; CHECK-NEXT: [[TMP26:%.*]] = or <64 x i8> [[A1]], [[TMP2]]3467; CHECK-NEXT: [[TMP27:%.*]] = icmp ult <64 x i8> [[TMP22]], [[TMP26]]3468; CHECK-NEXT: [[TMP28:%.*]] = icmp ult <64 x i8> [[TMP23]], [[TMP25]]3469; CHECK-NEXT: [[TMP29:%.*]] = xor <64 x i1> [[TMP27]], [[TMP28]]3470; CHECK-NEXT: [[TMP30:%.*]] = icmp ult <64 x i8> [[A0]], [[A1]]3471; CHECK-NEXT: [[TMP31:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>3472; CHECK-NEXT: [[TMP32:%.*]] = bitcast i64 [[MASK]] to <64 x i1>3473; CHECK-NEXT: [[TMP33:%.*]] = and <64 x i1> [[TMP29]], [[TMP31]]3474; CHECK-NEXT: [[TMP34:%.*]] = and <64 x i1> [[TMP30]], [[TMP31]]3475; CHECK-NEXT: [[TMP35:%.*]] = and <64 x i1> [[TMP29]], [[TMP32]]3476; CHECK-NEXT: [[TMP36:%.*]] = or <64 x i1> [[TMP33]], [[TMP34]]3477; CHECK-NEXT: [[TMP37:%.*]] = or <64 x i1> [[TMP36]], [[TMP35]]3478; CHECK-NEXT: [[TMP38:%.*]] = and <64 x i1> [[TMP30]], [[TMP32]]3479; CHECK-NEXT: [[TMP39:%.*]] = bitcast <64 x i1> [[TMP37]] to i643480; CHECK-NEXT: [[TMP40:%.*]] = bitcast <64 x i1> [[TMP38]] to i643481; CHECK-NEXT: [[_MSPROP:%.*]] = or i64 [[TMP19]], [[TMP39]]3482; CHECK-NEXT: [[RET1:%.*]] = add i64 [[TMP20]], [[TMP40]]3483; CHECK-NEXT: [[TMP41:%.*]] = xor <64 x i8> [[TMP1]], splat (i8 -1)3484; CHECK-NEXT: [[TMP42:%.*]] = and <64 x i8> [[A0]], [[TMP41]]3485; CHECK-NEXT: [[TMP43:%.*]] = or <64 x i8> [[A0]], [[TMP1]]3486; CHECK-NEXT: [[TMP44:%.*]] = xor <64 x i8> [[TMP2]], splat (i8 -1)3487; CHECK-NEXT: [[TMP45:%.*]] = and <64 x i8> [[A1]], [[TMP44]]3488; CHECK-NEXT: [[TMP46:%.*]] = or <64 x i8> [[A1]], [[TMP2]]3489; CHECK-NEXT: [[TMP47:%.*]] = icmp ule <64 x i8> [[TMP42]], [[TMP46]]3490; CHECK-NEXT: [[TMP48:%.*]] = icmp ule <64 x i8> [[TMP43]], [[TMP45]]3491; CHECK-NEXT: [[TMP49:%.*]] = xor <64 x i1> [[TMP47]], [[TMP48]]3492; CHECK-NEXT: [[TMP50:%.*]] = icmp ule <64 x i8> [[A0]], [[A1]]3493; CHECK-NEXT: [[TMP51:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>3494; CHECK-NEXT: [[TMP52:%.*]] = bitcast i64 [[MASK]] to <64 x i1>3495; CHECK-NEXT: [[TMP53:%.*]] = and <64 x i1> [[TMP49]], [[TMP51]]3496; CHECK-NEXT: [[TMP54:%.*]] = and <64 x i1> [[TMP50]], [[TMP51]]3497; CHECK-NEXT: [[TMP55:%.*]] = and <64 x i1> [[TMP49]], [[TMP52]]3498; CHECK-NEXT: [[TMP56:%.*]] = or <64 x i1> [[TMP53]], [[TMP54]]3499; CHECK-NEXT: [[TMP57:%.*]] = or <64 x i1> [[TMP56]], [[TMP55]]3500; CHECK-NEXT: [[TMP58:%.*]] = and <64 x i1> [[TMP50]], [[TMP52]]3501; CHECK-NEXT: [[TMP59:%.*]] = bitcast <64 x i1> [[TMP57]] to i643502; CHECK-NEXT: [[TMP60:%.*]] = bitcast <64 x i1> [[TMP58]] to i643503; CHECK-NEXT: [[_MSPROP1:%.*]] = or i64 [[_MSPROP]], [[TMP59]]3504; CHECK-NEXT: [[RET2:%.*]] = add i64 [[RET1]], [[TMP60]]3505; CHECK-NEXT: [[TMP61:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>3506; CHECK-NEXT: [[TMP62:%.*]] = bitcast i64 [[MASK]] to <64 x i1>3507; CHECK-NEXT: [[TMP63:%.*]] = and <64 x i1> zeroinitializer, [[TMP61]]3508; CHECK-NEXT: [[TMP64:%.*]] = and <64 x i1> zeroinitializer, [[TMP61]]3509; CHECK-NEXT: [[TMP65:%.*]] = and <64 x i1> zeroinitializer, [[TMP62]]3510; CHECK-NEXT: [[TMP66:%.*]] = or <64 x i1> [[TMP63]], [[TMP64]]3511; CHECK-NEXT: [[TMP67:%.*]] = or <64 x i1> [[TMP66]], [[TMP65]]3512; CHECK-NEXT: [[TMP68:%.*]] = and <64 x i1> zeroinitializer, [[TMP62]]3513; CHECK-NEXT: [[TMP69:%.*]] = bitcast <64 x i1> [[TMP67]] to i643514; CHECK-NEXT: [[TMP70:%.*]] = bitcast <64 x i1> [[TMP68]] to i643515; CHECK-NEXT: [[_MSPROP2:%.*]] = or i64 [[_MSPROP1]], [[TMP69]]3516; CHECK-NEXT: [[RET3:%.*]] = add i64 [[RET2]], [[TMP70]]3517; CHECK-NEXT: [[TMP71:%.*]] = xor <64 x i8> [[A0]], [[A1]]3518; CHECK-NEXT: [[TMP72:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]3519; CHECK-NEXT: [[TMP73:%.*]] = icmp ne <64 x i8> [[TMP72]], zeroinitializer3520; CHECK-NEXT: [[TMP74:%.*]] = xor <64 x i8> [[TMP72]], splat (i8 -1)3521; CHECK-NEXT: [[TMP75:%.*]] = and <64 x i8> [[TMP74]], [[TMP71]]3522; CHECK-NEXT: [[TMP76:%.*]] = icmp eq <64 x i8> [[TMP75]], zeroinitializer3523; CHECK-NEXT: [[_MSPROP_ICMP3:%.*]] = and <64 x i1> [[TMP73]], [[TMP76]]3524; CHECK-NEXT: [[TMP77:%.*]] = icmp ne <64 x i8> [[A0]], [[A1]]3525; CHECK-NEXT: [[TMP78:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>3526; CHECK-NEXT: [[TMP79:%.*]] = bitcast i64 [[MASK]] to <64 x i1>3527; CHECK-NEXT: [[TMP80:%.*]] = and <64 x i1> [[_MSPROP_ICMP3]], [[TMP78]]3528; CHECK-NEXT: [[TMP81:%.*]] = and <64 x i1> [[TMP77]], [[TMP78]]3529; CHECK-NEXT: [[TMP82:%.*]] = and <64 x i1> [[_MSPROP_ICMP3]], [[TMP79]]3530; CHECK-NEXT: [[TMP83:%.*]] = or <64 x i1> [[TMP80]], [[TMP81]]3531; CHECK-NEXT: [[TMP84:%.*]] = or <64 x i1> [[TMP83]], [[TMP82]]3532; CHECK-NEXT: [[TMP85:%.*]] = and <64 x i1> [[TMP77]], [[TMP79]]3533; CHECK-NEXT: [[TMP86:%.*]] = bitcast <64 x i1> [[TMP84]] to i643534; CHECK-NEXT: [[TMP87:%.*]] = bitcast <64 x i1> [[TMP85]] to i643535; CHECK-NEXT: [[_MSPROP4:%.*]] = or i64 [[_MSPROP2]], [[TMP86]]3536; CHECK-NEXT: [[RET4:%.*]] = add i64 [[RET3]], [[TMP87]]3537; CHECK-NEXT: [[TMP88:%.*]] = xor <64 x i8> [[TMP1]], splat (i8 -1)3538; CHECK-NEXT: [[TMP89:%.*]] = and <64 x i8> [[A0]], [[TMP88]]3539; CHECK-NEXT: [[TMP90:%.*]] = or <64 x i8> [[A0]], [[TMP1]]3540; CHECK-NEXT: [[TMP91:%.*]] = xor <64 x i8> [[TMP2]], splat (i8 -1)3541; CHECK-NEXT: [[TMP92:%.*]] = and <64 x i8> [[A1]], [[TMP91]]3542; CHECK-NEXT: [[TMP93:%.*]] = or <64 x i8> [[A1]], [[TMP2]]3543; CHECK-NEXT: [[TMP94:%.*]] = icmp uge <64 x i8> [[TMP89]], [[TMP93]]3544; CHECK-NEXT: [[TMP95:%.*]] = icmp uge <64 x i8> [[TMP90]], [[TMP92]]3545; CHECK-NEXT: [[TMP96:%.*]] = xor <64 x i1> [[TMP94]], [[TMP95]]3546; CHECK-NEXT: [[TMP97:%.*]] = icmp uge <64 x i8> [[A0]], [[A1]]3547; CHECK-NEXT: [[TMP98:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>3548; CHECK-NEXT: [[TMP99:%.*]] = bitcast i64 [[MASK]] to <64 x i1>3549; CHECK-NEXT: [[TMP100:%.*]] = and <64 x i1> [[TMP96]], [[TMP98]]3550; CHECK-NEXT: [[TMP101:%.*]] = and <64 x i1> [[TMP97]], [[TMP98]]3551; CHECK-NEXT: [[TMP102:%.*]] = and <64 x i1> [[TMP96]], [[TMP99]]3552; CHECK-NEXT: [[TMP103:%.*]] = or <64 x i1> [[TMP100]], [[TMP101]]3553; CHECK-NEXT: [[TMP104:%.*]] = or <64 x i1> [[TMP103]], [[TMP102]]3554; CHECK-NEXT: [[TMP105:%.*]] = and <64 x i1> [[TMP97]], [[TMP99]]3555; CHECK-NEXT: [[TMP106:%.*]] = bitcast <64 x i1> [[TMP104]] to i643556; CHECK-NEXT: [[TMP107:%.*]] = bitcast <64 x i1> [[TMP105]] to i643557; CHECK-NEXT: [[_MSPROP5:%.*]] = or i64 [[_MSPROP4]], [[TMP106]]3558; CHECK-NEXT: [[RET5:%.*]] = add i64 [[RET4]], [[TMP107]]3559; CHECK-NEXT: [[TMP108:%.*]] = xor <64 x i8> [[TMP1]], splat (i8 -1)3560; CHECK-NEXT: [[TMP109:%.*]] = and <64 x i8> [[A0]], [[TMP108]]3561; CHECK-NEXT: [[TMP110:%.*]] = or <64 x i8> [[A0]], [[TMP1]]3562; CHECK-NEXT: [[TMP111:%.*]] = xor <64 x i8> [[TMP2]], splat (i8 -1)3563; CHECK-NEXT: [[TMP112:%.*]] = and <64 x i8> [[A1]], [[TMP111]]3564; CHECK-NEXT: [[TMP113:%.*]] = or <64 x i8> [[A1]], [[TMP2]]3565; CHECK-NEXT: [[TMP114:%.*]] = icmp ugt <64 x i8> [[TMP109]], [[TMP113]]3566; CHECK-NEXT: [[TMP115:%.*]] = icmp ugt <64 x i8> [[TMP110]], [[TMP112]]3567; CHECK-NEXT: [[TMP116:%.*]] = xor <64 x i1> [[TMP114]], [[TMP115]]3568; CHECK-NEXT: [[TMP117:%.*]] = icmp ugt <64 x i8> [[A0]], [[A1]]3569; CHECK-NEXT: [[TMP118:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>3570; CHECK-NEXT: [[TMP119:%.*]] = bitcast i64 [[MASK]] to <64 x i1>3571; CHECK-NEXT: [[TMP120:%.*]] = and <64 x i1> [[TMP116]], [[TMP118]]3572; CHECK-NEXT: [[TMP121:%.*]] = and <64 x i1> [[TMP117]], [[TMP118]]3573; CHECK-NEXT: [[TMP122:%.*]] = and <64 x i1> [[TMP116]], [[TMP119]]3574; CHECK-NEXT: [[TMP123:%.*]] = or <64 x i1> [[TMP120]], [[TMP121]]3575; CHECK-NEXT: [[TMP124:%.*]] = or <64 x i1> [[TMP123]], [[TMP122]]3576; CHECK-NEXT: [[TMP125:%.*]] = and <64 x i1> [[TMP117]], [[TMP119]]3577; CHECK-NEXT: [[TMP126:%.*]] = bitcast <64 x i1> [[TMP124]] to i643578; CHECK-NEXT: [[TMP127:%.*]] = bitcast <64 x i1> [[TMP125]] to i643579; CHECK-NEXT: [[_MSPROP6:%.*]] = or i64 [[_MSPROP5]], [[TMP126]]3580; CHECK-NEXT: [[RET6:%.*]] = add i64 [[RET5]], [[TMP127]]3581; CHECK-NEXT: [[TMP128:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>3582; CHECK-NEXT: [[TMP129:%.*]] = bitcast i64 [[MASK]] to <64 x i1>3583; CHECK-NEXT: [[TMP130:%.*]] = and <64 x i1> zeroinitializer, [[TMP128]]3584; CHECK-NEXT: [[TMP131:%.*]] = and <64 x i1> splat (i1 true), [[TMP128]]3585; CHECK-NEXT: [[TMP132:%.*]] = and <64 x i1> zeroinitializer, [[TMP129]]3586; CHECK-NEXT: [[TMP133:%.*]] = or <64 x i1> [[TMP130]], [[TMP131]]3587; CHECK-NEXT: [[TMP134:%.*]] = or <64 x i1> [[TMP133]], [[TMP132]]3588; CHECK-NEXT: [[TMP135:%.*]] = and <64 x i1> splat (i1 true), [[TMP129]]3589; CHECK-NEXT: [[TMP136:%.*]] = bitcast <64 x i1> [[TMP134]] to i643590; CHECK-NEXT: [[TMP137:%.*]] = bitcast <64 x i1> [[TMP135]] to i643591; CHECK-NEXT: [[_MSPROP7:%.*]] = or i64 [[_MSPROP6]], [[TMP136]]3592; CHECK-NEXT: [[RET7:%.*]] = add i64 [[RET6]], [[TMP137]]3593; CHECK-NEXT: store i64 [[_MSPROP7]], ptr @__msan_retval_tls, align 83594; CHECK-NEXT: ret i64 [[RET7]]3595;3596 %res0 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 0, i64 %mask)3597 %res1 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 1, i64 %mask)3598 %ret1 = add i64 %res0, %res13599 %res2 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 2, i64 %mask)3600 %ret2 = add i64 %ret1, %res23601 %res3 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 3, i64 %mask)3602 %ret3 = add i64 %ret2, %res33603 %res4 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 4, i64 %mask)3604 %ret4 = add i64 %ret3, %res43605 %res5 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 5, i64 %mask)3606 %ret5 = add i64 %ret4, %res53607 %res6 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 6, i64 %mask)3608 %ret6 = add i64 %ret5, %res63609 %res7 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 7, i64 %mask)3610 %ret7 = add i64 %ret6, %res73611 ret i64 %ret73612}3613 3614declare i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8>, <64 x i8>, i32, i64) nounwind readnone3615 3616define i32 @test_cmp_w_512(<32 x i16> %a0, <32 x i16> %a1) nounwind #0 {3617; CHECK-LABEL: @test_cmp_w_512(3618; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 83619; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83620; CHECK-NEXT: call void @llvm.donothing()3621; CHECK-NEXT: [[TMP3:%.*]] = xor <32 x i16> [[A0:%.*]], [[A1:%.*]]3622; CHECK-NEXT: [[TMP4:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]3623; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <32 x i16> [[TMP4]], zeroinitializer3624; CHECK-NEXT: [[TMP6:%.*]] = xor <32 x i16> [[TMP4]], splat (i16 -1)3625; CHECK-NEXT: [[TMP7:%.*]] = and <32 x i16> [[TMP6]], [[TMP3]]3626; CHECK-NEXT: [[TMP8:%.*]] = icmp eq <32 x i16> [[TMP7]], zeroinitializer3627; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <32 x i1> [[TMP5]], [[TMP8]]3628; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <32 x i16> [[A0]], [[A1]]3629; CHECK-NEXT: [[TMP10:%.*]] = bitcast <32 x i1> [[_MSPROP_ICMP]] to i323630; CHECK-NEXT: [[TMP11:%.*]] = bitcast <32 x i1> [[TMP9]] to i323631; CHECK-NEXT: [[TMP12:%.*]] = xor <32 x i16> [[A0]], splat (i16 -32768)3632; CHECK-NEXT: [[TMP13:%.*]] = xor <32 x i16> [[TMP1]], splat (i16 -1)3633; CHECK-NEXT: [[TMP14:%.*]] = and <32 x i16> [[TMP12]], [[TMP13]]3634; CHECK-NEXT: [[TMP15:%.*]] = or <32 x i16> [[TMP12]], [[TMP1]]3635; CHECK-NEXT: [[TMP16:%.*]] = xor <32 x i16> [[A1]], splat (i16 -32768)3636; CHECK-NEXT: [[TMP17:%.*]] = xor <32 x i16> [[TMP2]], splat (i16 -1)3637; CHECK-NEXT: [[TMP18:%.*]] = and <32 x i16> [[TMP16]], [[TMP17]]3638; CHECK-NEXT: [[TMP19:%.*]] = or <32 x i16> [[TMP16]], [[TMP2]]3639; CHECK-NEXT: [[TMP20:%.*]] = icmp ult <32 x i16> [[TMP14]], [[TMP19]]3640; CHECK-NEXT: [[TMP21:%.*]] = icmp ult <32 x i16> [[TMP15]], [[TMP18]]3641; CHECK-NEXT: [[TMP22:%.*]] = xor <32 x i1> [[TMP20]], [[TMP21]]3642; CHECK-NEXT: [[TMP23:%.*]] = icmp slt <32 x i16> [[A0]], [[A1]]3643; CHECK-NEXT: [[TMP24:%.*]] = bitcast <32 x i1> [[TMP22]] to i323644; CHECK-NEXT: [[TMP25:%.*]] = bitcast <32 x i1> [[TMP23]] to i323645; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP10]], [[TMP24]]3646; CHECK-NEXT: [[RET1:%.*]] = add i32 [[TMP11]], [[TMP25]]3647; CHECK-NEXT: [[TMP26:%.*]] = xor <32 x i16> [[A0]], splat (i16 -32768)3648; CHECK-NEXT: [[TMP27:%.*]] = xor <32 x i16> [[TMP1]], splat (i16 -1)3649; CHECK-NEXT: [[TMP28:%.*]] = and <32 x i16> [[TMP26]], [[TMP27]]3650; CHECK-NEXT: [[TMP29:%.*]] = or <32 x i16> [[TMP26]], [[TMP1]]3651; CHECK-NEXT: [[TMP30:%.*]] = xor <32 x i16> [[A1]], splat (i16 -32768)3652; CHECK-NEXT: [[TMP31:%.*]] = xor <32 x i16> [[TMP2]], splat (i16 -1)3653; CHECK-NEXT: [[TMP32:%.*]] = and <32 x i16> [[TMP30]], [[TMP31]]3654; CHECK-NEXT: [[TMP33:%.*]] = or <32 x i16> [[TMP30]], [[TMP2]]3655; CHECK-NEXT: [[TMP34:%.*]] = icmp ule <32 x i16> [[TMP28]], [[TMP33]]3656; CHECK-NEXT: [[TMP35:%.*]] = icmp ule <32 x i16> [[TMP29]], [[TMP32]]3657; CHECK-NEXT: [[TMP36:%.*]] = xor <32 x i1> [[TMP34]], [[TMP35]]3658; CHECK-NEXT: [[TMP37:%.*]] = icmp sle <32 x i16> [[A0]], [[A1]]3659; CHECK-NEXT: [[TMP38:%.*]] = bitcast <32 x i1> [[TMP36]] to i323660; CHECK-NEXT: [[TMP39:%.*]] = bitcast <32 x i1> [[TMP37]] to i323661; CHECK-NEXT: [[_MSPROP1:%.*]] = or i32 [[_MSPROP]], [[TMP38]]3662; CHECK-NEXT: [[RET2:%.*]] = add i32 [[RET1]], [[TMP39]]3663; CHECK-NEXT: [[_MSPROP2:%.*]] = or i32 [[_MSPROP1]], 03664; CHECK-NEXT: [[RET3:%.*]] = add i32 [[RET2]], 03665; CHECK-NEXT: [[TMP40:%.*]] = xor <32 x i16> [[A0]], [[A1]]3666; CHECK-NEXT: [[TMP41:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]3667; CHECK-NEXT: [[TMP42:%.*]] = icmp ne <32 x i16> [[TMP41]], zeroinitializer3668; CHECK-NEXT: [[TMP43:%.*]] = xor <32 x i16> [[TMP41]], splat (i16 -1)3669; CHECK-NEXT: [[TMP44:%.*]] = and <32 x i16> [[TMP43]], [[TMP40]]3670; CHECK-NEXT: [[TMP45:%.*]] = icmp eq <32 x i16> [[TMP44]], zeroinitializer3671; CHECK-NEXT: [[_MSPROP_ICMP3:%.*]] = and <32 x i1> [[TMP42]], [[TMP45]]3672; CHECK-NEXT: [[TMP46:%.*]] = icmp ne <32 x i16> [[A0]], [[A1]]3673; CHECK-NEXT: [[TMP47:%.*]] = bitcast <32 x i1> [[_MSPROP_ICMP3]] to i323674; CHECK-NEXT: [[TMP48:%.*]] = bitcast <32 x i1> [[TMP46]] to i323675; CHECK-NEXT: [[_MSPROP4:%.*]] = or i32 [[_MSPROP2]], [[TMP47]]3676; CHECK-NEXT: [[RET4:%.*]] = add i32 [[RET3]], [[TMP48]]3677; CHECK-NEXT: [[TMP49:%.*]] = xor <32 x i16> [[A0]], splat (i16 -32768)3678; CHECK-NEXT: [[TMP50:%.*]] = xor <32 x i16> [[TMP1]], splat (i16 -1)3679; CHECK-NEXT: [[TMP51:%.*]] = and <32 x i16> [[TMP49]], [[TMP50]]3680; CHECK-NEXT: [[TMP52:%.*]] = or <32 x i16> [[TMP49]], [[TMP1]]3681; CHECK-NEXT: [[TMP53:%.*]] = xor <32 x i16> [[A1]], splat (i16 -32768)3682; CHECK-NEXT: [[TMP54:%.*]] = xor <32 x i16> [[TMP2]], splat (i16 -1)3683; CHECK-NEXT: [[TMP55:%.*]] = and <32 x i16> [[TMP53]], [[TMP54]]3684; CHECK-NEXT: [[TMP56:%.*]] = or <32 x i16> [[TMP53]], [[TMP2]]3685; CHECK-NEXT: [[TMP57:%.*]] = icmp uge <32 x i16> [[TMP51]], [[TMP56]]3686; CHECK-NEXT: [[TMP58:%.*]] = icmp uge <32 x i16> [[TMP52]], [[TMP55]]3687; CHECK-NEXT: [[TMP59:%.*]] = xor <32 x i1> [[TMP57]], [[TMP58]]3688; CHECK-NEXT: [[TMP60:%.*]] = icmp sge <32 x i16> [[A0]], [[A1]]3689; CHECK-NEXT: [[TMP61:%.*]] = bitcast <32 x i1> [[TMP59]] to i323690; CHECK-NEXT: [[TMP62:%.*]] = bitcast <32 x i1> [[TMP60]] to i323691; CHECK-NEXT: [[_MSPROP5:%.*]] = or i32 [[_MSPROP4]], [[TMP61]]3692; CHECK-NEXT: [[RET5:%.*]] = add i32 [[RET4]], [[TMP62]]3693; CHECK-NEXT: [[TMP63:%.*]] = xor <32 x i16> [[A0]], splat (i16 -32768)3694; CHECK-NEXT: [[TMP64:%.*]] = xor <32 x i16> [[TMP1]], splat (i16 -1)3695; CHECK-NEXT: [[TMP65:%.*]] = and <32 x i16> [[TMP63]], [[TMP64]]3696; CHECK-NEXT: [[TMP66:%.*]] = or <32 x i16> [[TMP63]], [[TMP1]]3697; CHECK-NEXT: [[TMP67:%.*]] = xor <32 x i16> [[A1]], splat (i16 -32768)3698; CHECK-NEXT: [[TMP68:%.*]] = xor <32 x i16> [[TMP2]], splat (i16 -1)3699; CHECK-NEXT: [[TMP69:%.*]] = and <32 x i16> [[TMP67]], [[TMP68]]3700; CHECK-NEXT: [[TMP70:%.*]] = or <32 x i16> [[TMP67]], [[TMP2]]3701; CHECK-NEXT: [[TMP71:%.*]] = icmp ugt <32 x i16> [[TMP65]], [[TMP70]]3702; CHECK-NEXT: [[TMP72:%.*]] = icmp ugt <32 x i16> [[TMP66]], [[TMP69]]3703; CHECK-NEXT: [[TMP73:%.*]] = xor <32 x i1> [[TMP71]], [[TMP72]]3704; CHECK-NEXT: [[TMP74:%.*]] = icmp sgt <32 x i16> [[A0]], [[A1]]3705; CHECK-NEXT: [[TMP75:%.*]] = bitcast <32 x i1> [[TMP73]] to i323706; CHECK-NEXT: [[TMP76:%.*]] = bitcast <32 x i1> [[TMP74]] to i323707; CHECK-NEXT: [[_MSPROP6:%.*]] = or i32 [[_MSPROP5]], [[TMP75]]3708; CHECK-NEXT: [[RET6:%.*]] = add i32 [[RET5]], [[TMP76]]3709; CHECK-NEXT: [[_MSPROP7:%.*]] = or i32 [[_MSPROP6]], 03710; CHECK-NEXT: [[RET7:%.*]] = add i32 [[RET6]], -13711; CHECK-NEXT: store i32 [[_MSPROP7]], ptr @__msan_retval_tls, align 83712; CHECK-NEXT: ret i32 [[RET7]]3713;3714 %res0 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 0, i32 -1)3715 %res1 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 1, i32 -1)3716 %ret1 = add i32 %res0, %res13717 %res2 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 2, i32 -1)3718 %ret2 = add i32 %ret1, %res23719 %res3 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 3, i32 -1)3720 %ret3 = add i32 %ret2, %res33721 %res4 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 4, i32 -1)3722 %ret4 = add i32 %ret3, %res43723 %res5 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 5, i32 -1)3724 %ret5 = add i32 %ret4, %res53725 %res6 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 6, i32 -1)3726 %ret6 = add i32 %ret5, %res63727 %res7 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 7, i32 -1)3728 %ret7 = add i32 %ret6, %res73729 ret i32 %ret73730}3731 3732define i32 @test_mask_cmp_w_512(<32 x i16> %a0, <32 x i16> %a1, i32 %mask) nounwind #0 {3733; CHECK-LABEL: @test_mask_cmp_w_512(3734; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 83735; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83736; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 83737; CHECK-NEXT: call void @llvm.donothing()3738; CHECK-NEXT: [[TMP4:%.*]] = xor <32 x i16> [[A0:%.*]], [[A1:%.*]]3739; CHECK-NEXT: [[TMP5:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]3740; CHECK-NEXT: [[TMP6:%.*]] = icmp ne <32 x i16> [[TMP5]], zeroinitializer3741; CHECK-NEXT: [[TMP7:%.*]] = xor <32 x i16> [[TMP5]], splat (i16 -1)3742; CHECK-NEXT: [[TMP8:%.*]] = and <32 x i16> [[TMP7]], [[TMP4]]3743; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <32 x i16> [[TMP8]], zeroinitializer3744; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <32 x i1> [[TMP6]], [[TMP9]]3745; CHECK-NEXT: [[TMP10:%.*]] = icmp eq <32 x i16> [[A0]], [[A1]]3746; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>3747; CHECK-NEXT: [[TMP12:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>3748; CHECK-NEXT: [[TMP13:%.*]] = and <32 x i1> [[_MSPROP_ICMP]], [[TMP11]]3749; CHECK-NEXT: [[TMP14:%.*]] = and <32 x i1> [[TMP10]], [[TMP11]]3750; CHECK-NEXT: [[TMP15:%.*]] = and <32 x i1> [[_MSPROP_ICMP]], [[TMP12]]3751; CHECK-NEXT: [[TMP16:%.*]] = or <32 x i1> [[TMP13]], [[TMP14]]3752; CHECK-NEXT: [[TMP17:%.*]] = or <32 x i1> [[TMP16]], [[TMP15]]3753; CHECK-NEXT: [[TMP18:%.*]] = and <32 x i1> [[TMP10]], [[TMP12]]3754; CHECK-NEXT: [[TMP19:%.*]] = bitcast <32 x i1> [[TMP17]] to i323755; CHECK-NEXT: [[TMP20:%.*]] = bitcast <32 x i1> [[TMP18]] to i323756; CHECK-NEXT: [[TMP21:%.*]] = xor <32 x i16> [[A0]], splat (i16 -32768)3757; CHECK-NEXT: [[TMP22:%.*]] = xor <32 x i16> [[TMP1]], splat (i16 -1)3758; CHECK-NEXT: [[TMP23:%.*]] = and <32 x i16> [[TMP21]], [[TMP22]]3759; CHECK-NEXT: [[TMP24:%.*]] = or <32 x i16> [[TMP21]], [[TMP1]]3760; CHECK-NEXT: [[TMP25:%.*]] = xor <32 x i16> [[A1]], splat (i16 -32768)3761; CHECK-NEXT: [[TMP26:%.*]] = xor <32 x i16> [[TMP2]], splat (i16 -1)3762; CHECK-NEXT: [[TMP27:%.*]] = and <32 x i16> [[TMP25]], [[TMP26]]3763; CHECK-NEXT: [[TMP28:%.*]] = or <32 x i16> [[TMP25]], [[TMP2]]3764; CHECK-NEXT: [[TMP29:%.*]] = icmp ult <32 x i16> [[TMP23]], [[TMP28]]3765; CHECK-NEXT: [[TMP30:%.*]] = icmp ult <32 x i16> [[TMP24]], [[TMP27]]3766; CHECK-NEXT: [[TMP31:%.*]] = xor <32 x i1> [[TMP29]], [[TMP30]]3767; CHECK-NEXT: [[TMP32:%.*]] = icmp slt <32 x i16> [[A0]], [[A1]]3768; CHECK-NEXT: [[TMP33:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>3769; CHECK-NEXT: [[TMP34:%.*]] = bitcast i32 [[MASK]] to <32 x i1>3770; CHECK-NEXT: [[TMP35:%.*]] = and <32 x i1> [[TMP31]], [[TMP33]]3771; CHECK-NEXT: [[TMP36:%.*]] = and <32 x i1> [[TMP32]], [[TMP33]]3772; CHECK-NEXT: [[TMP37:%.*]] = and <32 x i1> [[TMP31]], [[TMP34]]3773; CHECK-NEXT: [[TMP38:%.*]] = or <32 x i1> [[TMP35]], [[TMP36]]3774; CHECK-NEXT: [[TMP39:%.*]] = or <32 x i1> [[TMP38]], [[TMP37]]3775; CHECK-NEXT: [[TMP40:%.*]] = and <32 x i1> [[TMP32]], [[TMP34]]3776; CHECK-NEXT: [[TMP41:%.*]] = bitcast <32 x i1> [[TMP39]] to i323777; CHECK-NEXT: [[TMP42:%.*]] = bitcast <32 x i1> [[TMP40]] to i323778; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP19]], [[TMP41]]3779; CHECK-NEXT: [[RET1:%.*]] = add i32 [[TMP20]], [[TMP42]]3780; CHECK-NEXT: [[TMP43:%.*]] = xor <32 x i16> [[A0]], splat (i16 -32768)3781; CHECK-NEXT: [[TMP44:%.*]] = xor <32 x i16> [[TMP1]], splat (i16 -1)3782; CHECK-NEXT: [[TMP45:%.*]] = and <32 x i16> [[TMP43]], [[TMP44]]3783; CHECK-NEXT: [[TMP46:%.*]] = or <32 x i16> [[TMP43]], [[TMP1]]3784; CHECK-NEXT: [[TMP47:%.*]] = xor <32 x i16> [[A1]], splat (i16 -32768)3785; CHECK-NEXT: [[TMP48:%.*]] = xor <32 x i16> [[TMP2]], splat (i16 -1)3786; CHECK-NEXT: [[TMP49:%.*]] = and <32 x i16> [[TMP47]], [[TMP48]]3787; CHECK-NEXT: [[TMP50:%.*]] = or <32 x i16> [[TMP47]], [[TMP2]]3788; CHECK-NEXT: [[TMP51:%.*]] = icmp ule <32 x i16> [[TMP45]], [[TMP50]]3789; CHECK-NEXT: [[TMP52:%.*]] = icmp ule <32 x i16> [[TMP46]], [[TMP49]]3790; CHECK-NEXT: [[TMP53:%.*]] = xor <32 x i1> [[TMP51]], [[TMP52]]3791; CHECK-NEXT: [[TMP54:%.*]] = icmp sle <32 x i16> [[A0]], [[A1]]3792; CHECK-NEXT: [[TMP55:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>3793; CHECK-NEXT: [[TMP56:%.*]] = bitcast i32 [[MASK]] to <32 x i1>3794; CHECK-NEXT: [[TMP57:%.*]] = and <32 x i1> [[TMP53]], [[TMP55]]3795; CHECK-NEXT: [[TMP58:%.*]] = and <32 x i1> [[TMP54]], [[TMP55]]3796; CHECK-NEXT: [[TMP59:%.*]] = and <32 x i1> [[TMP53]], [[TMP56]]3797; CHECK-NEXT: [[TMP60:%.*]] = or <32 x i1> [[TMP57]], [[TMP58]]3798; CHECK-NEXT: [[TMP61:%.*]] = or <32 x i1> [[TMP60]], [[TMP59]]3799; CHECK-NEXT: [[TMP62:%.*]] = and <32 x i1> [[TMP54]], [[TMP56]]3800; CHECK-NEXT: [[TMP63:%.*]] = bitcast <32 x i1> [[TMP61]] to i323801; CHECK-NEXT: [[TMP64:%.*]] = bitcast <32 x i1> [[TMP62]] to i323802; CHECK-NEXT: [[_MSPROP1:%.*]] = or i32 [[_MSPROP]], [[TMP63]]3803; CHECK-NEXT: [[RET2:%.*]] = add i32 [[RET1]], [[TMP64]]3804; CHECK-NEXT: [[TMP65:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>3805; CHECK-NEXT: [[TMP66:%.*]] = bitcast i32 [[MASK]] to <32 x i1>3806; CHECK-NEXT: [[TMP67:%.*]] = and <32 x i1> zeroinitializer, [[TMP65]]3807; CHECK-NEXT: [[TMP68:%.*]] = and <32 x i1> zeroinitializer, [[TMP65]]3808; CHECK-NEXT: [[TMP69:%.*]] = and <32 x i1> zeroinitializer, [[TMP66]]3809; CHECK-NEXT: [[TMP70:%.*]] = or <32 x i1> [[TMP67]], [[TMP68]]3810; CHECK-NEXT: [[TMP71:%.*]] = or <32 x i1> [[TMP70]], [[TMP69]]3811; CHECK-NEXT: [[TMP72:%.*]] = and <32 x i1> zeroinitializer, [[TMP66]]3812; CHECK-NEXT: [[TMP73:%.*]] = bitcast <32 x i1> [[TMP71]] to i323813; CHECK-NEXT: [[TMP74:%.*]] = bitcast <32 x i1> [[TMP72]] to i323814; CHECK-NEXT: [[_MSPROP2:%.*]] = or i32 [[_MSPROP1]], [[TMP73]]3815; CHECK-NEXT: [[RET3:%.*]] = add i32 [[RET2]], [[TMP74]]3816; CHECK-NEXT: [[TMP75:%.*]] = xor <32 x i16> [[A0]], [[A1]]3817; CHECK-NEXT: [[TMP76:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]3818; CHECK-NEXT: [[TMP77:%.*]] = icmp ne <32 x i16> [[TMP76]], zeroinitializer3819; CHECK-NEXT: [[TMP78:%.*]] = xor <32 x i16> [[TMP76]], splat (i16 -1)3820; CHECK-NEXT: [[TMP79:%.*]] = and <32 x i16> [[TMP78]], [[TMP75]]3821; CHECK-NEXT: [[TMP80:%.*]] = icmp eq <32 x i16> [[TMP79]], zeroinitializer3822; CHECK-NEXT: [[_MSPROP_ICMP3:%.*]] = and <32 x i1> [[TMP77]], [[TMP80]]3823; CHECK-NEXT: [[TMP81:%.*]] = icmp ne <32 x i16> [[A0]], [[A1]]3824; CHECK-NEXT: [[TMP82:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>3825; CHECK-NEXT: [[TMP83:%.*]] = bitcast i32 [[MASK]] to <32 x i1>3826; CHECK-NEXT: [[TMP84:%.*]] = and <32 x i1> [[_MSPROP_ICMP3]], [[TMP82]]3827; CHECK-NEXT: [[TMP85:%.*]] = and <32 x i1> [[TMP81]], [[TMP82]]3828; CHECK-NEXT: [[TMP86:%.*]] = and <32 x i1> [[_MSPROP_ICMP3]], [[TMP83]]3829; CHECK-NEXT: [[TMP87:%.*]] = or <32 x i1> [[TMP84]], [[TMP85]]3830; CHECK-NEXT: [[TMP88:%.*]] = or <32 x i1> [[TMP87]], [[TMP86]]3831; CHECK-NEXT: [[TMP89:%.*]] = and <32 x i1> [[TMP81]], [[TMP83]]3832; CHECK-NEXT: [[TMP90:%.*]] = bitcast <32 x i1> [[TMP88]] to i323833; CHECK-NEXT: [[TMP91:%.*]] = bitcast <32 x i1> [[TMP89]] to i323834; CHECK-NEXT: [[_MSPROP4:%.*]] = or i32 [[_MSPROP2]], [[TMP90]]3835; CHECK-NEXT: [[RET4:%.*]] = add i32 [[RET3]], [[TMP91]]3836; CHECK-NEXT: [[TMP92:%.*]] = xor <32 x i16> [[A0]], splat (i16 -32768)3837; CHECK-NEXT: [[TMP93:%.*]] = xor <32 x i16> [[TMP1]], splat (i16 -1)3838; CHECK-NEXT: [[TMP94:%.*]] = and <32 x i16> [[TMP92]], [[TMP93]]3839; CHECK-NEXT: [[TMP95:%.*]] = or <32 x i16> [[TMP92]], [[TMP1]]3840; CHECK-NEXT: [[TMP96:%.*]] = xor <32 x i16> [[A1]], splat (i16 -32768)3841; CHECK-NEXT: [[TMP97:%.*]] = xor <32 x i16> [[TMP2]], splat (i16 -1)3842; CHECK-NEXT: [[TMP98:%.*]] = and <32 x i16> [[TMP96]], [[TMP97]]3843; CHECK-NEXT: [[TMP99:%.*]] = or <32 x i16> [[TMP96]], [[TMP2]]3844; CHECK-NEXT: [[TMP100:%.*]] = icmp uge <32 x i16> [[TMP94]], [[TMP99]]3845; CHECK-NEXT: [[TMP101:%.*]] = icmp uge <32 x i16> [[TMP95]], [[TMP98]]3846; CHECK-NEXT: [[TMP102:%.*]] = xor <32 x i1> [[TMP100]], [[TMP101]]3847; CHECK-NEXT: [[TMP103:%.*]] = icmp sge <32 x i16> [[A0]], [[A1]]3848; CHECK-NEXT: [[TMP104:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>3849; CHECK-NEXT: [[TMP105:%.*]] = bitcast i32 [[MASK]] to <32 x i1>3850; CHECK-NEXT: [[TMP106:%.*]] = and <32 x i1> [[TMP102]], [[TMP104]]3851; CHECK-NEXT: [[TMP107:%.*]] = and <32 x i1> [[TMP103]], [[TMP104]]3852; CHECK-NEXT: [[TMP108:%.*]] = and <32 x i1> [[TMP102]], [[TMP105]]3853; CHECK-NEXT: [[TMP109:%.*]] = or <32 x i1> [[TMP106]], [[TMP107]]3854; CHECK-NEXT: [[TMP110:%.*]] = or <32 x i1> [[TMP109]], [[TMP108]]3855; CHECK-NEXT: [[TMP111:%.*]] = and <32 x i1> [[TMP103]], [[TMP105]]3856; CHECK-NEXT: [[TMP112:%.*]] = bitcast <32 x i1> [[TMP110]] to i323857; CHECK-NEXT: [[TMP113:%.*]] = bitcast <32 x i1> [[TMP111]] to i323858; CHECK-NEXT: [[_MSPROP5:%.*]] = or i32 [[_MSPROP4]], [[TMP112]]3859; CHECK-NEXT: [[RET5:%.*]] = add i32 [[RET4]], [[TMP113]]3860; CHECK-NEXT: [[TMP114:%.*]] = xor <32 x i16> [[A0]], splat (i16 -32768)3861; CHECK-NEXT: [[TMP115:%.*]] = xor <32 x i16> [[TMP1]], splat (i16 -1)3862; CHECK-NEXT: [[TMP116:%.*]] = and <32 x i16> [[TMP114]], [[TMP115]]3863; CHECK-NEXT: [[TMP117:%.*]] = or <32 x i16> [[TMP114]], [[TMP1]]3864; CHECK-NEXT: [[TMP118:%.*]] = xor <32 x i16> [[A1]], splat (i16 -32768)3865; CHECK-NEXT: [[TMP119:%.*]] = xor <32 x i16> [[TMP2]], splat (i16 -1)3866; CHECK-NEXT: [[TMP120:%.*]] = and <32 x i16> [[TMP118]], [[TMP119]]3867; CHECK-NEXT: [[TMP121:%.*]] = or <32 x i16> [[TMP118]], [[TMP2]]3868; CHECK-NEXT: [[TMP122:%.*]] = icmp ugt <32 x i16> [[TMP116]], [[TMP121]]3869; CHECK-NEXT: [[TMP123:%.*]] = icmp ugt <32 x i16> [[TMP117]], [[TMP120]]3870; CHECK-NEXT: [[TMP124:%.*]] = xor <32 x i1> [[TMP122]], [[TMP123]]3871; CHECK-NEXT: [[TMP125:%.*]] = icmp sgt <32 x i16> [[A0]], [[A1]]3872; CHECK-NEXT: [[TMP126:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>3873; CHECK-NEXT: [[TMP127:%.*]] = bitcast i32 [[MASK]] to <32 x i1>3874; CHECK-NEXT: [[TMP128:%.*]] = and <32 x i1> [[TMP124]], [[TMP126]]3875; CHECK-NEXT: [[TMP129:%.*]] = and <32 x i1> [[TMP125]], [[TMP126]]3876; CHECK-NEXT: [[TMP130:%.*]] = and <32 x i1> [[TMP124]], [[TMP127]]3877; CHECK-NEXT: [[TMP131:%.*]] = or <32 x i1> [[TMP128]], [[TMP129]]3878; CHECK-NEXT: [[TMP132:%.*]] = or <32 x i1> [[TMP131]], [[TMP130]]3879; CHECK-NEXT: [[TMP133:%.*]] = and <32 x i1> [[TMP125]], [[TMP127]]3880; CHECK-NEXT: [[TMP134:%.*]] = bitcast <32 x i1> [[TMP132]] to i323881; CHECK-NEXT: [[TMP135:%.*]] = bitcast <32 x i1> [[TMP133]] to i323882; CHECK-NEXT: [[_MSPROP6:%.*]] = or i32 [[_MSPROP5]], [[TMP134]]3883; CHECK-NEXT: [[RET6:%.*]] = add i32 [[RET5]], [[TMP135]]3884; CHECK-NEXT: [[TMP136:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>3885; CHECK-NEXT: [[TMP137:%.*]] = bitcast i32 [[MASK]] to <32 x i1>3886; CHECK-NEXT: [[TMP138:%.*]] = and <32 x i1> zeroinitializer, [[TMP136]]3887; CHECK-NEXT: [[TMP139:%.*]] = and <32 x i1> splat (i1 true), [[TMP136]]3888; CHECK-NEXT: [[TMP140:%.*]] = and <32 x i1> zeroinitializer, [[TMP137]]3889; CHECK-NEXT: [[TMP141:%.*]] = or <32 x i1> [[TMP138]], [[TMP139]]3890; CHECK-NEXT: [[TMP142:%.*]] = or <32 x i1> [[TMP141]], [[TMP140]]3891; CHECK-NEXT: [[TMP143:%.*]] = and <32 x i1> splat (i1 true), [[TMP137]]3892; CHECK-NEXT: [[TMP144:%.*]] = bitcast <32 x i1> [[TMP142]] to i323893; CHECK-NEXT: [[TMP145:%.*]] = bitcast <32 x i1> [[TMP143]] to i323894; CHECK-NEXT: [[_MSPROP7:%.*]] = or i32 [[_MSPROP6]], [[TMP144]]3895; CHECK-NEXT: [[RET7:%.*]] = add i32 [[RET6]], [[TMP145]]3896; CHECK-NEXT: store i32 [[_MSPROP7]], ptr @__msan_retval_tls, align 83897; CHECK-NEXT: ret i32 [[RET7]]3898;3899 %res0 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 0, i32 %mask)3900 %res1 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 1, i32 %mask)3901 %ret1 = add i32 %res0, %res13902 %res2 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 2, i32 %mask)3903 %ret2 = add i32 %ret1, %res23904 %res3 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 3, i32 %mask)3905 %ret3 = add i32 %ret2, %res33906 %res4 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 4, i32 %mask)3907 %ret4 = add i32 %ret3, %res43908 %res5 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 5, i32 %mask)3909 %ret5 = add i32 %ret4, %res53910 %res6 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 6, i32 %mask)3911 %ret6 = add i32 %ret5, %res63912 %res7 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 7, i32 %mask)3913 %ret7 = add i32 %ret6, %res73914 ret i32 %ret73915}3916 3917declare i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16>, <32 x i16>, i32, i32) nounwind readnone3918 3919define i32 @test_ucmp_w_512(<32 x i16> %a0, <32 x i16> %a1) nounwind #0 {3920; CHECK-LABEL: @test_ucmp_w_512(3921; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 83922; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 83923; CHECK-NEXT: call void @llvm.donothing()3924; CHECK-NEXT: [[TMP3:%.*]] = xor <32 x i16> [[A0:%.*]], [[A1:%.*]]3925; CHECK-NEXT: [[TMP4:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]3926; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <32 x i16> [[TMP4]], zeroinitializer3927; CHECK-NEXT: [[TMP6:%.*]] = xor <32 x i16> [[TMP4]], splat (i16 -1)3928; CHECK-NEXT: [[TMP7:%.*]] = and <32 x i16> [[TMP6]], [[TMP3]]3929; CHECK-NEXT: [[TMP8:%.*]] = icmp eq <32 x i16> [[TMP7]], zeroinitializer3930; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <32 x i1> [[TMP5]], [[TMP8]]3931; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <32 x i16> [[A0]], [[A1]]3932; CHECK-NEXT: [[TMP10:%.*]] = bitcast <32 x i1> [[_MSPROP_ICMP]] to i323933; CHECK-NEXT: [[TMP11:%.*]] = bitcast <32 x i1> [[TMP9]] to i323934; CHECK-NEXT: [[TMP12:%.*]] = xor <32 x i16> [[TMP1]], splat (i16 -1)3935; CHECK-NEXT: [[TMP13:%.*]] = and <32 x i16> [[A0]], [[TMP12]]3936; CHECK-NEXT: [[TMP14:%.*]] = or <32 x i16> [[A0]], [[TMP1]]3937; CHECK-NEXT: [[TMP15:%.*]] = xor <32 x i16> [[TMP2]], splat (i16 -1)3938; CHECK-NEXT: [[TMP16:%.*]] = and <32 x i16> [[A1]], [[TMP15]]3939; CHECK-NEXT: [[TMP17:%.*]] = or <32 x i16> [[A1]], [[TMP2]]3940; CHECK-NEXT: [[TMP18:%.*]] = icmp ult <32 x i16> [[TMP13]], [[TMP17]]3941; CHECK-NEXT: [[TMP19:%.*]] = icmp ult <32 x i16> [[TMP14]], [[TMP16]]3942; CHECK-NEXT: [[TMP20:%.*]] = xor <32 x i1> [[TMP18]], [[TMP19]]3943; CHECK-NEXT: [[TMP21:%.*]] = icmp ult <32 x i16> [[A0]], [[A1]]3944; CHECK-NEXT: [[TMP22:%.*]] = bitcast <32 x i1> [[TMP20]] to i323945; CHECK-NEXT: [[TMP23:%.*]] = bitcast <32 x i1> [[TMP21]] to i323946; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP10]], [[TMP22]]3947; CHECK-NEXT: [[RET1:%.*]] = add i32 [[TMP11]], [[TMP23]]3948; CHECK-NEXT: [[TMP24:%.*]] = xor <32 x i16> [[TMP1]], splat (i16 -1)3949; CHECK-NEXT: [[TMP25:%.*]] = and <32 x i16> [[A0]], [[TMP24]]3950; CHECK-NEXT: [[TMP26:%.*]] = or <32 x i16> [[A0]], [[TMP1]]3951; CHECK-NEXT: [[TMP27:%.*]] = xor <32 x i16> [[TMP2]], splat (i16 -1)3952; CHECK-NEXT: [[TMP28:%.*]] = and <32 x i16> [[A1]], [[TMP27]]3953; CHECK-NEXT: [[TMP29:%.*]] = or <32 x i16> [[A1]], [[TMP2]]3954; CHECK-NEXT: [[TMP30:%.*]] = icmp ule <32 x i16> [[TMP25]], [[TMP29]]3955; CHECK-NEXT: [[TMP31:%.*]] = icmp ule <32 x i16> [[TMP26]], [[TMP28]]3956; CHECK-NEXT: [[TMP32:%.*]] = xor <32 x i1> [[TMP30]], [[TMP31]]3957; CHECK-NEXT: [[TMP33:%.*]] = icmp ule <32 x i16> [[A0]], [[A1]]3958; CHECK-NEXT: [[TMP34:%.*]] = bitcast <32 x i1> [[TMP32]] to i323959; CHECK-NEXT: [[TMP35:%.*]] = bitcast <32 x i1> [[TMP33]] to i323960; CHECK-NEXT: [[_MSPROP1:%.*]] = or i32 [[_MSPROP]], [[TMP34]]3961; CHECK-NEXT: [[RET2:%.*]] = add i32 [[RET1]], [[TMP35]]3962; CHECK-NEXT: [[_MSPROP2:%.*]] = or i32 [[_MSPROP1]], 03963; CHECK-NEXT: [[RET3:%.*]] = add i32 [[RET2]], 03964; CHECK-NEXT: [[TMP36:%.*]] = xor <32 x i16> [[A0]], [[A1]]3965; CHECK-NEXT: [[TMP37:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]3966; CHECK-NEXT: [[TMP38:%.*]] = icmp ne <32 x i16> [[TMP37]], zeroinitializer3967; CHECK-NEXT: [[TMP39:%.*]] = xor <32 x i16> [[TMP37]], splat (i16 -1)3968; CHECK-NEXT: [[TMP40:%.*]] = and <32 x i16> [[TMP39]], [[TMP36]]3969; CHECK-NEXT: [[TMP41:%.*]] = icmp eq <32 x i16> [[TMP40]], zeroinitializer3970; CHECK-NEXT: [[_MSPROP_ICMP3:%.*]] = and <32 x i1> [[TMP38]], [[TMP41]]3971; CHECK-NEXT: [[TMP42:%.*]] = icmp ne <32 x i16> [[A0]], [[A1]]3972; CHECK-NEXT: [[TMP43:%.*]] = bitcast <32 x i1> [[_MSPROP_ICMP3]] to i323973; CHECK-NEXT: [[TMP44:%.*]] = bitcast <32 x i1> [[TMP42]] to i323974; CHECK-NEXT: [[_MSPROP4:%.*]] = or i32 [[_MSPROP2]], [[TMP43]]3975; CHECK-NEXT: [[RET4:%.*]] = add i32 [[RET3]], [[TMP44]]3976; CHECK-NEXT: [[TMP45:%.*]] = xor <32 x i16> [[TMP1]], splat (i16 -1)3977; CHECK-NEXT: [[TMP46:%.*]] = and <32 x i16> [[A0]], [[TMP45]]3978; CHECK-NEXT: [[TMP47:%.*]] = or <32 x i16> [[A0]], [[TMP1]]3979; CHECK-NEXT: [[TMP48:%.*]] = xor <32 x i16> [[TMP2]], splat (i16 -1)3980; CHECK-NEXT: [[TMP49:%.*]] = and <32 x i16> [[A1]], [[TMP48]]3981; CHECK-NEXT: [[TMP50:%.*]] = or <32 x i16> [[A1]], [[TMP2]]3982; CHECK-NEXT: [[TMP51:%.*]] = icmp uge <32 x i16> [[TMP46]], [[TMP50]]3983; CHECK-NEXT: [[TMP52:%.*]] = icmp uge <32 x i16> [[TMP47]], [[TMP49]]3984; CHECK-NEXT: [[TMP53:%.*]] = xor <32 x i1> [[TMP51]], [[TMP52]]3985; CHECK-NEXT: [[TMP54:%.*]] = icmp uge <32 x i16> [[A0]], [[A1]]3986; CHECK-NEXT: [[TMP55:%.*]] = bitcast <32 x i1> [[TMP53]] to i323987; CHECK-NEXT: [[TMP56:%.*]] = bitcast <32 x i1> [[TMP54]] to i323988; CHECK-NEXT: [[_MSPROP5:%.*]] = or i32 [[_MSPROP4]], [[TMP55]]3989; CHECK-NEXT: [[RET5:%.*]] = add i32 [[RET4]], [[TMP56]]3990; CHECK-NEXT: [[TMP57:%.*]] = xor <32 x i16> [[TMP1]], splat (i16 -1)3991; CHECK-NEXT: [[TMP58:%.*]] = and <32 x i16> [[A0]], [[TMP57]]3992; CHECK-NEXT: [[TMP59:%.*]] = or <32 x i16> [[A0]], [[TMP1]]3993; CHECK-NEXT: [[TMP60:%.*]] = xor <32 x i16> [[TMP2]], splat (i16 -1)3994; CHECK-NEXT: [[TMP61:%.*]] = and <32 x i16> [[A1]], [[TMP60]]3995; CHECK-NEXT: [[TMP62:%.*]] = or <32 x i16> [[A1]], [[TMP2]]3996; CHECK-NEXT: [[TMP63:%.*]] = icmp ugt <32 x i16> [[TMP58]], [[TMP62]]3997; CHECK-NEXT: [[TMP64:%.*]] = icmp ugt <32 x i16> [[TMP59]], [[TMP61]]3998; CHECK-NEXT: [[TMP65:%.*]] = xor <32 x i1> [[TMP63]], [[TMP64]]3999; CHECK-NEXT: [[TMP66:%.*]] = icmp ugt <32 x i16> [[A0]], [[A1]]4000; CHECK-NEXT: [[TMP67:%.*]] = bitcast <32 x i1> [[TMP65]] to i324001; CHECK-NEXT: [[TMP68:%.*]] = bitcast <32 x i1> [[TMP66]] to i324002; CHECK-NEXT: [[_MSPROP6:%.*]] = or i32 [[_MSPROP5]], [[TMP67]]4003; CHECK-NEXT: [[RET6:%.*]] = add i32 [[RET5]], [[TMP68]]4004; CHECK-NEXT: [[_MSPROP7:%.*]] = or i32 [[_MSPROP6]], 04005; CHECK-NEXT: [[RET7:%.*]] = add i32 [[RET6]], -14006; CHECK-NEXT: store i32 [[_MSPROP7]], ptr @__msan_retval_tls, align 84007; CHECK-NEXT: ret i32 [[RET7]]4008;4009 %res0 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 0, i32 -1)4010 %res1 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 1, i32 -1)4011 %ret1 = add i32 %res0, %res14012 %res2 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 2, i32 -1)4013 %ret2 = add i32 %ret1, %res24014 %res3 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 3, i32 -1)4015 %ret3 = add i32 %ret2, %res34016 %res4 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 4, i32 -1)4017 %ret4 = add i32 %ret3, %res44018 %res5 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 5, i32 -1)4019 %ret5 = add i32 %ret4, %res54020 %res6 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 6, i32 -1)4021 %ret6 = add i32 %ret5, %res64022 %res7 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 7, i32 -1)4023 %ret7 = add i32 %ret6, %res74024 ret i32 %ret74025}4026 4027define i32 @test_mask_ucmp_w_512(<32 x i16> %a0, <32 x i16> %a1, i32 %mask) nounwind #0 {4028; CHECK-LABEL: @test_mask_ucmp_w_512(4029; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 84030; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84031; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84032; CHECK-NEXT: call void @llvm.donothing()4033; CHECK-NEXT: [[TMP4:%.*]] = xor <32 x i16> [[A0:%.*]], [[A1:%.*]]4034; CHECK-NEXT: [[TMP5:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]4035; CHECK-NEXT: [[TMP6:%.*]] = icmp ne <32 x i16> [[TMP5]], zeroinitializer4036; CHECK-NEXT: [[TMP7:%.*]] = xor <32 x i16> [[TMP5]], splat (i16 -1)4037; CHECK-NEXT: [[TMP8:%.*]] = and <32 x i16> [[TMP7]], [[TMP4]]4038; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <32 x i16> [[TMP8]], zeroinitializer4039; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <32 x i1> [[TMP6]], [[TMP9]]4040; CHECK-NEXT: [[TMP10:%.*]] = icmp eq <32 x i16> [[A0]], [[A1]]4041; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>4042; CHECK-NEXT: [[TMP12:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>4043; CHECK-NEXT: [[TMP13:%.*]] = and <32 x i1> [[_MSPROP_ICMP]], [[TMP11]]4044; CHECK-NEXT: [[TMP14:%.*]] = and <32 x i1> [[TMP10]], [[TMP11]]4045; CHECK-NEXT: [[TMP15:%.*]] = and <32 x i1> [[_MSPROP_ICMP]], [[TMP12]]4046; CHECK-NEXT: [[TMP16:%.*]] = or <32 x i1> [[TMP13]], [[TMP14]]4047; CHECK-NEXT: [[TMP17:%.*]] = or <32 x i1> [[TMP16]], [[TMP15]]4048; CHECK-NEXT: [[TMP18:%.*]] = and <32 x i1> [[TMP10]], [[TMP12]]4049; CHECK-NEXT: [[TMP19:%.*]] = bitcast <32 x i1> [[TMP17]] to i324050; CHECK-NEXT: [[TMP20:%.*]] = bitcast <32 x i1> [[TMP18]] to i324051; CHECK-NEXT: [[TMP21:%.*]] = xor <32 x i16> [[TMP1]], splat (i16 -1)4052; CHECK-NEXT: [[TMP22:%.*]] = and <32 x i16> [[A0]], [[TMP21]]4053; CHECK-NEXT: [[TMP23:%.*]] = or <32 x i16> [[A0]], [[TMP1]]4054; CHECK-NEXT: [[TMP24:%.*]] = xor <32 x i16> [[TMP2]], splat (i16 -1)4055; CHECK-NEXT: [[TMP25:%.*]] = and <32 x i16> [[A1]], [[TMP24]]4056; CHECK-NEXT: [[TMP26:%.*]] = or <32 x i16> [[A1]], [[TMP2]]4057; CHECK-NEXT: [[TMP27:%.*]] = icmp ult <32 x i16> [[TMP22]], [[TMP26]]4058; CHECK-NEXT: [[TMP28:%.*]] = icmp ult <32 x i16> [[TMP23]], [[TMP25]]4059; CHECK-NEXT: [[TMP29:%.*]] = xor <32 x i1> [[TMP27]], [[TMP28]]4060; CHECK-NEXT: [[TMP30:%.*]] = icmp ult <32 x i16> [[A0]], [[A1]]4061; CHECK-NEXT: [[TMP31:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>4062; CHECK-NEXT: [[TMP32:%.*]] = bitcast i32 [[MASK]] to <32 x i1>4063; CHECK-NEXT: [[TMP33:%.*]] = and <32 x i1> [[TMP29]], [[TMP31]]4064; CHECK-NEXT: [[TMP34:%.*]] = and <32 x i1> [[TMP30]], [[TMP31]]4065; CHECK-NEXT: [[TMP35:%.*]] = and <32 x i1> [[TMP29]], [[TMP32]]4066; CHECK-NEXT: [[TMP36:%.*]] = or <32 x i1> [[TMP33]], [[TMP34]]4067; CHECK-NEXT: [[TMP37:%.*]] = or <32 x i1> [[TMP36]], [[TMP35]]4068; CHECK-NEXT: [[TMP38:%.*]] = and <32 x i1> [[TMP30]], [[TMP32]]4069; CHECK-NEXT: [[TMP39:%.*]] = bitcast <32 x i1> [[TMP37]] to i324070; CHECK-NEXT: [[TMP40:%.*]] = bitcast <32 x i1> [[TMP38]] to i324071; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP19]], [[TMP39]]4072; CHECK-NEXT: [[RET1:%.*]] = add i32 [[TMP20]], [[TMP40]]4073; CHECK-NEXT: [[TMP41:%.*]] = xor <32 x i16> [[TMP1]], splat (i16 -1)4074; CHECK-NEXT: [[TMP42:%.*]] = and <32 x i16> [[A0]], [[TMP41]]4075; CHECK-NEXT: [[TMP43:%.*]] = or <32 x i16> [[A0]], [[TMP1]]4076; CHECK-NEXT: [[TMP44:%.*]] = xor <32 x i16> [[TMP2]], splat (i16 -1)4077; CHECK-NEXT: [[TMP45:%.*]] = and <32 x i16> [[A1]], [[TMP44]]4078; CHECK-NEXT: [[TMP46:%.*]] = or <32 x i16> [[A1]], [[TMP2]]4079; CHECK-NEXT: [[TMP47:%.*]] = icmp ule <32 x i16> [[TMP42]], [[TMP46]]4080; CHECK-NEXT: [[TMP48:%.*]] = icmp ule <32 x i16> [[TMP43]], [[TMP45]]4081; CHECK-NEXT: [[TMP49:%.*]] = xor <32 x i1> [[TMP47]], [[TMP48]]4082; CHECK-NEXT: [[TMP50:%.*]] = icmp ule <32 x i16> [[A0]], [[A1]]4083; CHECK-NEXT: [[TMP51:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>4084; CHECK-NEXT: [[TMP52:%.*]] = bitcast i32 [[MASK]] to <32 x i1>4085; CHECK-NEXT: [[TMP53:%.*]] = and <32 x i1> [[TMP49]], [[TMP51]]4086; CHECK-NEXT: [[TMP54:%.*]] = and <32 x i1> [[TMP50]], [[TMP51]]4087; CHECK-NEXT: [[TMP55:%.*]] = and <32 x i1> [[TMP49]], [[TMP52]]4088; CHECK-NEXT: [[TMP56:%.*]] = or <32 x i1> [[TMP53]], [[TMP54]]4089; CHECK-NEXT: [[TMP57:%.*]] = or <32 x i1> [[TMP56]], [[TMP55]]4090; CHECK-NEXT: [[TMP58:%.*]] = and <32 x i1> [[TMP50]], [[TMP52]]4091; CHECK-NEXT: [[TMP59:%.*]] = bitcast <32 x i1> [[TMP57]] to i324092; CHECK-NEXT: [[TMP60:%.*]] = bitcast <32 x i1> [[TMP58]] to i324093; CHECK-NEXT: [[_MSPROP1:%.*]] = or i32 [[_MSPROP]], [[TMP59]]4094; CHECK-NEXT: [[RET2:%.*]] = add i32 [[RET1]], [[TMP60]]4095; CHECK-NEXT: [[TMP61:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>4096; CHECK-NEXT: [[TMP62:%.*]] = bitcast i32 [[MASK]] to <32 x i1>4097; CHECK-NEXT: [[TMP63:%.*]] = and <32 x i1> zeroinitializer, [[TMP61]]4098; CHECK-NEXT: [[TMP64:%.*]] = and <32 x i1> zeroinitializer, [[TMP61]]4099; CHECK-NEXT: [[TMP65:%.*]] = and <32 x i1> zeroinitializer, [[TMP62]]4100; CHECK-NEXT: [[TMP66:%.*]] = or <32 x i1> [[TMP63]], [[TMP64]]4101; CHECK-NEXT: [[TMP67:%.*]] = or <32 x i1> [[TMP66]], [[TMP65]]4102; CHECK-NEXT: [[TMP68:%.*]] = and <32 x i1> zeroinitializer, [[TMP62]]4103; CHECK-NEXT: [[TMP69:%.*]] = bitcast <32 x i1> [[TMP67]] to i324104; CHECK-NEXT: [[TMP70:%.*]] = bitcast <32 x i1> [[TMP68]] to i324105; CHECK-NEXT: [[_MSPROP2:%.*]] = or i32 [[_MSPROP1]], [[TMP69]]4106; CHECK-NEXT: [[RET3:%.*]] = add i32 [[RET2]], [[TMP70]]4107; CHECK-NEXT: [[TMP71:%.*]] = xor <32 x i16> [[A0]], [[A1]]4108; CHECK-NEXT: [[TMP72:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]4109; CHECK-NEXT: [[TMP73:%.*]] = icmp ne <32 x i16> [[TMP72]], zeroinitializer4110; CHECK-NEXT: [[TMP74:%.*]] = xor <32 x i16> [[TMP72]], splat (i16 -1)4111; CHECK-NEXT: [[TMP75:%.*]] = and <32 x i16> [[TMP74]], [[TMP71]]4112; CHECK-NEXT: [[TMP76:%.*]] = icmp eq <32 x i16> [[TMP75]], zeroinitializer4113; CHECK-NEXT: [[_MSPROP_ICMP3:%.*]] = and <32 x i1> [[TMP73]], [[TMP76]]4114; CHECK-NEXT: [[TMP77:%.*]] = icmp ne <32 x i16> [[A0]], [[A1]]4115; CHECK-NEXT: [[TMP78:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>4116; CHECK-NEXT: [[TMP79:%.*]] = bitcast i32 [[MASK]] to <32 x i1>4117; CHECK-NEXT: [[TMP80:%.*]] = and <32 x i1> [[_MSPROP_ICMP3]], [[TMP78]]4118; CHECK-NEXT: [[TMP81:%.*]] = and <32 x i1> [[TMP77]], [[TMP78]]4119; CHECK-NEXT: [[TMP82:%.*]] = and <32 x i1> [[_MSPROP_ICMP3]], [[TMP79]]4120; CHECK-NEXT: [[TMP83:%.*]] = or <32 x i1> [[TMP80]], [[TMP81]]4121; CHECK-NEXT: [[TMP84:%.*]] = or <32 x i1> [[TMP83]], [[TMP82]]4122; CHECK-NEXT: [[TMP85:%.*]] = and <32 x i1> [[TMP77]], [[TMP79]]4123; CHECK-NEXT: [[TMP86:%.*]] = bitcast <32 x i1> [[TMP84]] to i324124; CHECK-NEXT: [[TMP87:%.*]] = bitcast <32 x i1> [[TMP85]] to i324125; CHECK-NEXT: [[_MSPROP4:%.*]] = or i32 [[_MSPROP2]], [[TMP86]]4126; CHECK-NEXT: [[RET4:%.*]] = add i32 [[RET3]], [[TMP87]]4127; CHECK-NEXT: [[TMP88:%.*]] = xor <32 x i16> [[TMP1]], splat (i16 -1)4128; CHECK-NEXT: [[TMP89:%.*]] = and <32 x i16> [[A0]], [[TMP88]]4129; CHECK-NEXT: [[TMP90:%.*]] = or <32 x i16> [[A0]], [[TMP1]]4130; CHECK-NEXT: [[TMP91:%.*]] = xor <32 x i16> [[TMP2]], splat (i16 -1)4131; CHECK-NEXT: [[TMP92:%.*]] = and <32 x i16> [[A1]], [[TMP91]]4132; CHECK-NEXT: [[TMP93:%.*]] = or <32 x i16> [[A1]], [[TMP2]]4133; CHECK-NEXT: [[TMP94:%.*]] = icmp uge <32 x i16> [[TMP89]], [[TMP93]]4134; CHECK-NEXT: [[TMP95:%.*]] = icmp uge <32 x i16> [[TMP90]], [[TMP92]]4135; CHECK-NEXT: [[TMP96:%.*]] = xor <32 x i1> [[TMP94]], [[TMP95]]4136; CHECK-NEXT: [[TMP97:%.*]] = icmp uge <32 x i16> [[A0]], [[A1]]4137; CHECK-NEXT: [[TMP98:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>4138; CHECK-NEXT: [[TMP99:%.*]] = bitcast i32 [[MASK]] to <32 x i1>4139; CHECK-NEXT: [[TMP100:%.*]] = and <32 x i1> [[TMP96]], [[TMP98]]4140; CHECK-NEXT: [[TMP101:%.*]] = and <32 x i1> [[TMP97]], [[TMP98]]4141; CHECK-NEXT: [[TMP102:%.*]] = and <32 x i1> [[TMP96]], [[TMP99]]4142; CHECK-NEXT: [[TMP103:%.*]] = or <32 x i1> [[TMP100]], [[TMP101]]4143; CHECK-NEXT: [[TMP104:%.*]] = or <32 x i1> [[TMP103]], [[TMP102]]4144; CHECK-NEXT: [[TMP105:%.*]] = and <32 x i1> [[TMP97]], [[TMP99]]4145; CHECK-NEXT: [[TMP106:%.*]] = bitcast <32 x i1> [[TMP104]] to i324146; CHECK-NEXT: [[TMP107:%.*]] = bitcast <32 x i1> [[TMP105]] to i324147; CHECK-NEXT: [[_MSPROP5:%.*]] = or i32 [[_MSPROP4]], [[TMP106]]4148; CHECK-NEXT: [[RET5:%.*]] = add i32 [[RET4]], [[TMP107]]4149; CHECK-NEXT: [[TMP108:%.*]] = xor <32 x i16> [[TMP1]], splat (i16 -1)4150; CHECK-NEXT: [[TMP109:%.*]] = and <32 x i16> [[A0]], [[TMP108]]4151; CHECK-NEXT: [[TMP110:%.*]] = or <32 x i16> [[A0]], [[TMP1]]4152; CHECK-NEXT: [[TMP111:%.*]] = xor <32 x i16> [[TMP2]], splat (i16 -1)4153; CHECK-NEXT: [[TMP112:%.*]] = and <32 x i16> [[A1]], [[TMP111]]4154; CHECK-NEXT: [[TMP113:%.*]] = or <32 x i16> [[A1]], [[TMP2]]4155; CHECK-NEXT: [[TMP114:%.*]] = icmp ugt <32 x i16> [[TMP109]], [[TMP113]]4156; CHECK-NEXT: [[TMP115:%.*]] = icmp ugt <32 x i16> [[TMP110]], [[TMP112]]4157; CHECK-NEXT: [[TMP116:%.*]] = xor <32 x i1> [[TMP114]], [[TMP115]]4158; CHECK-NEXT: [[TMP117:%.*]] = icmp ugt <32 x i16> [[A0]], [[A1]]4159; CHECK-NEXT: [[TMP118:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>4160; CHECK-NEXT: [[TMP119:%.*]] = bitcast i32 [[MASK]] to <32 x i1>4161; CHECK-NEXT: [[TMP120:%.*]] = and <32 x i1> [[TMP116]], [[TMP118]]4162; CHECK-NEXT: [[TMP121:%.*]] = and <32 x i1> [[TMP117]], [[TMP118]]4163; CHECK-NEXT: [[TMP122:%.*]] = and <32 x i1> [[TMP116]], [[TMP119]]4164; CHECK-NEXT: [[TMP123:%.*]] = or <32 x i1> [[TMP120]], [[TMP121]]4165; CHECK-NEXT: [[TMP124:%.*]] = or <32 x i1> [[TMP123]], [[TMP122]]4166; CHECK-NEXT: [[TMP125:%.*]] = and <32 x i1> [[TMP117]], [[TMP119]]4167; CHECK-NEXT: [[TMP126:%.*]] = bitcast <32 x i1> [[TMP124]] to i324168; CHECK-NEXT: [[TMP127:%.*]] = bitcast <32 x i1> [[TMP125]] to i324169; CHECK-NEXT: [[_MSPROP6:%.*]] = or i32 [[_MSPROP5]], [[TMP126]]4170; CHECK-NEXT: [[RET6:%.*]] = add i32 [[RET5]], [[TMP127]]4171; CHECK-NEXT: [[TMP128:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>4172; CHECK-NEXT: [[TMP129:%.*]] = bitcast i32 [[MASK]] to <32 x i1>4173; CHECK-NEXT: [[TMP130:%.*]] = and <32 x i1> zeroinitializer, [[TMP128]]4174; CHECK-NEXT: [[TMP131:%.*]] = and <32 x i1> splat (i1 true), [[TMP128]]4175; CHECK-NEXT: [[TMP132:%.*]] = and <32 x i1> zeroinitializer, [[TMP129]]4176; CHECK-NEXT: [[TMP133:%.*]] = or <32 x i1> [[TMP130]], [[TMP131]]4177; CHECK-NEXT: [[TMP134:%.*]] = or <32 x i1> [[TMP133]], [[TMP132]]4178; CHECK-NEXT: [[TMP135:%.*]] = and <32 x i1> splat (i1 true), [[TMP129]]4179; CHECK-NEXT: [[TMP136:%.*]] = bitcast <32 x i1> [[TMP134]] to i324180; CHECK-NEXT: [[TMP137:%.*]] = bitcast <32 x i1> [[TMP135]] to i324181; CHECK-NEXT: [[_MSPROP7:%.*]] = or i32 [[_MSPROP6]], [[TMP136]]4182; CHECK-NEXT: [[RET7:%.*]] = add i32 [[RET6]], [[TMP137]]4183; CHECK-NEXT: store i32 [[_MSPROP7]], ptr @__msan_retval_tls, align 84184; CHECK-NEXT: ret i32 [[RET7]]4185;4186 %res0 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 0, i32 %mask)4187 %res1 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 1, i32 %mask)4188 %ret1 = add i32 %res0, %res14189 %res2 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 2, i32 %mask)4190 %ret2 = add i32 %ret1, %res24191 %res3 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 3, i32 %mask)4192 %ret3 = add i32 %ret2, %res34193 %res4 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 4, i32 %mask)4194 %ret4 = add i32 %ret3, %res44195 %res5 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 5, i32 %mask)4196 %ret5 = add i32 %ret4, %res54197 %res6 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 6, i32 %mask)4198 %ret6 = add i32 %ret5, %res64199 %res7 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 7, i32 %mask)4200 %ret7 = add i32 %ret6, %res74201 ret i32 %ret74202}4203 4204declare i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16>, <32 x i16>, i32, i32) nounwind readnone4205 4206 4207declare <64 x i8> @llvm.x86.avx512.mask.pavg.b.512(<64 x i8>, <64 x i8>, <64 x i8>, i64)4208 4209define <64 x i8> @mm512_avg_epu8(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3) nounwind #0 {4210; CHECK-LABEL: @mm512_avg_epu8(4211; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 84212; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84213; CHECK-NEXT: call void @llvm.donothing()4214; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]4215; CHECK-NEXT: [[TMP3:%.*]] = call <64 x i8> @llvm.x86.avx512.pavg.b.512(<64 x i8> [[X0:%.*]], <64 x i8> [[X1:%.*]])4216; CHECK-NEXT: store <64 x i8> [[_MSPROP]], ptr @__msan_retval_tls, align 84217; CHECK-NEXT: ret <64 x i8> [[TMP3]]4218;4219 %res = call <64 x i8> @llvm.x86.avx512.mask.pavg.b.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 -1)4220 ret <64 x i8> %res4221}4222 4223define <64 x i8> @mm512_mask_avg_epu8(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3) nounwind #0 {4224; CHECK-LABEL: @mm512_mask_avg_epu8(4225; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 84226; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84227; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 84228; CHECK-NEXT: [[TMP4:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84229; CHECK-NEXT: call void @llvm.donothing()4230; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]4231; CHECK-NEXT: [[TMP5:%.*]] = call <64 x i8> @llvm.x86.avx512.pavg.b.512(<64 x i8> [[X0:%.*]], <64 x i8> [[X1:%.*]])4232; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>4233; CHECK-NEXT: [[TMP7:%.*]] = bitcast i64 [[X3:%.*]] to <64 x i1>4234; CHECK-NEXT: [[TMP8:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[_MSPROP]], <64 x i8> [[TMP4]]4235; CHECK-NEXT: [[TMP9:%.*]] = xor <64 x i8> [[TMP5]], [[X2:%.*]]4236; CHECK-NEXT: [[TMP10:%.*]] = or <64 x i8> [[TMP9]], [[_MSPROP]]4237; CHECK-NEXT: [[TMP11:%.*]] = or <64 x i8> [[TMP10]], [[TMP4]]4238; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[TMP11]], <64 x i8> [[TMP8]]4239; CHECK-NEXT: [[TMP12:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[TMP5]], <64 x i8> [[X2]]4240; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84241; CHECK-NEXT: ret <64 x i8> [[TMP12]]4242;4243 %res = call <64 x i8> @llvm.x86.avx512.mask.pavg.b.512(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %x2, i64 %x3)4244 ret <64 x i8> %res4245}4246 4247declare <32 x i16> @llvm.x86.avx512.mask.pavg.w.512(<32 x i16>, <32 x i16>, <32 x i16>, i32)4248 4249define <32 x i16> @mm512_avg_epu16(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {4250; CHECK-LABEL: @mm512_avg_epu16(4251; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 84252; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84253; CHECK-NEXT: call void @llvm.donothing()4254; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]4255; CHECK-NEXT: [[TMP3:%.*]] = call <32 x i16> @llvm.x86.avx512.pavg.w.512(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])4256; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 84257; CHECK-NEXT: ret <32 x i16> [[TMP3]]4258;4259 %res = call <32 x i16> @llvm.x86.avx512.mask.pavg.w.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 -1)4260 ret <32 x i16> %res4261}4262 4263define <32 x i16> @mm512_mask_avg_epu16(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {4264; CHECK-LABEL: @mm512_mask_avg_epu16(4265; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 84266; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84267; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 84268; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84269; CHECK-NEXT: call void @llvm.donothing()4270; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]4271; CHECK-NEXT: [[TMP5:%.*]] = call <32 x i16> @llvm.x86.avx512.pavg.w.512(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])4272; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>4273; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>4274; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]4275; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i16> [[TMP5]], [[X2:%.*]]4276; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[_MSPROP]]4277; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP4]]4278; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP11]], <32 x i16> [[TMP8]]4279; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP5]], <32 x i16> [[X2]]4280; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84281; CHECK-NEXT: ret <32 x i16> [[TMP12]]4282;4283 %res = call <32 x i16> @llvm.x86.avx512.mask.pavg.w.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3)4284 ret <32 x i16> %res4285}4286 4287declare <32 x i16> @llvm.x86.avx512.mask.pabs.w.512(<32 x i16>, <32 x i16>, i32)4288 4289define <32 x i16> @test_int_x86_avx512_pabs_w_512(<32 x i16> %x0, <32 x i16> %x1) nounwind #0 {4290; CHECK-LABEL: @test_int_x86_avx512_pabs_w_512(4291; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 84292; CHECK-NEXT: call void @llvm.donothing()4293; CHECK-NEXT: [[TMP5:%.*]] = icmp eq <32 x i16> [[X0:%.*]], splat (i16 -32768)4294; CHECK-NEXT: [[TMP3:%.*]] = select <32 x i1> [[TMP5]], <32 x i16> splat (i16 -1), <32 x i16> [[TMP1]]4295; CHECK-NEXT: [[TMP4:%.*]] = select i1 false, <32 x i16> [[TMP3]], <32 x i16> [[TMP1]]4296; CHECK-NEXT: [[TMP2:%.*]] = call <32 x i16> @llvm.abs.v32i16(<32 x i16> [[X0]], i1 false)4297; CHECK-NEXT: store <32 x i16> [[TMP4]], ptr @__msan_retval_tls, align 84298; CHECK-NEXT: ret <32 x i16> [[TMP2]]4299;4300 %res = call <32 x i16> @llvm.x86.avx512.mask.pabs.w.512(<32 x i16> %x0, <32 x i16> %x1, i32 -1)4301 ret <32 x i16> %res4302}4303 4304define <32 x i16> @test_int_x86_avx512_mask_pabs_w_512(<32 x i16> %x0, <32 x i16> %x1, i32 %x2) nounwind #0 {4305; CHECK-LABEL: @test_int_x86_avx512_mask_pabs_w_512(4306; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 84307; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84308; CHECK-NEXT: [[TMP3:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84309; CHECK-NEXT: call void @llvm.donothing()4310; CHECK-NEXT: [[TMP12:%.*]] = icmp eq <32 x i16> [[X0:%.*]], splat (i16 -32768)4311; CHECK-NEXT: [[TMP13:%.*]] = select <32 x i1> [[TMP12]], <32 x i16> splat (i16 -1), <32 x i16> [[TMP1]]4312; CHECK-NEXT: [[TMP14:%.*]] = select i1 false, <32 x i16> [[TMP13]], <32 x i16> [[TMP1]]4313; CHECK-NEXT: [[TMP4:%.*]] = call <32 x i16> @llvm.abs.v32i16(<32 x i16> [[X0]], i1 false)4314; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[TMP2]] to <32 x i1>4315; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[X2:%.*]] to <32 x i1>4316; CHECK-NEXT: [[TMP7:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP14]], <32 x i16> [[TMP3]]4317; CHECK-NEXT: [[TMP8:%.*]] = xor <32 x i16> [[TMP4]], [[X1:%.*]]4318; CHECK-NEXT: [[TMP9:%.*]] = or <32 x i16> [[TMP8]], [[TMP14]]4319; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[TMP3]]4320; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP5]], <32 x i16> [[TMP10]], <32 x i16> [[TMP7]]4321; CHECK-NEXT: [[TMP11:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP4]], <32 x i16> [[X1]]4322; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84323; CHECK-NEXT: ret <32 x i16> [[TMP11]]4324;4325 %res = call <32 x i16> @llvm.x86.avx512.mask.pabs.w.512(<32 x i16> %x0, <32 x i16> %x1, i32 %x2)4326 ret <32 x i16> %res4327}4328 4329declare <64 x i8> @llvm.x86.avx512.mask.pabs.b.512(<64 x i8>, <64 x i8>, i64)4330 4331define <64 x i8> @test_int_x86_avx512_pabs_b_512(<64 x i8> %x0, <64 x i8> %x1) nounwind #0 {4332; CHECK-LABEL: @test_int_x86_avx512_pabs_b_512(4333; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 84334; CHECK-NEXT: call void @llvm.donothing()4335; CHECK-NEXT: [[TMP5:%.*]] = icmp eq <64 x i8> [[X0:%.*]], splat (i8 -128)4336; CHECK-NEXT: [[TMP3:%.*]] = select <64 x i1> [[TMP5]], <64 x i8> splat (i8 -1), <64 x i8> [[TMP1]]4337; CHECK-NEXT: [[TMP4:%.*]] = select i1 false, <64 x i8> [[TMP3]], <64 x i8> [[TMP1]]4338; CHECK-NEXT: [[TMP2:%.*]] = call <64 x i8> @llvm.abs.v64i8(<64 x i8> [[X0]], i1 false)4339; CHECK-NEXT: store <64 x i8> [[TMP4]], ptr @__msan_retval_tls, align 84340; CHECK-NEXT: ret <64 x i8> [[TMP2]]4341;4342 %res = call <64 x i8> @llvm.x86.avx512.mask.pabs.b.512(<64 x i8> %x0, <64 x i8> %x1, i64 -1)4343 ret <64 x i8> %res4344}4345 4346define <64 x i8> @test_int_x86_avx512_mask_pabs_b_512(<64 x i8> %x0, <64 x i8> %x1, i64 %x2) nounwind #0 {4347; CHECK-LABEL: @test_int_x86_avx512_mask_pabs_b_512(4348; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 84349; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84350; CHECK-NEXT: [[TMP3:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84351; CHECK-NEXT: call void @llvm.donothing()4352; CHECK-NEXT: [[TMP12:%.*]] = icmp eq <64 x i8> [[X0:%.*]], splat (i8 -128)4353; CHECK-NEXT: [[TMP13:%.*]] = select <64 x i1> [[TMP12]], <64 x i8> splat (i8 -1), <64 x i8> [[TMP1]]4354; CHECK-NEXT: [[TMP14:%.*]] = select i1 false, <64 x i8> [[TMP13]], <64 x i8> [[TMP1]]4355; CHECK-NEXT: [[TMP4:%.*]] = call <64 x i8> @llvm.abs.v64i8(<64 x i8> [[X0]], i1 false)4356; CHECK-NEXT: [[TMP5:%.*]] = bitcast i64 [[TMP2]] to <64 x i1>4357; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[X2:%.*]] to <64 x i1>4358; CHECK-NEXT: [[TMP7:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[TMP14]], <64 x i8> [[TMP3]]4359; CHECK-NEXT: [[TMP8:%.*]] = xor <64 x i8> [[TMP4]], [[X1:%.*]]4360; CHECK-NEXT: [[TMP9:%.*]] = or <64 x i8> [[TMP8]], [[TMP14]]4361; CHECK-NEXT: [[TMP10:%.*]] = or <64 x i8> [[TMP9]], [[TMP3]]4362; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP5]], <64 x i8> [[TMP10]], <64 x i8> [[TMP7]]4363; CHECK-NEXT: [[TMP11:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[TMP4]], <64 x i8> [[X1]]4364; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84365; CHECK-NEXT: ret <64 x i8> [[TMP11]]4366;4367 %res = call <64 x i8> @llvm.x86.avx512.mask.pabs.b.512(<64 x i8> %x0, <64 x i8> %x1, i64 %x2)4368 ret <64 x i8> %res4369}4370 4371declare i64 @llvm.x86.avx512.ptestm.b.512(<64 x i8>, <64 x i8>, i64)4372 4373define i64 @test_int_x86_avx512_ptestm_b_512(<64 x i8> %x0, <64 x i8> %x1, i64 %x2) nounwind #0 {4374; CHECK-LABEL: @test_int_x86_avx512_ptestm_b_512(4375; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 84376; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84377; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84378; CHECK-NEXT: call void @llvm.donothing()4379; CHECK-NEXT: [[TMP4:%.*]] = and <64 x i8> [[TMP1]], [[TMP2]]4380; CHECK-NEXT: [[TMP5:%.*]] = and <64 x i8> [[X0:%.*]], [[TMP2]]4381; CHECK-NEXT: [[TMP6:%.*]] = and <64 x i8> [[TMP1]], [[X1:%.*]]4382; CHECK-NEXT: [[TMP7:%.*]] = or <64 x i8> [[TMP4]], [[TMP5]]4383; CHECK-NEXT: [[TMP8:%.*]] = or <64 x i8> [[TMP7]], [[TMP6]]4384; CHECK-NEXT: [[TMP9:%.*]] = and <64 x i8> [[X0]], [[X1]]4385; CHECK-NEXT: [[TMP10:%.*]] = xor <64 x i8> [[TMP9]], zeroinitializer4386; CHECK-NEXT: [[TMP11:%.*]] = or <64 x i8> [[TMP8]], zeroinitializer4387; CHECK-NEXT: [[TMP12:%.*]] = icmp ne <64 x i8> [[TMP11]], zeroinitializer4388; CHECK-NEXT: [[TMP13:%.*]] = xor <64 x i8> [[TMP11]], splat (i8 -1)4389; CHECK-NEXT: [[TMP14:%.*]] = and <64 x i8> [[TMP13]], [[TMP10]]4390; CHECK-NEXT: [[TMP15:%.*]] = icmp eq <64 x i8> [[TMP14]], zeroinitializer4391; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <64 x i1> [[TMP12]], [[TMP15]]4392; CHECK-NEXT: [[TMP16:%.*]] = icmp ne <64 x i8> [[TMP9]], zeroinitializer4393; CHECK-NEXT: [[TMP17:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>4394; CHECK-NEXT: [[TMP18:%.*]] = bitcast i64 [[X2:%.*]] to <64 x i1>4395; CHECK-NEXT: [[TMP19:%.*]] = and <64 x i1> [[_MSPROP_ICMP]], [[TMP17]]4396; CHECK-NEXT: [[TMP20:%.*]] = and <64 x i1> [[TMP16]], [[TMP17]]4397; CHECK-NEXT: [[TMP21:%.*]] = and <64 x i1> [[_MSPROP_ICMP]], [[TMP18]]4398; CHECK-NEXT: [[TMP22:%.*]] = or <64 x i1> [[TMP19]], [[TMP20]]4399; CHECK-NEXT: [[TMP23:%.*]] = or <64 x i1> [[TMP22]], [[TMP21]]4400; CHECK-NEXT: [[TMP24:%.*]] = and <64 x i1> [[TMP16]], [[TMP18]]4401; CHECK-NEXT: [[TMP25:%.*]] = bitcast <64 x i1> [[TMP23]] to i644402; CHECK-NEXT: [[TMP26:%.*]] = bitcast <64 x i1> [[TMP24]] to i644403; CHECK-NEXT: [[TMP27:%.*]] = and <64 x i8> [[TMP1]], [[TMP2]]4404; CHECK-NEXT: [[TMP28:%.*]] = and <64 x i8> [[X0]], [[TMP2]]4405; CHECK-NEXT: [[TMP29:%.*]] = and <64 x i8> [[TMP1]], [[X1]]4406; CHECK-NEXT: [[TMP30:%.*]] = or <64 x i8> [[TMP27]], [[TMP28]]4407; CHECK-NEXT: [[TMP31:%.*]] = or <64 x i8> [[TMP30]], [[TMP29]]4408; CHECK-NEXT: [[TMP32:%.*]] = and <64 x i8> [[X0]], [[X1]]4409; CHECK-NEXT: [[TMP33:%.*]] = xor <64 x i8> [[TMP32]], zeroinitializer4410; CHECK-NEXT: [[TMP34:%.*]] = or <64 x i8> [[TMP31]], zeroinitializer4411; CHECK-NEXT: [[TMP35:%.*]] = icmp ne <64 x i8> [[TMP34]], zeroinitializer4412; CHECK-NEXT: [[TMP36:%.*]] = xor <64 x i8> [[TMP34]], splat (i8 -1)4413; CHECK-NEXT: [[TMP37:%.*]] = and <64 x i8> [[TMP36]], [[TMP33]]4414; CHECK-NEXT: [[TMP38:%.*]] = icmp eq <64 x i8> [[TMP37]], zeroinitializer4415; CHECK-NEXT: [[_MSPROP_ICMP1:%.*]] = and <64 x i1> [[TMP35]], [[TMP38]]4416; CHECK-NEXT: [[TMP39:%.*]] = icmp ne <64 x i8> [[TMP32]], zeroinitializer4417; CHECK-NEXT: [[TMP40:%.*]] = bitcast <64 x i1> [[_MSPROP_ICMP1]] to i644418; CHECK-NEXT: [[TMP41:%.*]] = bitcast <64 x i1> [[TMP39]] to i644419; CHECK-NEXT: [[_MSPROP:%.*]] = or i64 [[TMP25]], [[TMP40]]4420; CHECK-NEXT: [[RES2:%.*]] = add i64 [[TMP26]], [[TMP41]]4421; CHECK-NEXT: store i64 [[_MSPROP]], ptr @__msan_retval_tls, align 84422; CHECK-NEXT: ret i64 [[RES2]]4423;4424 %res = call i64 @llvm.x86.avx512.ptestm.b.512(<64 x i8> %x0, <64 x i8> %x1, i64 %x2)4425 %res1 = call i64 @llvm.x86.avx512.ptestm.b.512(<64 x i8> %x0, <64 x i8> %x1, i64-1)4426 %res2 = add i64 %res, %res14427 ret i64 %res24428}4429 4430declare i32 @llvm.x86.avx512.ptestm.w.512(<32 x i16>, <32 x i16>, i32)4431 4432define i32 @test_int_x86_avx512_ptestm_w_512(<32 x i16> %x0, <32 x i16> %x1, i32 %x2) nounwind #0 {4433; CHECK-LABEL: @test_int_x86_avx512_ptestm_w_512(4434; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 84435; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84436; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84437; CHECK-NEXT: call void @llvm.donothing()4438; CHECK-NEXT: [[TMP4:%.*]] = and <32 x i16> [[TMP1]], [[TMP2]]4439; CHECK-NEXT: [[TMP5:%.*]] = and <32 x i16> [[X0:%.*]], [[TMP2]]4440; CHECK-NEXT: [[TMP6:%.*]] = and <32 x i16> [[TMP1]], [[X1:%.*]]4441; CHECK-NEXT: [[TMP7:%.*]] = or <32 x i16> [[TMP4]], [[TMP5]]4442; CHECK-NEXT: [[TMP8:%.*]] = or <32 x i16> [[TMP7]], [[TMP6]]4443; CHECK-NEXT: [[TMP9:%.*]] = and <32 x i16> [[X0]], [[X1]]4444; CHECK-NEXT: [[TMP10:%.*]] = xor <32 x i16> [[TMP9]], zeroinitializer4445; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP8]], zeroinitializer4446; CHECK-NEXT: [[TMP12:%.*]] = icmp ne <32 x i16> [[TMP11]], zeroinitializer4447; CHECK-NEXT: [[TMP13:%.*]] = xor <32 x i16> [[TMP11]], splat (i16 -1)4448; CHECK-NEXT: [[TMP14:%.*]] = and <32 x i16> [[TMP13]], [[TMP10]]4449; CHECK-NEXT: [[TMP15:%.*]] = icmp eq <32 x i16> [[TMP14]], zeroinitializer4450; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <32 x i1> [[TMP12]], [[TMP15]]4451; CHECK-NEXT: [[TMP16:%.*]] = icmp ne <32 x i16> [[TMP9]], zeroinitializer4452; CHECK-NEXT: [[TMP17:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>4453; CHECK-NEXT: [[TMP18:%.*]] = bitcast i32 [[X2:%.*]] to <32 x i1>4454; CHECK-NEXT: [[TMP19:%.*]] = and <32 x i1> [[_MSPROP_ICMP]], [[TMP17]]4455; CHECK-NEXT: [[TMP20:%.*]] = and <32 x i1> [[TMP16]], [[TMP17]]4456; CHECK-NEXT: [[TMP21:%.*]] = and <32 x i1> [[_MSPROP_ICMP]], [[TMP18]]4457; CHECK-NEXT: [[TMP22:%.*]] = or <32 x i1> [[TMP19]], [[TMP20]]4458; CHECK-NEXT: [[TMP23:%.*]] = or <32 x i1> [[TMP22]], [[TMP21]]4459; CHECK-NEXT: [[TMP24:%.*]] = and <32 x i1> [[TMP16]], [[TMP18]]4460; CHECK-NEXT: [[TMP25:%.*]] = bitcast <32 x i1> [[TMP23]] to i324461; CHECK-NEXT: [[TMP26:%.*]] = bitcast <32 x i1> [[TMP24]] to i324462; CHECK-NEXT: [[TMP27:%.*]] = and <32 x i16> [[TMP1]], [[TMP2]]4463; CHECK-NEXT: [[TMP28:%.*]] = and <32 x i16> [[X0]], [[TMP2]]4464; CHECK-NEXT: [[TMP29:%.*]] = and <32 x i16> [[TMP1]], [[X1]]4465; CHECK-NEXT: [[TMP30:%.*]] = or <32 x i16> [[TMP27]], [[TMP28]]4466; CHECK-NEXT: [[TMP31:%.*]] = or <32 x i16> [[TMP30]], [[TMP29]]4467; CHECK-NEXT: [[TMP32:%.*]] = and <32 x i16> [[X0]], [[X1]]4468; CHECK-NEXT: [[TMP33:%.*]] = xor <32 x i16> [[TMP32]], zeroinitializer4469; CHECK-NEXT: [[TMP34:%.*]] = or <32 x i16> [[TMP31]], zeroinitializer4470; CHECK-NEXT: [[TMP35:%.*]] = icmp ne <32 x i16> [[TMP34]], zeroinitializer4471; CHECK-NEXT: [[TMP36:%.*]] = xor <32 x i16> [[TMP34]], splat (i16 -1)4472; CHECK-NEXT: [[TMP37:%.*]] = and <32 x i16> [[TMP36]], [[TMP33]]4473; CHECK-NEXT: [[TMP38:%.*]] = icmp eq <32 x i16> [[TMP37]], zeroinitializer4474; CHECK-NEXT: [[_MSPROP_ICMP1:%.*]] = and <32 x i1> [[TMP35]], [[TMP38]]4475; CHECK-NEXT: [[TMP39:%.*]] = icmp ne <32 x i16> [[TMP32]], zeroinitializer4476; CHECK-NEXT: [[TMP40:%.*]] = bitcast <32 x i1> [[_MSPROP_ICMP1]] to i324477; CHECK-NEXT: [[TMP41:%.*]] = bitcast <32 x i1> [[TMP39]] to i324478; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP25]], [[TMP40]]4479; CHECK-NEXT: [[RES2:%.*]] = add i32 [[TMP26]], [[TMP41]]4480; CHECK-NEXT: store i32 [[_MSPROP]], ptr @__msan_retval_tls, align 84481; CHECK-NEXT: ret i32 [[RES2]]4482;4483 %res = call i32 @llvm.x86.avx512.ptestm.w.512(<32 x i16> %x0, <32 x i16> %x1, i32 %x2)4484 %res1 = call i32 @llvm.x86.avx512.ptestm.w.512(<32 x i16> %x0, <32 x i16> %x1, i32-1)4485 %res2 = add i32 %res, %res14486 ret i32 %res24487}4488 4489declare i64 @llvm.x86.avx512.ptestnm.b.512(<64 x i8>, <64 x i8>, i64 %x2)4490 4491define i64 @test_int_x86_avx512_ptestnm_b_512(<64 x i8> %x0, <64 x i8> %x1, i64 %x2) nounwind #0 {4492; CHECK-LABEL: @test_int_x86_avx512_ptestnm_b_512(4493; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 84494; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84495; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84496; CHECK-NEXT: call void @llvm.donothing()4497; CHECK-NEXT: [[TMP4:%.*]] = and <64 x i8> [[TMP1]], [[TMP2]]4498; CHECK-NEXT: [[TMP5:%.*]] = and <64 x i8> [[X0:%.*]], [[TMP2]]4499; CHECK-NEXT: [[TMP6:%.*]] = and <64 x i8> [[TMP1]], [[X1:%.*]]4500; CHECK-NEXT: [[TMP7:%.*]] = or <64 x i8> [[TMP4]], [[TMP5]]4501; CHECK-NEXT: [[TMP8:%.*]] = or <64 x i8> [[TMP7]], [[TMP6]]4502; CHECK-NEXT: [[TMP9:%.*]] = and <64 x i8> [[X0]], [[X1]]4503; CHECK-NEXT: [[TMP10:%.*]] = xor <64 x i8> [[TMP9]], zeroinitializer4504; CHECK-NEXT: [[TMP11:%.*]] = or <64 x i8> [[TMP8]], zeroinitializer4505; CHECK-NEXT: [[TMP12:%.*]] = icmp ne <64 x i8> [[TMP11]], zeroinitializer4506; CHECK-NEXT: [[TMP13:%.*]] = xor <64 x i8> [[TMP11]], splat (i8 -1)4507; CHECK-NEXT: [[TMP14:%.*]] = and <64 x i8> [[TMP13]], [[TMP10]]4508; CHECK-NEXT: [[TMP15:%.*]] = icmp eq <64 x i8> [[TMP14]], zeroinitializer4509; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <64 x i1> [[TMP12]], [[TMP15]]4510; CHECK-NEXT: [[TMP16:%.*]] = icmp eq <64 x i8> [[TMP9]], zeroinitializer4511; CHECK-NEXT: [[TMP17:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>4512; CHECK-NEXT: [[TMP18:%.*]] = bitcast i64 [[X2:%.*]] to <64 x i1>4513; CHECK-NEXT: [[TMP19:%.*]] = and <64 x i1> [[_MSPROP_ICMP]], [[TMP17]]4514; CHECK-NEXT: [[TMP20:%.*]] = and <64 x i1> [[TMP16]], [[TMP17]]4515; CHECK-NEXT: [[TMP21:%.*]] = and <64 x i1> [[_MSPROP_ICMP]], [[TMP18]]4516; CHECK-NEXT: [[TMP22:%.*]] = or <64 x i1> [[TMP19]], [[TMP20]]4517; CHECK-NEXT: [[TMP23:%.*]] = or <64 x i1> [[TMP22]], [[TMP21]]4518; CHECK-NEXT: [[TMP24:%.*]] = and <64 x i1> [[TMP16]], [[TMP18]]4519; CHECK-NEXT: [[TMP25:%.*]] = bitcast <64 x i1> [[TMP23]] to i644520; CHECK-NEXT: [[TMP26:%.*]] = bitcast <64 x i1> [[TMP24]] to i644521; CHECK-NEXT: [[TMP27:%.*]] = and <64 x i8> [[TMP1]], [[TMP2]]4522; CHECK-NEXT: [[TMP28:%.*]] = and <64 x i8> [[X0]], [[TMP2]]4523; CHECK-NEXT: [[TMP29:%.*]] = and <64 x i8> [[TMP1]], [[X1]]4524; CHECK-NEXT: [[TMP30:%.*]] = or <64 x i8> [[TMP27]], [[TMP28]]4525; CHECK-NEXT: [[TMP31:%.*]] = or <64 x i8> [[TMP30]], [[TMP29]]4526; CHECK-NEXT: [[TMP32:%.*]] = and <64 x i8> [[X0]], [[X1]]4527; CHECK-NEXT: [[TMP33:%.*]] = xor <64 x i8> [[TMP32]], zeroinitializer4528; CHECK-NEXT: [[TMP34:%.*]] = or <64 x i8> [[TMP31]], zeroinitializer4529; CHECK-NEXT: [[TMP35:%.*]] = icmp ne <64 x i8> [[TMP34]], zeroinitializer4530; CHECK-NEXT: [[TMP36:%.*]] = xor <64 x i8> [[TMP34]], splat (i8 -1)4531; CHECK-NEXT: [[TMP37:%.*]] = and <64 x i8> [[TMP36]], [[TMP33]]4532; CHECK-NEXT: [[TMP38:%.*]] = icmp eq <64 x i8> [[TMP37]], zeroinitializer4533; CHECK-NEXT: [[_MSPROP_ICMP1:%.*]] = and <64 x i1> [[TMP35]], [[TMP38]]4534; CHECK-NEXT: [[TMP39:%.*]] = icmp eq <64 x i8> [[TMP32]], zeroinitializer4535; CHECK-NEXT: [[TMP40:%.*]] = bitcast <64 x i1> [[_MSPROP_ICMP1]] to i644536; CHECK-NEXT: [[TMP41:%.*]] = bitcast <64 x i1> [[TMP39]] to i644537; CHECK-NEXT: [[_MSPROP:%.*]] = or i64 [[TMP25]], [[TMP40]]4538; CHECK-NEXT: [[RES2:%.*]] = add i64 [[TMP26]], [[TMP41]]4539; CHECK-NEXT: store i64 [[_MSPROP]], ptr @__msan_retval_tls, align 84540; CHECK-NEXT: ret i64 [[RES2]]4541;4542 %res = call i64 @llvm.x86.avx512.ptestnm.b.512(<64 x i8> %x0, <64 x i8> %x1, i64 %x2)4543 %res1 = call i64 @llvm.x86.avx512.ptestnm.b.512(<64 x i8> %x0, <64 x i8> %x1, i64-1)4544 %res2 = add i64 %res, %res14545 ret i64 %res24546}4547 4548declare i32 @llvm.x86.avx512.ptestnm.w.512(<32 x i16>, <32 x i16>, i32 %x2)4549 4550define i32 @test_int_x86_avx512_ptestnm_w_512(<32 x i16> %x0, <32 x i16> %x1, i32 %x2) nounwind #0 {4551; CHECK-LABEL: @test_int_x86_avx512_ptestnm_w_512(4552; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 84553; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84554; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84555; CHECK-NEXT: call void @llvm.donothing()4556; CHECK-NEXT: [[TMP4:%.*]] = and <32 x i16> [[TMP1]], [[TMP2]]4557; CHECK-NEXT: [[TMP5:%.*]] = and <32 x i16> [[X0:%.*]], [[TMP2]]4558; CHECK-NEXT: [[TMP6:%.*]] = and <32 x i16> [[TMP1]], [[X1:%.*]]4559; CHECK-NEXT: [[TMP7:%.*]] = or <32 x i16> [[TMP4]], [[TMP5]]4560; CHECK-NEXT: [[TMP8:%.*]] = or <32 x i16> [[TMP7]], [[TMP6]]4561; CHECK-NEXT: [[TMP9:%.*]] = and <32 x i16> [[X0]], [[X1]]4562; CHECK-NEXT: [[TMP10:%.*]] = xor <32 x i16> [[TMP9]], zeroinitializer4563; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP8]], zeroinitializer4564; CHECK-NEXT: [[TMP12:%.*]] = icmp ne <32 x i16> [[TMP11]], zeroinitializer4565; CHECK-NEXT: [[TMP13:%.*]] = xor <32 x i16> [[TMP11]], splat (i16 -1)4566; CHECK-NEXT: [[TMP14:%.*]] = and <32 x i16> [[TMP13]], [[TMP10]]4567; CHECK-NEXT: [[TMP15:%.*]] = icmp eq <32 x i16> [[TMP14]], zeroinitializer4568; CHECK-NEXT: [[_MSPROP_ICMP:%.*]] = and <32 x i1> [[TMP12]], [[TMP15]]4569; CHECK-NEXT: [[TMP16:%.*]] = icmp eq <32 x i16> [[TMP9]], zeroinitializer4570; CHECK-NEXT: [[TMP17:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>4571; CHECK-NEXT: [[TMP18:%.*]] = bitcast i32 [[X2:%.*]] to <32 x i1>4572; CHECK-NEXT: [[TMP19:%.*]] = and <32 x i1> [[_MSPROP_ICMP]], [[TMP17]]4573; CHECK-NEXT: [[TMP20:%.*]] = and <32 x i1> [[TMP16]], [[TMP17]]4574; CHECK-NEXT: [[TMP21:%.*]] = and <32 x i1> [[_MSPROP_ICMP]], [[TMP18]]4575; CHECK-NEXT: [[TMP22:%.*]] = or <32 x i1> [[TMP19]], [[TMP20]]4576; CHECK-NEXT: [[TMP23:%.*]] = or <32 x i1> [[TMP22]], [[TMP21]]4577; CHECK-NEXT: [[TMP24:%.*]] = and <32 x i1> [[TMP16]], [[TMP18]]4578; CHECK-NEXT: [[TMP25:%.*]] = bitcast <32 x i1> [[TMP23]] to i324579; CHECK-NEXT: [[TMP26:%.*]] = bitcast <32 x i1> [[TMP24]] to i324580; CHECK-NEXT: [[TMP27:%.*]] = and <32 x i16> [[TMP1]], [[TMP2]]4581; CHECK-NEXT: [[TMP28:%.*]] = and <32 x i16> [[X0]], [[TMP2]]4582; CHECK-NEXT: [[TMP29:%.*]] = and <32 x i16> [[TMP1]], [[X1]]4583; CHECK-NEXT: [[TMP30:%.*]] = or <32 x i16> [[TMP27]], [[TMP28]]4584; CHECK-NEXT: [[TMP31:%.*]] = or <32 x i16> [[TMP30]], [[TMP29]]4585; CHECK-NEXT: [[TMP32:%.*]] = and <32 x i16> [[X0]], [[X1]]4586; CHECK-NEXT: [[TMP33:%.*]] = xor <32 x i16> [[TMP32]], zeroinitializer4587; CHECK-NEXT: [[TMP34:%.*]] = or <32 x i16> [[TMP31]], zeroinitializer4588; CHECK-NEXT: [[TMP35:%.*]] = icmp ne <32 x i16> [[TMP34]], zeroinitializer4589; CHECK-NEXT: [[TMP36:%.*]] = xor <32 x i16> [[TMP34]], splat (i16 -1)4590; CHECK-NEXT: [[TMP37:%.*]] = and <32 x i16> [[TMP36]], [[TMP33]]4591; CHECK-NEXT: [[TMP38:%.*]] = icmp eq <32 x i16> [[TMP37]], zeroinitializer4592; CHECK-NEXT: [[_MSPROP_ICMP1:%.*]] = and <32 x i1> [[TMP35]], [[TMP38]]4593; CHECK-NEXT: [[TMP39:%.*]] = icmp eq <32 x i16> [[TMP32]], zeroinitializer4594; CHECK-NEXT: [[TMP40:%.*]] = bitcast <32 x i1> [[_MSPROP_ICMP1]] to i324595; CHECK-NEXT: [[TMP41:%.*]] = bitcast <32 x i1> [[TMP39]] to i324596; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP25]], [[TMP40]]4597; CHECK-NEXT: [[RES2:%.*]] = add i32 [[TMP26]], [[TMP41]]4598; CHECK-NEXT: store i32 [[_MSPROP]], ptr @__msan_retval_tls, align 84599; CHECK-NEXT: ret i32 [[RES2]]4600;4601 %res = call i32 @llvm.x86.avx512.ptestnm.w.512(<32 x i16> %x0, <32 x i16> %x1, i32 %x2)4602 %res1 = call i32 @llvm.x86.avx512.ptestnm.w.512(<32 x i16> %x0, <32 x i16> %x1, i32-1)4603 %res2 = add i32 %res, %res14604 ret i32 %res24605}4606 4607declare i64 @llvm.x86.avx512.cvtb2mask.512(<64 x i8>)4608 4609define i64 @test_int_x86_avx512_cvtb2mask_512(<64 x i8> %x0) nounwind #0 {4610; CHECK-LABEL: @test_int_x86_avx512_cvtb2mask_512(4611; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 84612; CHECK-NEXT: call void @llvm.donothing()4613; CHECK-NEXT: [[TMP2:%.*]] = xor <64 x i8> [[X0:%.*]], splat (i8 -128)4614; CHECK-NEXT: [[TMP3:%.*]] = xor <64 x i8> [[TMP1]], splat (i8 -1)4615; CHECK-NEXT: [[TMP4:%.*]] = and <64 x i8> [[TMP2]], [[TMP3]]4616; CHECK-NEXT: [[TMP5:%.*]] = or <64 x i8> [[TMP2]], [[TMP1]]4617; CHECK-NEXT: [[TMP6:%.*]] = icmp ult <64 x i8> [[TMP4]], splat (i8 -128)4618; CHECK-NEXT: [[TMP7:%.*]] = icmp ult <64 x i8> [[TMP5]], splat (i8 -128)4619; CHECK-NEXT: [[TMP8:%.*]] = xor <64 x i1> [[TMP6]], [[TMP7]]4620; CHECK-NEXT: [[TMP9:%.*]] = icmp slt <64 x i8> [[X0]], zeroinitializer4621; CHECK-NEXT: [[TMP10:%.*]] = bitcast <64 x i1> [[TMP8]] to i644622; CHECK-NEXT: [[TMP11:%.*]] = bitcast <64 x i1> [[TMP9]] to i644623; CHECK-NEXT: store i64 [[TMP10]], ptr @__msan_retval_tls, align 84624; CHECK-NEXT: ret i64 [[TMP11]]4625;4626 %res = call i64 @llvm.x86.avx512.cvtb2mask.512(<64 x i8> %x0)4627 ret i64 %res4628}4629 4630declare i32 @llvm.x86.avx512.cvtw2mask.512(<32 x i16>)4631 4632define i32 @test_int_x86_avx512_cvtw2mask_512(<32 x i16> %x0) nounwind #0 {4633; CHECK-LABEL: @test_int_x86_avx512_cvtw2mask_512(4634; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 84635; CHECK-NEXT: call void @llvm.donothing()4636; CHECK-NEXT: [[TMP2:%.*]] = xor <32 x i16> [[X0:%.*]], splat (i16 -32768)4637; CHECK-NEXT: [[TMP3:%.*]] = xor <32 x i16> [[TMP1]], splat (i16 -1)4638; CHECK-NEXT: [[TMP4:%.*]] = and <32 x i16> [[TMP2]], [[TMP3]]4639; CHECK-NEXT: [[TMP5:%.*]] = or <32 x i16> [[TMP2]], [[TMP1]]4640; CHECK-NEXT: [[TMP6:%.*]] = icmp ult <32 x i16> [[TMP4]], splat (i16 -32768)4641; CHECK-NEXT: [[TMP7:%.*]] = icmp ult <32 x i16> [[TMP5]], splat (i16 -32768)4642; CHECK-NEXT: [[TMP8:%.*]] = xor <32 x i1> [[TMP6]], [[TMP7]]4643; CHECK-NEXT: [[TMP9:%.*]] = icmp slt <32 x i16> [[X0]], zeroinitializer4644; CHECK-NEXT: [[TMP10:%.*]] = bitcast <32 x i1> [[TMP8]] to i324645; CHECK-NEXT: [[TMP11:%.*]] = bitcast <32 x i1> [[TMP9]] to i324646; CHECK-NEXT: store i32 [[TMP10]], ptr @__msan_retval_tls, align 84647; CHECK-NEXT: ret i32 [[TMP11]]4648;4649 %res = call i32 @llvm.x86.avx512.cvtw2mask.512(<32 x i16> %x0)4650 ret i32 %res4651}4652 4653declare <32 x i16> @llvm.x86.avx512.mask.pmulhu.w.512(<32 x i16>, <32 x i16>, <32 x i16>, i32)4654 4655define <32 x i16> @test_int_x86_avx512_pmulhu_w_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2) nounwind #0 {4656; CHECK-LABEL: @test_int_x86_avx512_pmulhu_w_512(4657; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 84658; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84659; CHECK-NEXT: call void @llvm.donothing()4660; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]4661; CHECK-NEXT: [[TMP3:%.*]] = call <32 x i16> @llvm.x86.avx512.pmulhu.w.512(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])4662; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 84663; CHECK-NEXT: ret <32 x i16> [[TMP3]]4664;4665 %res = call <32 x i16> @llvm.x86.avx512.mask.pmulhu.w.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 -1)4666 ret <32 x i16> %res4667}4668 4669define <32 x i16> @test_int_x86_avx512_mask_pmulhu_w_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {4670; CHECK-LABEL: @test_int_x86_avx512_mask_pmulhu_w_512(4671; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 84672; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84673; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 84674; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84675; CHECK-NEXT: call void @llvm.donothing()4676; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]4677; CHECK-NEXT: [[TMP5:%.*]] = call <32 x i16> @llvm.x86.avx512.pmulhu.w.512(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])4678; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>4679; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>4680; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]4681; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i16> [[TMP5]], [[X2:%.*]]4682; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[_MSPROP]]4683; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP4]]4684; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP11]], <32 x i16> [[TMP8]]4685; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP5]], <32 x i16> [[X2]]4686; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84687; CHECK-NEXT: ret <32 x i16> [[TMP12]]4688;4689 %res = call <32 x i16> @llvm.x86.avx512.mask.pmulhu.w.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3)4690 ret <32 x i16> %res4691}4692 4693declare <32 x i16> @llvm.x86.avx512.mask.pmulh.w.512(<32 x i16>, <32 x i16>, <32 x i16>, i32)4694 4695define <32 x i16> @test_int_x86_avx512_pmulh_w_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2) nounwind #0 {4696; CHECK-LABEL: @test_int_x86_avx512_pmulh_w_512(4697; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 84698; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84699; CHECK-NEXT: call void @llvm.donothing()4700; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]4701; CHECK-NEXT: [[TMP3:%.*]] = call <32 x i16> @llvm.x86.avx512.pmulh.w.512(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])4702; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 84703; CHECK-NEXT: ret <32 x i16> [[TMP3]]4704;4705 %res = call <32 x i16> @llvm.x86.avx512.mask.pmulh.w.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 -1)4706 ret <32 x i16> %res4707}4708 4709define <32 x i16> @test_int_x86_avx512_mask_pmulh_w_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {4710; CHECK-LABEL: @test_int_x86_avx512_mask_pmulh_w_512(4711; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 84712; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84713; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 84714; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84715; CHECK-NEXT: call void @llvm.donothing()4716; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]4717; CHECK-NEXT: [[TMP5:%.*]] = call <32 x i16> @llvm.x86.avx512.pmulh.w.512(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])4718; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>4719; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>4720; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]4721; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i16> [[TMP5]], [[X2:%.*]]4722; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[_MSPROP]]4723; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP4]]4724; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP11]], <32 x i16> [[TMP8]]4725; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP5]], <32 x i16> [[X2]]4726; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84727; CHECK-NEXT: ret <32 x i16> [[TMP12]]4728;4729 %res = call <32 x i16> @llvm.x86.avx512.mask.pmulh.w.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3)4730 ret <32 x i16> %res4731}4732 4733declare <32 x i16> @llvm.x86.avx512.mask.pmul.hr.sw.512(<32 x i16>, <32 x i16>, <32 x i16>, i32)4734 4735define <32 x i16> @test_int_x86_avx512_pmulhr_sw_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2) nounwind #0 {4736; CHECK-LABEL: @test_int_x86_avx512_pmulhr_sw_512(4737; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 84738; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84739; CHECK-NEXT: call void @llvm.donothing()4740; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]4741; CHECK-NEXT: [[TMP3:%.*]] = call <32 x i16> @llvm.x86.avx512.pmul.hr.sw.512(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])4742; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 84743; CHECK-NEXT: ret <32 x i16> [[TMP3]]4744;4745 %res = call <32 x i16> @llvm.x86.avx512.mask.pmul.hr.sw.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 -1)4746 ret <32 x i16> %res4747}4748 4749define <32 x i16> @test_int_x86_avx512_mask_pmulhr_sw_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {4750; CHECK-LABEL: @test_int_x86_avx512_mask_pmulhr_sw_512(4751; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 84752; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84753; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 84754; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84755; CHECK-NEXT: call void @llvm.donothing()4756; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]4757; CHECK-NEXT: [[TMP5:%.*]] = call <32 x i16> @llvm.x86.avx512.pmul.hr.sw.512(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])4758; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>4759; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>4760; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]4761; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i16> [[TMP5]], [[X2:%.*]]4762; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[_MSPROP]]4763; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP4]]4764; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP11]], <32 x i16> [[TMP8]]4765; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP5]], <32 x i16> [[X2]]4766; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84767; CHECK-NEXT: ret <32 x i16> [[TMP12]]4768;4769 %res = call <32 x i16> @llvm.x86.avx512.mask.pmul.hr.sw.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3)4770 ret <32 x i16> %res4771}4772 4773declare <32 x i16> @llvm.x86.avx512.mask.pmaddubs.w.512(<64 x i8>, <64 x i8>, <32 x i16>, i32)4774 4775define <32 x i16> @test_int_x86_avx512_pmaddubs_w_512(<64 x i8> %x0, <64 x i8> %x1, <32 x i16> %x2) nounwind #0 {4776; CHECK-LABEL: @test_int_x86_avx512_pmaddubs_w_512(4777; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 84778; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84779; CHECK-NEXT: call void @llvm.donothing()4780; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <64 x i8> [[TMP1]], zeroinitializer4781; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <64 x i8> [[TMP2]], zeroinitializer4782; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <64 x i8> [[X0:%.*]], zeroinitializer4783; CHECK-NEXT: [[TMP6:%.*]] = icmp ne <64 x i8> [[X1:%.*]], zeroinitializer4784; CHECK-NEXT: [[TMP17:%.*]] = and <64 x i1> [[TMP3]], [[TMP4]]4785; CHECK-NEXT: [[TMP8:%.*]] = and <64 x i1> [[TMP5]], [[TMP4]]4786; CHECK-NEXT: [[TMP9:%.*]] = and <64 x i1> [[TMP3]], [[TMP6]]4787; CHECK-NEXT: [[TMP10:%.*]] = or <64 x i1> [[TMP17]], [[TMP8]]4788; CHECK-NEXT: [[TMP11:%.*]] = or <64 x i1> [[TMP10]], [[TMP9]]4789; CHECK-NEXT: [[TMP12:%.*]] = sext <64 x i1> [[TMP11]] to <64 x i8>4790; CHECK-NEXT: [[TMP13:%.*]] = bitcast <64 x i8> [[TMP12]] to <32 x i16>4791; CHECK-NEXT: [[TMP14:%.*]] = icmp ne <32 x i16> [[TMP13]], zeroinitializer4792; CHECK-NEXT: [[TMP16:%.*]] = sext <32 x i1> [[TMP14]] to <32 x i16>4793; CHECK-NEXT: [[TMP7:%.*]] = call <32 x i16> @llvm.x86.avx512.pmaddubs.w.512(<64 x i8> [[X0]], <64 x i8> [[X1]])4794; CHECK-NEXT: store <32 x i16> [[TMP16]], ptr @__msan_retval_tls, align 84795; CHECK-NEXT: ret <32 x i16> [[TMP7]]4796;4797 %res = call <32 x i16> @llvm.x86.avx512.mask.pmaddubs.w.512(<64 x i8> %x0, <64 x i8> %x1, <32 x i16> %x2, i32 -1)4798 ret <32 x i16> %res4799}4800 4801define <32 x i16> @test_int_x86_avx512_mask_pmaddubs_w_512(<64 x i8> %x0, <64 x i8> %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {4802; CHECK-LABEL: @test_int_x86_avx512_mask_pmaddubs_w_512(4803; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 84804; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84805; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 84806; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84807; CHECK-NEXT: call void @llvm.donothing()4808; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <64 x i8> [[TMP1]], zeroinitializer4809; CHECK-NEXT: [[TMP6:%.*]] = icmp ne <64 x i8> [[TMP2]], zeroinitializer4810; CHECK-NEXT: [[TMP7:%.*]] = icmp ne <64 x i8> [[X0:%.*]], zeroinitializer4811; CHECK-NEXT: [[TMP8:%.*]] = icmp ne <64 x i8> [[X1:%.*]], zeroinitializer4812; CHECK-NEXT: [[TMP19:%.*]] = and <64 x i1> [[TMP5]], [[TMP6]]4813; CHECK-NEXT: [[TMP20:%.*]] = and <64 x i1> [[TMP7]], [[TMP6]]4814; CHECK-NEXT: [[TMP21:%.*]] = and <64 x i1> [[TMP5]], [[TMP8]]4815; CHECK-NEXT: [[TMP22:%.*]] = or <64 x i1> [[TMP19]], [[TMP20]]4816; CHECK-NEXT: [[TMP23:%.*]] = or <64 x i1> [[TMP22]], [[TMP21]]4817; CHECK-NEXT: [[TMP24:%.*]] = sext <64 x i1> [[TMP23]] to <64 x i8>4818; CHECK-NEXT: [[TMP17:%.*]] = bitcast <64 x i8> [[TMP24]] to <32 x i16>4819; CHECK-NEXT: [[TMP25:%.*]] = icmp ne <32 x i16> [[TMP17]], zeroinitializer4820; CHECK-NEXT: [[TMP18:%.*]] = sext <32 x i1> [[TMP25]] to <32 x i16>4821; CHECK-NEXT: [[TMP9:%.*]] = call <32 x i16> @llvm.x86.avx512.pmaddubs.w.512(<64 x i8> [[X0]], <64 x i8> [[X1]])4822; CHECK-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>4823; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>4824; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[TMP18]], <32 x i16> [[TMP4]]4825; CHECK-NEXT: [[TMP13:%.*]] = xor <32 x i16> [[TMP9]], [[X2:%.*]]4826; CHECK-NEXT: [[TMP14:%.*]] = or <32 x i16> [[TMP13]], [[TMP18]]4827; CHECK-NEXT: [[TMP15:%.*]] = or <32 x i16> [[TMP14]], [[TMP4]]4828; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP10]], <32 x i16> [[TMP15]], <32 x i16> [[TMP12]]4829; CHECK-NEXT: [[TMP16:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[TMP9]], <32 x i16> [[X2]]4830; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84831; CHECK-NEXT: ret <32 x i16> [[TMP16]]4832;4833 %res = call <32 x i16> @llvm.x86.avx512.mask.pmaddubs.w.512(<64 x i8> %x0, <64 x i8> %x1, <32 x i16> %x2, i32 %x3)4834 ret <32 x i16> %res4835}4836 4837declare <16 x i32> @llvm.x86.avx512.mask.pmaddw.d.512(<32 x i16>, <32 x i16>, <16 x i32>, i16)4838 4839define <16 x i32> @test_int_x86_avx512_pmaddw_d_512(<32 x i16> %x0, <32 x i16> %x1, <16 x i32> %x2) nounwind #0 {4840; CHECK-LABEL: @test_int_x86_avx512_pmaddw_d_512(4841; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 84842; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84843; CHECK-NEXT: call void @llvm.donothing()4844; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <32 x i16> [[TMP1]], zeroinitializer4845; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <32 x i16> [[TMP2]], zeroinitializer4846; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <32 x i16> [[X0:%.*]], zeroinitializer4847; CHECK-NEXT: [[TMP6:%.*]] = icmp ne <32 x i16> [[X1:%.*]], zeroinitializer4848; CHECK-NEXT: [[TMP17:%.*]] = and <32 x i1> [[TMP3]], [[TMP4]]4849; CHECK-NEXT: [[TMP8:%.*]] = and <32 x i1> [[TMP5]], [[TMP4]]4850; CHECK-NEXT: [[TMP9:%.*]] = and <32 x i1> [[TMP3]], [[TMP6]]4851; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i1> [[TMP17]], [[TMP8]]4852; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i1> [[TMP10]], [[TMP9]]4853; CHECK-NEXT: [[TMP12:%.*]] = sext <32 x i1> [[TMP11]] to <32 x i16>4854; CHECK-NEXT: [[TMP13:%.*]] = bitcast <32 x i16> [[TMP12]] to <16 x i32>4855; CHECK-NEXT: [[TMP14:%.*]] = icmp ne <16 x i32> [[TMP13]], zeroinitializer4856; CHECK-NEXT: [[TMP16:%.*]] = sext <16 x i1> [[TMP14]] to <16 x i32>4857; CHECK-NEXT: [[TMP7:%.*]] = call <16 x i32> @llvm.x86.avx512.pmaddw.d.512(<32 x i16> [[X0]], <32 x i16> [[X1]])4858; CHECK-NEXT: store <16 x i32> [[TMP16]], ptr @__msan_retval_tls, align 84859; CHECK-NEXT: ret <16 x i32> [[TMP7]]4860;4861 %res = call <16 x i32> @llvm.x86.avx512.mask.pmaddw.d.512(<32 x i16> %x0, <32 x i16> %x1, <16 x i32> %x2, i16 -1)4862 ret <16 x i32> %res4863}4864 4865define <16 x i32> @test_int_x86_avx512_mask_pmaddw_d_512(<32 x i16> %x0, <32 x i16> %x1, <16 x i32> %x2, i16 %x3) nounwind #0 {4866; CHECK-LABEL: @test_int_x86_avx512_mask_pmaddw_d_512(4867; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 84868; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84869; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 84870; CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84871; CHECK-NEXT: call void @llvm.donothing()4872; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <32 x i16> [[TMP1]], zeroinitializer4873; CHECK-NEXT: [[TMP6:%.*]] = icmp ne <32 x i16> [[TMP2]], zeroinitializer4874; CHECK-NEXT: [[TMP7:%.*]] = icmp ne <32 x i16> [[X0:%.*]], zeroinitializer4875; CHECK-NEXT: [[TMP8:%.*]] = icmp ne <32 x i16> [[X1:%.*]], zeroinitializer4876; CHECK-NEXT: [[TMP19:%.*]] = and <32 x i1> [[TMP5]], [[TMP6]]4877; CHECK-NEXT: [[TMP20:%.*]] = and <32 x i1> [[TMP7]], [[TMP6]]4878; CHECK-NEXT: [[TMP21:%.*]] = and <32 x i1> [[TMP5]], [[TMP8]]4879; CHECK-NEXT: [[TMP22:%.*]] = or <32 x i1> [[TMP19]], [[TMP20]]4880; CHECK-NEXT: [[TMP23:%.*]] = or <32 x i1> [[TMP22]], [[TMP21]]4881; CHECK-NEXT: [[TMP24:%.*]] = sext <32 x i1> [[TMP23]] to <32 x i16>4882; CHECK-NEXT: [[TMP17:%.*]] = bitcast <32 x i16> [[TMP24]] to <16 x i32>4883; CHECK-NEXT: [[TMP25:%.*]] = icmp ne <16 x i32> [[TMP17]], zeroinitializer4884; CHECK-NEXT: [[TMP18:%.*]] = sext <16 x i1> [[TMP25]] to <16 x i32>4885; CHECK-NEXT: [[TMP9:%.*]] = call <16 x i32> @llvm.x86.avx512.pmaddw.d.512(<32 x i16> [[X0]], <32 x i16> [[X1]])4886; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16 [[TMP3]] to <16 x i1>4887; CHECK-NEXT: [[TMP11:%.*]] = bitcast i16 [[X3:%.*]] to <16 x i1>4888; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP18]], <16 x i32> [[TMP4]]4889; CHECK-NEXT: [[TMP13:%.*]] = xor <16 x i32> [[TMP9]], [[X2:%.*]]4890; CHECK-NEXT: [[TMP14:%.*]] = or <16 x i32> [[TMP13]], [[TMP18]]4891; CHECK-NEXT: [[TMP15:%.*]] = or <16 x i32> [[TMP14]], [[TMP4]]4892; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <16 x i1> [[TMP10]], <16 x i32> [[TMP15]], <16 x i32> [[TMP12]]4893; CHECK-NEXT: [[TMP16:%.*]] = select <16 x i1> [[TMP11]], <16 x i32> [[TMP9]], <16 x i32> [[X2]]4894; CHECK-NEXT: store <16 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84895; CHECK-NEXT: ret <16 x i32> [[TMP16]]4896;4897 %res = call <16 x i32> @llvm.x86.avx512.mask.pmaddw.d.512(<32 x i16> %x0, <32 x i16> %x1, <16 x i32> %x2, i16 %x3)4898 ret <16 x i32> %res4899}4900 4901declare <32 x i16> @llvm.x86.avx512.mask.permvar.hi.512(<32 x i16>, <32 x i16>, <32 x i16>, i32)4902 4903define <32 x i16> @test_int_x86_avx512_permvar_hi_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2) nounwind #0 {4904; CHECK-LABEL: @test_int_x86_avx512_permvar_hi_512(4905; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 84906; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84907; CHECK-NEXT: call void @llvm.donothing()4908; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]4909; CHECK-NEXT: [[TMP3:%.*]] = call <32 x i16> @llvm.x86.avx512.permvar.hi.512(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])4910; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 84911; CHECK-NEXT: ret <32 x i16> [[TMP3]]4912;4913 %res = call <32 x i16> @llvm.x86.avx512.mask.permvar.hi.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 -1)4914 ret <32 x i16> %res4915}4916 4917define <32 x i16> @test_int_x86_avx512_mask_permvar_hi_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {4918; CHECK-LABEL: @test_int_x86_avx512_mask_permvar_hi_512(4919; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 84920; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84921; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 84922; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84923; CHECK-NEXT: call void @llvm.donothing()4924; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]4925; CHECK-NEXT: [[TMP5:%.*]] = call <32 x i16> @llvm.x86.avx512.permvar.hi.512(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])4926; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>4927; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>4928; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]4929; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i16> [[TMP5]], [[X2:%.*]]4930; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[_MSPROP]]4931; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP4]]4932; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP11]], <32 x i16> [[TMP8]]4933; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP5]], <32 x i16> [[X2]]4934; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84935; CHECK-NEXT: ret <32 x i16> [[TMP12]]4936;4937 %res = call <32 x i16> @llvm.x86.avx512.mask.permvar.hi.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3)4938 ret <32 x i16> %res4939}4940 4941define <32 x i16> @test_int_x86_avx512_maskz_permvar_hi_512(<32 x i16> %x0, <32 x i16> %x1, i32 %x3) nounwind #0 {4942; CHECK-LABEL: @test_int_x86_avx512_maskz_permvar_hi_512(4943; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 84944; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84945; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84946; CHECK-NEXT: call void @llvm.donothing()4947; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]4948; CHECK-NEXT: [[TMP4:%.*]] = call <32 x i16> @llvm.x86.avx512.permvar.hi.512(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])4949; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>4950; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>4951; CHECK-NEXT: [[TMP7:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[_MSPROP]], <32 x i16> zeroinitializer4952; CHECK-NEXT: [[TMP8:%.*]] = xor <32 x i16> [[TMP4]], zeroinitializer4953; CHECK-NEXT: [[TMP9:%.*]] = or <32 x i16> [[TMP8]], [[_MSPROP]]4954; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], zeroinitializer4955; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP5]], <32 x i16> [[TMP10]], <32 x i16> [[TMP7]]4956; CHECK-NEXT: [[TMP11:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP4]], <32 x i16> zeroinitializer4957; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 84958; CHECK-NEXT: ret <32 x i16> [[TMP11]]4959;4960 %res = call <32 x i16> @llvm.x86.avx512.mask.permvar.hi.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> zeroinitializer, i32 %x3)4961 ret <32 x i16> %res4962}4963 4964declare <32 x i16> @llvm.x86.avx512.mask.vpermt2var.hi.512(<32 x i16>, <32 x i16>, <32 x i16>, i32)4965 4966define <32 x i16> @test_int_x86_avx512_vpermt2var_hi_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2) nounwind #0 {4967; CHECK-LABEL: @test_int_x86_avx512_vpermt2var_hi_512(4968; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84969; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84970; CHECK-NEXT: [[X0:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 84971; CHECK-NEXT: call void @llvm.donothing()4972; CHECK-NEXT: [[TMP3:%.*]] = trunc <32 x i16> [[X0]] to <32 x i5>4973; CHECK-NEXT: [[TMP100:%.*]] = call <32 x i16> @llvm.x86.avx512.vpermi2var.hi.512(<32 x i16> [[TMP1]], <32 x i16> [[X3:%.*]], <32 x i16> [[TMP2]])4974; CHECK-NEXT: [[TMP5:%.*]] = bitcast <32 x i5> [[TMP3]] to i1604975; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i160 [[TMP5]], 04976; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP7:%.*]], label [[TMP8:%.*]], !prof [[PROF1]]4977; CHECK: 7:4978; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]4979; CHECK-NEXT: unreachable4980; CHECK: 8:4981; CHECK-NEXT: [[TMP103:%.*]] = call <32 x i16> @llvm.x86.avx512.vpermi2var.hi.512(<32 x i16> [[X1:%.*]], <32 x i16> [[X3]], <32 x i16> [[X2:%.*]])4982; CHECK-NEXT: store <32 x i16> [[TMP100]], ptr @__msan_retval_tls, align 84983; CHECK-NEXT: ret <32 x i16> [[TMP103]]4984;4985 %res = call <32 x i16> @llvm.x86.avx512.mask.vpermt2var.hi.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 -1)4986 ret <32 x i16> %res4987}4988 4989define <32 x i16> @test_int_x86_avx512_mask_vpermt2var_hi_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {4990; CHECK-LABEL: @test_int_x86_avx512_mask_vpermt2var_hi_512(4991; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 84992; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 84993; CHECK-NEXT: [[X0:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 84994; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 84995; CHECK-NEXT: call void @llvm.donothing()4996; CHECK-NEXT: [[TMP5:%.*]] = trunc <32 x i16> [[X0]] to <32 x i5>4997; CHECK-NEXT: [[TMP101:%.*]] = call <32 x i16> @llvm.x86.avx512.vpermi2var.hi.512(<32 x i16> [[TMP1]], <32 x i16> [[X4:%.*]], <32 x i16> [[TMP2]])4998; CHECK-NEXT: [[TMP6:%.*]] = bitcast <32 x i5> [[TMP5]] to i1604999; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i160 [[TMP6]], 05000; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF1]]5001; CHECK: 8:5002; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]5003; CHECK-NEXT: unreachable5004; CHECK: 9:5005; CHECK-NEXT: [[TMP104:%.*]] = call <32 x i16> @llvm.x86.avx512.vpermi2var.hi.512(<32 x i16> [[X1:%.*]], <32 x i16> [[X4]], <32 x i16> [[X2:%.*]])5006; CHECK-NEXT: [[TMP105:%.*]] = bitcast i32 [[TMP4]] to <32 x i1>5007; CHECK-NEXT: [[TMP106:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>5008; CHECK-NEXT: [[TMP107:%.*]] = select <32 x i1> [[TMP106]], <32 x i16> [[TMP101]], <32 x i16> [[TMP1]]5009; CHECK-NEXT: [[TMP108:%.*]] = xor <32 x i16> [[TMP104]], [[X1]]5010; CHECK-NEXT: [[TMP109:%.*]] = or <32 x i16> [[TMP108]], [[TMP101]]5011; CHECK-NEXT: [[TMP110:%.*]] = or <32 x i16> [[TMP109]], [[TMP1]]5012; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP105]], <32 x i16> [[TMP110]], <32 x i16> [[TMP107]]5013; CHECK-NEXT: [[TMP111:%.*]] = select <32 x i1> [[TMP106]], <32 x i16> [[TMP104]], <32 x i16> [[X1]]5014; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85015; CHECK-NEXT: ret <32 x i16> [[TMP111]]5016;5017 %res = call <32 x i16> @llvm.x86.avx512.mask.vpermt2var.hi.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3)5018 ret <32 x i16> %res5019}5020 5021declare <32 x i16> @llvm.x86.avx512.maskz.vpermt2var.hi.512(<32 x i16>, <32 x i16>, <32 x i16>, i32)5022 5023define <32 x i16> @test_int_x86_avx512_maskz_vpermt2var_hi_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {5024; CHECK-LABEL: @test_int_x86_avx512_maskz_vpermt2var_hi_512(5025; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85026; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 85027; CHECK-NEXT: [[X0:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 85028; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 85029; CHECK-NEXT: call void @llvm.donothing()5030; CHECK-NEXT: [[TMP5:%.*]] = trunc <32 x i16> [[X0]] to <32 x i5>5031; CHECK-NEXT: [[TMP101:%.*]] = call <32 x i16> @llvm.x86.avx512.vpermi2var.hi.512(<32 x i16> [[TMP1]], <32 x i16> [[X4:%.*]], <32 x i16> [[TMP2]])5032; CHECK-NEXT: [[TMP6:%.*]] = bitcast <32 x i5> [[TMP5]] to i1605033; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i160 [[TMP6]], 05034; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF1]]5035; CHECK: 8:5036; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]5037; CHECK-NEXT: unreachable5038; CHECK: 9:5039; CHECK-NEXT: [[TMP104:%.*]] = call <32 x i16> @llvm.x86.avx512.vpermi2var.hi.512(<32 x i16> [[X1:%.*]], <32 x i16> [[X4]], <32 x i16> [[X2:%.*]])5040; CHECK-NEXT: [[TMP105:%.*]] = bitcast i32 [[TMP4]] to <32 x i1>5041; CHECK-NEXT: [[TMP106:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>5042; CHECK-NEXT: [[TMP107:%.*]] = select <32 x i1> [[TMP106]], <32 x i16> [[TMP101]], <32 x i16> zeroinitializer5043; CHECK-NEXT: [[TMP108:%.*]] = xor <32 x i16> [[TMP104]], zeroinitializer5044; CHECK-NEXT: [[TMP109:%.*]] = or <32 x i16> [[TMP108]], [[TMP101]]5045; CHECK-NEXT: [[TMP110:%.*]] = or <32 x i16> [[TMP109]], zeroinitializer5046; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP105]], <32 x i16> [[TMP110]], <32 x i16> [[TMP107]]5047; CHECK-NEXT: [[TMP111:%.*]] = select <32 x i1> [[TMP106]], <32 x i16> [[TMP104]], <32 x i16> zeroinitializer5048; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85049; CHECK-NEXT: ret <32 x i16> [[TMP111]]5050;5051 %res = call <32 x i16> @llvm.x86.avx512.maskz.vpermt2var.hi.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3)5052 ret <32 x i16> %res5053}5054 5055declare <32 x i16> @llvm.x86.avx512.mask.vpermi2var.hi.512(<32 x i16>, <32 x i16>, <32 x i16>, i32)5056 5057define <32 x i16> @test_int_x86_avx512_vpermi2var_hi_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2) nounwind #0 {5058; CHECK-LABEL: @test_int_x86_avx512_vpermi2var_hi_512(5059; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 85060; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 85061; CHECK-NEXT: [[X1:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85062; CHECK-NEXT: call void @llvm.donothing()5063; CHECK-NEXT: [[TMP3:%.*]] = trunc <32 x i16> [[X1]] to <32 x i5>5064; CHECK-NEXT: [[TMP100:%.*]] = call <32 x i16> @llvm.x86.avx512.vpermi2var.hi.512(<32 x i16> [[TMP1]], <32 x i16> [[X3:%.*]], <32 x i16> [[TMP2]])5065; CHECK-NEXT: [[TMP5:%.*]] = bitcast <32 x i5> [[TMP3]] to i1605066; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i160 [[TMP5]], 05067; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP7:%.*]], label [[TMP8:%.*]], !prof [[PROF1]]5068; CHECK: 7:5069; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]5070; CHECK-NEXT: unreachable5071; CHECK: 8:5072; CHECK-NEXT: [[TMP103:%.*]] = call <32 x i16> @llvm.x86.avx512.vpermi2var.hi.512(<32 x i16> [[X0:%.*]], <32 x i16> [[X3]], <32 x i16> [[X2:%.*]])5073; CHECK-NEXT: store <32 x i16> [[TMP100]], ptr @__msan_retval_tls, align 85074; CHECK-NEXT: ret <32 x i16> [[TMP103]]5075;5076 %res = call <32 x i16> @llvm.x86.avx512.mask.vpermi2var.hi.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 -1)5077 ret <32 x i16> %res5078}5079 5080define <32 x i16> @test_int_x86_avx512_mask_vpermi2var_hi_512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {5081; CHECK-LABEL: @test_int_x86_avx512_mask_vpermi2var_hi_512(5082; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 85083; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 85084; CHECK-NEXT: [[TMP3:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85085; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 85086; CHECK-NEXT: call void @llvm.donothing()5087; CHECK-NEXT: [[TMP5:%.*]] = trunc <32 x i16> [[TMP3]] to <32 x i5>5088; CHECK-NEXT: [[TMP101:%.*]] = call <32 x i16> @llvm.x86.avx512.vpermi2var.hi.512(<32 x i16> [[TMP1]], <32 x i16> [[X1:%.*]], <32 x i16> [[TMP2]])5089; CHECK-NEXT: [[TMP7:%.*]] = bitcast <32 x i5> [[TMP5]] to i1605090; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i160 [[TMP7]], 05091; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF1]]5092; CHECK: 8:5093; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]5094; CHECK-NEXT: unreachable5095; CHECK: 9:5096; CHECK-NEXT: [[TMP104:%.*]] = call <32 x i16> @llvm.x86.avx512.vpermi2var.hi.512(<32 x i16> [[X0:%.*]], <32 x i16> [[X1]], <32 x i16> [[X2:%.*]])5097; CHECK-NEXT: [[TMP105:%.*]] = bitcast i32 [[TMP4]] to <32 x i1>5098; CHECK-NEXT: [[TMP106:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>5099; CHECK-NEXT: [[TMP107:%.*]] = select <32 x i1> [[TMP106]], <32 x i16> [[TMP101]], <32 x i16> [[TMP3]]5100; CHECK-NEXT: [[TMP108:%.*]] = xor <32 x i16> [[TMP104]], [[X1]]5101; CHECK-NEXT: [[TMP109:%.*]] = or <32 x i16> [[TMP108]], [[TMP101]]5102; CHECK-NEXT: [[TMP110:%.*]] = or <32 x i16> [[TMP109]], [[TMP3]]5103; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP105]], <32 x i16> [[TMP110]], <32 x i16> [[TMP107]]5104; CHECK-NEXT: [[TMP111:%.*]] = select <32 x i1> [[TMP106]], <32 x i16> [[TMP104]], <32 x i16> [[X1]]5105; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85106; CHECK-NEXT: ret <32 x i16> [[TMP111]]5107;5108 %res = call <32 x i16> @llvm.x86.avx512.mask.vpermi2var.hi.512(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3)5109 ret <32 x i16> %res5110}5111 5112declare <32 x i16> @llvm.x86.avx512.mask.dbpsadbw.512(<64 x i8>, <64 x i8>, i32, <32 x i16>, i32)5113 5114define { <32 x i16>, <32 x i16>, <32 x i16> } @test_int_x86_avx512_mask_dbpsadbw_512(<64 x i8> %x0, <64 x i8> %x1, <32 x i16> %x3, i32 %x4) nounwind #0 {5115; CHECK-LABEL: @test_int_x86_avx512_mask_dbpsadbw_512(5116; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 85117; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85118; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 85119; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 85120; CHECK-NEXT: call void @llvm.donothing()5121; CHECK-NEXT: [[TMP5:%.*]] = bitcast <64 x i8> [[TMP1]] to i5125122; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i512 [[TMP5]], 05123; CHECK-NEXT: [[TMP6:%.*]] = bitcast <64 x i8> [[TMP2]] to i5125124; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i512 [[TMP6]], 05125; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP2]]5126; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP7:%.*]], label [[TMP8:%.*]], !prof [[PROF1]]5127; CHECK: 7:5128; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]5129; CHECK-NEXT: unreachable5130; CHECK: 8:5131; CHECK-NEXT: [[TMP9:%.*]] = call <32 x i16> @llvm.x86.avx512.dbpsadbw.512(<64 x i8> [[X0:%.*]], <64 x i8> [[X1:%.*]], i32 2)5132; CHECK-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>5133; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32 [[X4:%.*]] to <32 x i1>5134; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> zeroinitializer, <32 x i16> [[TMP4]]5135; CHECK-NEXT: [[TMP13:%.*]] = xor <32 x i16> [[TMP9]], [[X3:%.*]]5136; CHECK-NEXT: [[TMP14:%.*]] = or <32 x i16> [[TMP13]], zeroinitializer5137; CHECK-NEXT: [[TMP15:%.*]] = or <32 x i16> [[TMP14]], [[TMP4]]5138; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP10]], <32 x i16> [[TMP15]], <32 x i16> [[TMP12]]5139; CHECK-NEXT: [[TMP16:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[TMP9]], <32 x i16> [[X3]]5140; CHECK-NEXT: [[TMP17:%.*]] = bitcast <64 x i8> [[TMP1]] to i5125141; CHECK-NEXT: [[_MSCMP3:%.*]] = icmp ne i512 [[TMP17]], 05142; CHECK-NEXT: [[TMP18:%.*]] = bitcast <64 x i8> [[TMP2]] to i5125143; CHECK-NEXT: [[_MSCMP4:%.*]] = icmp ne i512 [[TMP18]], 05144; CHECK-NEXT: [[_MSOR5:%.*]] = or i1 [[_MSCMP3]], [[_MSCMP4]]5145; CHECK-NEXT: br i1 [[_MSOR5]], label [[TMP19:%.*]], label [[TMP20:%.*]], !prof [[PROF1]]5146; CHECK: 19:5147; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]5148; CHECK-NEXT: unreachable5149; CHECK: 20:5150; CHECK-NEXT: [[TMP21:%.*]] = call <32 x i16> @llvm.x86.avx512.dbpsadbw.512(<64 x i8> [[X0]], <64 x i8> [[X1]], i32 3)5151; CHECK-NEXT: [[TMP22:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>5152; CHECK-NEXT: [[TMP23:%.*]] = bitcast i32 [[X4]] to <32 x i1>5153; CHECK-NEXT: [[TMP24:%.*]] = select <32 x i1> [[TMP23]], <32 x i16> zeroinitializer, <32 x i16> zeroinitializer5154; CHECK-NEXT: [[TMP25:%.*]] = xor <32 x i16> [[TMP21]], zeroinitializer5155; CHECK-NEXT: [[TMP26:%.*]] = or <32 x i16> [[TMP25]], zeroinitializer5156; CHECK-NEXT: [[TMP27:%.*]] = or <32 x i16> [[TMP26]], zeroinitializer5157; CHECK-NEXT: [[_MSPROP_SELECT1:%.*]] = select <32 x i1> [[TMP22]], <32 x i16> [[TMP27]], <32 x i16> [[TMP24]]5158; CHECK-NEXT: [[TMP28:%.*]] = select <32 x i1> [[TMP23]], <32 x i16> [[TMP21]], <32 x i16> zeroinitializer5159; CHECK-NEXT: [[TMP29:%.*]] = bitcast <64 x i8> [[TMP1]] to i5125160; CHECK-NEXT: [[_MSCMP6:%.*]] = icmp ne i512 [[TMP29]], 05161; CHECK-NEXT: [[TMP30:%.*]] = bitcast <64 x i8> [[TMP2]] to i5125162; CHECK-NEXT: [[_MSCMP7:%.*]] = icmp ne i512 [[TMP30]], 05163; CHECK-NEXT: [[_MSOR8:%.*]] = or i1 [[_MSCMP6]], [[_MSCMP7]]5164; CHECK-NEXT: br i1 [[_MSOR8]], label [[TMP31:%.*]], label [[TMP32:%.*]], !prof [[PROF1]]5165; CHECK: 31:5166; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]5167; CHECK-NEXT: unreachable5168; CHECK: 32:5169; CHECK-NEXT: [[TMP33:%.*]] = call <32 x i16> @llvm.x86.avx512.dbpsadbw.512(<64 x i8> [[X0]], <64 x i8> [[X1]], i32 4)5170; CHECK-NEXT: [[TMP34:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } { <32 x i16> splat (i16 -1), <32 x i16> splat (i16 -1), <32 x i16> splat (i16 -1) }, <32 x i16> [[_MSPROP_SELECT]], 05171; CHECK-NEXT: [[RES3:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } poison, <32 x i16> [[TMP16]], 05172; CHECK-NEXT: [[TMP35:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[TMP34]], <32 x i16> [[_MSPROP_SELECT1]], 15173; CHECK-NEXT: [[RES4:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[RES3]], <32 x i16> [[TMP28]], 15174; CHECK-NEXT: [[TMP36:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[TMP35]], <32 x i16> zeroinitializer, 25175; CHECK-NEXT: [[RES5:%.*]] = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } [[RES4]], <32 x i16> [[TMP33]], 25176; CHECK-NEXT: store { <32 x i16>, <32 x i16>, <32 x i16> } [[TMP36]], ptr @__msan_retval_tls, align 85177; CHECK-NEXT: ret { <32 x i16>, <32 x i16>, <32 x i16> } [[RES5]]5178;5179 %res = call <32 x i16> @llvm.x86.avx512.mask.dbpsadbw.512(<64 x i8> %x0, <64 x i8> %x1, i32 2, <32 x i16> %x3, i32 %x4)5180 %res1 = call <32 x i16> @llvm.x86.avx512.mask.dbpsadbw.512(<64 x i8> %x0, <64 x i8> %x1, i32 3, <32 x i16> zeroinitializer, i32 %x4)5181 %res2 = call <32 x i16> @llvm.x86.avx512.mask.dbpsadbw.512(<64 x i8> %x0, <64 x i8> %x1, i32 4, <32 x i16> %x3, i32 -1)5182 %res3 = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } poison, <32 x i16> %res, 05183 %res4 = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } %res3, <32 x i16> %res1, 15184 %res5 = insertvalue { <32 x i16>, <32 x i16>, <32 x i16> } %res4, <32 x i16> %res2, 25185 ret { <32 x i16>, <32 x i16>, <32 x i16> } %res55186}5187 5188define <32 x i16> @test_mask_adds_epu16_rr_512(<32 x i16> %a, <32 x i16> %b) nounwind #0 {5189; CHECK-LABEL: @test_mask_adds_epu16_rr_512(5190; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 85191; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85192; CHECK-NEXT: call void @llvm.donothing()5193; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]5194; CHECK-NEXT: [[TMP3:%.*]] = call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B:%.*]])5195; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 85196; CHECK-NEXT: ret <32 x i16> [[TMP3]]5197;5198 %res = call <32 x i16> @llvm.x86.avx512.mask.paddus.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> zeroinitializer, i32 -1)5199 ret <32 x i16> %res5200}5201 5202define <32 x i16> @test_mask_adds_epu16_rrk_512(<32 x i16> %a, <32 x i16> %b, <32 x i16> %passThru, i32 %mask) nounwind #0 {5203; CHECK-LABEL: @test_mask_adds_epu16_rrk_512(5204; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 85205; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85206; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 85207; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 85208; CHECK-NEXT: call void @llvm.donothing()5209; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]5210; CHECK-NEXT: [[TMP5:%.*]] = call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B:%.*]])5211; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>5212; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>5213; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]5214; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i16> [[TMP5]], [[PASSTHRU:%.*]]5215; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[_MSPROP]]5216; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP4]]5217; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP11]], <32 x i16> [[TMP8]]5218; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP5]], <32 x i16> [[PASSTHRU]]5219; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85220; CHECK-NEXT: ret <32 x i16> [[TMP12]]5221;5222 %res = call <32 x i16> @llvm.x86.avx512.mask.paddus.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> %passThru, i32 %mask)5223 ret <32 x i16> %res5224}5225 5226define <32 x i16> @test_mask_adds_epu16_rrkz_512(<32 x i16> %a, <32 x i16> %b, i32 %mask) nounwind #0 {5227; CHECK-LABEL: @test_mask_adds_epu16_rrkz_512(5228; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 85229; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85230; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 85231; CHECK-NEXT: call void @llvm.donothing()5232; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]5233; CHECK-NEXT: [[TMP4:%.*]] = call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B:%.*]])5234; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>5235; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>5236; CHECK-NEXT: [[TMP7:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[_MSPROP]], <32 x i16> zeroinitializer5237; CHECK-NEXT: [[TMP8:%.*]] = xor <32 x i16> [[TMP4]], zeroinitializer5238; CHECK-NEXT: [[TMP9:%.*]] = or <32 x i16> [[TMP8]], [[_MSPROP]]5239; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], zeroinitializer5240; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP5]], <32 x i16> [[TMP10]], <32 x i16> [[TMP7]]5241; CHECK-NEXT: [[TMP11:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP4]], <32 x i16> zeroinitializer5242; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85243; CHECK-NEXT: ret <32 x i16> [[TMP11]]5244;5245 %res = call <32 x i16> @llvm.x86.avx512.mask.paddus.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> zeroinitializer, i32 %mask)5246 ret <32 x i16> %res5247}5248 5249define <32 x i16> @test_mask_adds_epu16_rm_512(<32 x i16> %a, ptr %ptr_b) nounwind #0 {5250; CHECK-LABEL: @test_mask_adds_epu16_rm_512(5251; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85252; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 85253; CHECK-NEXT: call void @llvm.donothing()5254; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 05255; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]5256; CHECK: 3:5257; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]5258; CHECK-NEXT: unreachable5259; CHECK: 4:5260; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 645261; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i645262; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220805263; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr5264; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP7]], align 645265; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP2]], [[_MSLD]]5266; CHECK-NEXT: [[TMP8:%.*]] = call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B]])5267; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 85268; CHECK-NEXT: ret <32 x i16> [[TMP8]]5269;5270 %b = load <32 x i16>, ptr %ptr_b5271 %res = call <32 x i16> @llvm.x86.avx512.mask.paddus.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> zeroinitializer, i32 -1)5272 ret <32 x i16> %res5273}5274 5275define <32 x i16> @test_mask_adds_epu16_rmk_512(<32 x i16> %a, ptr %ptr_b, <32 x i16> %passThru, i32 %mask) nounwind #0 {5276; CHECK-LABEL: @test_mask_adds_epu16_rmk_512(5277; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85278; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 85279; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 85280; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 85281; CHECK-NEXT: call void @llvm.donothing()5282; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 05283; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]5284; CHECK: 5:5285; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]5286; CHECK-NEXT: unreachable5287; CHECK: 6:5288; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 645289; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i645290; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220805291; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr5292; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP9]], align 645293; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP2]], [[_MSLD]]5294; CHECK-NEXT: [[TMP10:%.*]] = call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B]])5295; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>5296; CHECK-NEXT: [[TMP12:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>5297; CHECK-NEXT: [[TMP13:%.*]] = select <32 x i1> [[TMP12]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]5298; CHECK-NEXT: [[TMP14:%.*]] = xor <32 x i16> [[TMP10]], [[PASSTHRU:%.*]]5299; CHECK-NEXT: [[TMP15:%.*]] = or <32 x i16> [[TMP14]], [[_MSPROP]]5300; CHECK-NEXT: [[TMP16:%.*]] = or <32 x i16> [[TMP15]], [[TMP4]]5301; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[TMP16]], <32 x i16> [[TMP13]]5302; CHECK-NEXT: [[TMP17:%.*]] = select <32 x i1> [[TMP12]], <32 x i16> [[TMP10]], <32 x i16> [[PASSTHRU]]5303; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85304; CHECK-NEXT: ret <32 x i16> [[TMP17]]5305;5306 %b = load <32 x i16>, ptr %ptr_b5307 %res = call <32 x i16> @llvm.x86.avx512.mask.paddus.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> %passThru, i32 %mask)5308 ret <32 x i16> %res5309}5310 5311define <32 x i16> @test_mask_adds_epu16_rmkz_512(<32 x i16> %a, ptr %ptr_b, i32 %mask) nounwind #0 {5312; CHECK-LABEL: @test_mask_adds_epu16_rmkz_512(5313; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85314; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 85315; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 85316; CHECK-NEXT: call void @llvm.donothing()5317; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 05318; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]5319; CHECK: 4:5320; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]5321; CHECK-NEXT: unreachable5322; CHECK: 5:5323; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 645324; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i645325; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220805326; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr5327; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP8]], align 645328; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP2]], [[_MSLD]]5329; CHECK-NEXT: [[TMP9:%.*]] = call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B]])5330; CHECK-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>5331; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>5332; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[_MSPROP]], <32 x i16> zeroinitializer5333; CHECK-NEXT: [[TMP13:%.*]] = xor <32 x i16> [[TMP9]], zeroinitializer5334; CHECK-NEXT: [[TMP14:%.*]] = or <32 x i16> [[TMP13]], [[_MSPROP]]5335; CHECK-NEXT: [[TMP15:%.*]] = or <32 x i16> [[TMP14]], zeroinitializer5336; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP10]], <32 x i16> [[TMP15]], <32 x i16> [[TMP12]]5337; CHECK-NEXT: [[TMP16:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[TMP9]], <32 x i16> zeroinitializer5338; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85339; CHECK-NEXT: ret <32 x i16> [[TMP16]]5340;5341 %b = load <32 x i16>, ptr %ptr_b5342 %res = call <32 x i16> @llvm.x86.avx512.mask.paddus.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> zeroinitializer, i32 %mask)5343 ret <32 x i16> %res5344}5345 5346declare <32 x i16> @llvm.x86.avx512.mask.paddus.w.512(<32 x i16>, <32 x i16>, <32 x i16>, i32)5347 5348define <32 x i16> @test_mask_subs_epu16_rr_512(<32 x i16> %a, <32 x i16> %b) nounwind #0 {5349; CHECK-LABEL: @test_mask_subs_epu16_rr_512(5350; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 85351; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85352; CHECK-NEXT: call void @llvm.donothing()5353; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]5354; CHECK-NEXT: [[TMP3:%.*]] = call <32 x i16> @llvm.usub.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B:%.*]])5355; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 85356; CHECK-NEXT: ret <32 x i16> [[TMP3]]5357;5358 %res = call <32 x i16> @llvm.x86.avx512.mask.psubus.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> zeroinitializer, i32 -1)5359 ret <32 x i16> %res5360}5361 5362define <32 x i16> @test_mask_subs_epu16_rrk_512(<32 x i16> %a, <32 x i16> %b, <32 x i16> %passThru, i32 %mask) nounwind #0 {5363; CHECK-LABEL: @test_mask_subs_epu16_rrk_512(5364; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 85365; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85366; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 85367; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 85368; CHECK-NEXT: call void @llvm.donothing()5369; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]5370; CHECK-NEXT: [[TMP5:%.*]] = call <32 x i16> @llvm.usub.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B:%.*]])5371; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>5372; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>5373; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]5374; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i16> [[TMP5]], [[PASSTHRU:%.*]]5375; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[_MSPROP]]5376; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP4]]5377; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP11]], <32 x i16> [[TMP8]]5378; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP5]], <32 x i16> [[PASSTHRU]]5379; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85380; CHECK-NEXT: ret <32 x i16> [[TMP12]]5381;5382 %res = call <32 x i16> @llvm.x86.avx512.mask.psubus.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> %passThru, i32 %mask)5383 ret <32 x i16> %res5384}5385 5386define <32 x i16> @test_mask_subs_epu16_rrkz_512(<32 x i16> %a, <32 x i16> %b, i32 %mask) nounwind #0 {5387; CHECK-LABEL: @test_mask_subs_epu16_rrkz_512(5388; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 85389; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85390; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 85391; CHECK-NEXT: call void @llvm.donothing()5392; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]5393; CHECK-NEXT: [[TMP4:%.*]] = call <32 x i16> @llvm.usub.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B:%.*]])5394; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>5395; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>5396; CHECK-NEXT: [[TMP7:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[_MSPROP]], <32 x i16> zeroinitializer5397; CHECK-NEXT: [[TMP8:%.*]] = xor <32 x i16> [[TMP4]], zeroinitializer5398; CHECK-NEXT: [[TMP9:%.*]] = or <32 x i16> [[TMP8]], [[_MSPROP]]5399; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], zeroinitializer5400; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP5]], <32 x i16> [[TMP10]], <32 x i16> [[TMP7]]5401; CHECK-NEXT: [[TMP11:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP4]], <32 x i16> zeroinitializer5402; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85403; CHECK-NEXT: ret <32 x i16> [[TMP11]]5404;5405 %res = call <32 x i16> @llvm.x86.avx512.mask.psubus.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> zeroinitializer, i32 %mask)5406 ret <32 x i16> %res5407}5408 5409define <32 x i16> @test_mask_subs_epu16_rm_512(<32 x i16> %a, ptr %ptr_b) nounwind #0 {5410; CHECK-LABEL: @test_mask_subs_epu16_rm_512(5411; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85412; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 85413; CHECK-NEXT: call void @llvm.donothing()5414; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 05415; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]5416; CHECK: 3:5417; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]5418; CHECK-NEXT: unreachable5419; CHECK: 4:5420; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 645421; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i645422; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220805423; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr5424; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP7]], align 645425; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP2]], [[_MSLD]]5426; CHECK-NEXT: [[TMP8:%.*]] = call <32 x i16> @llvm.usub.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B]])5427; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 85428; CHECK-NEXT: ret <32 x i16> [[TMP8]]5429;5430 %b = load <32 x i16>, ptr %ptr_b5431 %res = call <32 x i16> @llvm.x86.avx512.mask.psubus.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> zeroinitializer, i32 -1)5432 ret <32 x i16> %res5433}5434 5435define <32 x i16> @test_mask_subs_epu16_rmk_512(<32 x i16> %a, ptr %ptr_b, <32 x i16> %passThru, i32 %mask) nounwind #0 {5436; CHECK-LABEL: @test_mask_subs_epu16_rmk_512(5437; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85438; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 85439; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 85440; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 85441; CHECK-NEXT: call void @llvm.donothing()5442; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 05443; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]5444; CHECK: 5:5445; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]5446; CHECK-NEXT: unreachable5447; CHECK: 6:5448; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 645449; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i645450; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220805451; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr5452; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP9]], align 645453; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP2]], [[_MSLD]]5454; CHECK-NEXT: [[TMP10:%.*]] = call <32 x i16> @llvm.usub.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B]])5455; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>5456; CHECK-NEXT: [[TMP12:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>5457; CHECK-NEXT: [[TMP13:%.*]] = select <32 x i1> [[TMP12]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]5458; CHECK-NEXT: [[TMP14:%.*]] = xor <32 x i16> [[TMP10]], [[PASSTHRU:%.*]]5459; CHECK-NEXT: [[TMP15:%.*]] = or <32 x i16> [[TMP14]], [[_MSPROP]]5460; CHECK-NEXT: [[TMP16:%.*]] = or <32 x i16> [[TMP15]], [[TMP4]]5461; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[TMP16]], <32 x i16> [[TMP13]]5462; CHECK-NEXT: [[TMP17:%.*]] = select <32 x i1> [[TMP12]], <32 x i16> [[TMP10]], <32 x i16> [[PASSTHRU]]5463; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85464; CHECK-NEXT: ret <32 x i16> [[TMP17]]5465;5466 %b = load <32 x i16>, ptr %ptr_b5467 %res = call <32 x i16> @llvm.x86.avx512.mask.psubus.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> %passThru, i32 %mask)5468 ret <32 x i16> %res5469}5470 5471define <32 x i16> @test_mask_subs_epu16_rmkz_512(<32 x i16> %a, ptr %ptr_b, i32 %mask) nounwind #0 {5472; CHECK-LABEL: @test_mask_subs_epu16_rmkz_512(5473; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85474; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 85475; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 85476; CHECK-NEXT: call void @llvm.donothing()5477; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 05478; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]5479; CHECK: 4:5480; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]5481; CHECK-NEXT: unreachable5482; CHECK: 5:5483; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 645484; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i645485; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220805486; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr5487; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP8]], align 645488; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP2]], [[_MSLD]]5489; CHECK-NEXT: [[TMP9:%.*]] = call <32 x i16> @llvm.usub.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B]])5490; CHECK-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>5491; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>5492; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[_MSPROP]], <32 x i16> zeroinitializer5493; CHECK-NEXT: [[TMP13:%.*]] = xor <32 x i16> [[TMP9]], zeroinitializer5494; CHECK-NEXT: [[TMP14:%.*]] = or <32 x i16> [[TMP13]], [[_MSPROP]]5495; CHECK-NEXT: [[TMP15:%.*]] = or <32 x i16> [[TMP14]], zeroinitializer5496; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP10]], <32 x i16> [[TMP15]], <32 x i16> [[TMP12]]5497; CHECK-NEXT: [[TMP16:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[TMP9]], <32 x i16> zeroinitializer5498; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85499; CHECK-NEXT: ret <32 x i16> [[TMP16]]5500;5501 %b = load <32 x i16>, ptr %ptr_b5502 %res = call <32 x i16> @llvm.x86.avx512.mask.psubus.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> zeroinitializer, i32 %mask)5503 ret <32 x i16> %res5504}5505 5506declare <32 x i16> @llvm.x86.avx512.mask.psubus.w.512(<32 x i16>, <32 x i16>, <32 x i16>, i32)5507 5508define <64 x i8> @test_mask_adds_epu8_rr_512(<64 x i8> %a, <64 x i8> %b) nounwind #0 {5509; CHECK-LABEL: @test_mask_adds_epu8_rr_512(5510; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 85511; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85512; CHECK-NEXT: call void @llvm.donothing()5513; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]5514; CHECK-NEXT: [[TMP3:%.*]] = call <64 x i8> @llvm.uadd.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B:%.*]])5515; CHECK-NEXT: store <64 x i8> [[_MSPROP]], ptr @__msan_retval_tls, align 85516; CHECK-NEXT: ret <64 x i8> [[TMP3]]5517;5518 %res = call <64 x i8> @llvm.x86.avx512.mask.paddus.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> zeroinitializer, i64 -1)5519 ret <64 x i8> %res5520}5521 5522define <64 x i8> @test_mask_adds_epu8_rrk_512(<64 x i8> %a, <64 x i8> %b, <64 x i8> %passThru, i64 %mask) nounwind #0 {5523; CHECK-LABEL: @test_mask_adds_epu8_rrk_512(5524; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 85525; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85526; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 85527; CHECK-NEXT: [[TMP4:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 85528; CHECK-NEXT: call void @llvm.donothing()5529; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]5530; CHECK-NEXT: [[TMP5:%.*]] = call <64 x i8> @llvm.uadd.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B:%.*]])5531; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>5532; CHECK-NEXT: [[TMP7:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>5533; CHECK-NEXT: [[TMP8:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[_MSPROP]], <64 x i8> [[TMP4]]5534; CHECK-NEXT: [[TMP9:%.*]] = xor <64 x i8> [[TMP5]], [[PASSTHRU:%.*]]5535; CHECK-NEXT: [[TMP10:%.*]] = or <64 x i8> [[TMP9]], [[_MSPROP]]5536; CHECK-NEXT: [[TMP11:%.*]] = or <64 x i8> [[TMP10]], [[TMP4]]5537; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[TMP11]], <64 x i8> [[TMP8]]5538; CHECK-NEXT: [[TMP12:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[TMP5]], <64 x i8> [[PASSTHRU]]5539; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85540; CHECK-NEXT: ret <64 x i8> [[TMP12]]5541;5542 %res = call <64 x i8> @llvm.x86.avx512.mask.paddus.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> %passThru, i64 %mask)5543 ret <64 x i8> %res5544}5545 5546define <64 x i8> @test_mask_adds_epu8_rrkz_512(<64 x i8> %a, <64 x i8> %b, i64 %mask) nounwind #0 {5547; CHECK-LABEL: @test_mask_adds_epu8_rrkz_512(5548; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 85549; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85550; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 85551; CHECK-NEXT: call void @llvm.donothing()5552; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]5553; CHECK-NEXT: [[TMP4:%.*]] = call <64 x i8> @llvm.uadd.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B:%.*]])5554; CHECK-NEXT: [[TMP5:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>5555; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>5556; CHECK-NEXT: [[TMP7:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[_MSPROP]], <64 x i8> zeroinitializer5557; CHECK-NEXT: [[TMP8:%.*]] = xor <64 x i8> [[TMP4]], zeroinitializer5558; CHECK-NEXT: [[TMP9:%.*]] = or <64 x i8> [[TMP8]], [[_MSPROP]]5559; CHECK-NEXT: [[TMP10:%.*]] = or <64 x i8> [[TMP9]], zeroinitializer5560; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP5]], <64 x i8> [[TMP10]], <64 x i8> [[TMP7]]5561; CHECK-NEXT: [[TMP11:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[TMP4]], <64 x i8> zeroinitializer5562; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85563; CHECK-NEXT: ret <64 x i8> [[TMP11]]5564;5565 %res = call <64 x i8> @llvm.x86.avx512.mask.paddus.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> zeroinitializer, i64 %mask)5566 ret <64 x i8> %res5567}5568 5569define <64 x i8> @test_mask_adds_epu8_rm_512(<64 x i8> %a, ptr %ptr_b) nounwind #0 {5570; CHECK-LABEL: @test_mask_adds_epu8_rm_512(5571; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85572; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 85573; CHECK-NEXT: call void @llvm.donothing()5574; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 05575; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]5576; CHECK: 3:5577; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]5578; CHECK-NEXT: unreachable5579; CHECK: 4:5580; CHECK-NEXT: [[B:%.*]] = load <64 x i8>, ptr [[PTR_B:%.*]], align 645581; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i645582; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220805583; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr5584; CHECK-NEXT: [[_MSLD:%.*]] = load <64 x i8>, ptr [[TMP7]], align 645585; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP2]], [[_MSLD]]5586; CHECK-NEXT: [[TMP8:%.*]] = call <64 x i8> @llvm.uadd.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B]])5587; CHECK-NEXT: store <64 x i8> [[_MSPROP]], ptr @__msan_retval_tls, align 85588; CHECK-NEXT: ret <64 x i8> [[TMP8]]5589;5590 %b = load <64 x i8>, ptr %ptr_b5591 %res = call <64 x i8> @llvm.x86.avx512.mask.paddus.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> zeroinitializer, i64 -1)5592 ret <64 x i8> %res5593}5594 5595define <64 x i8> @test_mask_adds_epu8_rmk_512(<64 x i8> %a, ptr %ptr_b, <64 x i8> %passThru, i64 %mask) nounwind #0 {5596; CHECK-LABEL: @test_mask_adds_epu8_rmk_512(5597; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85598; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 85599; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 85600; CHECK-NEXT: [[TMP4:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 85601; CHECK-NEXT: call void @llvm.donothing()5602; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 05603; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]5604; CHECK: 5:5605; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]5606; CHECK-NEXT: unreachable5607; CHECK: 6:5608; CHECK-NEXT: [[B:%.*]] = load <64 x i8>, ptr [[PTR_B:%.*]], align 645609; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i645610; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220805611; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr5612; CHECK-NEXT: [[_MSLD:%.*]] = load <64 x i8>, ptr [[TMP9]], align 645613; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP2]], [[_MSLD]]5614; CHECK-NEXT: [[TMP10:%.*]] = call <64 x i8> @llvm.uadd.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B]])5615; CHECK-NEXT: [[TMP11:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>5616; CHECK-NEXT: [[TMP12:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>5617; CHECK-NEXT: [[TMP13:%.*]] = select <64 x i1> [[TMP12]], <64 x i8> [[_MSPROP]], <64 x i8> [[TMP4]]5618; CHECK-NEXT: [[TMP14:%.*]] = xor <64 x i8> [[TMP10]], [[PASSTHRU:%.*]]5619; CHECK-NEXT: [[TMP15:%.*]] = or <64 x i8> [[TMP14]], [[_MSPROP]]5620; CHECK-NEXT: [[TMP16:%.*]] = or <64 x i8> [[TMP15]], [[TMP4]]5621; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP11]], <64 x i8> [[TMP16]], <64 x i8> [[TMP13]]5622; CHECK-NEXT: [[TMP17:%.*]] = select <64 x i1> [[TMP12]], <64 x i8> [[TMP10]], <64 x i8> [[PASSTHRU]]5623; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85624; CHECK-NEXT: ret <64 x i8> [[TMP17]]5625;5626 %b = load <64 x i8>, ptr %ptr_b5627 %res = call <64 x i8> @llvm.x86.avx512.mask.paddus.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> %passThru, i64 %mask)5628 ret <64 x i8> %res5629}5630 5631define <64 x i8> @test_mask_adds_epu8_rmkz_512(<64 x i8> %a, ptr %ptr_b, i64 %mask) nounwind #0 {5632; CHECK-LABEL: @test_mask_adds_epu8_rmkz_512(5633; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85634; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 85635; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 85636; CHECK-NEXT: call void @llvm.donothing()5637; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 05638; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]5639; CHECK: 4:5640; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]5641; CHECK-NEXT: unreachable5642; CHECK: 5:5643; CHECK-NEXT: [[B:%.*]] = load <64 x i8>, ptr [[PTR_B:%.*]], align 645644; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i645645; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220805646; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr5647; CHECK-NEXT: [[_MSLD:%.*]] = load <64 x i8>, ptr [[TMP8]], align 645648; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP2]], [[_MSLD]]5649; CHECK-NEXT: [[TMP9:%.*]] = call <64 x i8> @llvm.uadd.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B]])5650; CHECK-NEXT: [[TMP10:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>5651; CHECK-NEXT: [[TMP11:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>5652; CHECK-NEXT: [[TMP12:%.*]] = select <64 x i1> [[TMP11]], <64 x i8> [[_MSPROP]], <64 x i8> zeroinitializer5653; CHECK-NEXT: [[TMP13:%.*]] = xor <64 x i8> [[TMP9]], zeroinitializer5654; CHECK-NEXT: [[TMP14:%.*]] = or <64 x i8> [[TMP13]], [[_MSPROP]]5655; CHECK-NEXT: [[TMP15:%.*]] = or <64 x i8> [[TMP14]], zeroinitializer5656; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP10]], <64 x i8> [[TMP15]], <64 x i8> [[TMP12]]5657; CHECK-NEXT: [[TMP16:%.*]] = select <64 x i1> [[TMP11]], <64 x i8> [[TMP9]], <64 x i8> zeroinitializer5658; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85659; CHECK-NEXT: ret <64 x i8> [[TMP16]]5660;5661 %b = load <64 x i8>, ptr %ptr_b5662 %res = call <64 x i8> @llvm.x86.avx512.mask.paddus.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> zeroinitializer, i64 %mask)5663 ret <64 x i8> %res5664}5665 5666declare <64 x i8> @llvm.x86.avx512.mask.paddus.b.512(<64 x i8>, <64 x i8>, <64 x i8>, i64)5667 5668define <64 x i8> @test_mask_subs_epu8_rr_512(<64 x i8> %a, <64 x i8> %b) nounwind #0 {5669; CHECK-LABEL: @test_mask_subs_epu8_rr_512(5670; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 85671; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85672; CHECK-NEXT: call void @llvm.donothing()5673; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]5674; CHECK-NEXT: [[TMP3:%.*]] = call <64 x i8> @llvm.usub.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B:%.*]])5675; CHECK-NEXT: store <64 x i8> [[_MSPROP]], ptr @__msan_retval_tls, align 85676; CHECK-NEXT: ret <64 x i8> [[TMP3]]5677;5678 %res = call <64 x i8> @llvm.x86.avx512.mask.psubus.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> zeroinitializer, i64 -1)5679 ret <64 x i8> %res5680}5681 5682define <64 x i8> @test_mask_subs_epu8_rrk_512(<64 x i8> %a, <64 x i8> %b, <64 x i8> %passThru, i64 %mask) nounwind #0 {5683; CHECK-LABEL: @test_mask_subs_epu8_rrk_512(5684; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 85685; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85686; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 85687; CHECK-NEXT: [[TMP4:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 85688; CHECK-NEXT: call void @llvm.donothing()5689; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]5690; CHECK-NEXT: [[TMP5:%.*]] = call <64 x i8> @llvm.usub.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B:%.*]])5691; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>5692; CHECK-NEXT: [[TMP7:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>5693; CHECK-NEXT: [[TMP8:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[_MSPROP]], <64 x i8> [[TMP4]]5694; CHECK-NEXT: [[TMP9:%.*]] = xor <64 x i8> [[TMP5]], [[PASSTHRU:%.*]]5695; CHECK-NEXT: [[TMP10:%.*]] = or <64 x i8> [[TMP9]], [[_MSPROP]]5696; CHECK-NEXT: [[TMP11:%.*]] = or <64 x i8> [[TMP10]], [[TMP4]]5697; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[TMP11]], <64 x i8> [[TMP8]]5698; CHECK-NEXT: [[TMP12:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[TMP5]], <64 x i8> [[PASSTHRU]]5699; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85700; CHECK-NEXT: ret <64 x i8> [[TMP12]]5701;5702 %res = call <64 x i8> @llvm.x86.avx512.mask.psubus.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> %passThru, i64 %mask)5703 ret <64 x i8> %res5704}5705 5706define <64 x i8> @test_mask_subs_epu8_rrkz_512(<64 x i8> %a, <64 x i8> %b, i64 %mask) nounwind #0 {5707; CHECK-LABEL: @test_mask_subs_epu8_rrkz_512(5708; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 85709; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85710; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 85711; CHECK-NEXT: call void @llvm.donothing()5712; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]5713; CHECK-NEXT: [[TMP4:%.*]] = call <64 x i8> @llvm.usub.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B:%.*]])5714; CHECK-NEXT: [[TMP5:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>5715; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>5716; CHECK-NEXT: [[TMP7:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[_MSPROP]], <64 x i8> zeroinitializer5717; CHECK-NEXT: [[TMP8:%.*]] = xor <64 x i8> [[TMP4]], zeroinitializer5718; CHECK-NEXT: [[TMP9:%.*]] = or <64 x i8> [[TMP8]], [[_MSPROP]]5719; CHECK-NEXT: [[TMP10:%.*]] = or <64 x i8> [[TMP9]], zeroinitializer5720; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP5]], <64 x i8> [[TMP10]], <64 x i8> [[TMP7]]5721; CHECK-NEXT: [[TMP11:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[TMP4]], <64 x i8> zeroinitializer5722; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85723; CHECK-NEXT: ret <64 x i8> [[TMP11]]5724;5725 %res = call <64 x i8> @llvm.x86.avx512.mask.psubus.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> zeroinitializer, i64 %mask)5726 ret <64 x i8> %res5727}5728 5729define <64 x i8> @test_mask_subs_epu8_rm_512(<64 x i8> %a, ptr %ptr_b) nounwind #0 {5730; CHECK-LABEL: @test_mask_subs_epu8_rm_512(5731; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85732; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 85733; CHECK-NEXT: call void @llvm.donothing()5734; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 05735; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]5736; CHECK: 3:5737; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]5738; CHECK-NEXT: unreachable5739; CHECK: 4:5740; CHECK-NEXT: [[B:%.*]] = load <64 x i8>, ptr [[PTR_B:%.*]], align 645741; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i645742; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220805743; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr5744; CHECK-NEXT: [[_MSLD:%.*]] = load <64 x i8>, ptr [[TMP7]], align 645745; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP2]], [[_MSLD]]5746; CHECK-NEXT: [[TMP8:%.*]] = call <64 x i8> @llvm.usub.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B]])5747; CHECK-NEXT: store <64 x i8> [[_MSPROP]], ptr @__msan_retval_tls, align 85748; CHECK-NEXT: ret <64 x i8> [[TMP8]]5749;5750 %b = load <64 x i8>, ptr %ptr_b5751 %res = call <64 x i8> @llvm.x86.avx512.mask.psubus.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> zeroinitializer, i64 -1)5752 ret <64 x i8> %res5753}5754 5755define <64 x i8> @test_mask_subs_epu8_rmk_512(<64 x i8> %a, ptr %ptr_b, <64 x i8> %passThru, i64 %mask) nounwind #0 {5756; CHECK-LABEL: @test_mask_subs_epu8_rmk_512(5757; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85758; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 85759; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 85760; CHECK-NEXT: [[TMP4:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 85761; CHECK-NEXT: call void @llvm.donothing()5762; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 05763; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]5764; CHECK: 5:5765; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]5766; CHECK-NEXT: unreachable5767; CHECK: 6:5768; CHECK-NEXT: [[B:%.*]] = load <64 x i8>, ptr [[PTR_B:%.*]], align 645769; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i645770; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220805771; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr5772; CHECK-NEXT: [[_MSLD:%.*]] = load <64 x i8>, ptr [[TMP9]], align 645773; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP2]], [[_MSLD]]5774; CHECK-NEXT: [[TMP10:%.*]] = call <64 x i8> @llvm.usub.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B]])5775; CHECK-NEXT: [[TMP11:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>5776; CHECK-NEXT: [[TMP12:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>5777; CHECK-NEXT: [[TMP13:%.*]] = select <64 x i1> [[TMP12]], <64 x i8> [[_MSPROP]], <64 x i8> [[TMP4]]5778; CHECK-NEXT: [[TMP14:%.*]] = xor <64 x i8> [[TMP10]], [[PASSTHRU:%.*]]5779; CHECK-NEXT: [[TMP15:%.*]] = or <64 x i8> [[TMP14]], [[_MSPROP]]5780; CHECK-NEXT: [[TMP16:%.*]] = or <64 x i8> [[TMP15]], [[TMP4]]5781; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP11]], <64 x i8> [[TMP16]], <64 x i8> [[TMP13]]5782; CHECK-NEXT: [[TMP17:%.*]] = select <64 x i1> [[TMP12]], <64 x i8> [[TMP10]], <64 x i8> [[PASSTHRU]]5783; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85784; CHECK-NEXT: ret <64 x i8> [[TMP17]]5785;5786 %b = load <64 x i8>, ptr %ptr_b5787 %res = call <64 x i8> @llvm.x86.avx512.mask.psubus.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> %passThru, i64 %mask)5788 ret <64 x i8> %res5789}5790 5791define <64 x i8> @test_mask_subs_epu8_rmkz_512(<64 x i8> %a, ptr %ptr_b, i64 %mask) nounwind #0 {5792; CHECK-LABEL: @test_mask_subs_epu8_rmkz_512(5793; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85794; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 85795; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 85796; CHECK-NEXT: call void @llvm.donothing()5797; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 05798; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]5799; CHECK: 4:5800; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]5801; CHECK-NEXT: unreachable5802; CHECK: 5:5803; CHECK-NEXT: [[B:%.*]] = load <64 x i8>, ptr [[PTR_B:%.*]], align 645804; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i645805; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220805806; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr5807; CHECK-NEXT: [[_MSLD:%.*]] = load <64 x i8>, ptr [[TMP8]], align 645808; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP2]], [[_MSLD]]5809; CHECK-NEXT: [[TMP9:%.*]] = call <64 x i8> @llvm.usub.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B]])5810; CHECK-NEXT: [[TMP10:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>5811; CHECK-NEXT: [[TMP11:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>5812; CHECK-NEXT: [[TMP12:%.*]] = select <64 x i1> [[TMP11]], <64 x i8> [[_MSPROP]], <64 x i8> zeroinitializer5813; CHECK-NEXT: [[TMP13:%.*]] = xor <64 x i8> [[TMP9]], zeroinitializer5814; CHECK-NEXT: [[TMP14:%.*]] = or <64 x i8> [[TMP13]], [[_MSPROP]]5815; CHECK-NEXT: [[TMP15:%.*]] = or <64 x i8> [[TMP14]], zeroinitializer5816; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP10]], <64 x i8> [[TMP15]], <64 x i8> [[TMP12]]5817; CHECK-NEXT: [[TMP16:%.*]] = select <64 x i1> [[TMP11]], <64 x i8> [[TMP9]], <64 x i8> zeroinitializer5818; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85819; CHECK-NEXT: ret <64 x i8> [[TMP16]]5820;5821 %b = load <64 x i8>, ptr %ptr_b5822 %res = call <64 x i8> @llvm.x86.avx512.mask.psubus.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> zeroinitializer, i64 %mask)5823 ret <64 x i8> %res5824}5825 5826declare <64 x i8> @llvm.x86.avx512.mask.psubus.b.512(<64 x i8>, <64 x i8>, <64 x i8>, i64)5827 5828define <32 x i16> @test_adds_epi16_rr_512(<32 x i16> %a, <32 x i16> %b) nounwind #0 {5829; CHECK-LABEL: @test_adds_epi16_rr_512(5830; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 85831; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85832; CHECK-NEXT: call void @llvm.donothing()5833; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]5834; CHECK-NEXT: [[TMP3:%.*]] = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B:%.*]])5835; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 85836; CHECK-NEXT: ret <32 x i16> [[TMP3]]5837;5838 %1 = call <32 x i16> @llvm.x86.avx512.padds.w.512(<32 x i16> %a, <32 x i16> %b)5839 ret <32 x i16> %15840}5841 5842define <32 x i16> @test_adds_epi16_rrk_512(<32 x i16> %a, <32 x i16> %b, <32 x i16> %passThru, i32 %mask) nounwind #0 {5843; CHECK-LABEL: @test_adds_epi16_rrk_512(5844; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 85845; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85846; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 85847; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 85848; CHECK-NEXT: call void @llvm.donothing()5849; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]5850; CHECK-NEXT: [[TMP5:%.*]] = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B:%.*]])5851; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>5852; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>5853; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]5854; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i16> [[TMP5]], [[PASSTHRU:%.*]]5855; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[_MSPROP]]5856; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP4]]5857; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP11]], <32 x i16> [[TMP8]]5858; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP5]], <32 x i16> [[PASSTHRU]]5859; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85860; CHECK-NEXT: ret <32 x i16> [[TMP12]]5861;5862 %1 = call <32 x i16> @llvm.x86.avx512.padds.w.512(<32 x i16> %a, <32 x i16> %b)5863 %2 = bitcast i32 %mask to <32 x i1>5864 %3 = select <32 x i1> %2, <32 x i16> %1, <32 x i16> %passThru5865 ret <32 x i16> %35866}5867 5868define <32 x i16> @test_adds_epi16_rrkz_512(<32 x i16> %a, <32 x i16> %b, i32 %mask) nounwind #0 {5869; CHECK-LABEL: @test_adds_epi16_rrkz_512(5870; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 85871; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85872; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 85873; CHECK-NEXT: call void @llvm.donothing()5874; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]5875; CHECK-NEXT: [[TMP4:%.*]] = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B:%.*]])5876; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>5877; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>5878; CHECK-NEXT: [[TMP7:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[_MSPROP]], <32 x i16> zeroinitializer5879; CHECK-NEXT: [[TMP8:%.*]] = xor <32 x i16> [[TMP4]], zeroinitializer5880; CHECK-NEXT: [[TMP9:%.*]] = or <32 x i16> [[TMP8]], [[_MSPROP]]5881; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], zeroinitializer5882; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP5]], <32 x i16> [[TMP10]], <32 x i16> [[TMP7]]5883; CHECK-NEXT: [[TMP11:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP4]], <32 x i16> zeroinitializer5884; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85885; CHECK-NEXT: ret <32 x i16> [[TMP11]]5886;5887 %1 = call <32 x i16> @llvm.x86.avx512.padds.w.512(<32 x i16> %a, <32 x i16> %b)5888 %2 = bitcast i32 %mask to <32 x i1>5889 %3 = select <32 x i1> %2, <32 x i16> %1, <32 x i16> zeroinitializer5890 ret <32 x i16> %35891}5892 5893define <32 x i16> @test_adds_epi16_rm_512(<32 x i16> %a, ptr %ptr_b) nounwind #0 {5894; CHECK-LABEL: @test_adds_epi16_rm_512(5895; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85896; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 85897; CHECK-NEXT: call void @llvm.donothing()5898; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 05899; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]5900; CHECK: 3:5901; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]5902; CHECK-NEXT: unreachable5903; CHECK: 4:5904; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 645905; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i645906; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220805907; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr5908; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP7]], align 645909; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP2]], [[_MSLD]]5910; CHECK-NEXT: [[TMP8:%.*]] = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B]])5911; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 85912; CHECK-NEXT: ret <32 x i16> [[TMP8]]5913;5914 %b = load <32 x i16>, ptr %ptr_b5915 %1 = call <32 x i16> @llvm.x86.avx512.padds.w.512(<32 x i16> %a, <32 x i16> %b)5916 ret <32 x i16> %15917}5918 5919define <32 x i16> @test_adds_epi16_rmk_512(<32 x i16> %a, ptr %ptr_b, <32 x i16> %passThru, i32 %mask) nounwind #0 {5920; CHECK-LABEL: @test_adds_epi16_rmk_512(5921; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85922; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 85923; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 85924; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 85925; CHECK-NEXT: call void @llvm.donothing()5926; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 05927; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]5928; CHECK: 5:5929; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]5930; CHECK-NEXT: unreachable5931; CHECK: 6:5932; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 645933; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i645934; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220805935; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr5936; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP9]], align 645937; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP2]], [[_MSLD]]5938; CHECK-NEXT: [[TMP10:%.*]] = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B]])5939; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>5940; CHECK-NEXT: [[TMP12:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>5941; CHECK-NEXT: [[TMP13:%.*]] = select <32 x i1> [[TMP12]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]5942; CHECK-NEXT: [[TMP14:%.*]] = xor <32 x i16> [[TMP10]], [[PASSTHRU:%.*]]5943; CHECK-NEXT: [[TMP15:%.*]] = or <32 x i16> [[TMP14]], [[_MSPROP]]5944; CHECK-NEXT: [[TMP16:%.*]] = or <32 x i16> [[TMP15]], [[TMP4]]5945; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[TMP16]], <32 x i16> [[TMP13]]5946; CHECK-NEXT: [[TMP17:%.*]] = select <32 x i1> [[TMP12]], <32 x i16> [[TMP10]], <32 x i16> [[PASSTHRU]]5947; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85948; CHECK-NEXT: ret <32 x i16> [[TMP17]]5949;5950 %b = load <32 x i16>, ptr %ptr_b5951 %1 = call <32 x i16> @llvm.x86.avx512.padds.w.512(<32 x i16> %a, <32 x i16> %b)5952 %2 = bitcast i32 %mask to <32 x i1>5953 %3 = select <32 x i1> %2, <32 x i16> %1, <32 x i16> %passThru5954 ret <32 x i16> %35955}5956 5957define <32 x i16> @test_adds_epi16_rmkz_512(<32 x i16> %a, ptr %ptr_b, i32 %mask) nounwind #0 {5958; CHECK-LABEL: @test_adds_epi16_rmkz_512(5959; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 85960; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 85961; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 85962; CHECK-NEXT: call void @llvm.donothing()5963; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 05964; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]5965; CHECK: 4:5966; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]5967; CHECK-NEXT: unreachable5968; CHECK: 5:5969; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 645970; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i645971; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220805972; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr5973; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP8]], align 645974; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP2]], [[_MSLD]]5975; CHECK-NEXT: [[TMP9:%.*]] = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B]])5976; CHECK-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>5977; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>5978; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[_MSPROP]], <32 x i16> zeroinitializer5979; CHECK-NEXT: [[TMP13:%.*]] = xor <32 x i16> [[TMP9]], zeroinitializer5980; CHECK-NEXT: [[TMP14:%.*]] = or <32 x i16> [[TMP13]], [[_MSPROP]]5981; CHECK-NEXT: [[TMP15:%.*]] = or <32 x i16> [[TMP14]], zeroinitializer5982; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP10]], <32 x i16> [[TMP15]], <32 x i16> [[TMP12]]5983; CHECK-NEXT: [[TMP16:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[TMP9]], <32 x i16> zeroinitializer5984; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 85985; CHECK-NEXT: ret <32 x i16> [[TMP16]]5986;5987 %b = load <32 x i16>, ptr %ptr_b5988 %1 = call <32 x i16> @llvm.x86.avx512.padds.w.512(<32 x i16> %a, <32 x i16> %b)5989 %2 = bitcast i32 %mask to <32 x i1>5990 %3 = select <32 x i1> %2, <32 x i16> %1, <32 x i16> zeroinitializer5991 ret <32 x i16> %35992}5993 5994declare <32 x i16> @llvm.x86.avx512.padds.w.512(<32 x i16>, <32 x i16>)5995 5996define <32 x i16> @test_mask_adds_epi16_rr_512(<32 x i16> %a, <32 x i16> %b) nounwind #0 {5997; CHECK-LABEL: @test_mask_adds_epi16_rr_512(5998; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 85999; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86000; CHECK-NEXT: call void @llvm.donothing()6001; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]6002; CHECK-NEXT: [[TMP3:%.*]] = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B:%.*]])6003; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 86004; CHECK-NEXT: ret <32 x i16> [[TMP3]]6005;6006 %res = call <32 x i16> @llvm.x86.avx512.mask.padds.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> zeroinitializer, i32 -1)6007 ret <32 x i16> %res6008}6009 6010define <32 x i16> @test_mask_adds_epi16_rrk_512(<32 x i16> %a, <32 x i16> %b, <32 x i16> %passThru, i32 %mask) nounwind #0 {6011; CHECK-LABEL: @test_mask_adds_epi16_rrk_512(6012; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86013; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86014; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 86015; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86016; CHECK-NEXT: call void @llvm.donothing()6017; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]6018; CHECK-NEXT: [[TMP5:%.*]] = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B:%.*]])6019; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>6020; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>6021; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]6022; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i16> [[TMP5]], [[PASSTHRU:%.*]]6023; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[_MSPROP]]6024; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP4]]6025; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP11]], <32 x i16> [[TMP8]]6026; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP5]], <32 x i16> [[PASSTHRU]]6027; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86028; CHECK-NEXT: ret <32 x i16> [[TMP12]]6029;6030 %res = call <32 x i16> @llvm.x86.avx512.mask.padds.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> %passThru, i32 %mask)6031 ret <32 x i16> %res6032}6033 6034define <32 x i16> @test_mask_adds_epi16_rrkz_512(<32 x i16> %a, <32 x i16> %b, i32 %mask) nounwind #0 {6035; CHECK-LABEL: @test_mask_adds_epi16_rrkz_512(6036; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86037; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86038; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86039; CHECK-NEXT: call void @llvm.donothing()6040; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]6041; CHECK-NEXT: [[TMP4:%.*]] = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B:%.*]])6042; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>6043; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>6044; CHECK-NEXT: [[TMP7:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[_MSPROP]], <32 x i16> zeroinitializer6045; CHECK-NEXT: [[TMP8:%.*]] = xor <32 x i16> [[TMP4]], zeroinitializer6046; CHECK-NEXT: [[TMP9:%.*]] = or <32 x i16> [[TMP8]], [[_MSPROP]]6047; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], zeroinitializer6048; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP5]], <32 x i16> [[TMP10]], <32 x i16> [[TMP7]]6049; CHECK-NEXT: [[TMP11:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP4]], <32 x i16> zeroinitializer6050; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86051; CHECK-NEXT: ret <32 x i16> [[TMP11]]6052;6053 %res = call <32 x i16> @llvm.x86.avx512.mask.padds.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> zeroinitializer, i32 %mask)6054 ret <32 x i16> %res6055}6056 6057define <32 x i16> @test_mask_adds_epi16_rm_512(<32 x i16> %a, ptr %ptr_b) nounwind #0 {6058; CHECK-LABEL: @test_mask_adds_epi16_rm_512(6059; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86060; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86061; CHECK-NEXT: call void @llvm.donothing()6062; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 06063; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]6064; CHECK: 3:6065; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]6066; CHECK-NEXT: unreachable6067; CHECK: 4:6068; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 646069; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i646070; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220806071; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr6072; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP7]], align 646073; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP2]], [[_MSLD]]6074; CHECK-NEXT: [[TMP8:%.*]] = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B]])6075; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 86076; CHECK-NEXT: ret <32 x i16> [[TMP8]]6077;6078 %b = load <32 x i16>, ptr %ptr_b6079 %res = call <32 x i16> @llvm.x86.avx512.mask.padds.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> zeroinitializer, i32 -1)6080 ret <32 x i16> %res6081}6082 6083define <32 x i16> @test_mask_adds_epi16_rmk_512(<32 x i16> %a, ptr %ptr_b, <32 x i16> %passThru, i32 %mask) nounwind #0 {6084; CHECK-LABEL: @test_mask_adds_epi16_rmk_512(6085; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86086; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86087; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 86088; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 86089; CHECK-NEXT: call void @llvm.donothing()6090; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 06091; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]6092; CHECK: 5:6093; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]6094; CHECK-NEXT: unreachable6095; CHECK: 6:6096; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 646097; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i646098; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220806099; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr6100; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP9]], align 646101; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP2]], [[_MSLD]]6102; CHECK-NEXT: [[TMP10:%.*]] = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B]])6103; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>6104; CHECK-NEXT: [[TMP12:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>6105; CHECK-NEXT: [[TMP13:%.*]] = select <32 x i1> [[TMP12]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]6106; CHECK-NEXT: [[TMP14:%.*]] = xor <32 x i16> [[TMP10]], [[PASSTHRU:%.*]]6107; CHECK-NEXT: [[TMP15:%.*]] = or <32 x i16> [[TMP14]], [[_MSPROP]]6108; CHECK-NEXT: [[TMP16:%.*]] = or <32 x i16> [[TMP15]], [[TMP4]]6109; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[TMP16]], <32 x i16> [[TMP13]]6110; CHECK-NEXT: [[TMP17:%.*]] = select <32 x i1> [[TMP12]], <32 x i16> [[TMP10]], <32 x i16> [[PASSTHRU]]6111; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86112; CHECK-NEXT: ret <32 x i16> [[TMP17]]6113;6114 %b = load <32 x i16>, ptr %ptr_b6115 %res = call <32 x i16> @llvm.x86.avx512.mask.padds.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> %passThru, i32 %mask)6116 ret <32 x i16> %res6117}6118 6119define <32 x i16> @test_mask_adds_epi16_rmkz_512(<32 x i16> %a, ptr %ptr_b, i32 %mask) nounwind #0 {6120; CHECK-LABEL: @test_mask_adds_epi16_rmkz_512(6121; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86122; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86123; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 86124; CHECK-NEXT: call void @llvm.donothing()6125; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 06126; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]6127; CHECK: 4:6128; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]6129; CHECK-NEXT: unreachable6130; CHECK: 5:6131; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 646132; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i646133; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220806134; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr6135; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP8]], align 646136; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP2]], [[_MSLD]]6137; CHECK-NEXT: [[TMP9:%.*]] = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B]])6138; CHECK-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>6139; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>6140; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[_MSPROP]], <32 x i16> zeroinitializer6141; CHECK-NEXT: [[TMP13:%.*]] = xor <32 x i16> [[TMP9]], zeroinitializer6142; CHECK-NEXT: [[TMP14:%.*]] = or <32 x i16> [[TMP13]], [[_MSPROP]]6143; CHECK-NEXT: [[TMP15:%.*]] = or <32 x i16> [[TMP14]], zeroinitializer6144; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP10]], <32 x i16> [[TMP15]], <32 x i16> [[TMP12]]6145; CHECK-NEXT: [[TMP16:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[TMP9]], <32 x i16> zeroinitializer6146; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86147; CHECK-NEXT: ret <32 x i16> [[TMP16]]6148;6149 %b = load <32 x i16>, ptr %ptr_b6150 %res = call <32 x i16> @llvm.x86.avx512.mask.padds.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> zeroinitializer, i32 %mask)6151 ret <32 x i16> %res6152}6153 6154declare <32 x i16> @llvm.x86.avx512.mask.padds.w.512(<32 x i16>, <32 x i16>, <32 x i16>, i32)6155 6156define <32 x i16> @test_subs_epi16_rr_512(<32 x i16> %a, <32 x i16> %b) nounwind #0 {6157; CHECK-LABEL: @test_subs_epi16_rr_512(6158; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86159; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86160; CHECK-NEXT: call void @llvm.donothing()6161; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]6162; CHECK-NEXT: [[TMP3:%.*]] = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B:%.*]])6163; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 86164; CHECK-NEXT: ret <32 x i16> [[TMP3]]6165;6166 %1 = call <32 x i16> @llvm.x86.avx512.psubs.w.512(<32 x i16> %a, <32 x i16> %b)6167 ret <32 x i16> %16168}6169 6170define <32 x i16> @test_subs_epi16_rrk_512(<32 x i16> %a, <32 x i16> %b, <32 x i16> %passThru, i32 %mask) nounwind #0 {6171; CHECK-LABEL: @test_subs_epi16_rrk_512(6172; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86173; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86174; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 86175; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86176; CHECK-NEXT: call void @llvm.donothing()6177; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]6178; CHECK-NEXT: [[TMP5:%.*]] = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B:%.*]])6179; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>6180; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>6181; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]6182; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i16> [[TMP5]], [[PASSTHRU:%.*]]6183; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[_MSPROP]]6184; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP4]]6185; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP11]], <32 x i16> [[TMP8]]6186; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP5]], <32 x i16> [[PASSTHRU]]6187; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86188; CHECK-NEXT: ret <32 x i16> [[TMP12]]6189;6190 %1 = call <32 x i16> @llvm.x86.avx512.psubs.w.512(<32 x i16> %a, <32 x i16> %b)6191 %2 = bitcast i32 %mask to <32 x i1>6192 %3 = select <32 x i1> %2, <32 x i16> %1, <32 x i16> %passThru6193 ret <32 x i16> %36194}6195 6196define <32 x i16> @test_subs_epi16_rrkz_512(<32 x i16> %a, <32 x i16> %b, i32 %mask) nounwind #0 {6197; CHECK-LABEL: @test_subs_epi16_rrkz_512(6198; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86199; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86200; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86201; CHECK-NEXT: call void @llvm.donothing()6202; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]6203; CHECK-NEXT: [[TMP4:%.*]] = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B:%.*]])6204; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>6205; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>6206; CHECK-NEXT: [[TMP7:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[_MSPROP]], <32 x i16> zeroinitializer6207; CHECK-NEXT: [[TMP8:%.*]] = xor <32 x i16> [[TMP4]], zeroinitializer6208; CHECK-NEXT: [[TMP9:%.*]] = or <32 x i16> [[TMP8]], [[_MSPROP]]6209; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], zeroinitializer6210; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP5]], <32 x i16> [[TMP10]], <32 x i16> [[TMP7]]6211; CHECK-NEXT: [[TMP11:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP4]], <32 x i16> zeroinitializer6212; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86213; CHECK-NEXT: ret <32 x i16> [[TMP11]]6214;6215 %1 = call <32 x i16> @llvm.x86.avx512.psubs.w.512(<32 x i16> %a, <32 x i16> %b)6216 %2 = bitcast i32 %mask to <32 x i1>6217 %3 = select <32 x i1> %2, <32 x i16> %1, <32 x i16> zeroinitializer6218 ret <32 x i16> %36219}6220 6221define <32 x i16> @test_subs_epi16_rm_512(<32 x i16> %a, ptr %ptr_b) nounwind #0 {6222; CHECK-LABEL: @test_subs_epi16_rm_512(6223; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86224; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86225; CHECK-NEXT: call void @llvm.donothing()6226; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 06227; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]6228; CHECK: 3:6229; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]6230; CHECK-NEXT: unreachable6231; CHECK: 4:6232; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 646233; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i646234; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220806235; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr6236; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP7]], align 646237; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP2]], [[_MSLD]]6238; CHECK-NEXT: [[TMP8:%.*]] = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B]])6239; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 86240; CHECK-NEXT: ret <32 x i16> [[TMP8]]6241;6242 %b = load <32 x i16>, ptr %ptr_b6243 %1 = call <32 x i16> @llvm.x86.avx512.psubs.w.512(<32 x i16> %a, <32 x i16> %b)6244 ret <32 x i16> %16245}6246 6247define <32 x i16> @test_subs_epi16_rmk_512(<32 x i16> %a, ptr %ptr_b, <32 x i16> %passThru, i32 %mask) nounwind #0 {6248; CHECK-LABEL: @test_subs_epi16_rmk_512(6249; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86250; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86251; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 86252; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 86253; CHECK-NEXT: call void @llvm.donothing()6254; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 06255; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]6256; CHECK: 5:6257; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]6258; CHECK-NEXT: unreachable6259; CHECK: 6:6260; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 646261; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i646262; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220806263; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr6264; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP9]], align 646265; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP2]], [[_MSLD]]6266; CHECK-NEXT: [[TMP10:%.*]] = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B]])6267; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>6268; CHECK-NEXT: [[TMP12:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>6269; CHECK-NEXT: [[TMP13:%.*]] = select <32 x i1> [[TMP12]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]6270; CHECK-NEXT: [[TMP14:%.*]] = xor <32 x i16> [[TMP10]], [[PASSTHRU:%.*]]6271; CHECK-NEXT: [[TMP15:%.*]] = or <32 x i16> [[TMP14]], [[_MSPROP]]6272; CHECK-NEXT: [[TMP16:%.*]] = or <32 x i16> [[TMP15]], [[TMP4]]6273; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[TMP16]], <32 x i16> [[TMP13]]6274; CHECK-NEXT: [[TMP17:%.*]] = select <32 x i1> [[TMP12]], <32 x i16> [[TMP10]], <32 x i16> [[PASSTHRU]]6275; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86276; CHECK-NEXT: ret <32 x i16> [[TMP17]]6277;6278 %b = load <32 x i16>, ptr %ptr_b6279 %1 = call <32 x i16> @llvm.x86.avx512.psubs.w.512(<32 x i16> %a, <32 x i16> %b)6280 %2 = bitcast i32 %mask to <32 x i1>6281 %3 = select <32 x i1> %2, <32 x i16> %1, <32 x i16> %passThru6282 ret <32 x i16> %36283}6284 6285define <32 x i16> @test_subs_epi16_rmkz_512(<32 x i16> %a, ptr %ptr_b, i32 %mask) nounwind #0 {6286; CHECK-LABEL: @test_subs_epi16_rmkz_512(6287; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86288; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86289; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 86290; CHECK-NEXT: call void @llvm.donothing()6291; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 06292; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]6293; CHECK: 4:6294; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]6295; CHECK-NEXT: unreachable6296; CHECK: 5:6297; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 646298; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i646299; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220806300; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr6301; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP8]], align 646302; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP2]], [[_MSLD]]6303; CHECK-NEXT: [[TMP9:%.*]] = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B]])6304; CHECK-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>6305; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>6306; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[_MSPROP]], <32 x i16> zeroinitializer6307; CHECK-NEXT: [[TMP13:%.*]] = xor <32 x i16> [[TMP9]], zeroinitializer6308; CHECK-NEXT: [[TMP14:%.*]] = or <32 x i16> [[TMP13]], [[_MSPROP]]6309; CHECK-NEXT: [[TMP15:%.*]] = or <32 x i16> [[TMP14]], zeroinitializer6310; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP10]], <32 x i16> [[TMP15]], <32 x i16> [[TMP12]]6311; CHECK-NEXT: [[TMP16:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[TMP9]], <32 x i16> zeroinitializer6312; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86313; CHECK-NEXT: ret <32 x i16> [[TMP16]]6314;6315 %b = load <32 x i16>, ptr %ptr_b6316 %1 = call <32 x i16> @llvm.x86.avx512.psubs.w.512(<32 x i16> %a, <32 x i16> %b)6317 %2 = bitcast i32 %mask to <32 x i1>6318 %3 = select <32 x i1> %2, <32 x i16> %1, <32 x i16> zeroinitializer6319 ret <32 x i16> %36320}6321 6322declare <32 x i16> @llvm.x86.avx512.psubs.w.512(<32 x i16>, <32 x i16>)6323 6324define <32 x i16> @test_mask_subs_epi16_rr_512(<32 x i16> %a, <32 x i16> %b) nounwind #0 {6325; CHECK-LABEL: @test_mask_subs_epi16_rr_512(6326; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86327; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86328; CHECK-NEXT: call void @llvm.donothing()6329; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]6330; CHECK-NEXT: [[TMP3:%.*]] = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B:%.*]])6331; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 86332; CHECK-NEXT: ret <32 x i16> [[TMP3]]6333;6334 %res = call <32 x i16> @llvm.x86.avx512.mask.psubs.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> zeroinitializer, i32 -1)6335 ret <32 x i16> %res6336}6337 6338define <32 x i16> @test_mask_subs_epi16_rrk_512(<32 x i16> %a, <32 x i16> %b, <32 x i16> %passThru, i32 %mask) nounwind #0 {6339; CHECK-LABEL: @test_mask_subs_epi16_rrk_512(6340; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86341; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86342; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 86343; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86344; CHECK-NEXT: call void @llvm.donothing()6345; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]6346; CHECK-NEXT: [[TMP5:%.*]] = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B:%.*]])6347; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>6348; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>6349; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]6350; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i16> [[TMP5]], [[PASSTHRU:%.*]]6351; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[_MSPROP]]6352; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP4]]6353; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP11]], <32 x i16> [[TMP8]]6354; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP5]], <32 x i16> [[PASSTHRU]]6355; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86356; CHECK-NEXT: ret <32 x i16> [[TMP12]]6357;6358 %res = call <32 x i16> @llvm.x86.avx512.mask.psubs.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> %passThru, i32 %mask)6359 ret <32 x i16> %res6360}6361 6362define <32 x i16> @test_mask_subs_epi16_rrkz_512(<32 x i16> %a, <32 x i16> %b, i32 %mask) nounwind #0 {6363; CHECK-LABEL: @test_mask_subs_epi16_rrkz_512(6364; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86365; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86366; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86367; CHECK-NEXT: call void @llvm.donothing()6368; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]6369; CHECK-NEXT: [[TMP4:%.*]] = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B:%.*]])6370; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>6371; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>6372; CHECK-NEXT: [[TMP7:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[_MSPROP]], <32 x i16> zeroinitializer6373; CHECK-NEXT: [[TMP8:%.*]] = xor <32 x i16> [[TMP4]], zeroinitializer6374; CHECK-NEXT: [[TMP9:%.*]] = or <32 x i16> [[TMP8]], [[_MSPROP]]6375; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], zeroinitializer6376; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP5]], <32 x i16> [[TMP10]], <32 x i16> [[TMP7]]6377; CHECK-NEXT: [[TMP11:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP4]], <32 x i16> zeroinitializer6378; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86379; CHECK-NEXT: ret <32 x i16> [[TMP11]]6380;6381 %res = call <32 x i16> @llvm.x86.avx512.mask.psubs.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> zeroinitializer, i32 %mask)6382 ret <32 x i16> %res6383}6384 6385define <32 x i16> @test_mask_subs_epi16_rm_512(<32 x i16> %a, ptr %ptr_b) nounwind #0 {6386; CHECK-LABEL: @test_mask_subs_epi16_rm_512(6387; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86388; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86389; CHECK-NEXT: call void @llvm.donothing()6390; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 06391; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]6392; CHECK: 3:6393; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]6394; CHECK-NEXT: unreachable6395; CHECK: 4:6396; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 646397; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i646398; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220806399; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr6400; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP7]], align 646401; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP2]], [[_MSLD]]6402; CHECK-NEXT: [[TMP8:%.*]] = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B]])6403; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 86404; CHECK-NEXT: ret <32 x i16> [[TMP8]]6405;6406 %b = load <32 x i16>, ptr %ptr_b6407 %res = call <32 x i16> @llvm.x86.avx512.mask.psubs.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> zeroinitializer, i32 -1)6408 ret <32 x i16> %res6409}6410 6411define <32 x i16> @test_mask_subs_epi16_rmk_512(<32 x i16> %a, ptr %ptr_b, <32 x i16> %passThru, i32 %mask) nounwind #0 {6412; CHECK-LABEL: @test_mask_subs_epi16_rmk_512(6413; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86414; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86415; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 86416; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 86417; CHECK-NEXT: call void @llvm.donothing()6418; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 06419; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]6420; CHECK: 5:6421; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]6422; CHECK-NEXT: unreachable6423; CHECK: 6:6424; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 646425; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i646426; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220806427; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr6428; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP9]], align 646429; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP2]], [[_MSLD]]6430; CHECK-NEXT: [[TMP10:%.*]] = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B]])6431; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>6432; CHECK-NEXT: [[TMP12:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>6433; CHECK-NEXT: [[TMP13:%.*]] = select <32 x i1> [[TMP12]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]6434; CHECK-NEXT: [[TMP14:%.*]] = xor <32 x i16> [[TMP10]], [[PASSTHRU:%.*]]6435; CHECK-NEXT: [[TMP15:%.*]] = or <32 x i16> [[TMP14]], [[_MSPROP]]6436; CHECK-NEXT: [[TMP16:%.*]] = or <32 x i16> [[TMP15]], [[TMP4]]6437; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[TMP16]], <32 x i16> [[TMP13]]6438; CHECK-NEXT: [[TMP17:%.*]] = select <32 x i1> [[TMP12]], <32 x i16> [[TMP10]], <32 x i16> [[PASSTHRU]]6439; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86440; CHECK-NEXT: ret <32 x i16> [[TMP17]]6441;6442 %b = load <32 x i16>, ptr %ptr_b6443 %res = call <32 x i16> @llvm.x86.avx512.mask.psubs.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> %passThru, i32 %mask)6444 ret <32 x i16> %res6445}6446 6447define <32 x i16> @test_mask_subs_epi16_rmkz_512(<32 x i16> %a, ptr %ptr_b, i32 %mask) nounwind #0 {6448; CHECK-LABEL: @test_mask_subs_epi16_rmkz_512(6449; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86450; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86451; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 86452; CHECK-NEXT: call void @llvm.donothing()6453; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 06454; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]6455; CHECK: 4:6456; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]6457; CHECK-NEXT: unreachable6458; CHECK: 5:6459; CHECK-NEXT: [[B:%.*]] = load <32 x i16>, ptr [[PTR_B:%.*]], align 646460; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i646461; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220806462; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr6463; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i16>, ptr [[TMP8]], align 646464; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP2]], [[_MSLD]]6465; CHECK-NEXT: [[TMP9:%.*]] = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> [[A:%.*]], <32 x i16> [[B]])6466; CHECK-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>6467; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1>6468; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[_MSPROP]], <32 x i16> zeroinitializer6469; CHECK-NEXT: [[TMP13:%.*]] = xor <32 x i16> [[TMP9]], zeroinitializer6470; CHECK-NEXT: [[TMP14:%.*]] = or <32 x i16> [[TMP13]], [[_MSPROP]]6471; CHECK-NEXT: [[TMP15:%.*]] = or <32 x i16> [[TMP14]], zeroinitializer6472; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP10]], <32 x i16> [[TMP15]], <32 x i16> [[TMP12]]6473; CHECK-NEXT: [[TMP16:%.*]] = select <32 x i1> [[TMP11]], <32 x i16> [[TMP9]], <32 x i16> zeroinitializer6474; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86475; CHECK-NEXT: ret <32 x i16> [[TMP16]]6476;6477 %b = load <32 x i16>, ptr %ptr_b6478 %res = call <32 x i16> @llvm.x86.avx512.mask.psubs.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> zeroinitializer, i32 %mask)6479 ret <32 x i16> %res6480}6481 6482declare <32 x i16> @llvm.x86.avx512.mask.psubs.w.512(<32 x i16>, <32 x i16>, <32 x i16>, i32)6483 6484define <64 x i8> @test_mask_adds_epi8_rr_512(<64 x i8> %a, <64 x i8> %b) nounwind #0 {6485; CHECK-LABEL: @test_mask_adds_epi8_rr_512(6486; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 86487; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86488; CHECK-NEXT: call void @llvm.donothing()6489; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]6490; CHECK-NEXT: [[TMP3:%.*]] = call <64 x i8> @llvm.sadd.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B:%.*]])6491; CHECK-NEXT: store <64 x i8> [[_MSPROP]], ptr @__msan_retval_tls, align 86492; CHECK-NEXT: ret <64 x i8> [[TMP3]]6493;6494 %res = call <64 x i8> @llvm.x86.avx512.mask.padds.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> zeroinitializer, i64 -1)6495 ret <64 x i8> %res6496}6497 6498define <64 x i8> @test_mask_adds_epi8_rrk_512(<64 x i8> %a, <64 x i8> %b, <64 x i8> %passThru, i64 %mask) nounwind #0 {6499; CHECK-LABEL: @test_mask_adds_epi8_rrk_512(6500; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 86501; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86502; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 86503; CHECK-NEXT: [[TMP4:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86504; CHECK-NEXT: call void @llvm.donothing()6505; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]6506; CHECK-NEXT: [[TMP5:%.*]] = call <64 x i8> @llvm.sadd.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B:%.*]])6507; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>6508; CHECK-NEXT: [[TMP7:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>6509; CHECK-NEXT: [[TMP8:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[_MSPROP]], <64 x i8> [[TMP4]]6510; CHECK-NEXT: [[TMP9:%.*]] = xor <64 x i8> [[TMP5]], [[PASSTHRU:%.*]]6511; CHECK-NEXT: [[TMP10:%.*]] = or <64 x i8> [[TMP9]], [[_MSPROP]]6512; CHECK-NEXT: [[TMP11:%.*]] = or <64 x i8> [[TMP10]], [[TMP4]]6513; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[TMP11]], <64 x i8> [[TMP8]]6514; CHECK-NEXT: [[TMP12:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[TMP5]], <64 x i8> [[PASSTHRU]]6515; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86516; CHECK-NEXT: ret <64 x i8> [[TMP12]]6517;6518 %res = call <64 x i8> @llvm.x86.avx512.mask.padds.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> %passThru, i64 %mask)6519 ret <64 x i8> %res6520}6521 6522define <64 x i8> @test_mask_adds_epi8_rrkz_512(<64 x i8> %a, <64 x i8> %b, i64 %mask) nounwind #0 {6523; CHECK-LABEL: @test_mask_adds_epi8_rrkz_512(6524; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 86525; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86526; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86527; CHECK-NEXT: call void @llvm.donothing()6528; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]6529; CHECK-NEXT: [[TMP4:%.*]] = call <64 x i8> @llvm.sadd.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B:%.*]])6530; CHECK-NEXT: [[TMP5:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>6531; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>6532; CHECK-NEXT: [[TMP7:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[_MSPROP]], <64 x i8> zeroinitializer6533; CHECK-NEXT: [[TMP8:%.*]] = xor <64 x i8> [[TMP4]], zeroinitializer6534; CHECK-NEXT: [[TMP9:%.*]] = or <64 x i8> [[TMP8]], [[_MSPROP]]6535; CHECK-NEXT: [[TMP10:%.*]] = or <64 x i8> [[TMP9]], zeroinitializer6536; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP5]], <64 x i8> [[TMP10]], <64 x i8> [[TMP7]]6537; CHECK-NEXT: [[TMP11:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[TMP4]], <64 x i8> zeroinitializer6538; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86539; CHECK-NEXT: ret <64 x i8> [[TMP11]]6540;6541 %res = call <64 x i8> @llvm.x86.avx512.mask.padds.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> zeroinitializer, i64 %mask)6542 ret <64 x i8> %res6543}6544 6545define <64 x i8> @test_mask_adds_epi8_rm_512(<64 x i8> %a, ptr %ptr_b) nounwind #0 {6546; CHECK-LABEL: @test_mask_adds_epi8_rm_512(6547; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86548; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 86549; CHECK-NEXT: call void @llvm.donothing()6550; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 06551; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]6552; CHECK: 3:6553; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]6554; CHECK-NEXT: unreachable6555; CHECK: 4:6556; CHECK-NEXT: [[B:%.*]] = load <64 x i8>, ptr [[PTR_B:%.*]], align 646557; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i646558; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220806559; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr6560; CHECK-NEXT: [[_MSLD:%.*]] = load <64 x i8>, ptr [[TMP7]], align 646561; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP2]], [[_MSLD]]6562; CHECK-NEXT: [[TMP8:%.*]] = call <64 x i8> @llvm.sadd.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B]])6563; CHECK-NEXT: store <64 x i8> [[_MSPROP]], ptr @__msan_retval_tls, align 86564; CHECK-NEXT: ret <64 x i8> [[TMP8]]6565;6566 %b = load <64 x i8>, ptr %ptr_b6567 %res = call <64 x i8> @llvm.x86.avx512.mask.padds.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> zeroinitializer, i64 -1)6568 ret <64 x i8> %res6569}6570 6571define <64 x i8> @test_mask_adds_epi8_rmk_512(<64 x i8> %a, ptr %ptr_b, <64 x i8> %passThru, i64 %mask) nounwind #0 {6572; CHECK-LABEL: @test_mask_adds_epi8_rmk_512(6573; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86574; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 86575; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 86576; CHECK-NEXT: [[TMP4:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 86577; CHECK-NEXT: call void @llvm.donothing()6578; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 06579; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]6580; CHECK: 5:6581; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]6582; CHECK-NEXT: unreachable6583; CHECK: 6:6584; CHECK-NEXT: [[B:%.*]] = load <64 x i8>, ptr [[PTR_B:%.*]], align 646585; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i646586; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220806587; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr6588; CHECK-NEXT: [[_MSLD:%.*]] = load <64 x i8>, ptr [[TMP9]], align 646589; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP2]], [[_MSLD]]6590; CHECK-NEXT: [[TMP10:%.*]] = call <64 x i8> @llvm.sadd.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B]])6591; CHECK-NEXT: [[TMP11:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>6592; CHECK-NEXT: [[TMP12:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>6593; CHECK-NEXT: [[TMP13:%.*]] = select <64 x i1> [[TMP12]], <64 x i8> [[_MSPROP]], <64 x i8> [[TMP4]]6594; CHECK-NEXT: [[TMP14:%.*]] = xor <64 x i8> [[TMP10]], [[PASSTHRU:%.*]]6595; CHECK-NEXT: [[TMP15:%.*]] = or <64 x i8> [[TMP14]], [[_MSPROP]]6596; CHECK-NEXT: [[TMP16:%.*]] = or <64 x i8> [[TMP15]], [[TMP4]]6597; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP11]], <64 x i8> [[TMP16]], <64 x i8> [[TMP13]]6598; CHECK-NEXT: [[TMP17:%.*]] = select <64 x i1> [[TMP12]], <64 x i8> [[TMP10]], <64 x i8> [[PASSTHRU]]6599; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86600; CHECK-NEXT: ret <64 x i8> [[TMP17]]6601;6602 %b = load <64 x i8>, ptr %ptr_b6603 %res = call <64 x i8> @llvm.x86.avx512.mask.padds.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> %passThru, i64 %mask)6604 ret <64 x i8> %res6605}6606 6607define <64 x i8> @test_mask_adds_epi8_rmkz_512(<64 x i8> %a, ptr %ptr_b, i64 %mask) nounwind #0 {6608; CHECK-LABEL: @test_mask_adds_epi8_rmkz_512(6609; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86610; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 86611; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 86612; CHECK-NEXT: call void @llvm.donothing()6613; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 06614; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]6615; CHECK: 4:6616; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]6617; CHECK-NEXT: unreachable6618; CHECK: 5:6619; CHECK-NEXT: [[B:%.*]] = load <64 x i8>, ptr [[PTR_B:%.*]], align 646620; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i646621; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220806622; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr6623; CHECK-NEXT: [[_MSLD:%.*]] = load <64 x i8>, ptr [[TMP8]], align 646624; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP2]], [[_MSLD]]6625; CHECK-NEXT: [[TMP9:%.*]] = call <64 x i8> @llvm.sadd.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B]])6626; CHECK-NEXT: [[TMP10:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>6627; CHECK-NEXT: [[TMP11:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>6628; CHECK-NEXT: [[TMP12:%.*]] = select <64 x i1> [[TMP11]], <64 x i8> [[_MSPROP]], <64 x i8> zeroinitializer6629; CHECK-NEXT: [[TMP13:%.*]] = xor <64 x i8> [[TMP9]], zeroinitializer6630; CHECK-NEXT: [[TMP14:%.*]] = or <64 x i8> [[TMP13]], [[_MSPROP]]6631; CHECK-NEXT: [[TMP15:%.*]] = or <64 x i8> [[TMP14]], zeroinitializer6632; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP10]], <64 x i8> [[TMP15]], <64 x i8> [[TMP12]]6633; CHECK-NEXT: [[TMP16:%.*]] = select <64 x i1> [[TMP11]], <64 x i8> [[TMP9]], <64 x i8> zeroinitializer6634; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86635; CHECK-NEXT: ret <64 x i8> [[TMP16]]6636;6637 %b = load <64 x i8>, ptr %ptr_b6638 %res = call <64 x i8> @llvm.x86.avx512.mask.padds.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> zeroinitializer, i64 %mask)6639 ret <64 x i8> %res6640}6641 6642declare <64 x i8> @llvm.x86.avx512.mask.padds.b.512(<64 x i8>, <64 x i8>, <64 x i8>, i64)6643 6644define <64 x i8> @test_mask_subs_epi8_rr_512(<64 x i8> %a, <64 x i8> %b) nounwind #0 {6645; CHECK-LABEL: @test_mask_subs_epi8_rr_512(6646; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 86647; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86648; CHECK-NEXT: call void @llvm.donothing()6649; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]6650; CHECK-NEXT: [[TMP3:%.*]] = call <64 x i8> @llvm.ssub.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B:%.*]])6651; CHECK-NEXT: store <64 x i8> [[_MSPROP]], ptr @__msan_retval_tls, align 86652; CHECK-NEXT: ret <64 x i8> [[TMP3]]6653;6654 %res = call <64 x i8> @llvm.x86.avx512.mask.psubs.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> zeroinitializer, i64 -1)6655 ret <64 x i8> %res6656}6657 6658define <64 x i8> @test_mask_subs_epi8_rrk_512(<64 x i8> %a, <64 x i8> %b, <64 x i8> %passThru, i64 %mask) nounwind #0 {6659; CHECK-LABEL: @test_mask_subs_epi8_rrk_512(6660; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 86661; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86662; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 86663; CHECK-NEXT: [[TMP4:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86664; CHECK-NEXT: call void @llvm.donothing()6665; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]6666; CHECK-NEXT: [[TMP5:%.*]] = call <64 x i8> @llvm.ssub.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B:%.*]])6667; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>6668; CHECK-NEXT: [[TMP7:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>6669; CHECK-NEXT: [[TMP8:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[_MSPROP]], <64 x i8> [[TMP4]]6670; CHECK-NEXT: [[TMP9:%.*]] = xor <64 x i8> [[TMP5]], [[PASSTHRU:%.*]]6671; CHECK-NEXT: [[TMP10:%.*]] = or <64 x i8> [[TMP9]], [[_MSPROP]]6672; CHECK-NEXT: [[TMP11:%.*]] = or <64 x i8> [[TMP10]], [[TMP4]]6673; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[TMP11]], <64 x i8> [[TMP8]]6674; CHECK-NEXT: [[TMP12:%.*]] = select <64 x i1> [[TMP7]], <64 x i8> [[TMP5]], <64 x i8> [[PASSTHRU]]6675; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86676; CHECK-NEXT: ret <64 x i8> [[TMP12]]6677;6678 %res = call <64 x i8> @llvm.x86.avx512.mask.psubs.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> %passThru, i64 %mask)6679 ret <64 x i8> %res6680}6681 6682define <64 x i8> @test_mask_subs_epi8_rrkz_512(<64 x i8> %a, <64 x i8> %b, i64 %mask) nounwind #0 {6683; CHECK-LABEL: @test_mask_subs_epi8_rrkz_512(6684; CHECK-NEXT: [[TMP1:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 86685; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86686; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86687; CHECK-NEXT: call void @llvm.donothing()6688; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP1]], [[TMP2]]6689; CHECK-NEXT: [[TMP4:%.*]] = call <64 x i8> @llvm.ssub.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B:%.*]])6690; CHECK-NEXT: [[TMP5:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>6691; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>6692; CHECK-NEXT: [[TMP7:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[_MSPROP]], <64 x i8> zeroinitializer6693; CHECK-NEXT: [[TMP8:%.*]] = xor <64 x i8> [[TMP4]], zeroinitializer6694; CHECK-NEXT: [[TMP9:%.*]] = or <64 x i8> [[TMP8]], [[_MSPROP]]6695; CHECK-NEXT: [[TMP10:%.*]] = or <64 x i8> [[TMP9]], zeroinitializer6696; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP5]], <64 x i8> [[TMP10]], <64 x i8> [[TMP7]]6697; CHECK-NEXT: [[TMP11:%.*]] = select <64 x i1> [[TMP6]], <64 x i8> [[TMP4]], <64 x i8> zeroinitializer6698; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86699; CHECK-NEXT: ret <64 x i8> [[TMP11]]6700;6701 %res = call <64 x i8> @llvm.x86.avx512.mask.psubs.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> zeroinitializer, i64 %mask)6702 ret <64 x i8> %res6703}6704 6705define <64 x i8> @test_mask_subs_epi8_rm_512(<64 x i8> %a, ptr %ptr_b) nounwind #0 {6706; CHECK-LABEL: @test_mask_subs_epi8_rm_512(6707; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86708; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 86709; CHECK-NEXT: call void @llvm.donothing()6710; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 06711; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]6712; CHECK: 3:6713; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]6714; CHECK-NEXT: unreachable6715; CHECK: 4:6716; CHECK-NEXT: [[B:%.*]] = load <64 x i8>, ptr [[PTR_B:%.*]], align 646717; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR_B]] to i646718; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220806719; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr6720; CHECK-NEXT: [[_MSLD:%.*]] = load <64 x i8>, ptr [[TMP7]], align 646721; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP2]], [[_MSLD]]6722; CHECK-NEXT: [[TMP8:%.*]] = call <64 x i8> @llvm.ssub.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B]])6723; CHECK-NEXT: store <64 x i8> [[_MSPROP]], ptr @__msan_retval_tls, align 86724; CHECK-NEXT: ret <64 x i8> [[TMP8]]6725;6726 %b = load <64 x i8>, ptr %ptr_b6727 %res = call <64 x i8> @llvm.x86.avx512.mask.psubs.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> zeroinitializer, i64 -1)6728 ret <64 x i8> %res6729}6730 6731define <64 x i8> @test_mask_subs_epi8_rmk_512(<64 x i8> %a, ptr %ptr_b, <64 x i8> %passThru, i64 %mask) nounwind #0 {6732; CHECK-LABEL: @test_mask_subs_epi8_rmk_512(6733; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86734; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 86735; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 136), align 86736; CHECK-NEXT: [[TMP4:%.*]] = load <64 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 86737; CHECK-NEXT: call void @llvm.donothing()6738; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 06739; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF1]]6740; CHECK: 5:6741; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]6742; CHECK-NEXT: unreachable6743; CHECK: 6:6744; CHECK-NEXT: [[B:%.*]] = load <64 x i8>, ptr [[PTR_B:%.*]], align 646745; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[PTR_B]] to i646746; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220806747; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr6748; CHECK-NEXT: [[_MSLD:%.*]] = load <64 x i8>, ptr [[TMP9]], align 646749; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP2]], [[_MSLD]]6750; CHECK-NEXT: [[TMP10:%.*]] = call <64 x i8> @llvm.ssub.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B]])6751; CHECK-NEXT: [[TMP11:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>6752; CHECK-NEXT: [[TMP12:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>6753; CHECK-NEXT: [[TMP13:%.*]] = select <64 x i1> [[TMP12]], <64 x i8> [[_MSPROP]], <64 x i8> [[TMP4]]6754; CHECK-NEXT: [[TMP14:%.*]] = xor <64 x i8> [[TMP10]], [[PASSTHRU:%.*]]6755; CHECK-NEXT: [[TMP15:%.*]] = or <64 x i8> [[TMP14]], [[_MSPROP]]6756; CHECK-NEXT: [[TMP16:%.*]] = or <64 x i8> [[TMP15]], [[TMP4]]6757; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP11]], <64 x i8> [[TMP16]], <64 x i8> [[TMP13]]6758; CHECK-NEXT: [[TMP17:%.*]] = select <64 x i1> [[TMP12]], <64 x i8> [[TMP10]], <64 x i8> [[PASSTHRU]]6759; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86760; CHECK-NEXT: ret <64 x i8> [[TMP17]]6761;6762 %b = load <64 x i8>, ptr %ptr_b6763 %res = call <64 x i8> @llvm.x86.avx512.mask.psubs.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> %passThru, i64 %mask)6764 ret <64 x i8> %res6765}6766 6767define <64 x i8> @test_mask_subs_epi8_rmkz_512(<64 x i8> %a, ptr %ptr_b, i64 %mask) nounwind #0 {6768; CHECK-LABEL: @test_mask_subs_epi8_rmkz_512(6769; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86770; CHECK-NEXT: [[TMP2:%.*]] = load <64 x i8>, ptr @__msan_param_tls, align 86771; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 72), align 86772; CHECK-NEXT: call void @llvm.donothing()6773; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 06774; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]6775; CHECK: 4:6776; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR7]]6777; CHECK-NEXT: unreachable6778; CHECK: 5:6779; CHECK-NEXT: [[B:%.*]] = load <64 x i8>, ptr [[PTR_B:%.*]], align 646780; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[PTR_B]] to i646781; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220806782; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr6783; CHECK-NEXT: [[_MSLD:%.*]] = load <64 x i8>, ptr [[TMP8]], align 646784; CHECK-NEXT: [[_MSPROP:%.*]] = or <64 x i8> [[TMP2]], [[_MSLD]]6785; CHECK-NEXT: [[TMP9:%.*]] = call <64 x i8> @llvm.ssub.sat.v64i8(<64 x i8> [[A:%.*]], <64 x i8> [[B]])6786; CHECK-NEXT: [[TMP10:%.*]] = bitcast i64 [[TMP3]] to <64 x i1>6787; CHECK-NEXT: [[TMP11:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1>6788; CHECK-NEXT: [[TMP12:%.*]] = select <64 x i1> [[TMP11]], <64 x i8> [[_MSPROP]], <64 x i8> zeroinitializer6789; CHECK-NEXT: [[TMP13:%.*]] = xor <64 x i8> [[TMP9]], zeroinitializer6790; CHECK-NEXT: [[TMP14:%.*]] = or <64 x i8> [[TMP13]], [[_MSPROP]]6791; CHECK-NEXT: [[TMP15:%.*]] = or <64 x i8> [[TMP14]], zeroinitializer6792; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <64 x i1> [[TMP10]], <64 x i8> [[TMP15]], <64 x i8> [[TMP12]]6793; CHECK-NEXT: [[TMP16:%.*]] = select <64 x i1> [[TMP11]], <64 x i8> [[TMP9]], <64 x i8> zeroinitializer6794; CHECK-NEXT: store <64 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86795; CHECK-NEXT: ret <64 x i8> [[TMP16]]6796;6797 %b = load <64 x i8>, ptr %ptr_b6798 %res = call <64 x i8> @llvm.x86.avx512.mask.psubs.b.512(<64 x i8> %a, <64 x i8> %b, <64 x i8> zeroinitializer, i64 %mask)6799 ret <64 x i8> %res6800}6801 6802declare <64 x i8> @llvm.x86.avx512.mask.psubs.b.512(<64 x i8>, <64 x i8>, <64 x i8>, i64)6803 6804declare <32 x i16> @llvm.x86.avx512.mask.psrlv32hi(<32 x i16>, <32 x i16>, <32 x i16>, i32)6805 6806define <32 x i16> @test_int_x86_avx512_psrlv32hi(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2) nounwind #0 {6807; CHECK-LABEL: @test_int_x86_avx512_psrlv32hi(6808; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86809; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86810; CHECK-NEXT: call void @llvm.donothing()6811; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]6812; CHECK-NEXT: [[TMP3:%.*]] = call <32 x i16> @llvm.x86.avx512.psrlv.w.512(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])6813; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 86814; CHECK-NEXT: ret <32 x i16> [[TMP3]]6815;6816 %res = call <32 x i16> @llvm.x86.avx512.mask.psrlv32hi(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 -1)6817 ret <32 x i16> %res6818}6819 6820define <32 x i16> @test_int_x86_avx512_mask_psrlv32hi(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {6821; CHECK-LABEL: @test_int_x86_avx512_mask_psrlv32hi(6822; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86823; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86824; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 86825; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86826; CHECK-NEXT: call void @llvm.donothing()6827; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]6828; CHECK-NEXT: [[TMP5:%.*]] = call <32 x i16> @llvm.x86.avx512.psrlv.w.512(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])6829; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>6830; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>6831; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]6832; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i16> [[TMP5]], [[X2:%.*]]6833; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[_MSPROP]]6834; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP4]]6835; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP11]], <32 x i16> [[TMP8]]6836; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP5]], <32 x i16> [[X2]]6837; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86838; CHECK-NEXT: ret <32 x i16> [[TMP12]]6839;6840 %res = call <32 x i16> @llvm.x86.avx512.mask.psrlv32hi(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3)6841 ret <32 x i16> %res6842}6843 6844define <32 x i16> @test_int_x86_avx512_maskz_psrlv32hi(<32 x i16> %x0, <32 x i16> %x1, i32 %x3) nounwind #0 {6845; CHECK-LABEL: @test_int_x86_avx512_maskz_psrlv32hi(6846; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86847; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86848; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86849; CHECK-NEXT: call void @llvm.donothing()6850; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]6851; CHECK-NEXT: [[TMP4:%.*]] = call <32 x i16> @llvm.x86.avx512.psrlv.w.512(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])6852; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>6853; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>6854; CHECK-NEXT: [[TMP7:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[_MSPROP]], <32 x i16> zeroinitializer6855; CHECK-NEXT: [[TMP8:%.*]] = xor <32 x i16> [[TMP4]], zeroinitializer6856; CHECK-NEXT: [[TMP9:%.*]] = or <32 x i16> [[TMP8]], [[_MSPROP]]6857; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], zeroinitializer6858; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP5]], <32 x i16> [[TMP10]], <32 x i16> [[TMP7]]6859; CHECK-NEXT: [[TMP11:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP4]], <32 x i16> zeroinitializer6860; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86861; CHECK-NEXT: ret <32 x i16> [[TMP11]]6862;6863 %res = call <32 x i16> @llvm.x86.avx512.mask.psrlv32hi(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> zeroinitializer, i32 %x3)6864 ret <32 x i16> %res6865}6866 6867declare <32 x i16> @llvm.x86.avx512.mask.psrav32.hi(<32 x i16>, <32 x i16>, <32 x i16>, i32)6868 6869define <32 x i16> @test_int_x86_avx512_psrav32_hi(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2) nounwind #0 {6870; CHECK-LABEL: @test_int_x86_avx512_psrav32_hi(6871; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86872; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86873; CHECK-NEXT: call void @llvm.donothing()6874; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]6875; CHECK-NEXT: [[TMP3:%.*]] = call <32 x i16> @llvm.x86.avx512.psrav.w.512(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])6876; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 86877; CHECK-NEXT: ret <32 x i16> [[TMP3]]6878;6879 %res = call <32 x i16> @llvm.x86.avx512.mask.psrav32.hi(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 -1)6880 ret <32 x i16> %res6881}6882 6883define <32 x i16> @test_int_x86_avx512_mask_psrav32_hi(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {6884; CHECK-LABEL: @test_int_x86_avx512_mask_psrav32_hi(6885; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86886; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86887; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 86888; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86889; CHECK-NEXT: call void @llvm.donothing()6890; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]6891; CHECK-NEXT: [[TMP5:%.*]] = call <32 x i16> @llvm.x86.avx512.psrav.w.512(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])6892; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>6893; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>6894; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]6895; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i16> [[TMP5]], [[X2:%.*]]6896; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[_MSPROP]]6897; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP4]]6898; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP11]], <32 x i16> [[TMP8]]6899; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP5]], <32 x i16> [[X2]]6900; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86901; CHECK-NEXT: ret <32 x i16> [[TMP12]]6902;6903 %res = call <32 x i16> @llvm.x86.avx512.mask.psrav32.hi(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3)6904 ret <32 x i16> %res6905}6906 6907define <32 x i16> @test_int_x86_avx512_maskz_psrav32_hi(<32 x i16> %x0, <32 x i16> %x1, i32 %x3) nounwind #0 {6908; CHECK-LABEL: @test_int_x86_avx512_maskz_psrav32_hi(6909; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86910; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86911; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86912; CHECK-NEXT: call void @llvm.donothing()6913; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]6914; CHECK-NEXT: [[TMP4:%.*]] = call <32 x i16> @llvm.x86.avx512.psrav.w.512(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])6915; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>6916; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>6917; CHECK-NEXT: [[TMP7:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[_MSPROP]], <32 x i16> zeroinitializer6918; CHECK-NEXT: [[TMP8:%.*]] = xor <32 x i16> [[TMP4]], zeroinitializer6919; CHECK-NEXT: [[TMP9:%.*]] = or <32 x i16> [[TMP8]], [[_MSPROP]]6920; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], zeroinitializer6921; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP5]], <32 x i16> [[TMP10]], <32 x i16> [[TMP7]]6922; CHECK-NEXT: [[TMP11:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP4]], <32 x i16> zeroinitializer6923; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86924; CHECK-NEXT: ret <32 x i16> [[TMP11]]6925;6926 %res = call <32 x i16> @llvm.x86.avx512.mask.psrav32.hi(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> zeroinitializer, i32 %x3)6927 ret <32 x i16> %res6928}6929 6930declare <32 x i16> @llvm.x86.avx512.mask.psllv32hi(<32 x i16>, <32 x i16>, <32 x i16>, i32)6931 6932define <32 x i16> @test_int_x86_avx512_psllv32hi(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2) nounwind #0 {6933; CHECK-LABEL: @test_int_x86_avx512_psllv32hi(6934; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86935; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86936; CHECK-NEXT: call void @llvm.donothing()6937; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]6938; CHECK-NEXT: [[TMP3:%.*]] = call <32 x i16> @llvm.x86.avx512.psllv.w.512(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])6939; CHECK-NEXT: store <32 x i16> [[_MSPROP]], ptr @__msan_retval_tls, align 86940; CHECK-NEXT: ret <32 x i16> [[TMP3]]6941;6942 %res = call <32 x i16> @llvm.x86.avx512.mask.psllv32hi(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 -1)6943 ret <32 x i16> %res6944}6945 6946define <32 x i16> @test_int_x86_avx512_mask_psllv32hi(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3) nounwind #0 {6947; CHECK-LABEL: @test_int_x86_avx512_mask_psllv32hi(6948; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86949; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86950; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 192), align 86951; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86952; CHECK-NEXT: call void @llvm.donothing()6953; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]6954; CHECK-NEXT: [[TMP5:%.*]] = call <32 x i16> @llvm.x86.avx512.psllv.w.512(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])6955; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>6956; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>6957; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[_MSPROP]], <32 x i16> [[TMP4]]6958; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i16> [[TMP5]], [[X2:%.*]]6959; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], [[_MSPROP]]6960; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i16> [[TMP10]], [[TMP4]]6961; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP11]], <32 x i16> [[TMP8]]6962; CHECK-NEXT: [[TMP12:%.*]] = select <32 x i1> [[TMP7]], <32 x i16> [[TMP5]], <32 x i16> [[X2]]6963; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86964; CHECK-NEXT: ret <32 x i16> [[TMP12]]6965;6966 %res = call <32 x i16> @llvm.x86.avx512.mask.psllv32hi(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2, i32 %x3)6967 ret <32 x i16> %res6968}6969 6970define <32 x i16> @test_int_x86_avx512_maskz_psllv32hi(<32 x i16> %x0, <32 x i16> %x1, i32 %x3) nounwind #0 {6971; CHECK-LABEL: @test_int_x86_avx512_maskz_psllv32hi(6972; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86973; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 86974; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 86975; CHECK-NEXT: call void @llvm.donothing()6976; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i16> [[TMP1]], [[TMP2]]6977; CHECK-NEXT: [[TMP4:%.*]] = call <32 x i16> @llvm.x86.avx512.psllv.w.512(<32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]])6978; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[TMP3]] to <32 x i1>6979; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[X3:%.*]] to <32 x i1>6980; CHECK-NEXT: [[TMP7:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[_MSPROP]], <32 x i16> zeroinitializer6981; CHECK-NEXT: [[TMP8:%.*]] = xor <32 x i16> [[TMP4]], zeroinitializer6982; CHECK-NEXT: [[TMP9:%.*]] = or <32 x i16> [[TMP8]], [[_MSPROP]]6983; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i16> [[TMP9]], zeroinitializer6984; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP5]], <32 x i16> [[TMP10]], <32 x i16> [[TMP7]]6985; CHECK-NEXT: [[TMP11:%.*]] = select <32 x i1> [[TMP6]], <32 x i16> [[TMP4]], <32 x i16> zeroinitializer6986; CHECK-NEXT: store <32 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 86987; CHECK-NEXT: ret <32 x i16> [[TMP11]]6988;6989 %res = call <32 x i16> @llvm.x86.avx512.mask.psllv32hi(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> zeroinitializer, i32 %x3)6990 ret <32 x i16> %res6991}6992 6993declare <32 x i8> @llvm.x86.avx512.mask.pmov.wb.512(<32 x i16>, <32 x i8>, i32)6994 6995define <32 x i8> @test_int_x86_avx512_pmov_wb_512(<32 x i16> %x0, <32 x i8> %x1) nounwind #0 {6996; CHECK-LABEL: @test_int_x86_avx512_pmov_wb_512(6997; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 86998; CHECK-NEXT: call void @llvm.donothing()6999; CHECK-NEXT: [[_MSPROP:%.*]] = trunc <32 x i16> [[TMP1]] to <32 x i8>7000; CHECK-NEXT: [[TMP2:%.*]] = trunc <32 x i16> [[X0:%.*]] to <32 x i8>7001; CHECK-NEXT: store <32 x i8> [[_MSPROP]], ptr @__msan_retval_tls, align 87002; CHECK-NEXT: ret <32 x i8> [[TMP2]]7003;7004 %res = call <32 x i8> @llvm.x86.avx512.mask.pmov.wb.512(<32 x i16> %x0, <32 x i8> %x1, i32 -1)7005 ret <32 x i8> %res7006}7007 7008define <32 x i8> @test_int_x86_avx512_mask_pmov_wb_512(<32 x i16> %x0, <32 x i8> %x1, i32 %x2) nounwind #0 {7009; CHECK-LABEL: @test_int_x86_avx512_mask_pmov_wb_512(7010; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 87011; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 96), align 87012; CHECK-NEXT: [[TMP3:%.*]] = load <32 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87013; CHECK-NEXT: call void @llvm.donothing()7014; CHECK-NEXT: [[_MSPROP:%.*]] = trunc <32 x i16> [[TMP1]] to <32 x i8>7015; CHECK-NEXT: [[TMP4:%.*]] = trunc <32 x i16> [[X0:%.*]] to <32 x i8>7016; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[TMP2]] to <32 x i1>7017; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[X2:%.*]] to <32 x i1>7018; CHECK-NEXT: [[TMP7:%.*]] = select <32 x i1> [[TMP6]], <32 x i8> [[_MSPROP]], <32 x i8> [[TMP3]]7019; CHECK-NEXT: [[TMP8:%.*]] = xor <32 x i8> [[TMP4]], [[X1:%.*]]7020; CHECK-NEXT: [[TMP9:%.*]] = or <32 x i8> [[TMP8]], [[_MSPROP]]7021; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i8> [[TMP9]], [[TMP3]]7022; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP5]], <32 x i8> [[TMP10]], <32 x i8> [[TMP7]]7023; CHECK-NEXT: [[TMP11:%.*]] = select <32 x i1> [[TMP6]], <32 x i8> [[TMP4]], <32 x i8> [[X1]]7024; CHECK-NEXT: store <32 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87025; CHECK-NEXT: ret <32 x i8> [[TMP11]]7026;7027 %res = call <32 x i8> @llvm.x86.avx512.mask.pmov.wb.512(<32 x i16> %x0, <32 x i8> %x1, i32 %x2)7028 ret <32 x i8> %res7029}7030 7031define <32 x i8> @test_int_x86_avx512_maskz_pmov_wb_512(<32 x i16> %x0, i32 %x2) nounwind #0 {7032; CHECK-LABEL: @test_int_x86_avx512_maskz_pmov_wb_512(7033; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i16>, ptr @__msan_param_tls, align 87034; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 87035; CHECK-NEXT: call void @llvm.donothing()7036; CHECK-NEXT: [[_MSPROP:%.*]] = trunc <32 x i16> [[TMP1]] to <32 x i8>7037; CHECK-NEXT: [[TMP3:%.*]] = trunc <32 x i16> [[X0:%.*]] to <32 x i8>7038; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32 [[TMP2]] to <32 x i1>7039; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[X2:%.*]] to <32 x i1>7040; CHECK-NEXT: [[TMP6:%.*]] = select <32 x i1> [[TMP5]], <32 x i8> [[_MSPROP]], <32 x i8> zeroinitializer7041; CHECK-NEXT: [[TMP7:%.*]] = xor <32 x i8> [[TMP3]], zeroinitializer7042; CHECK-NEXT: [[TMP8:%.*]] = or <32 x i8> [[TMP7]], [[_MSPROP]]7043; CHECK-NEXT: [[TMP9:%.*]] = or <32 x i8> [[TMP8]], zeroinitializer7044; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP4]], <32 x i8> [[TMP9]], <32 x i8> [[TMP6]]7045; CHECK-NEXT: [[TMP10:%.*]] = select <32 x i1> [[TMP5]], <32 x i8> [[TMP3]], <32 x i8> zeroinitializer7046; CHECK-NEXT: store <32 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 87047; CHECK-NEXT: ret <32 x i8> [[TMP10]]7048;7049 %res = call <32 x i8> @llvm.x86.avx512.mask.pmov.wb.512(<32 x i16> %x0, <32 x i8> zeroinitializer, i32 %x2)7050 ret <32 x i8> %res7051}7052 7053attributes #0 = { sanitize_memory }7054