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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt < %s -msan-check-access-address=0 -S -passes=msan 2>&1 | FileCheck %s3 4target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"5target triple = "x86_64-unknown-linux-gnu"6 7%struct.Double4 = type { [4 x double] }8%struct.LongDouble2 = type { [2 x x86_fp80] }9%struct.LongDouble4 = type { [4 x x86_fp80] }10%struct.IntInt = type { i32, i32 }11%struct.Int64Int64 = type { i64, i64 }12%struct.DoubleDouble = type { double, double }13%struct.DoubleFloat = type { double, float }14%struct.__va_list_tag = type { i32, i32, ptr, ptr }15 16define linkonce_odr dso_local void @_Z4testIcEvT_(i8 noundef signext %arg) sanitize_memory {17; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testIcEvT_(18; CHECK-SAME: i8 noundef signext [[ARG:%.*]]) #[[ATTR0:[0-9]+]] {19; CHECK-NEXT: entry:20; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr @__msan_param_tls, align 821; CHECK-NEXT: call void @llvm.donothing()22; CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca i8, align 123; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i6424; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 8796093022208025; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr26; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP3]], i8 -1, i64 1, i1 false)27; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i6428; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 8796093022208029; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr30; CHECK-NEXT: store i8 [[TMP0]], ptr [[TMP6]], align 131; CHECK-NEXT: store i8 [[ARG]], ptr [[ARG_ADDR]], align 132; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 833; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG_ADDR]])34; CHECK-NEXT: [[TMP7:%.*]] = load i8, ptr [[ARG_ADDR]], align 135; CHECK-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i6436; CHECK-NEXT: [[TMP9:%.*]] = xor i64 [[TMP8]], 8796093022208037; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr38; CHECK-NEXT: [[_MSLD:%.*]] = load i8, ptr [[TMP10]], align 139; CHECK-NEXT: [[_MSPROP:%.*]] = sext i8 [[_MSLD]] to i3240; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[TMP7]] to i3241; CHECK-NEXT: store i8 [[_MSLD]], ptr @__msan_param_tls, align 842; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 843; CHECK-NEXT: store i32 [[_MSPROP]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 844; CHECK-NEXT: store i32 [[_MSPROP]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 16), align 845; CHECK-NEXT: store i64 0, ptr @__msan_va_arg_overflow_size_tls, align 846; CHECK-NEXT: call void (i8, i32, ...) @_Z5test2IcEvT_iz(i8 noundef signext [[TMP7]], i32 noundef 1, i32 noundef [[CONV]])47; CHECK-NEXT: ret void48;49entry:50 %arg.addr = alloca i8, align 151 store i8 %arg, ptr %arg.addr, align 152 call void @_Z3usePv(ptr noundef nonnull %arg.addr)53 %0 = load i8, ptr %arg.addr, align 154 %conv = sext i8 %0 to i3255 call void (i8, i32, ...) @_Z5test2IcEvT_iz(i8 noundef signext %0, i32 noundef 1, i32 noundef %conv)56 ret void57}58 59define linkonce_odr dso_local void @_Z4testIiEvT_(i32 noundef %arg) sanitize_memory {60; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testIiEvT_(61; CHECK-SAME: i32 noundef [[ARG:%.*]]) #[[ATTR0]] {62; CHECK-NEXT: entry:63; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @__msan_param_tls, align 864; CHECK-NEXT: call void @llvm.donothing()65; CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 466; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i6467; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 8796093022208068; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr69; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP3]], i8 -1, i64 4, i1 false)70; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i6471; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 8796093022208072; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr73; CHECK-NEXT: store i32 [[TMP0]], ptr [[TMP6]], align 474; CHECK-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 475; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 876; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG_ADDR]])77; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[ARG_ADDR]], align 478; CHECK-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i6479; CHECK-NEXT: [[TMP9:%.*]] = xor i64 [[TMP8]], 8796093022208080; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr81; CHECK-NEXT: [[_MSLD:%.*]] = load i32, ptr [[TMP10]], align 482; CHECK-NEXT: store i32 [[_MSLD]], ptr @__msan_param_tls, align 883; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 884; CHECK-NEXT: store i32 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 885; CHECK-NEXT: store i32 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 16), align 886; CHECK-NEXT: store i64 0, ptr @__msan_va_arg_overflow_size_tls, align 887; CHECK-NEXT: call void (i32, i32, ...) @_Z5test2IiEvT_iz(i32 noundef [[TMP7]], i32 noundef 1, i32 noundef [[TMP7]])88; CHECK-NEXT: ret void89;90entry:91 %arg.addr = alloca i32, align 492 store i32 %arg, ptr %arg.addr, align 493 call void @_Z3usePv(ptr noundef nonnull %arg.addr)94 %0 = load i32, ptr %arg.addr, align 495 call void (i32, i32, ...) @_Z5test2IiEvT_iz(i32 noundef %0, i32 noundef 1, i32 noundef %0)96 ret void97}98 99define linkonce_odr dso_local void @_Z4testIfEvT_(float noundef %arg) sanitize_memory {100; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testIfEvT_(101; CHECK-SAME: float noundef [[ARG:%.*]]) #[[ATTR0]] {102; CHECK-NEXT: entry:103; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @__msan_param_tls, align 8104; CHECK-NEXT: call void @llvm.donothing()105; CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca float, align 4106; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64107; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080108; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr109; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP3]], i8 -1, i64 4, i1 false)110; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64111; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080112; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr113; CHECK-NEXT: store i32 [[TMP0]], ptr [[TMP6]], align 4114; CHECK-NEXT: store float [[ARG]], ptr [[ARG_ADDR]], align 4115; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8116; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG_ADDR]])117; CHECK-NEXT: [[TMP7:%.*]] = load float, ptr [[ARG_ADDR]], align 4118; CHECK-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64119; CHECK-NEXT: [[TMP9:%.*]] = xor i64 [[TMP8]], 87960930222080120; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr121; CHECK-NEXT: [[_MSLD:%.*]] = load i32, ptr [[TMP10]], align 4122; CHECK-NEXT: [[TMP11:%.*]] = zext i32 [[_MSLD]] to i64123; CHECK-NEXT: [[CONV:%.*]] = fpext float [[TMP7]] to double124; CHECK-NEXT: store i32 [[_MSLD]], ptr @__msan_param_tls, align 8125; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8126; CHECK-NEXT: store i64 [[TMP11]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8127; CHECK-NEXT: store i64 [[TMP11]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 64), align 8128; CHECK-NEXT: store i64 0, ptr @__msan_va_arg_overflow_size_tls, align 8129; CHECK-NEXT: call void (float, i32, ...) @_Z5test2IfEvT_iz(float noundef [[TMP7]], i32 noundef 1, double noundef [[CONV]])130; CHECK-NEXT: ret void131;132entry:133 %arg.addr = alloca float, align 4134 store float %arg, ptr %arg.addr, align 4135 call void @_Z3usePv(ptr noundef nonnull %arg.addr)136 %0 = load float, ptr %arg.addr, align 4137 %conv = fpext float %0 to double138 call void (float, i32, ...) @_Z5test2IfEvT_iz(float noundef %0, i32 noundef 1, double noundef %conv)139 ret void140}141 142define linkonce_odr dso_local void @_Z4testIdEvT_(double noundef %arg) sanitize_memory {143; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testIdEvT_(144; CHECK-SAME: double noundef [[ARG:%.*]]) #[[ATTR0]] {145; CHECK-NEXT: entry:146; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 8147; CHECK-NEXT: call void @llvm.donothing()148; CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca double, align 8149; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64150; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080151; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr152; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP3]], i8 -1, i64 8, i1 false)153; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64154; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080155; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr156; CHECK-NEXT: store i64 [[TMP0]], ptr [[TMP6]], align 8157; CHECK-NEXT: store double [[ARG]], ptr [[ARG_ADDR]], align 8158; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8159; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG_ADDR]])160; CHECK-NEXT: [[TMP7:%.*]] = load double, ptr [[ARG_ADDR]], align 8161; CHECK-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64162; CHECK-NEXT: [[TMP9:%.*]] = xor i64 [[TMP8]], 87960930222080163; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr164; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP10]], align 8165; CHECK-NEXT: store i64 [[_MSLD]], ptr @__msan_param_tls, align 8166; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8167; CHECK-NEXT: store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8168; CHECK-NEXT: store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 64), align 8169; CHECK-NEXT: store i64 0, ptr @__msan_va_arg_overflow_size_tls, align 8170; CHECK-NEXT: call void (double, i32, ...) @_Z5test2IdEvT_iz(double noundef [[TMP7]], i32 noundef 1, double noundef [[TMP7]])171; CHECK-NEXT: ret void172;173entry:174 %arg.addr = alloca double, align 8175 store double %arg, ptr %arg.addr, align 8176 call void @_Z3usePv(ptr noundef nonnull %arg.addr)177 %0 = load double, ptr %arg.addr, align 8178 call void (double, i32, ...) @_Z5test2IdEvT_iz(double noundef %0, i32 noundef 1, double noundef %0)179 ret void180}181 182define linkonce_odr dso_local void @_Z4testIeEvT_(x86_fp80 noundef %arg) sanitize_memory {183; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testIeEvT_(184; CHECK-SAME: x86_fp80 noundef [[ARG:%.*]]) #[[ATTR0]] {185; CHECK-NEXT: entry:186; CHECK-NEXT: [[TMP0:%.*]] = load i80, ptr @__msan_param_tls, align 8187; CHECK-NEXT: call void @llvm.donothing()188; CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca x86_fp80, align 16189; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64190; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080191; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr192; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP3]], i8 -1, i64 16, i1 false)193; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64194; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080195; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr196; CHECK-NEXT: store i80 [[TMP0]], ptr [[TMP6]], align 16197; CHECK-NEXT: store x86_fp80 [[ARG]], ptr [[ARG_ADDR]], align 16198; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8199; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG_ADDR]])200; CHECK-NEXT: [[TMP7:%.*]] = load x86_fp80, ptr [[ARG_ADDR]], align 16201; CHECK-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64202; CHECK-NEXT: [[TMP9:%.*]] = xor i64 [[TMP8]], 87960930222080203; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr204; CHECK-NEXT: [[_MSLD:%.*]] = load i80, ptr [[TMP10]], align 16205; CHECK-NEXT: store i80 [[_MSLD]], ptr @__msan_param_tls, align 8206; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8207; CHECK-NEXT: store i80 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 8208; CHECK-NEXT: store i80 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 176), align 8209; CHECK-NEXT: store i64 16, ptr @__msan_va_arg_overflow_size_tls, align 8210; CHECK-NEXT: call void (x86_fp80, i32, ...) @_Z5test2IeEvT_iz(x86_fp80 noundef [[TMP7]], i32 noundef 1, x86_fp80 noundef [[TMP7]])211; CHECK-NEXT: ret void212;213entry:214 %arg.addr = alloca x86_fp80, align 16215 store x86_fp80 %arg, ptr %arg.addr, align 16216 call void @_Z3usePv(ptr noundef nonnull %arg.addr)217 %0 = load x86_fp80, ptr %arg.addr, align 16218 call void (x86_fp80, i32, ...) @_Z5test2IeEvT_iz(x86_fp80 noundef %0, i32 noundef 1, x86_fp80 noundef %0)219 ret void220}221 222define linkonce_odr dso_local void @_Z4testI6IntIntEvT_(i64 %arg.coerce) sanitize_memory {223; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testI6IntIntEvT_(224; CHECK-SAME: i64 [[ARG_COERCE:%.*]]) #[[ATTR0]] {225; CHECK-NEXT: entry:226; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 8227; CHECK-NEXT: call void @llvm.donothing()228; CHECK-NEXT: [[ARG:%.*]] = alloca [[STRUCT_INTINT:%.*]], align 8229; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG]] to i64230; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080231; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr232; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP3]], i8 -1, i64 8, i1 false)233; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARG]] to i64234; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080235; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr236; CHECK-NEXT: store i64 [[TMP0]], ptr [[TMP6]], align 8237; CHECK-NEXT: store i64 [[ARG_COERCE]], ptr [[ARG]], align 8238; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8239; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])240; CHECK-NEXT: [[AGG_TMP_SROA_0_0_COPYLOAD:%.*]] = load i64, ptr [[ARG]], align 8241; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARG]] to i64242; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080243; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr244; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP9]], align 8245; CHECK-NEXT: store i64 [[_MSLD]], ptr @__msan_param_tls, align 8246; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8247; CHECK-NEXT: store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8248; CHECK-NEXT: store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 16), align 8249; CHECK-NEXT: store i64 0, ptr @__msan_va_arg_overflow_size_tls, align 8250; CHECK-NEXT: call void (i64, i32, ...) @_Z5test2I6IntIntEvT_iz(i64 [[AGG_TMP_SROA_0_0_COPYLOAD]], i32 noundef 1, i64 [[AGG_TMP_SROA_0_0_COPYLOAD]])251; CHECK-NEXT: ret void252;253entry:254 %arg = alloca %struct.IntInt, align 8255 store i64 %arg.coerce, ptr %arg, align 8256 call void @_Z3usePv(ptr noundef nonnull %arg)257 %agg.tmp.sroa.0.0.copyload = load i64, ptr %arg, align 8258 call void (i64, i32, ...) @_Z5test2I6IntIntEvT_iz(i64 %agg.tmp.sroa.0.0.copyload, i32 noundef 1, i64 %agg.tmp.sroa.0.0.copyload)259 ret void260}261 262define linkonce_odr dso_local void @_Z4testI10Int64Int64EvT_(i64 %arg.coerce0, i64 %arg.coerce1) sanitize_memory {263; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testI10Int64Int64EvT_(264; CHECK-SAME: i64 [[ARG_COERCE0:%.*]], i64 [[ARG_COERCE1:%.*]]) #[[ATTR0]] {265; CHECK-NEXT: entry:266; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 8267; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8268; CHECK-NEXT: call void @llvm.donothing()269; CHECK-NEXT: [[ARG:%.*]] = alloca [[STRUCT_INT64INT64:%.*]], align 8270; CHECK-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[ARG]] to i64271; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[TMP2]], 87960930222080272; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr273; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP4]], i8 -1, i64 16, i1 false)274; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[ARG]] to i64275; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080276; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr277; CHECK-NEXT: store i64 [[TMP0]], ptr [[TMP7]], align 8278; CHECK-NEXT: store i64 [[ARG_COERCE0]], ptr [[ARG]], align 8279; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds { i64, i64 }, ptr [[ARG]], i64 0, i32 1280; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[TMP8]] to i64281; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], 87960930222080282; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr283; CHECK-NEXT: store i64 [[TMP1]], ptr [[TMP11]], align 8284; CHECK-NEXT: store i64 [[ARG_COERCE1]], ptr [[TMP8]], align 8285; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8286; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])287; CHECK-NEXT: [[AGG_TMP_SROA_0_0_COPYLOAD:%.*]] = load i64, ptr [[ARG]], align 8288; CHECK-NEXT: [[TMP12:%.*]] = ptrtoint ptr [[ARG]] to i64289; CHECK-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], 87960930222080290; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr291; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP14]], align 8292; CHECK-NEXT: [[AGG_TMP_SROA_2_0_COPYLOAD:%.*]] = load i64, ptr [[TMP8]], align 8293; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[TMP8]] to i64294; CHECK-NEXT: [[TMP16:%.*]] = xor i64 [[TMP15]], 87960930222080295; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr296; CHECK-NEXT: [[_MSLD1:%.*]] = load i64, ptr [[TMP17]], align 8297; CHECK-NEXT: store i64 [[_MSLD]], ptr @__msan_param_tls, align 8298; CHECK-NEXT: store i64 [[_MSLD1]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8299; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8300; CHECK-NEXT: store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 8301; CHECK-NEXT: store i64 [[_MSLD1]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 8302; CHECK-NEXT: store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 24), align 8303; CHECK-NEXT: store i64 [[_MSLD1]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 32), align 8304; CHECK-NEXT: store i64 0, ptr @__msan_va_arg_overflow_size_tls, align 8305; CHECK-NEXT: call void (i64, i64, i32, ...) @_Z5test2I10Int64Int64EvT_iz(i64 [[AGG_TMP_SROA_0_0_COPYLOAD]], i64 [[AGG_TMP_SROA_2_0_COPYLOAD]], i32 noundef 1, i64 [[AGG_TMP_SROA_0_0_COPYLOAD]], i64 [[AGG_TMP_SROA_2_0_COPYLOAD]])306; CHECK-NEXT: ret void307;308entry:309 %arg = alloca %struct.Int64Int64, align 8310 store i64 %arg.coerce0, ptr %arg, align 8311 %0 = getelementptr inbounds { i64, i64 }, ptr %arg, i64 0, i32 1312 store i64 %arg.coerce1, ptr %0, align 8313 call void @_Z3usePv(ptr noundef nonnull %arg)314 %agg.tmp.sroa.0.0.copyload = load i64, ptr %arg, align 8315 %agg.tmp.sroa.2.0.copyload = load i64, ptr %0, align 8316 call void (i64, i64, i32, ...) @_Z5test2I10Int64Int64EvT_iz(i64 %agg.tmp.sroa.0.0.copyload, i64 %agg.tmp.sroa.2.0.copyload, i32 noundef 1, i64 %agg.tmp.sroa.0.0.copyload, i64 %agg.tmp.sroa.2.0.copyload)317 ret void318}319 320define linkonce_odr dso_local void @_Z4testI12DoubleDoubleEvT_(double %arg.coerce0, double %arg.coerce1) sanitize_memory {321; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testI12DoubleDoubleEvT_(322; CHECK-SAME: double [[ARG_COERCE0:%.*]], double [[ARG_COERCE1:%.*]]) #[[ATTR0]] {323; CHECK-NEXT: entry:324; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 8325; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8326; CHECK-NEXT: call void @llvm.donothing()327; CHECK-NEXT: [[ARG:%.*]] = alloca [[STRUCT_DOUBLEDOUBLE:%.*]], align 8328; CHECK-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[ARG]] to i64329; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[TMP2]], 87960930222080330; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr331; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP4]], i8 -1, i64 16, i1 false)332; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[ARG]] to i64333; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080334; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr335; CHECK-NEXT: store i64 [[TMP0]], ptr [[TMP7]], align 8336; CHECK-NEXT: store double [[ARG_COERCE0]], ptr [[ARG]], align 8337; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds { double, double }, ptr [[ARG]], i64 0, i32 1338; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[TMP8]] to i64339; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], 87960930222080340; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr341; CHECK-NEXT: store i64 [[TMP1]], ptr [[TMP11]], align 8342; CHECK-NEXT: store double [[ARG_COERCE1]], ptr [[TMP8]], align 8343; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8344; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])345; CHECK-NEXT: [[AGG_TMP_SROA_0_0_COPYLOAD:%.*]] = load double, ptr [[ARG]], align 8346; CHECK-NEXT: [[TMP12:%.*]] = ptrtoint ptr [[ARG]] to i64347; CHECK-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], 87960930222080348; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr349; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP14]], align 8350; CHECK-NEXT: [[AGG_TMP_SROA_2_0_COPYLOAD:%.*]] = load double, ptr [[TMP8]], align 8351; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[TMP8]] to i64352; CHECK-NEXT: [[TMP16:%.*]] = xor i64 [[TMP15]], 87960930222080353; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr354; CHECK-NEXT: [[_MSLD1:%.*]] = load i64, ptr [[TMP17]], align 8355; CHECK-NEXT: store i64 [[_MSLD]], ptr @__msan_param_tls, align 8356; CHECK-NEXT: store i64 [[_MSLD1]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8357; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8358; CHECK-NEXT: store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 8359; CHECK-NEXT: store i64 [[_MSLD1]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 8360; CHECK-NEXT: store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 80), align 8361; CHECK-NEXT: store i64 [[_MSLD1]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 96), align 8362; CHECK-NEXT: store i64 0, ptr @__msan_va_arg_overflow_size_tls, align 8363; CHECK-NEXT: call void (double, double, i32, ...) @_Z5test2I12DoubleDoubleEvT_iz(double [[AGG_TMP_SROA_0_0_COPYLOAD]], double [[AGG_TMP_SROA_2_0_COPYLOAD]], i32 noundef 1, double [[AGG_TMP_SROA_0_0_COPYLOAD]], double [[AGG_TMP_SROA_2_0_COPYLOAD]])364; CHECK-NEXT: ret void365;366entry:367 %arg = alloca %struct.DoubleDouble, align 8368 store double %arg.coerce0, ptr %arg, align 8369 %0 = getelementptr inbounds { double, double }, ptr %arg, i64 0, i32 1370 store double %arg.coerce1, ptr %0, align 8371 call void @_Z3usePv(ptr noundef nonnull %arg)372 %agg.tmp.sroa.0.0.copyload = load double, ptr %arg, align 8373 %agg.tmp.sroa.2.0.copyload = load double, ptr %0, align 8374 call void (double, double, i32, ...) @_Z5test2I12DoubleDoubleEvT_iz(double %agg.tmp.sroa.0.0.copyload, double %agg.tmp.sroa.2.0.copyload, i32 noundef 1, double %agg.tmp.sroa.0.0.copyload, double %agg.tmp.sroa.2.0.copyload)375 ret void376}377 378define linkonce_odr dso_local void @_Z4testI7Double4EvT_(ptr noundef byval(%struct.Double4) align 8 %arg) sanitize_memory {379; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testI7Double4EvT_(380; CHECK-SAME: ptr noundef byval([[STRUCT_DOUBLE4:%.*]]) align 8 [[ARG:%.*]]) #[[ATTR0]] {381; CHECK-NEXT: entry:382; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr [[ARG]] to i64383; CHECK-NEXT: [[TMP1:%.*]] = xor i64 [[TMP0]], 87960930222080384; CHECK-NEXT: [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to ptr385; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_param_tls, i64 32, i1 false)386; CHECK-NEXT: call void @llvm.donothing()387; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8388; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])389; CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[ARG]] to i64390; CHECK-NEXT: [[TMP4:%.*]] = xor i64 [[TMP3]], 87960930222080391; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr392; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 @__msan_param_tls, ptr align 8 [[TMP5]], i64 32, i1 false)393; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 8394; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[ARG]] to i64395; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 87960930222080396; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr397; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 40), ptr align 8 [[TMP8]], i64 32, i1 false)398; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[ARG]] to i64399; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], 87960930222080400; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr401; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 176), ptr align 8 [[TMP11]], i64 32, i1 false)402; CHECK-NEXT: store i64 32, ptr @__msan_va_arg_overflow_size_tls, align 8403; CHECK-NEXT: call void (ptr, i32, ...) @_Z5test2I7Double4EvT_iz(ptr noundef nonnull byval([[STRUCT_DOUBLE4]]) align 8 [[ARG]], i32 noundef 1, ptr noundef nonnull byval([[STRUCT_DOUBLE4]]) align 8 [[ARG]])404; CHECK-NEXT: ret void405;406entry:407 call void @_Z3usePv(ptr noundef nonnull %arg)408 call void (ptr, i32, ...) @_Z5test2I7Double4EvT_iz(ptr noundef nonnull byval(%struct.Double4) align 8 %arg, i32 noundef 1, ptr noundef nonnull byval(%struct.Double4) align 8 %arg)409 ret void410}411 412declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2413 414define linkonce_odr dso_local void @_Z4testI11DoubleFloatEvT_(double %arg.coerce0, float %arg.coerce1) sanitize_memory {415; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testI11DoubleFloatEvT_(416; CHECK-SAME: double [[ARG_COERCE0:%.*]], float [[ARG_COERCE1:%.*]]) #[[ATTR0]] {417; CHECK-NEXT: entry:418; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 8419; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8420; CHECK-NEXT: call void @llvm.donothing()421; CHECK-NEXT: [[ARG:%.*]] = alloca [[STRUCT_DOUBLEFLOAT:%.*]], align 8422; CHECK-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[ARG]] to i64423; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[TMP2]], 87960930222080424; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr425; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP4]], i8 -1, i64 16, i1 false)426; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[ARG]] to i64427; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080428; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr429; CHECK-NEXT: store i64 [[TMP0]], ptr [[TMP7]], align 8430; CHECK-NEXT: store double [[ARG_COERCE0]], ptr [[ARG]], align 8431; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds { double, float }, ptr [[ARG]], i64 0, i32 1432; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[TMP8]] to i64433; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], 87960930222080434; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr435; CHECK-NEXT: store i32 [[TMP1]], ptr [[TMP11]], align 8436; CHECK-NEXT: store float [[ARG_COERCE1]], ptr [[TMP8]], align 8437; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8438; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])439; CHECK-NEXT: [[AGG_TMP_SROA_0_0_COPYLOAD:%.*]] = load double, ptr [[ARG]], align 8440; CHECK-NEXT: [[TMP12:%.*]] = ptrtoint ptr [[ARG]] to i64441; CHECK-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], 87960930222080442; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr443; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP14]], align 8444; CHECK-NEXT: [[AGG_TMP_SROA_2_0_COPYLOAD:%.*]] = load float, ptr [[TMP8]], align 8445; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[TMP8]] to i64446; CHECK-NEXT: [[TMP16:%.*]] = xor i64 [[TMP15]], 87960930222080447; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr448; CHECK-NEXT: [[_MSLD1:%.*]] = load i32, ptr [[TMP17]], align 8449; CHECK-NEXT: store i64 [[_MSLD]], ptr @__msan_param_tls, align 8450; CHECK-NEXT: store i32 [[_MSLD1]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8451; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8452; CHECK-NEXT: store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 8453; CHECK-NEXT: store i32 [[_MSLD1]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 8454; CHECK-NEXT: store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 80), align 8455; CHECK-NEXT: store i32 [[_MSLD1]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 96), align 8456; CHECK-NEXT: store i64 0, ptr @__msan_va_arg_overflow_size_tls, align 8457; CHECK-NEXT: call void (double, float, i32, ...) @_Z5test2I11DoubleFloatEvT_iz(double [[AGG_TMP_SROA_0_0_COPYLOAD]], float [[AGG_TMP_SROA_2_0_COPYLOAD]], i32 noundef 1, double [[AGG_TMP_SROA_0_0_COPYLOAD]], float [[AGG_TMP_SROA_2_0_COPYLOAD]])458; CHECK-NEXT: ret void459;460entry:461 %arg = alloca %struct.DoubleFloat, align 8462 store double %arg.coerce0, ptr %arg, align 8463 %0 = getelementptr inbounds { double, float }, ptr %arg, i64 0, i32 1464 store float %arg.coerce1, ptr %0, align 8465 call void @_Z3usePv(ptr noundef nonnull %arg)466 %agg.tmp.sroa.0.0.copyload = load double, ptr %arg, align 8467 %agg.tmp.sroa.2.0.copyload = load float, ptr %0, align 8468 call void (double, float, i32, ...) @_Z5test2I11DoubleFloatEvT_iz(double %agg.tmp.sroa.0.0.copyload, float %agg.tmp.sroa.2.0.copyload, i32 noundef 1, double %agg.tmp.sroa.0.0.copyload, float %agg.tmp.sroa.2.0.copyload)469 ret void470}471 472define linkonce_odr dso_local void @_Z4testI11LongDouble2EvT_(ptr noundef byval(%struct.LongDouble2) align 16 %arg) sanitize_memory {473; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testI11LongDouble2EvT_(474; CHECK-SAME: ptr noundef byval([[STRUCT_LONGDOUBLE2:%.*]]) align 16 [[ARG:%.*]]) #[[ATTR0]] {475; CHECK-NEXT: entry:476; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr [[ARG]] to i64477; CHECK-NEXT: [[TMP1:%.*]] = xor i64 [[TMP0]], 87960930222080478; CHECK-NEXT: [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to ptr479; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_param_tls, i64 32, i1 false)480; CHECK-NEXT: call void @llvm.donothing()481; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8482; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])483; CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[ARG]] to i64484; CHECK-NEXT: [[TMP4:%.*]] = xor i64 [[TMP3]], 87960930222080485; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr486; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 @__msan_param_tls, ptr align 8 [[TMP5]], i64 32, i1 false)487; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 8488; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[ARG]] to i64489; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 87960930222080490; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr491; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 40), ptr align 8 [[TMP8]], i64 32, i1 false)492; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[ARG]] to i64493; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], 87960930222080494; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr495; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 176), ptr align 8 [[TMP11]], i64 32, i1 false)496; CHECK-NEXT: store i64 32, ptr @__msan_va_arg_overflow_size_tls, align 8497; CHECK-NEXT: call void (ptr, i32, ...) @_Z5test2I11LongDouble2EvT_iz(ptr noundef nonnull byval([[STRUCT_LONGDOUBLE2]]) align 16 [[ARG]], i32 noundef 1, ptr noundef nonnull byval([[STRUCT_LONGDOUBLE2]]) align 16 [[ARG]])498; CHECK-NEXT: ret void499;500entry:501 call void @_Z3usePv(ptr noundef nonnull %arg)502 call void (ptr, i32, ...) @_Z5test2I11LongDouble2EvT_iz(ptr noundef nonnull byval(%struct.LongDouble2) align 16 %arg, i32 noundef 1, ptr noundef nonnull byval(%struct.LongDouble2) align 16 %arg)503 ret void504}505 506define linkonce_odr dso_local void @_Z4testI11LongDouble4EvT_(ptr noundef byval(%struct.LongDouble4) align 16 %arg) sanitize_memory {507; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testI11LongDouble4EvT_(508; CHECK-SAME: ptr noundef byval([[STRUCT_LONGDOUBLE4:%.*]]) align 16 [[ARG:%.*]]) #[[ATTR0]] {509; CHECK-NEXT: entry:510; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr [[ARG]] to i64511; CHECK-NEXT: [[TMP1:%.*]] = xor i64 [[TMP0]], 87960930222080512; CHECK-NEXT: [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to ptr513; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_param_tls, i64 64, i1 false)514; CHECK-NEXT: call void @llvm.donothing()515; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8516; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])517; CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[ARG]] to i64518; CHECK-NEXT: [[TMP4:%.*]] = xor i64 [[TMP3]], 87960930222080519; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr520; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 @__msan_param_tls, ptr align 8 [[TMP5]], i64 64, i1 false)521; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8522; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[ARG]] to i64523; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 87960930222080524; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr525; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 72), ptr align 8 [[TMP8]], i64 64, i1 false)526; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[ARG]] to i64527; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], 87960930222080528; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr529; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 176), ptr align 8 [[TMP11]], i64 64, i1 false)530; CHECK-NEXT: store i64 64, ptr @__msan_va_arg_overflow_size_tls, align 8531; CHECK-NEXT: call void (ptr, i32, ...) @_Z5test2I11LongDouble4EvT_iz(ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], i32 noundef 1, ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]])532; CHECK-NEXT: ret void533;534entry:535 call void @_Z3usePv(ptr noundef nonnull %arg)536 call void (ptr, i32, ...) @_Z5test2I11LongDouble4EvT_iz(ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, i32 noundef 1, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg)537 ret void538}539 540declare void @_Z3usePv(ptr noundef) local_unnamed_addr #3541 542define linkonce_odr dso_local void @_Z5test2IcEvT_iz(i8 noundef signext %t, i32 noundef %n, ...) sanitize_memory {543; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2IcEvT_iz(544; CHECK-SAME: i8 noundef signext [[T:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {545; CHECK-NEXT: entry:546; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8547; CHECK-NEXT: [[TMP1:%.*]] = add i64 176, [[TMP0]]548; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8549; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)550; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)551; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)552; CHECK-NEXT: call void @llvm.donothing()553; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 16554; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])555; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64556; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080557; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr558; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)559; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64560; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080561; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr562; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 24, i1 false)563; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])564; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[ARGS]], i64 16565; CHECK-NEXT: [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 8566; CHECK-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[TMP13]] to i64567; CHECK-NEXT: [[TMP15:%.*]] = xor i64 [[TMP14]], 87960930222080568; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP15]] to ptr569; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP16]], ptr align 16 [[TMP2]], i64 176, i1 false)570; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[ARGS]], i64 8571; CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP19]], align 8572; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64573; CHECK-NEXT: [[TMP22:%.*]] = xor i64 [[TMP21]], 87960930222080574; CHECK-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr575; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP2]], i32 176576; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP23]], ptr align 16 [[TMP24]], i64 [[TMP0]], i1 false)577; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8578; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])579; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])580; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])581; CHECK-NEXT: ret void582;583entry:584 %args = alloca [1 x %struct.__va_list_tag], align 16585 call void @llvm.lifetime.start.p0(ptr nonnull %args) #6586 call void @llvm.va_start(ptr nonnull %args)587 call void @_Z3usePv(ptr noundef nonnull %args)588 call void @llvm.va_end(ptr nonnull %args)589 call void @llvm.lifetime.end.p0(ptr nonnull %args) #6590 ret void591}592 593declare void @llvm.lifetime.start.p0(ptr nocapture) #4594 595declare void @llvm.va_start(ptr) #5596 597declare void @llvm.va_end(ptr) #5598 599declare void @llvm.lifetime.end.p0(ptr nocapture) #4600 601define linkonce_odr dso_local void @_Z5test2IiEvT_iz(i32 noundef %t, i32 noundef %n, ...) sanitize_memory {602; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2IiEvT_iz(603; CHECK-SAME: i32 noundef [[T:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {604; CHECK-NEXT: entry:605; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8606; CHECK-NEXT: [[TMP1:%.*]] = add i64 176, [[TMP0]]607; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8608; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)609; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)610; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)611; CHECK-NEXT: call void @llvm.donothing()612; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 16613; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])614; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64615; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080616; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr617; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)618; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64619; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080620; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr621; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 24, i1 false)622; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])623; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[ARGS]], i64 16624; CHECK-NEXT: [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 8625; CHECK-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[TMP13]] to i64626; CHECK-NEXT: [[TMP15:%.*]] = xor i64 [[TMP14]], 87960930222080627; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP15]] to ptr628; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP16]], ptr align 16 [[TMP2]], i64 176, i1 false)629; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[ARGS]], i64 8630; CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP19]], align 8631; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64632; CHECK-NEXT: [[TMP22:%.*]] = xor i64 [[TMP21]], 87960930222080633; CHECK-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr634; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP2]], i32 176635; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP23]], ptr align 16 [[TMP24]], i64 [[TMP0]], i1 false)636; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8637; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])638; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])639; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])640; CHECK-NEXT: ret void641;642entry:643 %args = alloca [1 x %struct.__va_list_tag], align 16644 call void @llvm.lifetime.start.p0(ptr nonnull %args) #6645 call void @llvm.va_start(ptr nonnull %args)646 call void @_Z3usePv(ptr noundef nonnull %args)647 call void @llvm.va_end(ptr nonnull %args)648 call void @llvm.lifetime.end.p0(ptr nonnull %args) #6649 ret void650}651 652define linkonce_odr dso_local void @_Z5test2IfEvT_iz(float noundef %t, i32 noundef %n, ...) sanitize_memory {653; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2IfEvT_iz(654; CHECK-SAME: float noundef [[T:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {655; CHECK-NEXT: entry:656; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8657; CHECK-NEXT: [[TMP1:%.*]] = add i64 176, [[TMP0]]658; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8659; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)660; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)661; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)662; CHECK-NEXT: call void @llvm.donothing()663; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 16664; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])665; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64666; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080667; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr668; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)669; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64670; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080671; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr672; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 24, i1 false)673; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])674; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[ARGS]], i64 16675; CHECK-NEXT: [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 8676; CHECK-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[TMP13]] to i64677; CHECK-NEXT: [[TMP15:%.*]] = xor i64 [[TMP14]], 87960930222080678; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP15]] to ptr679; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP16]], ptr align 16 [[TMP2]], i64 176, i1 false)680; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[ARGS]], i64 8681; CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP19]], align 8682; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64683; CHECK-NEXT: [[TMP22:%.*]] = xor i64 [[TMP21]], 87960930222080684; CHECK-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr685; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP2]], i32 176686; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP23]], ptr align 16 [[TMP24]], i64 [[TMP0]], i1 false)687; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8688; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])689; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])690; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])691; CHECK-NEXT: ret void692;693entry:694 %args = alloca [1 x %struct.__va_list_tag], align 16695 call void @llvm.lifetime.start.p0(ptr nonnull %args) #6696 call void @llvm.va_start(ptr nonnull %args)697 call void @_Z3usePv(ptr noundef nonnull %args)698 call void @llvm.va_end(ptr nonnull %args)699 call void @llvm.lifetime.end.p0(ptr nonnull %args) #6700 ret void701}702 703define linkonce_odr dso_local void @_Z5test2IdEvT_iz(double noundef %t, i32 noundef %n, ...) sanitize_memory {704; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2IdEvT_iz(705; CHECK-SAME: double noundef [[T:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {706; CHECK-NEXT: entry:707; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8708; CHECK-NEXT: [[TMP1:%.*]] = add i64 176, [[TMP0]]709; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8710; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)711; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)712; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)713; CHECK-NEXT: call void @llvm.donothing()714; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 16715; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])716; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64717; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080718; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr719; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)720; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64721; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080722; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr723; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 24, i1 false)724; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])725; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[ARGS]], i64 16726; CHECK-NEXT: [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 8727; CHECK-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[TMP13]] to i64728; CHECK-NEXT: [[TMP15:%.*]] = xor i64 [[TMP14]], 87960930222080729; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP15]] to ptr730; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP16]], ptr align 16 [[TMP2]], i64 176, i1 false)731; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[ARGS]], i64 8732; CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP19]], align 8733; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64734; CHECK-NEXT: [[TMP22:%.*]] = xor i64 [[TMP21]], 87960930222080735; CHECK-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr736; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP2]], i32 176737; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP23]], ptr align 16 [[TMP24]], i64 [[TMP0]], i1 false)738; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8739; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])740; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])741; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])742; CHECK-NEXT: ret void743;744entry:745 %args = alloca [1 x %struct.__va_list_tag], align 16746 call void @llvm.lifetime.start.p0(ptr nonnull %args) #6747 call void @llvm.va_start(ptr nonnull %args)748 call void @_Z3usePv(ptr noundef nonnull %args)749 call void @llvm.va_end(ptr nonnull %args)750 call void @llvm.lifetime.end.p0(ptr nonnull %args) #6751 ret void752}753 754define linkonce_odr dso_local void @_Z5test2IeEvT_iz(x86_fp80 noundef %t, i32 noundef %n, ...) sanitize_memory {755; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2IeEvT_iz(756; CHECK-SAME: x86_fp80 noundef [[T:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {757; CHECK-NEXT: entry:758; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8759; CHECK-NEXT: [[TMP1:%.*]] = add i64 176, [[TMP0]]760; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8761; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)762; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)763; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)764; CHECK-NEXT: call void @llvm.donothing()765; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 16766; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])767; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64768; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080769; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr770; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)771; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64772; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080773; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr774; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 24, i1 false)775; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])776; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[ARGS]], i64 16777; CHECK-NEXT: [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 8778; CHECK-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[TMP13]] to i64779; CHECK-NEXT: [[TMP15:%.*]] = xor i64 [[TMP14]], 87960930222080780; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP15]] to ptr781; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP16]], ptr align 16 [[TMP2]], i64 176, i1 false)782; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[ARGS]], i64 8783; CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP19]], align 8784; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64785; CHECK-NEXT: [[TMP22:%.*]] = xor i64 [[TMP21]], 87960930222080786; CHECK-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr787; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP2]], i32 176788; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP23]], ptr align 16 [[TMP24]], i64 [[TMP0]], i1 false)789; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8790; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])791; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])792; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])793; CHECK-NEXT: ret void794;795entry:796 %args = alloca [1 x %struct.__va_list_tag], align 16797 call void @llvm.lifetime.start.p0(ptr nonnull %args) #6798 call void @llvm.va_start(ptr nonnull %args)799 call void @_Z3usePv(ptr noundef nonnull %args)800 call void @llvm.va_end(ptr nonnull %args)801 call void @llvm.lifetime.end.p0(ptr nonnull %args) #6802 ret void803}804 805define linkonce_odr dso_local void @_Z5test2I6IntIntEvT_iz(i64 %t.coerce, i32 noundef %n, ...) sanitize_memory {806; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2I6IntIntEvT_iz(807; CHECK-SAME: i64 [[T_COERCE:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {808; CHECK-NEXT: entry:809; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8810; CHECK-NEXT: [[TMP1:%.*]] = add i64 176, [[TMP0]]811; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8812; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)813; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)814; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)815; CHECK-NEXT: call void @llvm.donothing()816; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 16817; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])818; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64819; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080820; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr821; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)822; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64823; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080824; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr825; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 24, i1 false)826; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])827; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[ARGS]], i64 16828; CHECK-NEXT: [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 8829; CHECK-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[TMP13]] to i64830; CHECK-NEXT: [[TMP15:%.*]] = xor i64 [[TMP14]], 87960930222080831; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP15]] to ptr832; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP16]], ptr align 16 [[TMP2]], i64 176, i1 false)833; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[ARGS]], i64 8834; CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP19]], align 8835; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64836; CHECK-NEXT: [[TMP22:%.*]] = xor i64 [[TMP21]], 87960930222080837; CHECK-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr838; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP2]], i32 176839; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP23]], ptr align 16 [[TMP24]], i64 [[TMP0]], i1 false)840; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8841; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])842; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])843; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])844; CHECK-NEXT: ret void845;846entry:847 %args = alloca [1 x %struct.__va_list_tag], align 16848 call void @llvm.lifetime.start.p0(ptr nonnull %args) #6849 call void @llvm.va_start(ptr nonnull %args)850 call void @_Z3usePv(ptr noundef nonnull %args)851 call void @llvm.va_end(ptr nonnull %args)852 call void @llvm.lifetime.end.p0(ptr nonnull %args) #6853 ret void854}855 856define linkonce_odr dso_local void @_Z5test2I10Int64Int64EvT_iz(i64 %t.coerce0, i64 %t.coerce1, i32 noundef %n, ...) sanitize_memory {857; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2I10Int64Int64EvT_iz(858; CHECK-SAME: i64 [[T_COERCE0:%.*]], i64 [[T_COERCE1:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {859; CHECK-NEXT: entry:860; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8861; CHECK-NEXT: [[TMP1:%.*]] = add i64 176, [[TMP0]]862; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8863; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)864; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)865; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)866; CHECK-NEXT: call void @llvm.donothing()867; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 16868; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])869; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64870; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080871; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr872; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)873; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64874; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080875; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr876; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 24, i1 false)877; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])878; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[ARGS]], i64 16879; CHECK-NEXT: [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 8880; CHECK-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[TMP13]] to i64881; CHECK-NEXT: [[TMP15:%.*]] = xor i64 [[TMP14]], 87960930222080882; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP15]] to ptr883; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP16]], ptr align 16 [[TMP2]], i64 176, i1 false)884; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[ARGS]], i64 8885; CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP19]], align 8886; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64887; CHECK-NEXT: [[TMP22:%.*]] = xor i64 [[TMP21]], 87960930222080888; CHECK-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr889; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP2]], i32 176890; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP23]], ptr align 16 [[TMP24]], i64 [[TMP0]], i1 false)891; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8892; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])893; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])894; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])895; CHECK-NEXT: ret void896;897entry:898 %args = alloca [1 x %struct.__va_list_tag], align 16899 call void @llvm.lifetime.start.p0(ptr nonnull %args) #6900 call void @llvm.va_start(ptr nonnull %args)901 call void @_Z3usePv(ptr noundef nonnull %args)902 call void @llvm.va_end(ptr nonnull %args)903 call void @llvm.lifetime.end.p0(ptr nonnull %args) #6904 ret void905}906 907define linkonce_odr dso_local void @_Z5test2I12DoubleDoubleEvT_iz(double %t.coerce0, double %t.coerce1, i32 noundef %n, ...) sanitize_memory {908; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2I12DoubleDoubleEvT_iz(909; CHECK-SAME: double [[T_COERCE0:%.*]], double [[T_COERCE1:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {910; CHECK-NEXT: entry:911; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8912; CHECK-NEXT: [[TMP1:%.*]] = add i64 176, [[TMP0]]913; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8914; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)915; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)916; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)917; CHECK-NEXT: call void @llvm.donothing()918; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 16919; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])920; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64921; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080922; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr923; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)924; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64925; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080926; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr927; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 24, i1 false)928; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])929; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[ARGS]], i64 16930; CHECK-NEXT: [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 8931; CHECK-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[TMP13]] to i64932; CHECK-NEXT: [[TMP15:%.*]] = xor i64 [[TMP14]], 87960930222080933; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP15]] to ptr934; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP16]], ptr align 16 [[TMP2]], i64 176, i1 false)935; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[ARGS]], i64 8936; CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP19]], align 8937; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64938; CHECK-NEXT: [[TMP22:%.*]] = xor i64 [[TMP21]], 87960930222080939; CHECK-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr940; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP2]], i32 176941; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP23]], ptr align 16 [[TMP24]], i64 [[TMP0]], i1 false)942; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8943; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])944; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])945; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])946; CHECK-NEXT: ret void947;948entry:949 %args = alloca [1 x %struct.__va_list_tag], align 16950 call void @llvm.lifetime.start.p0(ptr nonnull %args) #6951 call void @llvm.va_start(ptr nonnull %args)952 call void @_Z3usePv(ptr noundef nonnull %args)953 call void @llvm.va_end(ptr nonnull %args)954 call void @llvm.lifetime.end.p0(ptr nonnull %args) #6955 ret void956}957 958define linkonce_odr dso_local void @_Z5test2I7Double4EvT_iz(ptr noundef byval(%struct.Double4) align 8 %t, i32 noundef %n, ...) sanitize_memory {959; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2I7Double4EvT_iz(960; CHECK-SAME: ptr noundef byval([[STRUCT_DOUBLE4:%.*]]) align 8 [[T:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {961; CHECK-NEXT: entry:962; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8963; CHECK-NEXT: [[TMP1:%.*]] = add i64 176, [[TMP0]]964; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8965; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)966; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)967; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)968; CHECK-NEXT: call void @llvm.donothing()969; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 16970; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])971; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64972; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080973; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr974; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)975; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64976; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080977; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr978; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 24, i1 false)979; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])980; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[ARGS]], i64 16981; CHECK-NEXT: [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 8982; CHECK-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[TMP13]] to i64983; CHECK-NEXT: [[TMP15:%.*]] = xor i64 [[TMP14]], 87960930222080984; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP15]] to ptr985; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP16]], ptr align 16 [[TMP2]], i64 176, i1 false)986; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[ARGS]], i64 8987; CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP19]], align 8988; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64989; CHECK-NEXT: [[TMP22:%.*]] = xor i64 [[TMP21]], 87960930222080990; CHECK-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr991; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP2]], i32 176992; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP23]], ptr align 16 [[TMP24]], i64 [[TMP0]], i1 false)993; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8994; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])995; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])996; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])997; CHECK-NEXT: ret void998;999entry:1000 %args = alloca [1 x %struct.__va_list_tag], align 161001 call void @llvm.lifetime.start.p0(ptr nonnull %args) #61002 call void @llvm.va_start(ptr nonnull %args)1003 call void @_Z3usePv(ptr noundef nonnull %args)1004 call void @llvm.va_end(ptr nonnull %args)1005 call void @llvm.lifetime.end.p0(ptr nonnull %args) #61006 ret void1007}1008 1009define linkonce_odr dso_local void @_Z5test2I11DoubleFloatEvT_iz(double %t.coerce0, float %t.coerce1, i32 noundef %n, ...) sanitize_memory {1010; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2I11DoubleFloatEvT_iz(1011; CHECK-SAME: double [[T_COERCE0:%.*]], float [[T_COERCE1:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {1012; CHECK-NEXT: entry:1013; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 81014; CHECK-NEXT: [[TMP1:%.*]] = add i64 176, [[TMP0]]1015; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 81016; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)1017; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)1018; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)1019; CHECK-NEXT: call void @llvm.donothing()1020; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 161021; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])1022; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i641023; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 879609302220801024; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr1025; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)1026; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i641027; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220801028; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr1029; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 24, i1 false)1030; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])1031; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[ARGS]], i64 161032; CHECK-NEXT: [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 81033; CHECK-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[TMP13]] to i641034; CHECK-NEXT: [[TMP15:%.*]] = xor i64 [[TMP14]], 879609302220801035; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP15]] to ptr1036; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP16]], ptr align 16 [[TMP2]], i64 176, i1 false)1037; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[ARGS]], i64 81038; CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP19]], align 81039; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i641040; CHECK-NEXT: [[TMP22:%.*]] = xor i64 [[TMP21]], 879609302220801041; CHECK-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr1042; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP2]], i32 1761043; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP23]], ptr align 16 [[TMP24]], i64 [[TMP0]], i1 false)1044; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 81045; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])1046; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])1047; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])1048; CHECK-NEXT: ret void1049;1050entry:1051 %args = alloca [1 x %struct.__va_list_tag], align 161052 call void @llvm.lifetime.start.p0(ptr nonnull %args) #61053 call void @llvm.va_start(ptr nonnull %args)1054 call void @_Z3usePv(ptr noundef nonnull %args)1055 call void @llvm.va_end(ptr nonnull %args)1056 call void @llvm.lifetime.end.p0(ptr nonnull %args) #61057 ret void1058}1059 1060define linkonce_odr dso_local void @_Z5test2I11LongDouble2EvT_iz(ptr noundef byval(%struct.LongDouble2) align 16 %t, i32 noundef %n, ...) sanitize_memory {1061; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2I11LongDouble2EvT_iz(1062; CHECK-SAME: ptr noundef byval([[STRUCT_LONGDOUBLE2:%.*]]) align 16 [[T:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {1063; CHECK-NEXT: entry:1064; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 81065; CHECK-NEXT: [[TMP1:%.*]] = add i64 176, [[TMP0]]1066; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 81067; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)1068; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)1069; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)1070; CHECK-NEXT: call void @llvm.donothing()1071; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 161072; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])1073; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i641074; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 879609302220801075; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr1076; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)1077; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i641078; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220801079; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr1080; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 24, i1 false)1081; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])1082; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[ARGS]], i64 161083; CHECK-NEXT: [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 81084; CHECK-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[TMP13]] to i641085; CHECK-NEXT: [[TMP15:%.*]] = xor i64 [[TMP14]], 879609302220801086; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP15]] to ptr1087; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP16]], ptr align 16 [[TMP2]], i64 176, i1 false)1088; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[ARGS]], i64 81089; CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP19]], align 81090; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i641091; CHECK-NEXT: [[TMP22:%.*]] = xor i64 [[TMP21]], 879609302220801092; CHECK-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr1093; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP2]], i32 1761094; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP23]], ptr align 16 [[TMP24]], i64 [[TMP0]], i1 false)1095; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 81096; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])1097; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])1098; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])1099; CHECK-NEXT: ret void1100;1101entry:1102 %args = alloca [1 x %struct.__va_list_tag], align 161103 call void @llvm.lifetime.start.p0(ptr nonnull %args) #61104 call void @llvm.va_start(ptr nonnull %args)1105 call void @_Z3usePv(ptr noundef nonnull %args)1106 call void @llvm.va_end(ptr nonnull %args)1107 call void @llvm.lifetime.end.p0(ptr nonnull %args) #61108 ret void1109}1110 1111define linkonce_odr dso_local void @_Z5test2I11LongDouble4EvT_iz(ptr noundef byval(%struct.LongDouble4) align 16 %t, i32 noundef %n, ...) sanitize_memory {1112; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2I11LongDouble4EvT_iz(1113; CHECK-SAME: ptr noundef byval([[STRUCT_LONGDOUBLE4:%.*]]) align 16 [[T:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {1114; CHECK-NEXT: entry:1115; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 81116; CHECK-NEXT: [[TMP1:%.*]] = add i64 176, [[TMP0]]1117; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 81118; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)1119; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)1120; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)1121; CHECK-NEXT: call void @llvm.donothing()1122; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 161123; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])1124; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i641125; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 879609302220801126; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr1127; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)1128; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i641129; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220801130; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr1131; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 24, i1 false)1132; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])1133; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[ARGS]], i64 161134; CHECK-NEXT: [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 81135; CHECK-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[TMP13]] to i641136; CHECK-NEXT: [[TMP15:%.*]] = xor i64 [[TMP14]], 879609302220801137; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP15]] to ptr1138; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP16]], ptr align 16 [[TMP2]], i64 176, i1 false)1139; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[ARGS]], i64 81140; CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP19]], align 81141; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i641142; CHECK-NEXT: [[TMP22:%.*]] = xor i64 [[TMP21]], 879609302220801143; CHECK-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr1144; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP2]], i32 1761145; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP23]], ptr align 16 [[TMP24]], i64 [[TMP0]], i1 false)1146; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 81147; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])1148; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])1149; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])1150; CHECK-NEXT: ret void1151;1152entry:1153 %args = alloca [1 x %struct.__va_list_tag], align 161154 call void @llvm.lifetime.start.p0(ptr nonnull %args) #61155 call void @llvm.va_start(ptr nonnull %args)1156 call void @_Z3usePv(ptr noundef nonnull %args)1157 call void @llvm.va_end(ptr nonnull %args)1158 call void @llvm.lifetime.end.p0(ptr nonnull %args) #61159 ret void1160}1161 1162define linkonce_odr dso_local void @_Z4test3I11LongDouble4EvT_(ptr noundef byval(%struct.LongDouble4) align 16 %arg) sanitize_memory {1163; CHECK-LABEL: define linkonce_odr dso_local void @_Z4test3I11LongDouble4EvT_(1164; CHECK-SAME: ptr noundef byval([[STRUCT_LONGDOUBLE4:%.*]]) align 16 [[ARG:%.*]]) #[[ATTR0]] {1165; CHECK-NEXT: entry:1166; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr [[ARG]] to i641167; CHECK-NEXT: [[TMP1:%.*]] = xor i64 [[TMP0]], 879609302220801168; CHECK-NEXT: [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to ptr1169; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_param_tls, i64 64, i1 false)1170; CHECK-NEXT: call void @llvm.donothing()1171; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 81172; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])1173; CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[ARG]] to i641174; CHECK-NEXT: [[TMP4:%.*]] = xor i64 [[TMP3]], 879609302220801175; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr1176; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 @__msan_param_tls, ptr align 8 [[TMP5]], i64 64, i1 false)1177; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81178; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[ARG]] to i641179; CHECK-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 879609302220801180; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr1181; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 72), ptr align 8 [[TMP8]], i64 64, i1 false)1182; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[ARG]] to i641183; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], 879609302220801184; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr1185; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 136), ptr align 8 [[TMP11]], i64 64, i1 false)1186; CHECK-NEXT: [[TMP12:%.*]] = ptrtoint ptr [[ARG]] to i641187; CHECK-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], 879609302220801188; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr1189; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 200), ptr align 8 [[TMP14]], i64 64, i1 false)1190; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[ARG]] to i641191; CHECK-NEXT: [[TMP16:%.*]] = xor i64 [[TMP15]], 879609302220801192; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr1193; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 264), ptr align 8 [[TMP17]], i64 64, i1 false)1194; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[ARG]] to i641195; CHECK-NEXT: [[TMP19:%.*]] = xor i64 [[TMP18]], 879609302220801196; CHECK-NEXT: [[TMP20:%.*]] = inttoptr i64 [[TMP19]] to ptr1197; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 328), ptr align 8 [[TMP20]], i64 64, i1 false)1198; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[ARG]] to i641199; CHECK-NEXT: [[TMP22:%.*]] = xor i64 [[TMP21]], 879609302220801200; CHECK-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr1201; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 392), ptr align 8 [[TMP23]], i64 64, i1 false)1202; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[ARG]] to i641203; CHECK-NEXT: [[TMP25:%.*]] = xor i64 [[TMP24]], 879609302220801204; CHECK-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP25]] to ptr1205; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 456), ptr align 8 [[TMP26]], i64 64, i1 false)1206; CHECK-NEXT: [[TMP27:%.*]] = ptrtoint ptr [[ARG]] to i641207; CHECK-NEXT: [[TMP28:%.*]] = xor i64 [[TMP27]], 879609302220801208; CHECK-NEXT: [[TMP29:%.*]] = inttoptr i64 [[TMP28]] to ptr1209; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 520), ptr align 8 [[TMP29]], i64 64, i1 false)1210; CHECK-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[ARG]] to i641211; CHECK-NEXT: [[TMP31:%.*]] = xor i64 [[TMP30]], 879609302220801212; CHECK-NEXT: [[TMP32:%.*]] = inttoptr i64 [[TMP31]] to ptr1213; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 584), ptr align 8 [[TMP32]], i64 64, i1 false)1214; CHECK-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[ARG]] to i641215; CHECK-NEXT: [[TMP34:%.*]] = xor i64 [[TMP33]], 879609302220801216; CHECK-NEXT: [[TMP35:%.*]] = inttoptr i64 [[TMP34]] to ptr1217; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 648), ptr align 8 [[TMP35]], i64 64, i1 false)1218; CHECK-NEXT: [[TMP36:%.*]] = ptrtoint ptr [[ARG]] to i641219; CHECK-NEXT: [[TMP37:%.*]] = xor i64 [[TMP36]], 879609302220801220; CHECK-NEXT: [[TMP38:%.*]] = inttoptr i64 [[TMP37]] to ptr1221; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 712), ptr align 8 [[TMP38]], i64 64, i1 false)1222; CHECK-NEXT: [[TMP39:%.*]] = ptrtoint ptr [[ARG]] to i641223; CHECK-NEXT: [[TMP40:%.*]] = xor i64 [[TMP39]], 879609302220801224; CHECK-NEXT: [[TMP41:%.*]] = inttoptr i64 [[TMP40]] to ptr1225; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 176), ptr align 8 [[TMP41]], i64 64, i1 false)1226; CHECK-NEXT: [[TMP42:%.*]] = ptrtoint ptr [[ARG]] to i641227; CHECK-NEXT: [[TMP43:%.*]] = xor i64 [[TMP42]], 879609302220801228; CHECK-NEXT: [[TMP44:%.*]] = inttoptr i64 [[TMP43]] to ptr1229; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 240), ptr align 8 [[TMP44]], i64 64, i1 false)1230; CHECK-NEXT: [[TMP45:%.*]] = ptrtoint ptr [[ARG]] to i641231; CHECK-NEXT: [[TMP46:%.*]] = xor i64 [[TMP45]], 879609302220801232; CHECK-NEXT: [[TMP47:%.*]] = inttoptr i64 [[TMP46]] to ptr1233; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 304), ptr align 8 [[TMP47]], i64 64, i1 false)1234; CHECK-NEXT: [[TMP48:%.*]] = ptrtoint ptr [[ARG]] to i641235; CHECK-NEXT: [[TMP49:%.*]] = xor i64 [[TMP48]], 879609302220801236; CHECK-NEXT: [[TMP50:%.*]] = inttoptr i64 [[TMP49]] to ptr1237; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 368), ptr align 8 [[TMP50]], i64 64, i1 false)1238; CHECK-NEXT: [[TMP51:%.*]] = ptrtoint ptr [[ARG]] to i641239; CHECK-NEXT: [[TMP52:%.*]] = xor i64 [[TMP51]], 879609302220801240; CHECK-NEXT: [[TMP53:%.*]] = inttoptr i64 [[TMP52]] to ptr1241; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 432), ptr align 8 [[TMP53]], i64 64, i1 false)1242; CHECK-NEXT: [[TMP54:%.*]] = ptrtoint ptr [[ARG]] to i641243; CHECK-NEXT: [[TMP55:%.*]] = xor i64 [[TMP54]], 879609302220801244; CHECK-NEXT: [[TMP56:%.*]] = inttoptr i64 [[TMP55]] to ptr1245; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 496), ptr align 8 [[TMP56]], i64 64, i1 false)1246; CHECK-NEXT: [[TMP57:%.*]] = ptrtoint ptr [[ARG]] to i641247; CHECK-NEXT: [[TMP58:%.*]] = xor i64 [[TMP57]], 879609302220801248; CHECK-NEXT: [[TMP59:%.*]] = inttoptr i64 [[TMP58]] to ptr1249; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 560), ptr align 8 [[TMP59]], i64 64, i1 false)1250; CHECK-NEXT: [[TMP60:%.*]] = ptrtoint ptr [[ARG]] to i641251; CHECK-NEXT: [[TMP61:%.*]] = xor i64 [[TMP60]], 879609302220801252; CHECK-NEXT: [[TMP62:%.*]] = inttoptr i64 [[TMP61]] to ptr1253; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 624), ptr align 8 [[TMP62]], i64 64, i1 false)1254; CHECK-NEXT: [[TMP63:%.*]] = ptrtoint ptr [[ARG]] to i641255; CHECK-NEXT: [[TMP64:%.*]] = xor i64 [[TMP63]], 879609302220801256; CHECK-NEXT: [[TMP65:%.*]] = inttoptr i64 [[TMP64]] to ptr1257; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 688), ptr align 8 [[TMP65]], i64 64, i1 false)1258; CHECK-NEXT: call void @llvm.memset.p0.i32(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 752), i8 0, i32 48, i1 false)1259; CHECK-NEXT: store i64 1280, ptr @__msan_va_arg_overflow_size_tls, align 81260; CHECK-NEXT: call void (ptr, i32, ...) @_Z5test2I11LongDouble4EvT_iz(ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], i32 noundef 20, ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]])1261; CHECK-NEXT: ret void1262;1263entry:1264 call void @_Z3usePv(ptr noundef nonnull %arg)1265 call void (ptr, i32, ...) @_Z5test2I11LongDouble4EvT_iz(ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, i32 noundef 20, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg)1266 ret void1267}1268