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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt < %s -msan-check-access-address=0 -S -passes=msan 2>&1 | FileCheck %s3 4target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"5target triple = "i386-unknown-linux-gnu"6 7%struct.Double4 = type { [4 x double] }8%struct.LongDouble2 = type { [2 x x86_fp80] }9%struct.LongDouble4 = type { [4 x x86_fp80] }10%struct.IntInt = type { i32, i32 }11%struct.Int64Int64 = type { i64, i64 }12%struct.DoubleDouble = type { double, double }13%struct.DoubleFloat = type { double, float }14%struct.__va_list_tag = type { i32, i32, ptr, ptr }15 16define linkonce_odr dso_local void @_Z4testIcEvT_(i8 noundef signext %arg) sanitize_memory {17; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testIcEvT_(18; CHECK-SAME: i8 noundef signext [[ARG:%.*]]) #[[ATTR0:[0-9]+]] {19; CHECK-NEXT: entry:20; CHECK-NEXT: [[TMP11:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 821; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr @__msan_param_tls, align 822; CHECK-NEXT: call void @llvm.donothing()23; CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca i8, align 124; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i6425; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[TMP1]], -214748364926; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr27; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP3]], i8 -1, i64 1, i1 false)28; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i6429; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -214748364930; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr31; CHECK-NEXT: store i8 [[TMP0]], ptr [[TMP6]], align 132; CHECK-NEXT: store i8 [[ARG]], ptr [[ARG_ADDR]], align 133; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 834; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG_ADDR]])35; CHECK-NEXT: [[TMP7:%.*]] = load i8, ptr [[ARG_ADDR]], align 136; CHECK-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i6437; CHECK-NEXT: [[TMP9:%.*]] = and i64 [[TMP8]], -214748364938; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr39; CHECK-NEXT: [[_MSLD:%.*]] = load i8, ptr [[TMP10]], align 140; CHECK-NEXT: [[_MSPROP:%.*]] = sext i8 [[_MSLD]] to i3241; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[TMP7]] to i3242; CHECK-NEXT: store i8 [[_MSLD]], ptr @__msan_param_tls, align 843; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 844; CHECK-NEXT: store i32 [[_MSPROP]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 845; CHECK-NEXT: store i32 [[_MSPROP]], ptr @__msan_va_arg_tls, align 846; CHECK-NEXT: store i64 8, ptr @__msan_va_arg_overflow_size_tls, align 847; CHECK-NEXT: call void (i8, i32, ...) @_Z5test2IcEvT_iz(i8 noundef signext [[TMP7]], i32 noundef 1, i32 noundef [[CONV]])48; CHECK-NEXT: ret void49;50entry:51 %arg.addr = alloca i8, align 152 store i8 %arg, ptr %arg.addr, align 153 call void @_Z3usePv(ptr noundef nonnull %arg.addr)54 %0 = load i8, ptr %arg.addr, align 155 %conv = sext i8 %0 to i3256 call void (i8, i32, ...) @_Z5test2IcEvT_iz(i8 noundef signext %0, i32 noundef 1, i32 noundef %conv)57 ret void58}59 60define linkonce_odr dso_local void @_Z4testIiEvT_(i32 noundef %arg) sanitize_memory {61; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testIiEvT_(62; CHECK-SAME: i32 noundef [[ARG:%.*]]) #[[ATTR0]] {63; CHECK-NEXT: entry:64; CHECK-NEXT: [[TMP11:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 865; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @__msan_param_tls, align 866; CHECK-NEXT: call void @llvm.donothing()67; CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 468; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i6469; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[TMP1]], -214748364970; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr71; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP3]], i8 -1, i64 4, i1 false)72; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i6473; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -214748364974; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr75; CHECK-NEXT: store i32 [[TMP0]], ptr [[TMP6]], align 476; CHECK-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 477; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 878; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG_ADDR]])79; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[ARG_ADDR]], align 480; CHECK-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i6481; CHECK-NEXT: [[TMP9:%.*]] = and i64 [[TMP8]], -214748364982; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr83; CHECK-NEXT: [[_MSLD:%.*]] = load i32, ptr [[TMP10]], align 484; CHECK-NEXT: store i32 [[_MSLD]], ptr @__msan_param_tls, align 885; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 886; CHECK-NEXT: store i32 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 887; CHECK-NEXT: store i32 [[_MSLD]], ptr @__msan_va_arg_tls, align 888; CHECK-NEXT: store i64 8, ptr @__msan_va_arg_overflow_size_tls, align 889; CHECK-NEXT: call void (i32, i32, ...) @_Z5test2IiEvT_iz(i32 noundef [[TMP7]], i32 noundef 1, i32 noundef [[TMP7]])90; CHECK-NEXT: ret void91;92entry:93 %arg.addr = alloca i32, align 494 store i32 %arg, ptr %arg.addr, align 495 call void @_Z3usePv(ptr noundef nonnull %arg.addr)96 %0 = load i32, ptr %arg.addr, align 497 call void (i32, i32, ...) @_Z5test2IiEvT_iz(i32 noundef %0, i32 noundef 1, i32 noundef %0)98 ret void99}100 101define linkonce_odr dso_local void @_Z4testIfEvT_(float noundef %arg) sanitize_memory {102; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testIfEvT_(103; CHECK-SAME: float noundef [[ARG:%.*]]) #[[ATTR0]] {104; CHECK-NEXT: entry:105; CHECK-NEXT: [[TMP12:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8106; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @__msan_param_tls, align 8107; CHECK-NEXT: call void @llvm.donothing()108; CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca float, align 4109; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64110; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[TMP1]], -2147483649111; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr112; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP3]], i8 -1, i64 4, i1 false)113; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64114; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -2147483649115; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr116; CHECK-NEXT: store i32 [[TMP0]], ptr [[TMP6]], align 4117; CHECK-NEXT: store float [[ARG]], ptr [[ARG_ADDR]], align 4118; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8119; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG_ADDR]])120; CHECK-NEXT: [[TMP7:%.*]] = load float, ptr [[ARG_ADDR]], align 4121; CHECK-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64122; CHECK-NEXT: [[TMP9:%.*]] = and i64 [[TMP8]], -2147483649123; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr124; CHECK-NEXT: [[_MSLD:%.*]] = load i32, ptr [[TMP10]], align 4125; CHECK-NEXT: [[TMP11:%.*]] = zext i32 [[_MSLD]] to i64126; CHECK-NEXT: [[CONV:%.*]] = fpext float [[TMP7]] to double127; CHECK-NEXT: store i32 [[_MSLD]], ptr @__msan_param_tls, align 8128; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8129; CHECK-NEXT: store i64 [[TMP11]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8130; CHECK-NEXT: store i64 [[TMP11]], ptr @__msan_va_arg_tls, align 8131; CHECK-NEXT: store i64 8, ptr @__msan_va_arg_overflow_size_tls, align 8132; CHECK-NEXT: call void (float, i32, ...) @_Z5test2IfEvT_iz(float noundef [[TMP7]], i32 noundef 1, double noundef [[CONV]])133; CHECK-NEXT: ret void134;135entry:136 %arg.addr = alloca float, align 4137 store float %arg, ptr %arg.addr, align 4138 call void @_Z3usePv(ptr noundef nonnull %arg.addr)139 %0 = load float, ptr %arg.addr, align 4140 %conv = fpext float %0 to double141 call void (float, i32, ...) @_Z5test2IfEvT_iz(float noundef %0, i32 noundef 1, double noundef %conv)142 ret void143}144 145define linkonce_odr dso_local void @_Z4testIdEvT_(double noundef %arg) sanitize_memory {146; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testIdEvT_(147; CHECK-SAME: double noundef [[ARG:%.*]]) #[[ATTR0]] {148; CHECK-NEXT: entry:149; CHECK-NEXT: [[TMP11:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8150; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 8151; CHECK-NEXT: call void @llvm.donothing()152; CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca double, align 8153; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64154; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[TMP1]], -2147483649155; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr156; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP3]], i8 -1, i64 8, i1 false)157; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64158; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -2147483649159; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr160; CHECK-NEXT: store i64 [[TMP0]], ptr [[TMP6]], align 8161; CHECK-NEXT: store double [[ARG]], ptr [[ARG_ADDR]], align 8162; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8163; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG_ADDR]])164; CHECK-NEXT: [[TMP7:%.*]] = load double, ptr [[ARG_ADDR]], align 8165; CHECK-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64166; CHECK-NEXT: [[TMP9:%.*]] = and i64 [[TMP8]], -2147483649167; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr168; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP10]], align 8169; CHECK-NEXT: store i64 [[_MSLD]], ptr @__msan_param_tls, align 8170; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8171; CHECK-NEXT: store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8172; CHECK-NEXT: store i64 [[_MSLD]], ptr @__msan_va_arg_tls, align 8173; CHECK-NEXT: store i64 8, ptr @__msan_va_arg_overflow_size_tls, align 8174; CHECK-NEXT: call void (double, i32, ...) @_Z5test2IdEvT_iz(double noundef [[TMP7]], i32 noundef 1, double noundef [[TMP7]])175; CHECK-NEXT: ret void176;177entry:178 %arg.addr = alloca double, align 8179 store double %arg, ptr %arg.addr, align 8180 call void @_Z3usePv(ptr noundef nonnull %arg.addr)181 %0 = load double, ptr %arg.addr, align 8182 call void (double, i32, ...) @_Z5test2IdEvT_iz(double noundef %0, i32 noundef 1, double noundef %0)183 ret void184}185 186define linkonce_odr dso_local void @_Z4testIeEvT_(x86_fp80 noundef %arg) sanitize_memory {187; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testIeEvT_(188; CHECK-SAME: x86_fp80 noundef [[ARG:%.*]]) #[[ATTR0]] {189; CHECK-NEXT: entry:190; CHECK-NEXT: [[TMP11:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8191; CHECK-NEXT: [[TMP0:%.*]] = load i80, ptr @__msan_param_tls, align 8192; CHECK-NEXT: call void @llvm.donothing()193; CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca x86_fp80, align 16194; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64195; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[TMP1]], -2147483649196; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr197; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP3]], i8 -1, i64 16, i1 false)198; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64199; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -2147483649200; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr201; CHECK-NEXT: store i80 [[TMP0]], ptr [[TMP6]], align 16202; CHECK-NEXT: store x86_fp80 [[ARG]], ptr [[ARG_ADDR]], align 16203; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8204; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG_ADDR]])205; CHECK-NEXT: [[TMP7:%.*]] = load x86_fp80, ptr [[ARG_ADDR]], align 16206; CHECK-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64207; CHECK-NEXT: [[TMP9:%.*]] = and i64 [[TMP8]], -2147483649208; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr209; CHECK-NEXT: [[_MSLD:%.*]] = load i80, ptr [[TMP10]], align 16210; CHECK-NEXT: store i80 [[_MSLD]], ptr @__msan_param_tls, align 8211; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8212; CHECK-NEXT: store i80 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 8213; CHECK-NEXT: store i80 [[_MSLD]], ptr @__msan_va_arg_tls, align 8214; CHECK-NEXT: store i64 16, ptr @__msan_va_arg_overflow_size_tls, align 8215; CHECK-NEXT: call void (x86_fp80, i32, ...) @_Z5test2IeEvT_iz(x86_fp80 noundef [[TMP7]], i32 noundef 1, x86_fp80 noundef [[TMP7]])216; CHECK-NEXT: ret void217;218entry:219 %arg.addr = alloca x86_fp80, align 16220 store x86_fp80 %arg, ptr %arg.addr, align 16221 call void @_Z3usePv(ptr noundef nonnull %arg.addr)222 %0 = load x86_fp80, ptr %arg.addr, align 16223 call void (x86_fp80, i32, ...) @_Z5test2IeEvT_iz(x86_fp80 noundef %0, i32 noundef 1, x86_fp80 noundef %0)224 ret void225}226 227define linkonce_odr dso_local void @_Z4testI6IntIntEvT_(i64 %arg.coerce) sanitize_memory {228; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testI6IntIntEvT_(229; CHECK-SAME: i64 [[ARG_COERCE:%.*]]) #[[ATTR0]] {230; CHECK-NEXT: entry:231; CHECK-NEXT: [[TMP10:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8232; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 8233; CHECK-NEXT: call void @llvm.donothing()234; CHECK-NEXT: [[ARG:%.*]] = alloca [[STRUCT_INTINT:%.*]], align 8235; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG]] to i64236; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[TMP1]], -2147483649237; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr238; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP3]], i8 -1, i64 8, i1 false)239; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARG]] to i64240; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -2147483649241; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr242; CHECK-NEXT: store i64 [[TMP0]], ptr [[TMP6]], align 8243; CHECK-NEXT: store i64 [[ARG_COERCE]], ptr [[ARG]], align 8244; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8245; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])246; CHECK-NEXT: [[AGG_TMP_SROA_0_0_COPYLOAD:%.*]] = load i64, ptr [[ARG]], align 8247; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARG]] to i64248; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -2147483649249; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr250; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP9]], align 8251; CHECK-NEXT: store i64 [[_MSLD]], ptr @__msan_param_tls, align 8252; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8253; CHECK-NEXT: store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8254; CHECK-NEXT: store i64 [[_MSLD]], ptr @__msan_va_arg_tls, align 8255; CHECK-NEXT: store i64 8, ptr @__msan_va_arg_overflow_size_tls, align 8256; CHECK-NEXT: call void (i64, i32, ...) @_Z5test2I6IntIntEvT_iz(i64 [[AGG_TMP_SROA_0_0_COPYLOAD]], i32 noundef 1, i64 [[AGG_TMP_SROA_0_0_COPYLOAD]])257; CHECK-NEXT: ret void258;259entry:260 %arg = alloca %struct.IntInt, align 8261 store i64 %arg.coerce, ptr %arg, align 8262 call void @_Z3usePv(ptr noundef nonnull %arg)263 %agg.tmp.sroa.0.0.copyload = load i64, ptr %arg, align 8264 call void (i64, i32, ...) @_Z5test2I6IntIntEvT_iz(i64 %agg.tmp.sroa.0.0.copyload, i32 noundef 1, i64 %agg.tmp.sroa.0.0.copyload)265 ret void266}267 268define linkonce_odr dso_local void @_Z4testI10Int64Int64EvT_(i64 %arg.coerce0, i64 %arg.coerce1) sanitize_memory {269; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testI10Int64Int64EvT_(270; CHECK-SAME: i64 [[ARG_COERCE0:%.*]], i64 [[ARG_COERCE1:%.*]]) #[[ATTR0]] {271; CHECK-NEXT: entry:272; CHECK-NEXT: [[TMP18:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8273; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 8274; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8275; CHECK-NEXT: call void @llvm.donothing()276; CHECK-NEXT: [[ARG:%.*]] = alloca [[STRUCT_INT64INT64:%.*]], align 8277; CHECK-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[ARG]] to i64278; CHECK-NEXT: [[TMP3:%.*]] = and i64 [[TMP2]], -2147483649279; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr280; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP4]], i8 -1, i64 16, i1 false)281; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[ARG]] to i64282; CHECK-NEXT: [[TMP6:%.*]] = and i64 [[TMP5]], -2147483649283; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr284; CHECK-NEXT: store i64 [[TMP0]], ptr [[TMP7]], align 8285; CHECK-NEXT: store i64 [[ARG_COERCE0]], ptr [[ARG]], align 8286; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds { i64, i64 }, ptr [[ARG]], i64 0, i32 1287; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[TMP8]] to i64288; CHECK-NEXT: [[TMP10:%.*]] = and i64 [[TMP9]], -2147483649289; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr290; CHECK-NEXT: store i64 [[TMP1]], ptr [[TMP11]], align 8291; CHECK-NEXT: store i64 [[ARG_COERCE1]], ptr [[TMP8]], align 8292; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8293; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])294; CHECK-NEXT: [[AGG_TMP_SROA_0_0_COPYLOAD:%.*]] = load i64, ptr [[ARG]], align 8295; CHECK-NEXT: [[TMP12:%.*]] = ptrtoint ptr [[ARG]] to i64296; CHECK-NEXT: [[TMP13:%.*]] = and i64 [[TMP12]], -2147483649297; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr298; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP14]], align 8299; CHECK-NEXT: [[AGG_TMP_SROA_2_0_COPYLOAD:%.*]] = load i64, ptr [[TMP8]], align 8300; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[TMP8]] to i64301; CHECK-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], -2147483649302; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr303; CHECK-NEXT: [[_MSLD1:%.*]] = load i64, ptr [[TMP17]], align 8304; CHECK-NEXT: store i64 [[_MSLD]], ptr @__msan_param_tls, align 8305; CHECK-NEXT: store i64 [[_MSLD1]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8306; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8307; CHECK-NEXT: store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 8308; CHECK-NEXT: store i64 [[_MSLD1]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 8309; CHECK-NEXT: store i64 [[_MSLD]], ptr @__msan_va_arg_tls, align 8310; CHECK-NEXT: store i64 [[_MSLD1]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 8), align 8311; CHECK-NEXT: store i64 16, ptr @__msan_va_arg_overflow_size_tls, align 8312; CHECK-NEXT: call void (i64, i64, i32, ...) @_Z5test2I10Int64Int64EvT_iz(i64 [[AGG_TMP_SROA_0_0_COPYLOAD]], i64 [[AGG_TMP_SROA_2_0_COPYLOAD]], i32 noundef 1, i64 [[AGG_TMP_SROA_0_0_COPYLOAD]], i64 [[AGG_TMP_SROA_2_0_COPYLOAD]])313; CHECK-NEXT: ret void314;315entry:316 %arg = alloca %struct.Int64Int64, align 8317 store i64 %arg.coerce0, ptr %arg, align 8318 %0 = getelementptr inbounds { i64, i64 }, ptr %arg, i64 0, i32 1319 store i64 %arg.coerce1, ptr %0, align 8320 call void @_Z3usePv(ptr noundef nonnull %arg)321 %agg.tmp.sroa.0.0.copyload = load i64, ptr %arg, align 8322 %agg.tmp.sroa.2.0.copyload = load i64, ptr %0, align 8323 call void (i64, i64, i32, ...) @_Z5test2I10Int64Int64EvT_iz(i64 %agg.tmp.sroa.0.0.copyload, i64 %agg.tmp.sroa.2.0.copyload, i32 noundef 1, i64 %agg.tmp.sroa.0.0.copyload, i64 %agg.tmp.sroa.2.0.copyload)324 ret void325}326 327define linkonce_odr dso_local void @_Z4testI12DoubleDoubleEvT_(double %arg.coerce0, double %arg.coerce1) sanitize_memory {328; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testI12DoubleDoubleEvT_(329; CHECK-SAME: double [[ARG_COERCE0:%.*]], double [[ARG_COERCE1:%.*]]) #[[ATTR0]] {330; CHECK-NEXT: entry:331; CHECK-NEXT: [[TMP18:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8332; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 8333; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8334; CHECK-NEXT: call void @llvm.donothing()335; CHECK-NEXT: [[ARG:%.*]] = alloca [[STRUCT_DOUBLEDOUBLE:%.*]], align 8336; CHECK-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[ARG]] to i64337; CHECK-NEXT: [[TMP3:%.*]] = and i64 [[TMP2]], -2147483649338; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr339; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP4]], i8 -1, i64 16, i1 false)340; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[ARG]] to i64341; CHECK-NEXT: [[TMP6:%.*]] = and i64 [[TMP5]], -2147483649342; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr343; CHECK-NEXT: store i64 [[TMP0]], ptr [[TMP7]], align 8344; CHECK-NEXT: store double [[ARG_COERCE0]], ptr [[ARG]], align 8345; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds { double, double }, ptr [[ARG]], i64 0, i32 1346; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[TMP8]] to i64347; CHECK-NEXT: [[TMP10:%.*]] = and i64 [[TMP9]], -2147483649348; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr349; CHECK-NEXT: store i64 [[TMP1]], ptr [[TMP11]], align 8350; CHECK-NEXT: store double [[ARG_COERCE1]], ptr [[TMP8]], align 8351; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8352; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])353; CHECK-NEXT: [[AGG_TMP_SROA_0_0_COPYLOAD:%.*]] = load double, ptr [[ARG]], align 8354; CHECK-NEXT: [[TMP12:%.*]] = ptrtoint ptr [[ARG]] to i64355; CHECK-NEXT: [[TMP13:%.*]] = and i64 [[TMP12]], -2147483649356; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr357; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP14]], align 8358; CHECK-NEXT: [[AGG_TMP_SROA_2_0_COPYLOAD:%.*]] = load double, ptr [[TMP8]], align 8359; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[TMP8]] to i64360; CHECK-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], -2147483649361; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr362; CHECK-NEXT: [[_MSLD1:%.*]] = load i64, ptr [[TMP17]], align 8363; CHECK-NEXT: store i64 [[_MSLD]], ptr @__msan_param_tls, align 8364; CHECK-NEXT: store i64 [[_MSLD1]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8365; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8366; CHECK-NEXT: store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 8367; CHECK-NEXT: store i64 [[_MSLD1]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 8368; CHECK-NEXT: store i64 [[_MSLD]], ptr @__msan_va_arg_tls, align 8369; CHECK-NEXT: store i64 [[_MSLD1]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 8), align 8370; CHECK-NEXT: store i64 16, ptr @__msan_va_arg_overflow_size_tls, align 8371; CHECK-NEXT: call void (double, double, i32, ...) @_Z5test2I12DoubleDoubleEvT_iz(double [[AGG_TMP_SROA_0_0_COPYLOAD]], double [[AGG_TMP_SROA_2_0_COPYLOAD]], i32 noundef 1, double [[AGG_TMP_SROA_0_0_COPYLOAD]], double [[AGG_TMP_SROA_2_0_COPYLOAD]])372; CHECK-NEXT: ret void373;374entry:375 %arg = alloca %struct.DoubleDouble, align 8376 store double %arg.coerce0, ptr %arg, align 8377 %0 = getelementptr inbounds { double, double }, ptr %arg, i64 0, i32 1378 store double %arg.coerce1, ptr %0, align 8379 call void @_Z3usePv(ptr noundef nonnull %arg)380 %agg.tmp.sroa.0.0.copyload = load double, ptr %arg, align 8381 %agg.tmp.sroa.2.0.copyload = load double, ptr %0, align 8382 call void (double, double, i32, ...) @_Z5test2I12DoubleDoubleEvT_iz(double %agg.tmp.sroa.0.0.copyload, double %agg.tmp.sroa.2.0.copyload, i32 noundef 1, double %agg.tmp.sroa.0.0.copyload, double %agg.tmp.sroa.2.0.copyload)383 ret void384}385 386define linkonce_odr dso_local void @_Z4testI7Double4EvT_(ptr noundef byval(%struct.Double4) align 8 %arg) sanitize_memory {387; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testI7Double4EvT_(388; CHECK-SAME: ptr noundef byval([[STRUCT_DOUBLE4:%.*]]) align 8 [[ARG:%.*]]) #[[ATTR0]] {389; CHECK-NEXT: entry:390; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr [[ARG]] to i64391; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], -2147483649392; CHECK-NEXT: [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to ptr393; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_param_tls, i64 32, i1 false)394; CHECK-NEXT: [[TMP9:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8395; CHECK-NEXT: call void @llvm.donothing()396; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8397; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])398; CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[ARG]] to i64399; CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], -2147483649400; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr401; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 @__msan_param_tls, ptr align 8 [[TMP5]], i64 32, i1 false)402; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 8403; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[ARG]] to i64404; CHECK-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], -2147483649405; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr406; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 40), ptr align 8 [[TMP8]], i64 32, i1 false)407; CHECK-NEXT: [[TMP11:%.*]] = ptrtoint ptr [[ARG]] to i64408; CHECK-NEXT: [[TMP12:%.*]] = and i64 [[TMP11]], -2147483649409; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr410; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 @__msan_va_arg_tls, ptr align 8 [[TMP13]], i64 32, i1 false)411; CHECK-NEXT: store i64 32, ptr @__msan_va_arg_overflow_size_tls, align 8412; CHECK-NEXT: call void (ptr, i32, ...) @_Z5test2I7Double4EvT_iz(ptr noundef nonnull byval([[STRUCT_DOUBLE4]]) align 8 [[ARG]], i32 noundef 1, ptr noundef nonnull byval([[STRUCT_DOUBLE4]]) align 8 [[ARG]])413; CHECK-NEXT: ret void414;415entry:416 call void @_Z3usePv(ptr noundef nonnull %arg)417 call void (ptr, i32, ...) @_Z5test2I7Double4EvT_iz(ptr noundef nonnull byval(%struct.Double4) align 8 %arg, i32 noundef 1, ptr noundef nonnull byval(%struct.Double4) align 8 %arg)418 ret void419}420 421declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2422 423define linkonce_odr dso_local void @_Z4testI11DoubleFloatEvT_(double %arg.coerce0, float %arg.coerce1) sanitize_memory {424; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testI11DoubleFloatEvT_(425; CHECK-SAME: double [[ARG_COERCE0:%.*]], float [[ARG_COERCE1:%.*]]) #[[ATTR0]] {426; CHECK-NEXT: entry:427; CHECK-NEXT: [[TMP18:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8428; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 8429; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8430; CHECK-NEXT: call void @llvm.donothing()431; CHECK-NEXT: [[ARG:%.*]] = alloca [[STRUCT_DOUBLEFLOAT:%.*]], align 8432; CHECK-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[ARG]] to i64433; CHECK-NEXT: [[TMP3:%.*]] = and i64 [[TMP2]], -2147483649434; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr435; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP4]], i8 -1, i64 16, i1 false)436; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[ARG]] to i64437; CHECK-NEXT: [[TMP6:%.*]] = and i64 [[TMP5]], -2147483649438; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr439; CHECK-NEXT: store i64 [[TMP0]], ptr [[TMP7]], align 8440; CHECK-NEXT: store double [[ARG_COERCE0]], ptr [[ARG]], align 8441; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds { double, float }, ptr [[ARG]], i64 0, i32 1442; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[TMP8]] to i64443; CHECK-NEXT: [[TMP10:%.*]] = and i64 [[TMP9]], -2147483649444; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr445; CHECK-NEXT: store i32 [[TMP1]], ptr [[TMP11]], align 8446; CHECK-NEXT: store float [[ARG_COERCE1]], ptr [[TMP8]], align 8447; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8448; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])449; CHECK-NEXT: [[AGG_TMP_SROA_0_0_COPYLOAD:%.*]] = load double, ptr [[ARG]], align 8450; CHECK-NEXT: [[TMP12:%.*]] = ptrtoint ptr [[ARG]] to i64451; CHECK-NEXT: [[TMP13:%.*]] = and i64 [[TMP12]], -2147483649452; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr453; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP14]], align 8454; CHECK-NEXT: [[AGG_TMP_SROA_2_0_COPYLOAD:%.*]] = load float, ptr [[TMP8]], align 8455; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[TMP8]] to i64456; CHECK-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], -2147483649457; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr458; CHECK-NEXT: [[_MSLD1:%.*]] = load i32, ptr [[TMP17]], align 8459; CHECK-NEXT: store i64 [[_MSLD]], ptr @__msan_param_tls, align 8460; CHECK-NEXT: store i32 [[_MSLD1]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8461; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8462; CHECK-NEXT: store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 8463; CHECK-NEXT: store i32 [[_MSLD1]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 8464; CHECK-NEXT: store i64 [[_MSLD]], ptr @__msan_va_arg_tls, align 8465; CHECK-NEXT: store i32 [[_MSLD1]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 8), align 8466; CHECK-NEXT: store i64 16, ptr @__msan_va_arg_overflow_size_tls, align 8467; CHECK-NEXT: call void (double, float, i32, ...) @_Z5test2I11DoubleFloatEvT_iz(double [[AGG_TMP_SROA_0_0_COPYLOAD]], float [[AGG_TMP_SROA_2_0_COPYLOAD]], i32 noundef 1, double [[AGG_TMP_SROA_0_0_COPYLOAD]], float [[AGG_TMP_SROA_2_0_COPYLOAD]])468; CHECK-NEXT: ret void469;470entry:471 %arg = alloca %struct.DoubleFloat, align 8472 store double %arg.coerce0, ptr %arg, align 8473 %0 = getelementptr inbounds { double, float }, ptr %arg, i64 0, i32 1474 store float %arg.coerce1, ptr %0, align 8475 call void @_Z3usePv(ptr noundef nonnull %arg)476 %agg.tmp.sroa.0.0.copyload = load double, ptr %arg, align 8477 %agg.tmp.sroa.2.0.copyload = load float, ptr %0, align 8478 call void (double, float, i32, ...) @_Z5test2I11DoubleFloatEvT_iz(double %agg.tmp.sroa.0.0.copyload, float %agg.tmp.sroa.2.0.copyload, i32 noundef 1, double %agg.tmp.sroa.0.0.copyload, float %agg.tmp.sroa.2.0.copyload)479 ret void480}481 482define linkonce_odr dso_local void @_Z4testI11LongDouble2EvT_(ptr noundef byval(%struct.LongDouble2) align 16 %arg) sanitize_memory {483; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testI11LongDouble2EvT_(484; CHECK-SAME: ptr noundef byval([[STRUCT_LONGDOUBLE2:%.*]]) align 16 [[ARG:%.*]]) #[[ATTR0]] {485; CHECK-NEXT: entry:486; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr [[ARG]] to i64487; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], -2147483649488; CHECK-NEXT: [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to ptr489; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_param_tls, i64 32, i1 false)490; CHECK-NEXT: [[TMP9:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8491; CHECK-NEXT: call void @llvm.donothing()492; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8493; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])494; CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[ARG]] to i64495; CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], -2147483649496; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr497; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 @__msan_param_tls, ptr align 8 [[TMP5]], i64 32, i1 false)498; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 8499; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[ARG]] to i64500; CHECK-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], -2147483649501; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr502; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 40), ptr align 8 [[TMP8]], i64 32, i1 false)503; CHECK-NEXT: [[TMP11:%.*]] = ptrtoint ptr [[ARG]] to i64504; CHECK-NEXT: [[TMP12:%.*]] = and i64 [[TMP11]], -2147483649505; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr506; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 @__msan_va_arg_tls, ptr align 8 [[TMP13]], i64 32, i1 false)507; CHECK-NEXT: store i64 32, ptr @__msan_va_arg_overflow_size_tls, align 8508; CHECK-NEXT: call void (ptr, i32, ...) @_Z5test2I11LongDouble2EvT_iz(ptr noundef nonnull byval([[STRUCT_LONGDOUBLE2]]) align 16 [[ARG]], i32 noundef 1, ptr noundef nonnull byval([[STRUCT_LONGDOUBLE2]]) align 16 [[ARG]])509; CHECK-NEXT: ret void510;511entry:512 call void @_Z3usePv(ptr noundef nonnull %arg)513 call void (ptr, i32, ...) @_Z5test2I11LongDouble2EvT_iz(ptr noundef nonnull byval(%struct.LongDouble2) align 16 %arg, i32 noundef 1, ptr noundef nonnull byval(%struct.LongDouble2) align 16 %arg)514 ret void515}516 517define linkonce_odr dso_local void @_Z4testI11LongDouble4EvT_(ptr noundef byval(%struct.LongDouble4) align 16 %arg) sanitize_memory {518; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testI11LongDouble4EvT_(519; CHECK-SAME: ptr noundef byval([[STRUCT_LONGDOUBLE4:%.*]]) align 16 [[ARG:%.*]]) #[[ATTR0]] {520; CHECK-NEXT: entry:521; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr [[ARG]] to i64522; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], -2147483649523; CHECK-NEXT: [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to ptr524; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_param_tls, i64 64, i1 false)525; CHECK-NEXT: [[TMP9:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8526; CHECK-NEXT: call void @llvm.donothing()527; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8528; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])529; CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[ARG]] to i64530; CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], -2147483649531; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr532; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 @__msan_param_tls, ptr align 8 [[TMP5]], i64 64, i1 false)533; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 8534; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[ARG]] to i64535; CHECK-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], -2147483649536; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr537; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 72), ptr align 8 [[TMP8]], i64 64, i1 false)538; CHECK-NEXT: [[TMP11:%.*]] = ptrtoint ptr [[ARG]] to i64539; CHECK-NEXT: [[TMP12:%.*]] = and i64 [[TMP11]], -2147483649540; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr541; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 @__msan_va_arg_tls, ptr align 8 [[TMP13]], i64 64, i1 false)542; CHECK-NEXT: store i64 64, ptr @__msan_va_arg_overflow_size_tls, align 8543; CHECK-NEXT: call void (ptr, i32, ...) @_Z5test2I11LongDouble4EvT_iz(ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], i32 noundef 1, ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]])544; CHECK-NEXT: ret void545;546entry:547 call void @_Z3usePv(ptr noundef nonnull %arg)548 call void (ptr, i32, ...) @_Z5test2I11LongDouble4EvT_iz(ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, i32 noundef 1, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg)549 ret void550}551 552declare void @_Z3usePv(ptr noundef) local_unnamed_addr #3553 554define linkonce_odr dso_local void @_Z5test2IcEvT_iz(i8 noundef signext %t, i32 noundef %n, ...) sanitize_memory {555; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2IcEvT_iz(556; CHECK-SAME: i8 noundef signext [[T:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {557; CHECK-NEXT: entry:558; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8559; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8560; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)561; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)562; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)563; CHECK-NEXT: call void @llvm.donothing()564; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 16565; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])566; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64567; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -2147483649568; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr569; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)570; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64571; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -2147483649572; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr573; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 4, i1 false)574; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])575; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i64576; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr577; CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8578; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[TMP12]] to i64579; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], -2147483649580; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr581; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP15]], ptr align 8 [[TMP2]], i64 [[TMP1]], i1 false)582; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8583; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])584; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])585; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])586; CHECK-NEXT: ret void587;588entry:589 %args = alloca [1 x %struct.__va_list_tag], align 16590 call void @llvm.lifetime.start.p0(ptr nonnull %args) #6591 call void @llvm.va_start(ptr nonnull %args)592 call void @_Z3usePv(ptr noundef nonnull %args)593 call void @llvm.va_end(ptr nonnull %args)594 call void @llvm.lifetime.end.p0(ptr nonnull %args) #6595 ret void596}597 598declare void @llvm.lifetime.start.p0(ptr nocapture) #4599 600declare void @llvm.va_start(ptr) #5601 602declare void @llvm.va_end(ptr) #5603 604declare void @llvm.lifetime.end.p0(ptr nocapture) #4605 606define linkonce_odr dso_local void @_Z5test2IiEvT_iz(i32 noundef %t, i32 noundef %n, ...) sanitize_memory {607; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2IiEvT_iz(608; CHECK-SAME: i32 noundef [[T:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {609; CHECK-NEXT: entry:610; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8611; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8612; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)613; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)614; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)615; CHECK-NEXT: call void @llvm.donothing()616; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 16617; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])618; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64619; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -2147483649620; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr621; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)622; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64623; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -2147483649624; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr625; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 4, i1 false)626; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])627; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i64628; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr629; CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8630; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[TMP12]] to i64631; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], -2147483649632; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr633; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP15]], ptr align 8 [[TMP2]], i64 [[TMP1]], i1 false)634; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8635; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])636; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])637; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])638; CHECK-NEXT: ret void639;640entry:641 %args = alloca [1 x %struct.__va_list_tag], align 16642 call void @llvm.lifetime.start.p0(ptr nonnull %args) #6643 call void @llvm.va_start(ptr nonnull %args)644 call void @_Z3usePv(ptr noundef nonnull %args)645 call void @llvm.va_end(ptr nonnull %args)646 call void @llvm.lifetime.end.p0(ptr nonnull %args) #6647 ret void648}649 650define linkonce_odr dso_local void @_Z5test2IfEvT_iz(float noundef %t, i32 noundef %n, ...) sanitize_memory {651; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2IfEvT_iz(652; CHECK-SAME: float noundef [[T:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {653; CHECK-NEXT: entry:654; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8655; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8656; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)657; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)658; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)659; CHECK-NEXT: call void @llvm.donothing()660; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 16661; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])662; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64663; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -2147483649664; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr665; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)666; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64667; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -2147483649668; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr669; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 4, i1 false)670; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])671; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i64672; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr673; CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8674; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[TMP12]] to i64675; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], -2147483649676; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr677; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP15]], ptr align 8 [[TMP2]], i64 [[TMP1]], i1 false)678; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8679; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])680; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])681; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])682; CHECK-NEXT: ret void683;684entry:685 %args = alloca [1 x %struct.__va_list_tag], align 16686 call void @llvm.lifetime.start.p0(ptr nonnull %args) #6687 call void @llvm.va_start(ptr nonnull %args)688 call void @_Z3usePv(ptr noundef nonnull %args)689 call void @llvm.va_end(ptr nonnull %args)690 call void @llvm.lifetime.end.p0(ptr nonnull %args) #6691 ret void692}693 694define linkonce_odr dso_local void @_Z5test2IdEvT_iz(double noundef %t, i32 noundef %n, ...) sanitize_memory {695; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2IdEvT_iz(696; CHECK-SAME: double noundef [[T:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {697; CHECK-NEXT: entry:698; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8699; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8700; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)701; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)702; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)703; CHECK-NEXT: call void @llvm.donothing()704; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 16705; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])706; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64707; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -2147483649708; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr709; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)710; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64711; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -2147483649712; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr713; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 4, i1 false)714; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])715; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i64716; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr717; CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8718; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[TMP12]] to i64719; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], -2147483649720; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr721; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP15]], ptr align 8 [[TMP2]], i64 [[TMP1]], i1 false)722; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8723; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])724; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])725; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])726; CHECK-NEXT: ret void727;728entry:729 %args = alloca [1 x %struct.__va_list_tag], align 16730 call void @llvm.lifetime.start.p0(ptr nonnull %args) #6731 call void @llvm.va_start(ptr nonnull %args)732 call void @_Z3usePv(ptr noundef nonnull %args)733 call void @llvm.va_end(ptr nonnull %args)734 call void @llvm.lifetime.end.p0(ptr nonnull %args) #6735 ret void736}737 738define linkonce_odr dso_local void @_Z5test2IeEvT_iz(x86_fp80 noundef %t, i32 noundef %n, ...) sanitize_memory {739; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2IeEvT_iz(740; CHECK-SAME: x86_fp80 noundef [[T:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {741; CHECK-NEXT: entry:742; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8743; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8744; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)745; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)746; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)747; CHECK-NEXT: call void @llvm.donothing()748; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 16749; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])750; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64751; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -2147483649752; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr753; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)754; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64755; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -2147483649756; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr757; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 4, i1 false)758; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])759; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i64760; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr761; CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8762; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[TMP12]] to i64763; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], -2147483649764; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr765; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP15]], ptr align 8 [[TMP2]], i64 [[TMP1]], i1 false)766; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8767; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])768; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])769; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])770; CHECK-NEXT: ret void771;772entry:773 %args = alloca [1 x %struct.__va_list_tag], align 16774 call void @llvm.lifetime.start.p0(ptr nonnull %args) #6775 call void @llvm.va_start(ptr nonnull %args)776 call void @_Z3usePv(ptr noundef nonnull %args)777 call void @llvm.va_end(ptr nonnull %args)778 call void @llvm.lifetime.end.p0(ptr nonnull %args) #6779 ret void780}781 782define linkonce_odr dso_local void @_Z5test2I6IntIntEvT_iz(i64 %t.coerce, i32 noundef %n, ...) sanitize_memory {783; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2I6IntIntEvT_iz(784; CHECK-SAME: i64 [[T_COERCE:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {785; CHECK-NEXT: entry:786; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8787; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8788; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)789; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)790; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)791; CHECK-NEXT: call void @llvm.donothing()792; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 16793; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])794; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64795; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -2147483649796; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr797; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)798; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64799; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -2147483649800; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr801; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 4, i1 false)802; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])803; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i64804; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr805; CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8806; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[TMP12]] to i64807; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], -2147483649808; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr809; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP15]], ptr align 8 [[TMP2]], i64 [[TMP1]], i1 false)810; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8811; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])812; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])813; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])814; CHECK-NEXT: ret void815;816entry:817 %args = alloca [1 x %struct.__va_list_tag], align 16818 call void @llvm.lifetime.start.p0(ptr nonnull %args) #6819 call void @llvm.va_start(ptr nonnull %args)820 call void @_Z3usePv(ptr noundef nonnull %args)821 call void @llvm.va_end(ptr nonnull %args)822 call void @llvm.lifetime.end.p0(ptr nonnull %args) #6823 ret void824}825 826define linkonce_odr dso_local void @_Z5test2I10Int64Int64EvT_iz(i64 %t.coerce0, i64 %t.coerce1, i32 noundef %n, ...) sanitize_memory {827; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2I10Int64Int64EvT_iz(828; CHECK-SAME: i64 [[T_COERCE0:%.*]], i64 [[T_COERCE1:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {829; CHECK-NEXT: entry:830; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8831; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8832; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)833; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)834; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)835; CHECK-NEXT: call void @llvm.donothing()836; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 16837; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])838; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64839; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -2147483649840; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr841; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)842; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64843; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -2147483649844; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr845; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 4, i1 false)846; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])847; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i64848; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr849; CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8850; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[TMP12]] to i64851; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], -2147483649852; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr853; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP15]], ptr align 8 [[TMP2]], i64 [[TMP1]], i1 false)854; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8855; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])856; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])857; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])858; CHECK-NEXT: ret void859;860entry:861 %args = alloca [1 x %struct.__va_list_tag], align 16862 call void @llvm.lifetime.start.p0(ptr nonnull %args) #6863 call void @llvm.va_start(ptr nonnull %args)864 call void @_Z3usePv(ptr noundef nonnull %args)865 call void @llvm.va_end(ptr nonnull %args)866 call void @llvm.lifetime.end.p0(ptr nonnull %args) #6867 ret void868}869 870define linkonce_odr dso_local void @_Z5test2I12DoubleDoubleEvT_iz(double %t.coerce0, double %t.coerce1, i32 noundef %n, ...) sanitize_memory {871; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2I12DoubleDoubleEvT_iz(872; CHECK-SAME: double [[T_COERCE0:%.*]], double [[T_COERCE1:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {873; CHECK-NEXT: entry:874; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8875; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8876; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)877; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)878; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)879; CHECK-NEXT: call void @llvm.donothing()880; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 16881; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])882; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64883; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -2147483649884; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr885; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)886; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64887; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -2147483649888; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr889; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 4, i1 false)890; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])891; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i64892; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr893; CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8894; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[TMP12]] to i64895; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], -2147483649896; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr897; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP15]], ptr align 8 [[TMP2]], i64 [[TMP1]], i1 false)898; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8899; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])900; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])901; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])902; CHECK-NEXT: ret void903;904entry:905 %args = alloca [1 x %struct.__va_list_tag], align 16906 call void @llvm.lifetime.start.p0(ptr nonnull %args) #6907 call void @llvm.va_start(ptr nonnull %args)908 call void @_Z3usePv(ptr noundef nonnull %args)909 call void @llvm.va_end(ptr nonnull %args)910 call void @llvm.lifetime.end.p0(ptr nonnull %args) #6911 ret void912}913 914define linkonce_odr dso_local void @_Z5test2I7Double4EvT_iz(ptr noundef byval(%struct.Double4) align 8 %t, i32 noundef %n, ...) sanitize_memory {915; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2I7Double4EvT_iz(916; CHECK-SAME: ptr noundef byval([[STRUCT_DOUBLE4:%.*]]) align 8 [[T:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {917; CHECK-NEXT: entry:918; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8919; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8920; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)921; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)922; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)923; CHECK-NEXT: call void @llvm.donothing()924; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 16925; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])926; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64927; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -2147483649928; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr929; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)930; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64931; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -2147483649932; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr933; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 4, i1 false)934; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])935; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i64936; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr937; CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8938; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[TMP12]] to i64939; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], -2147483649940; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr941; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP15]], ptr align 8 [[TMP2]], i64 [[TMP1]], i1 false)942; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8943; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])944; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])945; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])946; CHECK-NEXT: ret void947;948entry:949 %args = alloca [1 x %struct.__va_list_tag], align 16950 call void @llvm.lifetime.start.p0(ptr nonnull %args) #6951 call void @llvm.va_start(ptr nonnull %args)952 call void @_Z3usePv(ptr noundef nonnull %args)953 call void @llvm.va_end(ptr nonnull %args)954 call void @llvm.lifetime.end.p0(ptr nonnull %args) #6955 ret void956}957 958define linkonce_odr dso_local void @_Z5test2I11DoubleFloatEvT_iz(double %t.coerce0, float %t.coerce1, i32 noundef %n, ...) sanitize_memory {959; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2I11DoubleFloatEvT_iz(960; CHECK-SAME: double [[T_COERCE0:%.*]], float [[T_COERCE1:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {961; CHECK-NEXT: entry:962; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8963; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8964; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)965; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)966; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)967; CHECK-NEXT: call void @llvm.donothing()968; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 16969; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])970; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64971; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -2147483649972; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr973; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)974; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64975; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -2147483649976; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr977; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 4, i1 false)978; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])979; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i64980; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr981; CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8982; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[TMP12]] to i64983; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], -2147483649984; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr985; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP15]], ptr align 8 [[TMP2]], i64 [[TMP1]], i1 false)986; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8987; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])988; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])989; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])990; CHECK-NEXT: ret void991;992entry:993 %args = alloca [1 x %struct.__va_list_tag], align 16994 call void @llvm.lifetime.start.p0(ptr nonnull %args) #6995 call void @llvm.va_start(ptr nonnull %args)996 call void @_Z3usePv(ptr noundef nonnull %args)997 call void @llvm.va_end(ptr nonnull %args)998 call void @llvm.lifetime.end.p0(ptr nonnull %args) #6999 ret void1000}1001 1002define linkonce_odr dso_local void @_Z5test2I11LongDouble2EvT_iz(ptr noundef byval(%struct.LongDouble2) align 16 %t, i32 noundef %n, ...) sanitize_memory {1003; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2I11LongDouble2EvT_iz(1004; CHECK-SAME: ptr noundef byval([[STRUCT_LONGDOUBLE2:%.*]]) align 16 [[T:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {1005; CHECK-NEXT: entry:1006; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 81007; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 81008; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)1009; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)1010; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)1011; CHECK-NEXT: call void @llvm.donothing()1012; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 161013; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])1014; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i641015; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -21474836491016; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr1017; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)1018; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i641019; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -21474836491020; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr1021; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 4, i1 false)1022; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])1023; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i641024; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr1025; CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 81026; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[TMP12]] to i641027; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], -21474836491028; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr1029; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP15]], ptr align 8 [[TMP2]], i64 [[TMP1]], i1 false)1030; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 81031; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])1032; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])1033; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])1034; CHECK-NEXT: ret void1035;1036entry:1037 %args = alloca [1 x %struct.__va_list_tag], align 161038 call void @llvm.lifetime.start.p0(ptr nonnull %args) #61039 call void @llvm.va_start(ptr nonnull %args)1040 call void @_Z3usePv(ptr noundef nonnull %args)1041 call void @llvm.va_end(ptr nonnull %args)1042 call void @llvm.lifetime.end.p0(ptr nonnull %args) #61043 ret void1044}1045 1046define linkonce_odr dso_local void @_Z5test2I11LongDouble4EvT_iz(ptr noundef byval(%struct.LongDouble4) align 16 %t, i32 noundef %n, ...) sanitize_memory {1047; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2I11LongDouble4EvT_iz(1048; CHECK-SAME: ptr noundef byval([[STRUCT_LONGDOUBLE4:%.*]]) align 16 [[T:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {1049; CHECK-NEXT: entry:1050; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 81051; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 81052; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)1053; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)1054; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)1055; CHECK-NEXT: call void @llvm.donothing()1056; CHECK-NEXT: [[ARGS:%.*]] = alloca [1 x %struct.__va_list_tag], align 161057; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[ARGS]])1058; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i641059; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -21474836491060; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr1061; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP6]], i8 -1, i64 24, i1 false)1062; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i641063; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -21474836491064; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr1065; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 4, i1 false)1066; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])1067; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i641068; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr1069; CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 81070; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[TMP12]] to i641071; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], -21474836491072; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr1073; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP15]], ptr align 8 [[TMP2]], i64 [[TMP1]], i1 false)1074; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 81075; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])1076; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])1077; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr nonnull [[ARGS]])1078; CHECK-NEXT: ret void1079;1080entry:1081 %args = alloca [1 x %struct.__va_list_tag], align 161082 call void @llvm.lifetime.start.p0(ptr nonnull %args) #61083 call void @llvm.va_start(ptr nonnull %args)1084 call void @_Z3usePv(ptr noundef nonnull %args)1085 call void @llvm.va_end(ptr nonnull %args)1086 call void @llvm.lifetime.end.p0(ptr nonnull %args) #61087 ret void1088}1089 1090define linkonce_odr dso_local void @_Z4test3I11LongDouble4EvT_(ptr noundef byval(%struct.LongDouble4) align 16 %arg) sanitize_memory {1091; CHECK-LABEL: define linkonce_odr dso_local void @_Z4test3I11LongDouble4EvT_(1092; CHECK-SAME: ptr noundef byval([[STRUCT_LONGDOUBLE4:%.*]]) align 16 [[ARG:%.*]]) #[[ATTR0]] {1093; CHECK-NEXT: entry:1094; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr [[ARG]] to i641095; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], -21474836491096; CHECK-NEXT: [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to ptr1097; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_param_tls, i64 64, i1 false)1098; CHECK-NEXT: [[TMP39:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 81099; CHECK-NEXT: call void @llvm.donothing()1100; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 81101; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])1102; CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[ARG]] to i641103; CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], -21474836491104; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr1105; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 @__msan_param_tls, ptr align 8 [[TMP5]], i64 64, i1 false)1106; CHECK-NEXT: store i32 0, ptr getelementptr (i8, ptr @__msan_param_tls, i64 64), align 81107; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[ARG]] to i641108; CHECK-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], -21474836491109; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr1110; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 72), ptr align 8 [[TMP8]], i64 64, i1 false)1111; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[ARG]] to i641112; CHECK-NEXT: [[TMP10:%.*]] = and i64 [[TMP9]], -21474836491113; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr1114; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 136), ptr align 8 [[TMP11]], i64 64, i1 false)1115; CHECK-NEXT: [[TMP12:%.*]] = ptrtoint ptr [[ARG]] to i641116; CHECK-NEXT: [[TMP13:%.*]] = and i64 [[TMP12]], -21474836491117; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr1118; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 200), ptr align 8 [[TMP14]], i64 64, i1 false)1119; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[ARG]] to i641120; CHECK-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], -21474836491121; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr1122; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 264), ptr align 8 [[TMP17]], i64 64, i1 false)1123; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[ARG]] to i641124; CHECK-NEXT: [[TMP19:%.*]] = and i64 [[TMP18]], -21474836491125; CHECK-NEXT: [[TMP20:%.*]] = inttoptr i64 [[TMP19]] to ptr1126; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 328), ptr align 8 [[TMP20]], i64 64, i1 false)1127; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[ARG]] to i641128; CHECK-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], -21474836491129; CHECK-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr1130; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 392), ptr align 8 [[TMP23]], i64 64, i1 false)1131; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[ARG]] to i641132; CHECK-NEXT: [[TMP25:%.*]] = and i64 [[TMP24]], -21474836491133; CHECK-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP25]] to ptr1134; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 456), ptr align 8 [[TMP26]], i64 64, i1 false)1135; CHECK-NEXT: [[TMP27:%.*]] = ptrtoint ptr [[ARG]] to i641136; CHECK-NEXT: [[TMP28:%.*]] = and i64 [[TMP27]], -21474836491137; CHECK-NEXT: [[TMP29:%.*]] = inttoptr i64 [[TMP28]] to ptr1138; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 520), ptr align 8 [[TMP29]], i64 64, i1 false)1139; CHECK-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[ARG]] to i641140; CHECK-NEXT: [[TMP31:%.*]] = and i64 [[TMP30]], -21474836491141; CHECK-NEXT: [[TMP32:%.*]] = inttoptr i64 [[TMP31]] to ptr1142; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 584), ptr align 8 [[TMP32]], i64 64, i1 false)1143; CHECK-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[ARG]] to i641144; CHECK-NEXT: [[TMP34:%.*]] = and i64 [[TMP33]], -21474836491145; CHECK-NEXT: [[TMP35:%.*]] = inttoptr i64 [[TMP34]] to ptr1146; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 648), ptr align 8 [[TMP35]], i64 64, i1 false)1147; CHECK-NEXT: [[TMP36:%.*]] = ptrtoint ptr [[ARG]] to i641148; CHECK-NEXT: [[TMP37:%.*]] = and i64 [[TMP36]], -21474836491149; CHECK-NEXT: [[TMP38:%.*]] = inttoptr i64 [[TMP37]] to ptr1150; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 712), ptr align 8 [[TMP38]], i64 64, i1 false)1151; CHECK-NEXT: [[TMP41:%.*]] = ptrtoint ptr [[ARG]] to i641152; CHECK-NEXT: [[TMP42:%.*]] = and i64 [[TMP41]], -21474836491153; CHECK-NEXT: [[TMP43:%.*]] = inttoptr i64 [[TMP42]] to ptr1154; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 @__msan_va_arg_tls, ptr align 8 [[TMP43]], i64 64, i1 false)1155; CHECK-NEXT: [[TMP44:%.*]] = ptrtoint ptr [[ARG]] to i641156; CHECK-NEXT: [[TMP45:%.*]] = and i64 [[TMP44]], -21474836491157; CHECK-NEXT: [[TMP46:%.*]] = inttoptr i64 [[TMP45]] to ptr1158; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 64), ptr align 8 [[TMP46]], i64 64, i1 false)1159; CHECK-NEXT: [[TMP47:%.*]] = ptrtoint ptr [[ARG]] to i641160; CHECK-NEXT: [[TMP48:%.*]] = and i64 [[TMP47]], -21474836491161; CHECK-NEXT: [[TMP49:%.*]] = inttoptr i64 [[TMP48]] to ptr1162; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 128), ptr align 8 [[TMP49]], i64 64, i1 false)1163; CHECK-NEXT: [[TMP50:%.*]] = ptrtoint ptr [[ARG]] to i641164; CHECK-NEXT: [[TMP51:%.*]] = and i64 [[TMP50]], -21474836491165; CHECK-NEXT: [[TMP52:%.*]] = inttoptr i64 [[TMP51]] to ptr1166; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 192), ptr align 8 [[TMP52]], i64 64, i1 false)1167; CHECK-NEXT: [[TMP53:%.*]] = ptrtoint ptr [[ARG]] to i641168; CHECK-NEXT: [[TMP54:%.*]] = and i64 [[TMP53]], -21474836491169; CHECK-NEXT: [[TMP55:%.*]] = inttoptr i64 [[TMP54]] to ptr1170; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 256), ptr align 8 [[TMP55]], i64 64, i1 false)1171; CHECK-NEXT: [[TMP56:%.*]] = ptrtoint ptr [[ARG]] to i641172; CHECK-NEXT: [[TMP57:%.*]] = and i64 [[TMP56]], -21474836491173; CHECK-NEXT: [[TMP58:%.*]] = inttoptr i64 [[TMP57]] to ptr1174; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 320), ptr align 8 [[TMP58]], i64 64, i1 false)1175; CHECK-NEXT: [[TMP59:%.*]] = ptrtoint ptr [[ARG]] to i641176; CHECK-NEXT: [[TMP60:%.*]] = and i64 [[TMP59]], -21474836491177; CHECK-NEXT: [[TMP61:%.*]] = inttoptr i64 [[TMP60]] to ptr1178; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 384), ptr align 8 [[TMP61]], i64 64, i1 false)1179; CHECK-NEXT: [[TMP62:%.*]] = ptrtoint ptr [[ARG]] to i641180; CHECK-NEXT: [[TMP63:%.*]] = and i64 [[TMP62]], -21474836491181; CHECK-NEXT: [[TMP64:%.*]] = inttoptr i64 [[TMP63]] to ptr1182; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 448), ptr align 8 [[TMP64]], i64 64, i1 false)1183; CHECK-NEXT: [[TMP65:%.*]] = ptrtoint ptr [[ARG]] to i641184; CHECK-NEXT: [[TMP66:%.*]] = and i64 [[TMP65]], -21474836491185; CHECK-NEXT: [[TMP67:%.*]] = inttoptr i64 [[TMP66]] to ptr1186; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 512), ptr align 8 [[TMP67]], i64 64, i1 false)1187; CHECK-NEXT: [[TMP68:%.*]] = ptrtoint ptr [[ARG]] to i641188; CHECK-NEXT: [[TMP69:%.*]] = and i64 [[TMP68]], -21474836491189; CHECK-NEXT: [[TMP70:%.*]] = inttoptr i64 [[TMP69]] to ptr1190; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 576), ptr align 8 [[TMP70]], i64 64, i1 false)1191; CHECK-NEXT: [[TMP71:%.*]] = ptrtoint ptr [[ARG]] to i641192; CHECK-NEXT: [[TMP72:%.*]] = and i64 [[TMP71]], -21474836491193; CHECK-NEXT: [[TMP73:%.*]] = inttoptr i64 [[TMP72]] to ptr1194; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 640), ptr align 8 [[TMP73]], i64 64, i1 false)1195; CHECK-NEXT: [[TMP74:%.*]] = ptrtoint ptr [[ARG]] to i641196; CHECK-NEXT: [[TMP75:%.*]] = and i64 [[TMP74]], -21474836491197; CHECK-NEXT: [[TMP76:%.*]] = inttoptr i64 [[TMP75]] to ptr1198; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 704), ptr align 8 [[TMP76]], i64 64, i1 false)1199; CHECK-NEXT: store i64 1280, ptr @__msan_va_arg_overflow_size_tls, align 81200; CHECK-NEXT: call void (ptr, i32, ...) @_Z5test2I11LongDouble4EvT_iz(ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], i32 noundef 20, ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]], ptr noundef nonnull byval([[STRUCT_LONGDOUBLE4]]) align 16 [[ARG]])1201; CHECK-NEXT: ret void1202;1203entry:1204 call void @_Z3usePv(ptr noundef nonnull %arg)1205 call void (ptr, i32, ...) @_Z5test2I11LongDouble4EvT_iz(ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, i32 noundef 20, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg, ptr noundef nonnull byval(%struct.LongDouble4) align 16 %arg)1206 ret void1207}1208