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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt < %s -S -passes='module(msan)' -msan-check-access-address=0                                      | FileCheck %s --check-prefixes=CHECK3; RUN: opt < %s -S -passes='module(msan)' -msan-check-access-address=0                -msan-track-origins=1 | FileCheck %s --check-prefixes=ORIGIN4; RUN: opt < %s -S -passes='module(msan)' -msan-instrumentation-with-call-threshold=0 -msan-track-origins=1 | FileCheck %s --check-prefixes=CALLS5 6target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"7target triple = "x86_64-unknown-linux-gnu"8 9 10; Check the presence and the linkage type of __msan_track_origins and11; other interface symbols.12; ORIGINS: @__msan_track_origins = weak_odr constant i32 113 14 15; Check instrumentation of stores16 17define void @Store(ptr nocapture %p, i32 %x) nounwind uwtable sanitize_memory {18; CHECK-LABEL: define void @Store(19; CHECK-SAME: ptr captures(none) [[P:%.*]], i32 [[X:%.*]]) #[[ATTR0:[0-9]+]] {20; CHECK-NEXT:  [[ENTRY:.*:]]21; CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 822; CHECK-NEXT:    call void @llvm.donothing()23; CHECK-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[P]] to i6424; CHECK-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 8796093022208025; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr26; CHECK-NEXT:    store i32 [[TMP0]], ptr [[TMP3]], align 427; CHECK-NEXT:    store i32 [[X]], ptr [[P]], align 428; CHECK-NEXT:    ret void29;30; ORIGIN-LABEL: define void @Store(31; ORIGIN-SAME: ptr captures(none) [[P:%.*]], i32 [[X:%.*]]) #[[ATTR0:[0-9]+]] {32; ORIGIN-NEXT:  [[ENTRY:.*:]]33; ORIGIN-NEXT:    [[TMP0:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 834; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 435; ORIGIN-NEXT:    call void @llvm.donothing()36; ORIGIN-NEXT:    [[TMP2:%.*]] = ptrtoint ptr [[P]] to i6437; ORIGIN-NEXT:    [[TMP3:%.*]] = xor i64 [[TMP2]], 8796093022208038; ORIGIN-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr39; ORIGIN-NEXT:    [[TMP5:%.*]] = add i64 [[TMP3]], 1759218604441640; ORIGIN-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr41; ORIGIN-NEXT:    store i32 [[TMP0]], ptr [[TMP4]], align 442; ORIGIN-NEXT:    [[_MSCMP:%.*]] = icmp ne i32 [[TMP0]], 043; ORIGIN-NEXT:    br i1 [[_MSCMP]], label %[[BB7:.*]], label %[[BB8:.*]], !prof [[PROF1:![0-9]+]]44; ORIGIN:       [[BB7]]:45; ORIGIN-NEXT:    store i32 [[TMP1]], ptr [[TMP6]], align 446; ORIGIN-NEXT:    br label %[[BB8]]47; ORIGIN:       [[BB8]]:48; ORIGIN-NEXT:    store i32 [[X]], ptr [[P]], align 449; ORIGIN-NEXT:    ret void50;51; CALLS-LABEL: define void @Store(52; CALLS-SAME: ptr captures(none) [[P:%.*]], i32 [[X:%.*]]) #[[ATTR0:[0-9]+]] {53; CALLS-NEXT:  [[ENTRY:.*:]]54; CALLS-NEXT:    [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 855; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 456; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 857; CALLS-NEXT:    [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 458; CALLS-NEXT:    call void @llvm.donothing()59; CALLS-NEXT:    call void @__msan_maybe_warning_8(i64 zeroext [[TMP0]], i32 zeroext [[TMP1]])60; CALLS-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[P]] to i6461; CALLS-NEXT:    [[TMP5:%.*]] = xor i64 [[TMP4]], 8796093022208062; CALLS-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr63; CALLS-NEXT:    [[TMP7:%.*]] = add i64 [[TMP5]], 1759218604441664; CALLS-NEXT:    [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr65; CALLS-NEXT:    store i32 [[TMP2]], ptr [[TMP6]], align 466; CALLS-NEXT:    call void @__msan_maybe_store_origin_4(i32 zeroext [[TMP2]], ptr [[P]], i32 zeroext [[TMP3]])67; CALLS-NEXT:    store i32 [[X]], ptr [[P]], align 468; CALLS-NEXT:    ret void69;70entry:71  store i32 %x, ptr %p, align 472  ret void73}74 75; Check instrumentation of aligned stores76; Shadow store has the same alignment as the original store; origin store77; does not specify explicit alignment.78 79define void @AlignedStore(ptr nocapture %p, i32 %x) nounwind uwtable sanitize_memory {80; CHECK-LABEL: define void @AlignedStore(81; CHECK-SAME: ptr captures(none) [[P:%.*]], i32 [[X:%.*]]) #[[ATTR0]] {82; CHECK-NEXT:  [[ENTRY:.*:]]83; CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 884; CHECK-NEXT:    call void @llvm.donothing()85; CHECK-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[P]] to i6486; CHECK-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 8796093022208087; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr88; CHECK-NEXT:    store i32 [[TMP0]], ptr [[TMP3]], align 3289; CHECK-NEXT:    store i32 [[X]], ptr [[P]], align 3290; CHECK-NEXT:    ret void91;92; ORIGIN-LABEL: define void @AlignedStore(93; ORIGIN-SAME: ptr captures(none) [[P:%.*]], i32 [[X:%.*]]) #[[ATTR0]] {94; ORIGIN-NEXT:  [[ENTRY:.*:]]95; ORIGIN-NEXT:    [[TMP0:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 896; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 497; ORIGIN-NEXT:    call void @llvm.donothing()98; ORIGIN-NEXT:    [[TMP2:%.*]] = ptrtoint ptr [[P]] to i6499; ORIGIN-NEXT:    [[TMP3:%.*]] = xor i64 [[TMP2]], 87960930222080100; ORIGIN-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr101; ORIGIN-NEXT:    [[TMP5:%.*]] = add i64 [[TMP3]], 17592186044416102; ORIGIN-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr103; ORIGIN-NEXT:    store i32 [[TMP0]], ptr [[TMP4]], align 32104; ORIGIN-NEXT:    [[_MSCMP:%.*]] = icmp ne i32 [[TMP0]], 0105; ORIGIN-NEXT:    br i1 [[_MSCMP]], label %[[BB7:.*]], label %[[BB11:.*]], !prof [[PROF1]]106; ORIGIN:       [[BB7]]:107; ORIGIN-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP1]] to i64108; ORIGIN-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP8]], 32109; ORIGIN-NEXT:    [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]110; ORIGIN-NEXT:    store i32 [[TMP1]], ptr [[TMP6]], align 32111; ORIGIN-NEXT:    br label %[[BB11]]112; ORIGIN:       [[BB11]]:113; ORIGIN-NEXT:    store i32 [[X]], ptr [[P]], align 32114; ORIGIN-NEXT:    ret void115;116; CALLS-LABEL: define void @AlignedStore(117; CALLS-SAME: ptr captures(none) [[P:%.*]], i32 [[X:%.*]]) #[[ATTR0]] {118; CALLS-NEXT:  [[ENTRY:.*:]]119; CALLS-NEXT:    [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 8120; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 4121; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8122; CALLS-NEXT:    [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 4123; CALLS-NEXT:    call void @llvm.donothing()124; CALLS-NEXT:    call void @__msan_maybe_warning_8(i64 zeroext [[TMP0]], i32 zeroext [[TMP1]])125; CALLS-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[P]] to i64126; CALLS-NEXT:    [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080127; CALLS-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr128; CALLS-NEXT:    [[TMP7:%.*]] = add i64 [[TMP5]], 17592186044416129; CALLS-NEXT:    [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr130; CALLS-NEXT:    store i32 [[TMP2]], ptr [[TMP6]], align 32131; CALLS-NEXT:    call void @__msan_maybe_store_origin_4(i32 zeroext [[TMP2]], ptr [[P]], i32 zeroext [[TMP3]])132; CALLS-NEXT:    store i32 [[X]], ptr [[P]], align 32133; CALLS-NEXT:    ret void134;135entry:136  store i32 %x, ptr %p, align 32137  ret void138}139 140; load followed by cmp: check that we load the shadow and call __msan_warning_with_origin.141define void @LoadAndCmp(ptr nocapture %a) nounwind uwtable sanitize_memory {142; CHECK-LABEL: define void @LoadAndCmp(143; CHECK-SAME: ptr captures(none) [[A:%.*]]) #[[ATTR0]] {144; CHECK-NEXT:  [[ENTRY:.*:]]145; CHECK-NEXT:    call void @llvm.donothing()146; CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A]], align 4147; CHECK-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[A]] to i64148; CHECK-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080149; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr150; CHECK-NEXT:    [[_MSLD:%.*]] = load i32, ptr [[TMP3]], align 4151; CHECK-NEXT:    [[TMP4:%.*]] = xor i32 [[TMP0]], 0152; CHECK-NEXT:    [[TMP5:%.*]] = or i32 [[_MSLD]], 0153; CHECK-NEXT:    [[TMP6:%.*]] = icmp ne i32 [[TMP5]], 0154; CHECK-NEXT:    [[TMP7:%.*]] = xor i32 [[TMP5]], -1155; CHECK-NEXT:    [[TMP8:%.*]] = and i32 [[TMP7]], [[TMP4]]156; CHECK-NEXT:    [[TMP9:%.*]] = icmp eq i32 [[TMP8]], 0157; CHECK-NEXT:    [[_MSPROP_ICMP:%.*]] = and i1 [[TMP6]], [[TMP9]]158; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0159; CHECK-NEXT:    br i1 [[_MSPROP_ICMP]], label %[[BB10:.*]], label %[[BB11:.*]], !prof [[PROF1:![0-9]+]]160; CHECK:       [[BB10]]:161; CHECK-NEXT:    call void @__msan_warning_noreturn() #[[ATTR12:[0-9]+]]162; CHECK-NEXT:    unreachable163; CHECK:       [[BB11]]:164; CHECK-NEXT:    br i1 [[TOBOOL]], label %[[IF_END:.*]], label %[[IF_THEN:.*]]165; CHECK:       [[IF_THEN]]:166; CHECK-NEXT:    store i64 0, ptr @__msan_va_arg_overflow_size_tls, align 8167; CHECK-NEXT:    tail call void (...) @foo() #[[ATTR5:[0-9]+]]168; CHECK-NEXT:    br label %[[IF_END]]169; CHECK:       [[IF_END]]:170; CHECK-NEXT:    ret void171;172; ORIGIN-LABEL: define void @LoadAndCmp(173; ORIGIN-SAME: ptr captures(none) [[A:%.*]]) #[[ATTR0]] {174; ORIGIN-NEXT:  [[ENTRY:.*:]]175; ORIGIN-NEXT:    call void @llvm.donothing()176; ORIGIN-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A]], align 4177; ORIGIN-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[A]] to i64178; ORIGIN-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080179; ORIGIN-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr180; ORIGIN-NEXT:    [[TMP4:%.*]] = add i64 [[TMP2]], 17592186044416181; ORIGIN-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr182; ORIGIN-NEXT:    [[_MSLD:%.*]] = load i32, ptr [[TMP3]], align 4183; ORIGIN-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4184; ORIGIN-NEXT:    [[TMP7:%.*]] = xor i32 [[TMP0]], 0185; ORIGIN-NEXT:    [[TMP8:%.*]] = or i32 [[_MSLD]], 0186; ORIGIN-NEXT:    [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0187; ORIGIN-NEXT:    [[TMP10:%.*]] = xor i32 [[TMP8]], -1188; ORIGIN-NEXT:    [[TMP11:%.*]] = and i32 [[TMP10]], [[TMP7]]189; ORIGIN-NEXT:    [[TMP12:%.*]] = icmp eq i32 [[TMP11]], 0190; ORIGIN-NEXT:    [[_MSPROP_ICMP:%.*]] = and i1 [[TMP9]], [[TMP12]]191; ORIGIN-NEXT:    [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0192; ORIGIN-NEXT:    br i1 [[_MSPROP_ICMP]], label %[[BB13:.*]], label %[[BB14:.*]], !prof [[PROF1]]193; ORIGIN:       [[BB13]]:194; ORIGIN-NEXT:    call void @__msan_warning_with_origin_noreturn(i32 [[TMP6]]) #[[ATTR12:[0-9]+]]195; ORIGIN-NEXT:    unreachable196; ORIGIN:       [[BB14]]:197; ORIGIN-NEXT:    br i1 [[TOBOOL]], label %[[IF_END:.*]], label %[[IF_THEN:.*]]198; ORIGIN:       [[IF_THEN]]:199; ORIGIN-NEXT:    store i64 0, ptr @__msan_va_arg_overflow_size_tls, align 8200; ORIGIN-NEXT:    tail call void (...) @foo() #[[ATTR5:[0-9]+]]201; ORIGIN-NEXT:    br label %[[IF_END]]202; ORIGIN:       [[IF_END]]:203; ORIGIN-NEXT:    ret void204;205; CALLS-LABEL: define void @LoadAndCmp(206; CALLS-SAME: ptr captures(none) [[A:%.*]]) #[[ATTR0]] {207; CALLS-NEXT:  [[ENTRY:.*:]]208; CALLS-NEXT:    [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 8209; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 4210; CALLS-NEXT:    call void @llvm.donothing()211; CALLS-NEXT:    call void @__msan_maybe_warning_8(i64 zeroext [[TMP0]], i32 zeroext [[TMP1]])212; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4213; CALLS-NEXT:    [[TMP3:%.*]] = ptrtoint ptr [[A]] to i64214; CALLS-NEXT:    [[TMP4:%.*]] = xor i64 [[TMP3]], 87960930222080215; CALLS-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr216; CALLS-NEXT:    [[TMP6:%.*]] = add i64 [[TMP4]], 17592186044416217; CALLS-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr218; CALLS-NEXT:    [[_MSLD:%.*]] = load i32, ptr [[TMP5]], align 4219; CALLS-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4220; CALLS-NEXT:    [[TMP9:%.*]] = xor i32 [[TMP2]], 0221; CALLS-NEXT:    [[TMP10:%.*]] = or i32 [[_MSLD]], 0222; CALLS-NEXT:    [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0223; CALLS-NEXT:    [[TMP12:%.*]] = xor i32 [[TMP10]], -1224; CALLS-NEXT:    [[TMP13:%.*]] = and i32 [[TMP12]], [[TMP9]]225; CALLS-NEXT:    [[TMP14:%.*]] = icmp eq i32 [[TMP13]], 0226; CALLS-NEXT:    [[_MSPROP_ICMP:%.*]] = and i1 [[TMP11]], [[TMP14]]227; CALLS-NEXT:    [[TOBOOL:%.*]] = icmp eq i32 [[TMP2]], 0228; CALLS-NEXT:    [[TMP15:%.*]] = zext i1 [[_MSPROP_ICMP]] to i8229; CALLS-NEXT:    call void @__msan_maybe_warning_1(i8 zeroext [[TMP15]], i32 zeroext [[TMP8]])230; CALLS-NEXT:    br i1 [[TOBOOL]], label %[[IF_END:.*]], label %[[IF_THEN:.*]]231; CALLS:       [[IF_THEN]]:232; CALLS-NEXT:    store i64 0, ptr @__msan_va_arg_overflow_size_tls, align 8233; CALLS-NEXT:    tail call void (...) @foo() #[[ATTR5:[0-9]+]]234; CALLS-NEXT:    br label %[[IF_END]]235; CALLS:       [[IF_END]]:236; CALLS-NEXT:    ret void237;238entry:239  %0 = load i32, ptr %a, align 4240  %tobool = icmp eq i32 %0, 0241  br i1 %tobool, label %if.end, label %if.then242 243if.then:                                          ; preds = %entry244  tail call void (...) @foo() nounwind245  br label %if.end246 247if.end:                                           ; preds = %entry, %if.then248  ret void249}250 251declare void @foo(...)252 253; Check that we store the shadow for the retval.254define i32 @ReturnInt() nounwind uwtable readnone sanitize_memory {255; CHECK-LABEL: define i32 @ReturnInt(256; CHECK-SAME: ) #[[ATTR0]] {257; CHECK-NEXT:  [[ENTRY:.*:]]258; CHECK-NEXT:    call void @llvm.donothing()259; CHECK-NEXT:    store i32 0, ptr @__msan_retval_tls, align 8260; CHECK-NEXT:    ret i32 123261;262; ORIGIN-LABEL: define i32 @ReturnInt(263; ORIGIN-SAME: ) #[[ATTR0]] {264; ORIGIN-NEXT:  [[ENTRY:.*:]]265; ORIGIN-NEXT:    call void @llvm.donothing()266; ORIGIN-NEXT:    store i32 0, ptr @__msan_retval_tls, align 8267; ORIGIN-NEXT:    store i32 0, ptr @__msan_retval_origin_tls, align 4268; ORIGIN-NEXT:    ret i32 123269;270; CALLS-LABEL: define i32 @ReturnInt(271; CALLS-SAME: ) #[[ATTR0]] {272; CALLS-NEXT:  [[ENTRY:.*:]]273; CALLS-NEXT:    call void @llvm.donothing()274; CALLS-NEXT:    store i32 0, ptr @__msan_retval_tls, align 8275; CALLS-NEXT:    store i32 0, ptr @__msan_retval_origin_tls, align 4276; CALLS-NEXT:    ret i32 123277;278entry:279  ret i32 123280}281 282 283; Check that we get the shadow for the retval.284define void @CopyRetVal(ptr nocapture %a) nounwind uwtable sanitize_memory {285; CHECK-LABEL: define void @CopyRetVal(286; CHECK-SAME: ptr captures(none) [[A:%.*]]) #[[ATTR0]] {287; CHECK-NEXT:  [[ENTRY:.*:]]288; CHECK-NEXT:    call void @llvm.donothing()289; CHECK-NEXT:    store i32 0, ptr @__msan_retval_tls, align 8290; CHECK-NEXT:    [[CALL:%.*]] = tail call i32 @ReturnInt() #[[ATTR5]]291; CHECK-NEXT:    [[_MSRET:%.*]] = load i32, ptr @__msan_retval_tls, align 8292; CHECK-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64293; CHECK-NEXT:    [[TMP1:%.*]] = xor i64 [[TMP0]], 87960930222080294; CHECK-NEXT:    [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to ptr295; CHECK-NEXT:    store i32 [[_MSRET]], ptr [[TMP2]], align 4296; CHECK-NEXT:    store i32 [[CALL]], ptr [[A]], align 4297; CHECK-NEXT:    ret void298;299; ORIGIN-LABEL: define void @CopyRetVal(300; ORIGIN-SAME: ptr captures(none) [[A:%.*]]) #[[ATTR0]] {301; ORIGIN-NEXT:  [[ENTRY:.*:]]302; ORIGIN-NEXT:    call void @llvm.donothing()303; ORIGIN-NEXT:    store i32 0, ptr @__msan_retval_tls, align 8304; ORIGIN-NEXT:    [[CALL:%.*]] = tail call i32 @ReturnInt() #[[ATTR5]]305; ORIGIN-NEXT:    [[_MSRET:%.*]] = load i32, ptr @__msan_retval_tls, align 8306; ORIGIN-NEXT:    [[TMP0:%.*]] = load i32, ptr @__msan_retval_origin_tls, align 4307; ORIGIN-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[A]] to i64308; ORIGIN-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080309; ORIGIN-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr310; ORIGIN-NEXT:    [[TMP4:%.*]] = add i64 [[TMP2]], 17592186044416311; ORIGIN-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr312; ORIGIN-NEXT:    store i32 [[_MSRET]], ptr [[TMP3]], align 4313; ORIGIN-NEXT:    [[_MSCMP:%.*]] = icmp ne i32 [[_MSRET]], 0314; ORIGIN-NEXT:    br i1 [[_MSCMP]], label %[[BB6:.*]], label %[[BB7:.*]], !prof [[PROF1]]315; ORIGIN:       [[BB6]]:316; ORIGIN-NEXT:    store i32 [[TMP0]], ptr [[TMP5]], align 4317; ORIGIN-NEXT:    br label %[[BB7]]318; ORIGIN:       [[BB7]]:319; ORIGIN-NEXT:    store i32 [[CALL]], ptr [[A]], align 4320; ORIGIN-NEXT:    ret void321;322; CALLS-LABEL: define void @CopyRetVal(323; CALLS-SAME: ptr captures(none) [[A:%.*]]) #[[ATTR0]] {324; CALLS-NEXT:  [[ENTRY:.*:]]325; CALLS-NEXT:    [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 8326; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 4327; CALLS-NEXT:    call void @llvm.donothing()328; CALLS-NEXT:    store i32 0, ptr @__msan_retval_tls, align 8329; CALLS-NEXT:    [[CALL:%.*]] = tail call i32 @ReturnInt() #[[ATTR5]]330; CALLS-NEXT:    [[_MSRET:%.*]] = load i32, ptr @__msan_retval_tls, align 8331; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_retval_origin_tls, align 4332; CALLS-NEXT:    call void @__msan_maybe_warning_8(i64 zeroext [[TMP0]], i32 zeroext [[TMP1]])333; CALLS-NEXT:    [[TMP3:%.*]] = ptrtoint ptr [[A]] to i64334; CALLS-NEXT:    [[TMP4:%.*]] = xor i64 [[TMP3]], 87960930222080335; CALLS-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr336; CALLS-NEXT:    [[TMP6:%.*]] = add i64 [[TMP4]], 17592186044416337; CALLS-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr338; CALLS-NEXT:    store i32 [[_MSRET]], ptr [[TMP5]], align 4339; CALLS-NEXT:    call void @__msan_maybe_store_origin_4(i32 zeroext [[_MSRET]], ptr [[A]], i32 zeroext [[TMP2]])340; CALLS-NEXT:    store i32 [[CALL]], ptr [[A]], align 4341; CALLS-NEXT:    ret void342;343entry:344  %call = tail call i32 @ReturnInt() nounwind345  store i32 %call, ptr %a, align 4346  ret void347}348 349 350 351; Check that we generate PHIs for shadow.352define void @FuncWithPhi(ptr nocapture %a, ptr %b, ptr nocapture %c) nounwind uwtable sanitize_memory {353; CHECK-LABEL: define void @FuncWithPhi(354; CHECK-SAME: ptr captures(none) [[A:%.*]], ptr [[B:%.*]], ptr captures(none) [[C:%.*]]) #[[ATTR0]] {355; CHECK-NEXT:  [[ENTRY:.*:]]356; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8357; CHECK-NEXT:    call void @llvm.donothing()358; CHECK-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[B]] to i64359; CHECK-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 0360; CHECK-NEXT:    [[TMP3:%.*]] = or i64 [[TMP0]], 0361; CHECK-NEXT:    [[TMP4:%.*]] = icmp ne i64 [[TMP3]], 0362; CHECK-NEXT:    [[TMP5:%.*]] = xor i64 [[TMP3]], -1363; CHECK-NEXT:    [[TMP6:%.*]] = and i64 [[TMP5]], [[TMP2]]364; CHECK-NEXT:    [[TMP7:%.*]] = icmp eq i64 [[TMP6]], 0365; CHECK-NEXT:    [[_MSPROP_ICMP:%.*]] = and i1 [[TMP4]], [[TMP7]]366; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp eq ptr [[B]], null367; CHECK-NEXT:    br i1 [[_MSPROP_ICMP]], label %[[BB8:.*]], label %[[BB9:.*]], !prof [[PROF1]]368; CHECK:       [[BB8]]:369; CHECK-NEXT:    call void @__msan_warning_noreturn() #[[ATTR12]]370; CHECK-NEXT:    unreachable371; CHECK:       [[BB9]]:372; CHECK-NEXT:    br i1 [[TOBOOL]], label %[[IF_ELSE:.*]], label %[[IF_THEN:.*]]373; CHECK:       [[IF_THEN]]:374; CHECK-NEXT:    [[TMP10:%.*]] = load i32, ptr [[B]], align 4375; CHECK-NEXT:    [[TMP11:%.*]] = ptrtoint ptr [[B]] to i64376; CHECK-NEXT:    [[TMP12:%.*]] = xor i64 [[TMP11]], 87960930222080377; CHECK-NEXT:    [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr378; CHECK-NEXT:    [[_MSLD1:%.*]] = load i32, ptr [[TMP13]], align 4379; CHECK-NEXT:    br label %[[IF_END:.*]]380; CHECK:       [[IF_ELSE]]:381; CHECK-NEXT:    [[TMP14:%.*]] = load i32, ptr [[C]], align 4382; CHECK-NEXT:    [[TMP15:%.*]] = ptrtoint ptr [[C]] to i64383; CHECK-NEXT:    [[TMP16:%.*]] = xor i64 [[TMP15]], 87960930222080384; CHECK-NEXT:    [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr385; CHECK-NEXT:    [[_MSLD:%.*]] = load i32, ptr [[TMP17]], align 4386; CHECK-NEXT:    br label %[[IF_END]]387; CHECK:       [[IF_END]]:388; CHECK-NEXT:    [[_MSPHI_S:%.*]] = phi i32 [ [[_MSLD1]], %[[IF_THEN]] ], [ [[_MSLD]], %[[IF_ELSE]] ]389; CHECK-NEXT:    [[T_0:%.*]] = phi i32 [ [[TMP10]], %[[IF_THEN]] ], [ [[TMP14]], %[[IF_ELSE]] ]390; CHECK-NEXT:    [[TMP18:%.*]] = ptrtoint ptr [[A]] to i64391; CHECK-NEXT:    [[TMP19:%.*]] = xor i64 [[TMP18]], 87960930222080392; CHECK-NEXT:    [[TMP20:%.*]] = inttoptr i64 [[TMP19]] to ptr393; CHECK-NEXT:    store i32 [[_MSPHI_S]], ptr [[TMP20]], align 4394; CHECK-NEXT:    store i32 [[T_0]], ptr [[A]], align 4395; CHECK-NEXT:    ret void396;397; ORIGIN-LABEL: define void @FuncWithPhi(398; ORIGIN-SAME: ptr captures(none) [[A:%.*]], ptr [[B:%.*]], ptr captures(none) [[C:%.*]]) #[[ATTR0]] {399; ORIGIN-NEXT:  [[ENTRY:.*:]]400; ORIGIN-NEXT:    [[TMP0:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8401; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 4402; ORIGIN-NEXT:    call void @llvm.donothing()403; ORIGIN-NEXT:    [[TMP2:%.*]] = ptrtoint ptr [[B]] to i64404; ORIGIN-NEXT:    [[TMP3:%.*]] = xor i64 [[TMP2]], 0405; ORIGIN-NEXT:    [[TMP4:%.*]] = or i64 [[TMP0]], 0406; ORIGIN-NEXT:    [[TMP5:%.*]] = icmp ne i64 [[TMP4]], 0407; ORIGIN-NEXT:    [[TMP6:%.*]] = xor i64 [[TMP4]], -1408; ORIGIN-NEXT:    [[TMP7:%.*]] = and i64 [[TMP6]], [[TMP3]]409; ORIGIN-NEXT:    [[TMP8:%.*]] = icmp eq i64 [[TMP7]], 0410; ORIGIN-NEXT:    [[_MSPROP_ICMP:%.*]] = and i1 [[TMP5]], [[TMP8]]411; ORIGIN-NEXT:    [[TOBOOL:%.*]] = icmp eq ptr [[B]], null412; ORIGIN-NEXT:    br i1 [[_MSPROP_ICMP]], label %[[BB9:.*]], label %[[BB10:.*]], !prof [[PROF1]]413; ORIGIN:       [[BB9]]:414; ORIGIN-NEXT:    call void @__msan_warning_with_origin_noreturn(i32 [[TMP1]]) #[[ATTR12]]415; ORIGIN-NEXT:    unreachable416; ORIGIN:       [[BB10]]:417; ORIGIN-NEXT:    br i1 [[TOBOOL]], label %[[IF_ELSE:.*]], label %[[IF_THEN:.*]]418; ORIGIN:       [[IF_THEN]]:419; ORIGIN-NEXT:    [[TMP11:%.*]] = load i32, ptr [[B]], align 4420; ORIGIN-NEXT:    [[TMP12:%.*]] = ptrtoint ptr [[B]] to i64421; ORIGIN-NEXT:    [[TMP13:%.*]] = xor i64 [[TMP12]], 87960930222080422; ORIGIN-NEXT:    [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr423; ORIGIN-NEXT:    [[TMP15:%.*]] = add i64 [[TMP13]], 17592186044416424; ORIGIN-NEXT:    [[TMP16:%.*]] = inttoptr i64 [[TMP15]] to ptr425; ORIGIN-NEXT:    [[_MSLD1:%.*]] = load i32, ptr [[TMP14]], align 4426; ORIGIN-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4427; ORIGIN-NEXT:    br label %[[IF_END:.*]]428; ORIGIN:       [[IF_ELSE]]:429; ORIGIN-NEXT:    [[TMP18:%.*]] = load i32, ptr [[C]], align 4430; ORIGIN-NEXT:    [[TMP19:%.*]] = ptrtoint ptr [[C]] to i64431; ORIGIN-NEXT:    [[TMP20:%.*]] = xor i64 [[TMP19]], 87960930222080432; ORIGIN-NEXT:    [[TMP21:%.*]] = inttoptr i64 [[TMP20]] to ptr433; ORIGIN-NEXT:    [[TMP22:%.*]] = add i64 [[TMP20]], 17592186044416434; ORIGIN-NEXT:    [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr435; ORIGIN-NEXT:    [[_MSLD:%.*]] = load i32, ptr [[TMP21]], align 4436; ORIGIN-NEXT:    [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4437; ORIGIN-NEXT:    br label %[[IF_END]]438; ORIGIN:       [[IF_END]]:439; ORIGIN-NEXT:    [[_MSPHI_S:%.*]] = phi i32 [ [[_MSLD1]], %[[IF_THEN]] ], [ [[_MSLD]], %[[IF_ELSE]] ]440; ORIGIN-NEXT:    [[_MSPHI_O:%.*]] = phi i32 [ [[TMP17]], %[[IF_THEN]] ], [ [[TMP24]], %[[IF_ELSE]] ]441; ORIGIN-NEXT:    [[T_0:%.*]] = phi i32 [ [[TMP11]], %[[IF_THEN]] ], [ [[TMP18]], %[[IF_ELSE]] ]442; ORIGIN-NEXT:    [[TMP25:%.*]] = ptrtoint ptr [[A]] to i64443; ORIGIN-NEXT:    [[TMP26:%.*]] = xor i64 [[TMP25]], 87960930222080444; ORIGIN-NEXT:    [[TMP27:%.*]] = inttoptr i64 [[TMP26]] to ptr445; ORIGIN-NEXT:    [[TMP28:%.*]] = add i64 [[TMP26]], 17592186044416446; ORIGIN-NEXT:    [[TMP29:%.*]] = inttoptr i64 [[TMP28]] to ptr447; ORIGIN-NEXT:    store i32 [[_MSPHI_S]], ptr [[TMP27]], align 4448; ORIGIN-NEXT:    [[_MSCMP:%.*]] = icmp ne i32 [[_MSPHI_S]], 0449; ORIGIN-NEXT:    br i1 [[_MSCMP]], label %[[BB30:.*]], label %[[BB31:.*]], !prof [[PROF1]]450; ORIGIN:       [[BB30]]:451; ORIGIN-NEXT:    store i32 [[_MSPHI_O]], ptr [[TMP29]], align 4452; ORIGIN-NEXT:    br label %[[BB31]]453; ORIGIN:       [[BB31]]:454; ORIGIN-NEXT:    store i32 [[T_0]], ptr [[A]], align 4455; ORIGIN-NEXT:    ret void456;457; CALLS-LABEL: define void @FuncWithPhi(458; CALLS-SAME: ptr captures(none) [[A:%.*]], ptr [[B:%.*]], ptr captures(none) [[C:%.*]]) #[[ATTR0]] {459; CALLS-NEXT:  [[ENTRY:.*:]]460; CALLS-NEXT:    [[TMP0:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8461; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 4462; CALLS-NEXT:    [[TMP2:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8463; CALLS-NEXT:    [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 16), align 4464; CALLS-NEXT:    [[TMP4:%.*]] = load i64, ptr @__msan_param_tls, align 8465; CALLS-NEXT:    [[TMP5:%.*]] = load i32, ptr @__msan_param_origin_tls, align 4466; CALLS-NEXT:    call void @llvm.donothing()467; CALLS-NEXT:    [[TMP6:%.*]] = ptrtoint ptr [[B]] to i64468; CALLS-NEXT:    [[TMP7:%.*]] = xor i64 [[TMP6]], 0469; CALLS-NEXT:    [[TMP8:%.*]] = or i64 [[TMP0]], 0470; CALLS-NEXT:    [[TMP9:%.*]] = icmp ne i64 [[TMP8]], 0471; CALLS-NEXT:    [[TMP10:%.*]] = xor i64 [[TMP8]], -1472; CALLS-NEXT:    [[TMP11:%.*]] = and i64 [[TMP10]], [[TMP7]]473; CALLS-NEXT:    [[TMP12:%.*]] = icmp eq i64 [[TMP11]], 0474; CALLS-NEXT:    [[_MSPROP_ICMP:%.*]] = and i1 [[TMP9]], [[TMP12]]475; CALLS-NEXT:    [[TOBOOL:%.*]] = icmp eq ptr [[B]], null476; CALLS-NEXT:    [[TMP13:%.*]] = zext i1 [[_MSPROP_ICMP]] to i8477; CALLS-NEXT:    call void @__msan_maybe_warning_1(i8 zeroext [[TMP13]], i32 zeroext [[TMP1]])478; CALLS-NEXT:    br i1 [[TOBOOL]], label %[[IF_ELSE:.*]], label %[[IF_THEN:.*]]479; CALLS:       [[IF_THEN]]:480; CALLS-NEXT:    call void @__msan_maybe_warning_8(i64 zeroext [[TMP0]], i32 zeroext [[TMP1]])481; CALLS-NEXT:    [[TMP14:%.*]] = load i32, ptr [[B]], align 4482; CALLS-NEXT:    [[TMP15:%.*]] = ptrtoint ptr [[B]] to i64483; CALLS-NEXT:    [[TMP16:%.*]] = xor i64 [[TMP15]], 87960930222080484; CALLS-NEXT:    [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr485; CALLS-NEXT:    [[TMP18:%.*]] = add i64 [[TMP16]], 17592186044416486; CALLS-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr487; CALLS-NEXT:    [[_MSLD1:%.*]] = load i32, ptr [[TMP17]], align 4488; CALLS-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4489; CALLS-NEXT:    br label %[[IF_END:.*]]490; CALLS:       [[IF_ELSE]]:491; CALLS-NEXT:    call void @__msan_maybe_warning_8(i64 zeroext [[TMP2]], i32 zeroext [[TMP3]])492; CALLS-NEXT:    [[TMP21:%.*]] = load i32, ptr [[C]], align 4493; CALLS-NEXT:    [[TMP22:%.*]] = ptrtoint ptr [[C]] to i64494; CALLS-NEXT:    [[TMP23:%.*]] = xor i64 [[TMP22]], 87960930222080495; CALLS-NEXT:    [[TMP24:%.*]] = inttoptr i64 [[TMP23]] to ptr496; CALLS-NEXT:    [[TMP25:%.*]] = add i64 [[TMP23]], 17592186044416497; CALLS-NEXT:    [[TMP26:%.*]] = inttoptr i64 [[TMP25]] to ptr498; CALLS-NEXT:    [[_MSLD:%.*]] = load i32, ptr [[TMP24]], align 4499; CALLS-NEXT:    [[TMP27:%.*]] = load i32, ptr [[TMP26]], align 4500; CALLS-NEXT:    br label %[[IF_END]]501; CALLS:       [[IF_END]]:502; CALLS-NEXT:    [[_MSPHI_S:%.*]] = phi i32 [ [[_MSLD1]], %[[IF_THEN]] ], [ [[_MSLD]], %[[IF_ELSE]] ]503; CALLS-NEXT:    [[_MSPHI_O:%.*]] = phi i32 [ [[TMP20]], %[[IF_THEN]] ], [ [[TMP27]], %[[IF_ELSE]] ]504; CALLS-NEXT:    [[T_0:%.*]] = phi i32 [ [[TMP14]], %[[IF_THEN]] ], [ [[TMP21]], %[[IF_ELSE]] ]505; CALLS-NEXT:    call void @__msan_maybe_warning_8(i64 zeroext [[TMP4]], i32 zeroext [[TMP5]])506; CALLS-NEXT:    [[TMP28:%.*]] = ptrtoint ptr [[A]] to i64507; CALLS-NEXT:    [[TMP29:%.*]] = xor i64 [[TMP28]], 87960930222080508; CALLS-NEXT:    [[TMP30:%.*]] = inttoptr i64 [[TMP29]] to ptr509; CALLS-NEXT:    [[TMP31:%.*]] = add i64 [[TMP29]], 17592186044416510; CALLS-NEXT:    [[TMP32:%.*]] = inttoptr i64 [[TMP31]] to ptr511; CALLS-NEXT:    store i32 [[_MSPHI_S]], ptr [[TMP30]], align 4512; CALLS-NEXT:    call void @__msan_maybe_store_origin_4(i32 zeroext [[_MSPHI_S]], ptr [[A]], i32 zeroext [[_MSPHI_O]])513; CALLS-NEXT:    store i32 [[T_0]], ptr [[A]], align 4514; CALLS-NEXT:    ret void515;516entry:517  %tobool = icmp eq ptr %b, null518  br i1 %tobool, label %if.else, label %if.then519 520  if.then:                                          ; preds = %entry521  %0 = load i32, ptr %b, align 4522  br label %if.end523 524  if.else:                                          ; preds = %entry525  %1 = load i32, ptr %c, align 4526  br label %if.end527 528  if.end:                                           ; preds = %if.else, %if.then529  %t.0 = phi i32 [ %0, %if.then ], [ %1, %if.else ]530  store i32 %t.0, ptr %a, align 4531  ret void532}533 534; Compute shadow for "x << 10"535define void @ShlConst(ptr nocapture %x) nounwind uwtable sanitize_memory {536; CHECK-LABEL: define void @ShlConst(537; CHECK-SAME: ptr captures(none) [[X:%.*]]) #[[ATTR0]] {538; CHECK-NEXT:  [[ENTRY:.*:]]539; CHECK-NEXT:    call void @llvm.donothing()540; CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr [[X]], align 4541; CHECK-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[X]] to i64542; CHECK-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080543; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr544; CHECK-NEXT:    [[_MSLD:%.*]] = load i32, ptr [[TMP3]], align 4545; CHECK-NEXT:    [[TMP4:%.*]] = shl i32 [[_MSLD]], 10546; CHECK-NEXT:    [[TMP5:%.*]] = or i32 [[TMP4]], 0547; CHECK-NEXT:    [[TMP6:%.*]] = shl i32 [[TMP0]], 10548; CHECK-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[X]] to i64549; CHECK-NEXT:    [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080550; CHECK-NEXT:    [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr551; CHECK-NEXT:    store i32 [[TMP5]], ptr [[TMP9]], align 4552; CHECK-NEXT:    store i32 [[TMP6]], ptr [[X]], align 4553; CHECK-NEXT:    ret void554;555; ORIGIN-LABEL: define void @ShlConst(556; ORIGIN-SAME: ptr captures(none) [[X:%.*]]) #[[ATTR0]] {557; ORIGIN-NEXT:  [[ENTRY:.*:]]558; ORIGIN-NEXT:    call void @llvm.donothing()559; ORIGIN-NEXT:    [[TMP0:%.*]] = load i32, ptr [[X]], align 4560; ORIGIN-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[X]] to i64561; ORIGIN-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080562; ORIGIN-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr563; ORIGIN-NEXT:    [[TMP4:%.*]] = add i64 [[TMP2]], 17592186044416564; ORIGIN-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr565; ORIGIN-NEXT:    [[_MSLD:%.*]] = load i32, ptr [[TMP3]], align 4566; ORIGIN-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4567; ORIGIN-NEXT:    [[TMP7:%.*]] = shl i32 [[_MSLD]], 10568; ORIGIN-NEXT:    [[TMP8:%.*]] = or i32 [[TMP7]], 0569; ORIGIN-NEXT:    [[TMP9:%.*]] = shl i32 [[TMP0]], 10570; ORIGIN-NEXT:    [[TMP10:%.*]] = ptrtoint ptr [[X]] to i64571; ORIGIN-NEXT:    [[TMP11:%.*]] = xor i64 [[TMP10]], 87960930222080572; ORIGIN-NEXT:    [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr573; ORIGIN-NEXT:    [[TMP13:%.*]] = add i64 [[TMP11]], 17592186044416574; ORIGIN-NEXT:    [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr575; ORIGIN-NEXT:    store i32 [[TMP8]], ptr [[TMP12]], align 4576; ORIGIN-NEXT:    [[_MSCMP:%.*]] = icmp ne i32 [[TMP8]], 0577; ORIGIN-NEXT:    br i1 [[_MSCMP]], label %[[BB15:.*]], label %[[BB16:.*]], !prof [[PROF1]]578; ORIGIN:       [[BB15]]:579; ORIGIN-NEXT:    store i32 [[TMP6]], ptr [[TMP14]], align 4580; ORIGIN-NEXT:    br label %[[BB16]]581; ORIGIN:       [[BB16]]:582; ORIGIN-NEXT:    store i32 [[TMP9]], ptr [[X]], align 4583; ORIGIN-NEXT:    ret void584;585; CALLS-LABEL: define void @ShlConst(586; CALLS-SAME: ptr captures(none) [[X:%.*]]) #[[ATTR0]] {587; CALLS-NEXT:  [[ENTRY:.*:]]588; CALLS-NEXT:    [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 8589; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 4590; CALLS-NEXT:    call void @llvm.donothing()591; CALLS-NEXT:    call void @__msan_maybe_warning_8(i64 zeroext [[TMP0]], i32 zeroext [[TMP1]])592; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr [[X]], align 4593; CALLS-NEXT:    [[TMP3:%.*]] = ptrtoint ptr [[X]] to i64594; CALLS-NEXT:    [[TMP4:%.*]] = xor i64 [[TMP3]], 87960930222080595; CALLS-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr596; CALLS-NEXT:    [[TMP6:%.*]] = add i64 [[TMP4]], 17592186044416597; CALLS-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr598; CALLS-NEXT:    [[_MSLD:%.*]] = load i32, ptr [[TMP5]], align 4599; CALLS-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4600; CALLS-NEXT:    [[TMP9:%.*]] = shl i32 [[_MSLD]], 10601; CALLS-NEXT:    [[TMP10:%.*]] = or i32 [[TMP9]], 0602; CALLS-NEXT:    [[TMP11:%.*]] = shl i32 [[TMP2]], 10603; CALLS-NEXT:    call void @__msan_maybe_warning_8(i64 zeroext [[TMP0]], i32 zeroext [[TMP1]])604; CALLS-NEXT:    [[TMP12:%.*]] = ptrtoint ptr [[X]] to i64605; CALLS-NEXT:    [[TMP13:%.*]] = xor i64 [[TMP12]], 87960930222080606; CALLS-NEXT:    [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr607; CALLS-NEXT:    [[TMP15:%.*]] = add i64 [[TMP13]], 17592186044416608; CALLS-NEXT:    [[TMP16:%.*]] = inttoptr i64 [[TMP15]] to ptr609; CALLS-NEXT:    store i32 [[TMP10]], ptr [[TMP14]], align 4610; CALLS-NEXT:    call void @__msan_maybe_store_origin_4(i32 zeroext [[TMP10]], ptr [[X]], i32 zeroext [[TMP8]])611; CALLS-NEXT:    store i32 [[TMP11]], ptr [[X]], align 4612; CALLS-NEXT:    ret void613;614entry:615  %0 = load i32, ptr %x, align 4616  %1 = shl i32 %0, 10617  store i32 %1, ptr %x, align 4618  ret void619}620 621 622; Compute shadow for "10 << x": it should have 'sext i1'.623define void @ShlNonConst(ptr nocapture %x) nounwind uwtable sanitize_memory {624; CHECK-LABEL: define void @ShlNonConst(625; CHECK-SAME: ptr captures(none) [[X:%.*]]) #[[ATTR0]] {626; CHECK-NEXT:  [[ENTRY:.*:]]627; CHECK-NEXT:    call void @llvm.donothing()628; CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr [[X]], align 4629; CHECK-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[X]] to i64630; CHECK-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080631; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr632; CHECK-NEXT:    [[_MSLD:%.*]] = load i32, ptr [[TMP3]], align 4633; CHECK-NEXT:    [[TMP4:%.*]] = icmp ne i32 [[_MSLD]], 0634; CHECK-NEXT:    [[TMP5:%.*]] = sext i1 [[TMP4]] to i32635; CHECK-NEXT:    [[TMP6:%.*]] = shl i32 0, [[TMP0]]636; CHECK-NEXT:    [[TMP7:%.*]] = or i32 [[TMP6]], [[TMP5]]637; CHECK-NEXT:    [[TMP8:%.*]] = shl i32 10, [[TMP0]]638; CHECK-NEXT:    [[TMP9:%.*]] = ptrtoint ptr [[X]] to i64639; CHECK-NEXT:    [[TMP10:%.*]] = xor i64 [[TMP9]], 87960930222080640; CHECK-NEXT:    [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr641; CHECK-NEXT:    store i32 [[TMP7]], ptr [[TMP11]], align 4642; CHECK-NEXT:    store i32 [[TMP8]], ptr [[X]], align 4643; CHECK-NEXT:    ret void644;645; ORIGIN-LABEL: define void @ShlNonConst(646; ORIGIN-SAME: ptr captures(none) [[X:%.*]]) #[[ATTR0]] {647; ORIGIN-NEXT:  [[ENTRY:.*:]]648; ORIGIN-NEXT:    call void @llvm.donothing()649; ORIGIN-NEXT:    [[TMP0:%.*]] = load i32, ptr [[X]], align 4650; ORIGIN-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[X]] to i64651; ORIGIN-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080652; ORIGIN-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr653; ORIGIN-NEXT:    [[TMP4:%.*]] = add i64 [[TMP2]], 17592186044416654; ORIGIN-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr655; ORIGIN-NEXT:    [[_MSLD:%.*]] = load i32, ptr [[TMP3]], align 4656; ORIGIN-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4657; ORIGIN-NEXT:    [[TMP7:%.*]] = icmp ne i32 [[_MSLD]], 0658; ORIGIN-NEXT:    [[TMP8:%.*]] = sext i1 [[TMP7]] to i32659; ORIGIN-NEXT:    [[TMP9:%.*]] = shl i32 0, [[TMP0]]660; ORIGIN-NEXT:    [[TMP10:%.*]] = or i32 [[TMP9]], [[TMP8]]661; ORIGIN-NEXT:    [[TMP11:%.*]] = icmp ne i32 [[_MSLD]], 0662; ORIGIN-NEXT:    [[TMP12:%.*]] = select i1 [[TMP11]], i32 [[TMP6]], i32 0663; ORIGIN-NEXT:    [[TMP13:%.*]] = shl i32 10, [[TMP0]]664; ORIGIN-NEXT:    [[TMP14:%.*]] = ptrtoint ptr [[X]] to i64665; ORIGIN-NEXT:    [[TMP15:%.*]] = xor i64 [[TMP14]], 87960930222080666; ORIGIN-NEXT:    [[TMP16:%.*]] = inttoptr i64 [[TMP15]] to ptr667; ORIGIN-NEXT:    [[TMP17:%.*]] = add i64 [[TMP15]], 17592186044416668; ORIGIN-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr669; ORIGIN-NEXT:    store i32 [[TMP10]], ptr [[TMP16]], align 4670; ORIGIN-NEXT:    [[_MSCMP:%.*]] = icmp ne i32 [[TMP10]], 0671; ORIGIN-NEXT:    br i1 [[_MSCMP]], label %[[BB19:.*]], label %[[BB20:.*]], !prof [[PROF1]]672; ORIGIN:       [[BB19]]:673; ORIGIN-NEXT:    store i32 [[TMP12]], ptr [[TMP18]], align 4674; ORIGIN-NEXT:    br label %[[BB20]]675; ORIGIN:       [[BB20]]:676; ORIGIN-NEXT:    store i32 [[TMP13]], ptr [[X]], align 4677; ORIGIN-NEXT:    ret void678;679; CALLS-LABEL: define void @ShlNonConst(680; CALLS-SAME: ptr captures(none) [[X:%.*]]) #[[ATTR0]] {681; CALLS-NEXT:  [[ENTRY:.*:]]682; CALLS-NEXT:    [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 8683; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 4684; CALLS-NEXT:    call void @llvm.donothing()685; CALLS-NEXT:    call void @__msan_maybe_warning_8(i64 zeroext [[TMP0]], i32 zeroext [[TMP1]])686; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr [[X]], align 4687; CALLS-NEXT:    [[TMP3:%.*]] = ptrtoint ptr [[X]] to i64688; CALLS-NEXT:    [[TMP4:%.*]] = xor i64 [[TMP3]], 87960930222080689; CALLS-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr690; CALLS-NEXT:    [[TMP6:%.*]] = add i64 [[TMP4]], 17592186044416691; CALLS-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr692; CALLS-NEXT:    [[_MSLD:%.*]] = load i32, ptr [[TMP5]], align 4693; CALLS-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4694; CALLS-NEXT:    [[TMP9:%.*]] = icmp ne i32 [[_MSLD]], 0695; CALLS-NEXT:    [[TMP10:%.*]] = sext i1 [[TMP9]] to i32696; CALLS-NEXT:    [[TMP11:%.*]] = shl i32 0, [[TMP2]]697; CALLS-NEXT:    [[TMP12:%.*]] = or i32 [[TMP11]], [[TMP10]]698; CALLS-NEXT:    [[TMP13:%.*]] = icmp ne i32 [[_MSLD]], 0699; CALLS-NEXT:    [[TMP14:%.*]] = select i1 [[TMP13]], i32 [[TMP8]], i32 0700; CALLS-NEXT:    [[TMP15:%.*]] = shl i32 10, [[TMP2]]701; CALLS-NEXT:    call void @__msan_maybe_warning_8(i64 zeroext [[TMP0]], i32 zeroext [[TMP1]])702; CALLS-NEXT:    [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64703; CALLS-NEXT:    [[TMP17:%.*]] = xor i64 [[TMP16]], 87960930222080704; CALLS-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr705; CALLS-NEXT:    [[TMP19:%.*]] = add i64 [[TMP17]], 17592186044416706; CALLS-NEXT:    [[TMP20:%.*]] = inttoptr i64 [[TMP19]] to ptr707; CALLS-NEXT:    store i32 [[TMP12]], ptr [[TMP18]], align 4708; CALLS-NEXT:    call void @__msan_maybe_store_origin_4(i32 zeroext [[TMP12]], ptr [[X]], i32 zeroext [[TMP14]])709; CALLS-NEXT:    store i32 [[TMP15]], ptr [[X]], align 4710; CALLS-NEXT:    ret void711;712entry:713  %0 = load i32, ptr %x, align 4714  %1 = shl i32 10, %0715  store i32 %1, ptr %x, align 4716  ret void717}718 719 720; SExt721define void @SExt(ptr nocapture %a, ptr nocapture %b) nounwind uwtable sanitize_memory {722; CHECK-LABEL: define void @SExt(723; CHECK-SAME: ptr captures(none) [[A:%.*]], ptr captures(none) [[B:%.*]]) #[[ATTR0]] {724; CHECK-NEXT:  [[ENTRY:.*:]]725; CHECK-NEXT:    call void @llvm.donothing()726; CHECK-NEXT:    [[TMP0:%.*]] = load i16, ptr [[B]], align 2727; CHECK-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[B]] to i64728; CHECK-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080729; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr730; CHECK-NEXT:    [[_MSLD:%.*]] = load i16, ptr [[TMP3]], align 2731; CHECK-NEXT:    [[_MSPROP:%.*]] = sext i16 [[_MSLD]] to i32732; CHECK-NEXT:    [[TMP4:%.*]] = sext i16 [[TMP0]] to i32733; CHECK-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64734; CHECK-NEXT:    [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080735; CHECK-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr736; CHECK-NEXT:    store i32 [[_MSPROP]], ptr [[TMP7]], align 4737; CHECK-NEXT:    store i32 [[TMP4]], ptr [[A]], align 4738; CHECK-NEXT:    ret void739;740; ORIGIN-LABEL: define void @SExt(741; ORIGIN-SAME: ptr captures(none) [[A:%.*]], ptr captures(none) [[B:%.*]]) #[[ATTR0]] {742; ORIGIN-NEXT:  [[ENTRY:.*:]]743; ORIGIN-NEXT:    call void @llvm.donothing()744; ORIGIN-NEXT:    [[TMP0:%.*]] = load i16, ptr [[B]], align 2745; ORIGIN-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[B]] to i64746; ORIGIN-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080747; ORIGIN-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr748; ORIGIN-NEXT:    [[TMP4:%.*]] = add i64 [[TMP2]], 17592186044416749; ORIGIN-NEXT:    [[TMP5:%.*]] = and i64 [[TMP4]], -4750; ORIGIN-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr751; ORIGIN-NEXT:    [[_MSLD:%.*]] = load i16, ptr [[TMP3]], align 2752; ORIGIN-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4753; ORIGIN-NEXT:    [[_MSPROP:%.*]] = sext i16 [[_MSLD]] to i32754; ORIGIN-NEXT:    [[TMP8:%.*]] = sext i16 [[TMP0]] to i32755; ORIGIN-NEXT:    [[TMP9:%.*]] = ptrtoint ptr [[A]] to i64756; ORIGIN-NEXT:    [[TMP10:%.*]] = xor i64 [[TMP9]], 87960930222080757; ORIGIN-NEXT:    [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr758; ORIGIN-NEXT:    [[TMP12:%.*]] = add i64 [[TMP10]], 17592186044416759; ORIGIN-NEXT:    [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr760; ORIGIN-NEXT:    store i32 [[_MSPROP]], ptr [[TMP11]], align 4761; ORIGIN-NEXT:    [[_MSCMP:%.*]] = icmp ne i32 [[_MSPROP]], 0762; ORIGIN-NEXT:    br i1 [[_MSCMP]], label %[[BB14:.*]], label %[[BB15:.*]], !prof [[PROF1]]763; ORIGIN:       [[BB14]]:764; ORIGIN-NEXT:    store i32 [[TMP7]], ptr [[TMP13]], align 4765; ORIGIN-NEXT:    br label %[[BB15]]766; ORIGIN:       [[BB15]]:767; ORIGIN-NEXT:    store i32 [[TMP8]], ptr [[A]], align 4768; ORIGIN-NEXT:    ret void769;770; CALLS-LABEL: define void @SExt(771; CALLS-SAME: ptr captures(none) [[A:%.*]], ptr captures(none) [[B:%.*]]) #[[ATTR0]] {772; CALLS-NEXT:  [[ENTRY:.*:]]773; CALLS-NEXT:    [[TMP0:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8774; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 4775; CALLS-NEXT:    [[TMP2:%.*]] = load i64, ptr @__msan_param_tls, align 8776; CALLS-NEXT:    [[TMP3:%.*]] = load i32, ptr @__msan_param_origin_tls, align 4777; CALLS-NEXT:    call void @llvm.donothing()778; CALLS-NEXT:    call void @__msan_maybe_warning_8(i64 zeroext [[TMP0]], i32 zeroext [[TMP1]])779; CALLS-NEXT:    [[TMP4:%.*]] = load i16, ptr [[B]], align 2780; CALLS-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[B]] to i64781; CALLS-NEXT:    [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080782; CALLS-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr783; CALLS-NEXT:    [[TMP8:%.*]] = add i64 [[TMP6]], 17592186044416784; CALLS-NEXT:    [[TMP9:%.*]] = and i64 [[TMP8]], -4785; CALLS-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr786; CALLS-NEXT:    [[_MSLD:%.*]] = load i16, ptr [[TMP7]], align 2787; CALLS-NEXT:    [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4788; CALLS-NEXT:    [[_MSPROP:%.*]] = sext i16 [[_MSLD]] to i32789; CALLS-NEXT:    [[TMP12:%.*]] = sext i16 [[TMP4]] to i32790; CALLS-NEXT:    call void @__msan_maybe_warning_8(i64 zeroext [[TMP2]], i32 zeroext [[TMP3]])791; CALLS-NEXT:    [[TMP13:%.*]] = ptrtoint ptr [[A]] to i64792; CALLS-NEXT:    [[TMP14:%.*]] = xor i64 [[TMP13]], 87960930222080793; CALLS-NEXT:    [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr794; CALLS-NEXT:    [[TMP16:%.*]] = add i64 [[TMP14]], 17592186044416795; CALLS-NEXT:    [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr796; CALLS-NEXT:    store i32 [[_MSPROP]], ptr [[TMP15]], align 4797; CALLS-NEXT:    call void @__msan_maybe_store_origin_4(i32 zeroext [[_MSPROP]], ptr [[A]], i32 zeroext [[TMP11]])798; CALLS-NEXT:    store i32 [[TMP12]], ptr [[A]], align 4799; CALLS-NEXT:    ret void800;801entry:802  %0 = load i16, ptr %b, align 2803  %1 = sext i16 %0 to i32804  store i32 %1, ptr %a, align 4805  ret void806}807 808 809 810; memset811define void @MemSet(ptr nocapture %x) nounwind uwtable sanitize_memory {812; CHECK-LABEL: define void @MemSet(813; CHECK-SAME: ptr captures(none) [[X:%.*]]) #[[ATTR0]] {814; CHECK-NEXT:  [[ENTRY:.*:]]815; CHECK-NEXT:    call void @llvm.donothing()816; CHECK-NEXT:    [[TMP0:%.*]] = call ptr @__msan_memset(ptr [[X]], i32 42, i64 10)817; CHECK-NEXT:    ret void818;819; ORIGIN-LABEL: define void @MemSet(820; ORIGIN-SAME: ptr captures(none) [[X:%.*]]) #[[ATTR0]] {821; ORIGIN-NEXT:  [[ENTRY:.*:]]822; ORIGIN-NEXT:    call void @llvm.donothing()823; ORIGIN-NEXT:    [[TMP0:%.*]] = call ptr @__msan_memset(ptr [[X]], i32 42, i64 10)824; ORIGIN-NEXT:    ret void825;826; CALLS-LABEL: define void @MemSet(827; CALLS-SAME: ptr captures(none) [[X:%.*]]) #[[ATTR0]] {828; CALLS-NEXT:  [[ENTRY:.*:]]829; CALLS-NEXT:    call void @llvm.donothing()830; CALLS-NEXT:    [[TMP0:%.*]] = call ptr @__msan_memset(ptr [[X]], i32 42, i64 10)831; CALLS-NEXT:    ret void832;833entry:834  call void @llvm.memset.p0.i64(ptr %x, i8 42, i64 10, i1 false)835  ret void836}837 838declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1) nounwind839 840 841 842; memcpy843define void @MemCpy(ptr nocapture %x, ptr nocapture %y) nounwind uwtable sanitize_memory {844; CHECK-LABEL: define void @MemCpy(845; CHECK-SAME: ptr captures(none) [[X:%.*]], ptr captures(none) [[Y:%.*]]) #[[ATTR0]] {846; CHECK-NEXT:  [[ENTRY:.*:]]847; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8848; CHECK-NEXT:    call void @llvm.donothing()849; CHECK-NEXT:    [[TMP1:%.*]] = call ptr @__msan_memcpy(ptr [[X]], ptr [[Y]], i64 10)850; CHECK-NEXT:    ret void851;852; ORIGIN-LABEL: define void @MemCpy(853; ORIGIN-SAME: ptr captures(none) [[X:%.*]], ptr captures(none) [[Y:%.*]]) #[[ATTR0]] {854; ORIGIN-NEXT:  [[ENTRY:.*:]]855; ORIGIN-NEXT:    [[TMP0:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8856; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 4857; ORIGIN-NEXT:    call void @llvm.donothing()858; ORIGIN-NEXT:    [[TMP2:%.*]] = call ptr @__msan_memcpy(ptr [[X]], ptr [[Y]], i64 10)859; ORIGIN-NEXT:    ret void860;861; CALLS-LABEL: define void @MemCpy(862; CALLS-SAME: ptr captures(none) [[X:%.*]], ptr captures(none) [[Y:%.*]]) #[[ATTR0]] {863; CALLS-NEXT:  [[ENTRY:.*:]]864; CALLS-NEXT:    [[TMP0:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8865; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 4866; CALLS-NEXT:    call void @llvm.donothing()867; CALLS-NEXT:    [[TMP2:%.*]] = call ptr @__msan_memcpy(ptr [[X]], ptr [[Y]], i64 10)868; CALLS-NEXT:    ret void869;870entry:871  call void @llvm.memcpy.p0.p0.i64(ptr %x, ptr %y, i64 10, i1 false)872  ret void873}874 875declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind876 877 878; memset.inline879define void @MemSetInline(ptr nocapture %x) nounwind uwtable sanitize_memory {880; CHECK-LABEL: define void @MemSetInline(881; CHECK-SAME: ptr captures(none) [[X:%.*]]) #[[ATTR0]] {882; CHECK-NEXT:  [[ENTRY:.*:]]883; CHECK-NEXT:    call void @llvm.donothing()884; CHECK-NEXT:    [[TMP0:%.*]] = call ptr @__msan_memset(ptr [[X]], i32 42, i64 10)885; CHECK-NEXT:    ret void886;887; ORIGIN-LABEL: define void @MemSetInline(888; ORIGIN-SAME: ptr captures(none) [[X:%.*]]) #[[ATTR0]] {889; ORIGIN-NEXT:  [[ENTRY:.*:]]890; ORIGIN-NEXT:    call void @llvm.donothing()891; ORIGIN-NEXT:    [[TMP0:%.*]] = call ptr @__msan_memset(ptr [[X]], i32 42, i64 10)892; ORIGIN-NEXT:    ret void893;894; CALLS-LABEL: define void @MemSetInline(895; CALLS-SAME: ptr captures(none) [[X:%.*]]) #[[ATTR0]] {896; CALLS-NEXT:  [[ENTRY:.*:]]897; CALLS-NEXT:    call void @llvm.donothing()898; CALLS-NEXT:    [[TMP0:%.*]] = call ptr @__msan_memset(ptr [[X]], i32 42, i64 10)899; CALLS-NEXT:    ret void900;901entry:902  call void @llvm.memset.inline.p0.i64(ptr %x, i8 42, i64 10, i1 false)903  ret void904}905 906declare void @llvm.memset.inline.p0.i64(ptr nocapture, i8, i64, i1) nounwind907 908 909; memcpy.inline910define void @MemCpyInline(ptr nocapture %x, ptr nocapture %y) nounwind uwtable sanitize_memory {911; CHECK-LABEL: define void @MemCpyInline(912; CHECK-SAME: ptr captures(none) [[X:%.*]], ptr captures(none) [[Y:%.*]]) #[[ATTR0]] {913; CHECK-NEXT:  [[ENTRY:.*:]]914; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8915; CHECK-NEXT:    call void @llvm.donothing()916; CHECK-NEXT:    [[TMP1:%.*]] = call ptr @__msan_memcpy(ptr [[X]], ptr [[Y]], i64 10)917; CHECK-NEXT:    ret void918;919; ORIGIN-LABEL: define void @MemCpyInline(920; ORIGIN-SAME: ptr captures(none) [[X:%.*]], ptr captures(none) [[Y:%.*]]) #[[ATTR0]] {921; ORIGIN-NEXT:  [[ENTRY:.*:]]922; ORIGIN-NEXT:    [[TMP0:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8923; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 4924; ORIGIN-NEXT:    call void @llvm.donothing()925; ORIGIN-NEXT:    [[TMP2:%.*]] = call ptr @__msan_memcpy(ptr [[X]], ptr [[Y]], i64 10)926; ORIGIN-NEXT:    ret void927;928; CALLS-LABEL: define void @MemCpyInline(929; CALLS-SAME: ptr captures(none) [[X:%.*]], ptr captures(none) [[Y:%.*]]) #[[ATTR0]] {930; CALLS-NEXT:  [[ENTRY:.*:]]931; CALLS-NEXT:    [[TMP0:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8932; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 4933; CALLS-NEXT:    call void @llvm.donothing()934; CALLS-NEXT:    [[TMP2:%.*]] = call ptr @__msan_memcpy(ptr [[X]], ptr [[Y]], i64 10)935; CALLS-NEXT:    ret void936;937entry:938  call void @llvm.memcpy.inline.p0.p0.i64(ptr %x, ptr %y, i64 10, i1 false)939  ret void940}941 942declare void @llvm.memcpy.inline.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind943 944 945; memmove is lowered to a call946define void @MemMove(ptr nocapture %x, ptr nocapture %y) nounwind uwtable sanitize_memory {947; CHECK-LABEL: define void @MemMove(948; CHECK-SAME: ptr captures(none) [[X:%.*]], ptr captures(none) [[Y:%.*]]) #[[ATTR0]] {949; CHECK-NEXT:  [[ENTRY:.*:]]950; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8951; CHECK-NEXT:    call void @llvm.donothing()952; CHECK-NEXT:    [[TMP1:%.*]] = call ptr @__msan_memmove(ptr [[X]], ptr [[Y]], i64 10)953; CHECK-NEXT:    ret void954;955; ORIGIN-LABEL: define void @MemMove(956; ORIGIN-SAME: ptr captures(none) [[X:%.*]], ptr captures(none) [[Y:%.*]]) #[[ATTR0]] {957; ORIGIN-NEXT:  [[ENTRY:.*:]]958; ORIGIN-NEXT:    [[TMP0:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8959; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 4960; ORIGIN-NEXT:    call void @llvm.donothing()961; ORIGIN-NEXT:    [[TMP2:%.*]] = call ptr @__msan_memmove(ptr [[X]], ptr [[Y]], i64 10)962; ORIGIN-NEXT:    ret void963;964; CALLS-LABEL: define void @MemMove(965; CALLS-SAME: ptr captures(none) [[X:%.*]], ptr captures(none) [[Y:%.*]]) #[[ATTR0]] {966; CALLS-NEXT:  [[ENTRY:.*:]]967; CALLS-NEXT:    [[TMP0:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8968; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 4969; CALLS-NEXT:    call void @llvm.donothing()970; CALLS-NEXT:    [[TMP2:%.*]] = call ptr @__msan_memmove(ptr [[X]], ptr [[Y]], i64 10)971; CALLS-NEXT:    ret void972;973entry:974  call void @llvm.memmove.p0.p0.i64(ptr %x, ptr %y, i64 10, i1 false)975  ret void976}977 978declare void @llvm.memmove.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind979 980 981;; ------------982;; Placeholder tests that will fail once element atomic @llvm.mem[cpy|move|set] intrinsics have983;; been added to the MemIntrinsic class hierarchy. These will act as a reminder to984;; verify that MSAN handles these intrinsics properly once they have been985;; added to that class hierarchy.986declare void @llvm.memset.element.unordered.atomic.p0.i64(ptr nocapture writeonly, i8, i64, i32) nounwind987declare void @llvm.memmove.element.unordered.atomic.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i32) nounwind988declare void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i32) nounwind989 990define void @atomic_memcpy(ptr nocapture %x, ptr nocapture %y) nounwind {991; CHECK-LABEL: define void @atomic_memcpy(992; CHECK-SAME: ptr captures(none) [[X:%.*]], ptr captures(none) [[Y:%.*]]) #[[ATTR5]] {993; CHECK-NEXT:    call void @llvm.donothing()994; CHECK-NEXT:    call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 1 [[X]], ptr align 2 [[Y]], i64 16, i32 1)995; CHECK-NEXT:    ret void996;997; ORIGIN-LABEL: define void @atomic_memcpy(998; ORIGIN-SAME: ptr captures(none) [[X:%.*]], ptr captures(none) [[Y:%.*]]) #[[ATTR5]] {999; ORIGIN-NEXT:    call void @llvm.donothing()1000; ORIGIN-NEXT:    call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 1 [[X]], ptr align 2 [[Y]], i64 16, i32 1)1001; ORIGIN-NEXT:    ret void1002;1003; CALLS-LABEL: define void @atomic_memcpy(1004; CALLS-SAME: ptr captures(none) [[X:%.*]], ptr captures(none) [[Y:%.*]]) #[[ATTR5]] {1005; CALLS-NEXT:    call void @llvm.donothing()1006; CALLS-NEXT:    call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 1 [[X]], ptr align 2 [[Y]], i64 16, i32 1)1007; CALLS-NEXT:    ret void1008;1009  call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 1 %x, ptr align 2 %y, i64 16, i32 1)1010  ret void1011}1012 1013define void @atomic_memmove(ptr nocapture %x, ptr nocapture %y) nounwind {1014; CHECK-LABEL: define void @atomic_memmove(1015; CHECK-SAME: ptr captures(none) [[X:%.*]], ptr captures(none) [[Y:%.*]]) #[[ATTR5]] {1016; CHECK-NEXT:    call void @llvm.donothing()1017; CHECK-NEXT:    call void @llvm.memmove.element.unordered.atomic.p0.p0.i64(ptr align 1 [[X]], ptr align 2 [[Y]], i64 16, i32 1)1018; CHECK-NEXT:    ret void1019;1020; ORIGIN-LABEL: define void @atomic_memmove(1021; ORIGIN-SAME: ptr captures(none) [[X:%.*]], ptr captures(none) [[Y:%.*]]) #[[ATTR5]] {1022; ORIGIN-NEXT:    call void @llvm.donothing()1023; ORIGIN-NEXT:    call void @llvm.memmove.element.unordered.atomic.p0.p0.i64(ptr align 1 [[X]], ptr align 2 [[Y]], i64 16, i32 1)1024; ORIGIN-NEXT:    ret void1025;1026; CALLS-LABEL: define void @atomic_memmove(1027; CALLS-SAME: ptr captures(none) [[X:%.*]], ptr captures(none) [[Y:%.*]]) #[[ATTR5]] {1028; CALLS-NEXT:    call void @llvm.donothing()1029; CALLS-NEXT:    call void @llvm.memmove.element.unordered.atomic.p0.p0.i64(ptr align 1 [[X]], ptr align 2 [[Y]], i64 16, i32 1)1030; CALLS-NEXT:    ret void1031;1032  call void @llvm.memmove.element.unordered.atomic.p0.p0.i64(ptr align 1 %x, ptr align 2 %y, i64 16, i32 1)1033  ret void1034}1035 1036define void @atomic_memset(ptr nocapture %x) nounwind {1037; CHECK-LABEL: define void @atomic_memset(1038; CHECK-SAME: ptr captures(none) [[X:%.*]]) #[[ATTR5]] {1039; CHECK-NEXT:    call void @llvm.donothing()1040; CHECK-NEXT:    call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 1 [[X]], i8 88, i64 16, i32 1)1041; CHECK-NEXT:    ret void1042;1043; ORIGIN-LABEL: define void @atomic_memset(1044; ORIGIN-SAME: ptr captures(none) [[X:%.*]]) #[[ATTR5]] {1045; ORIGIN-NEXT:    call void @llvm.donothing()1046; ORIGIN-NEXT:    call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 1 [[X]], i8 88, i64 16, i32 1)1047; ORIGIN-NEXT:    ret void1048;1049; CALLS-LABEL: define void @atomic_memset(1050; CALLS-SAME: ptr captures(none) [[X:%.*]]) #[[ATTR5]] {1051; CALLS-NEXT:    call void @llvm.donothing()1052; CALLS-NEXT:    call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 1 [[X]], i8 88, i64 16, i32 1)1053; CALLS-NEXT:    ret void1054;1055  call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 1 %x, i8 88, i64 16, i32 1)1056  ret void1057}1058 1059;; ------------1060 1061 1062; Check that we propagate shadow for "select"1063 1064define i32 @Select(i32 %a, i32 %b, i1 %c) nounwind uwtable readnone sanitize_memory {1065; CHECK-LABEL: define i32 @Select(1066; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i1 [[C:%.*]]) #[[ATTR0]] {1067; CHECK-NEXT:  [[ENTRY:.*:]]1068; CHECK-NEXT:    [[TMP0:%.*]] = load i1, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 81069; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 81070; CHECK-NEXT:    [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 81071; CHECK-NEXT:    call void @llvm.donothing()1072; CHECK-NEXT:    [[TMP3:%.*]] = select i1 [[C]], i32 [[TMP1]], i32 [[TMP2]]1073; CHECK-NEXT:    [[TMP4:%.*]] = xor i32 [[A]], [[B]]1074; CHECK-NEXT:    [[TMP5:%.*]] = or i32 [[TMP4]], [[TMP1]]1075; CHECK-NEXT:    [[TMP6:%.*]] = or i32 [[TMP5]], [[TMP2]]1076; CHECK-NEXT:    [[_MSPROP_SELECT:%.*]] = select i1 [[TMP0]], i32 [[TMP6]], i32 [[TMP3]]1077; CHECK-NEXT:    [[COND:%.*]] = select i1 [[C]], i32 [[A]], i32 [[B]]1078; CHECK-NEXT:    store i32 [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81079; CHECK-NEXT:    ret i32 [[COND]]1080;1081; ORIGIN-LABEL: define i32 @Select(1082; ORIGIN-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i1 [[C:%.*]]) #[[ATTR0]] {1083; ORIGIN-NEXT:  [[ENTRY:.*:]]1084; ORIGIN-NEXT:    [[TMP0:%.*]] = load i1, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 81085; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 16), align 41086; ORIGIN-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_tls, align 81087; ORIGIN-NEXT:    [[TMP3:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41088; ORIGIN-NEXT:    [[TMP4:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 81089; ORIGIN-NEXT:    [[TMP5:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 41090; ORIGIN-NEXT:    call void @llvm.donothing()1091; ORIGIN-NEXT:    [[TMP6:%.*]] = select i1 [[C]], i32 [[TMP2]], i32 [[TMP4]]1092; ORIGIN-NEXT:    [[TMP7:%.*]] = xor i32 [[A]], [[B]]1093; ORIGIN-NEXT:    [[TMP8:%.*]] = or i32 [[TMP7]], [[TMP2]]1094; ORIGIN-NEXT:    [[TMP9:%.*]] = or i32 [[TMP8]], [[TMP4]]1095; ORIGIN-NEXT:    [[_MSPROP_SELECT:%.*]] = select i1 [[TMP0]], i32 [[TMP9]], i32 [[TMP6]]1096; ORIGIN-NEXT:    [[TMP10:%.*]] = select i1 [[C]], i32 [[TMP3]], i32 [[TMP5]]1097; ORIGIN-NEXT:    [[TMP11:%.*]] = select i1 [[TMP0]], i32 [[TMP1]], i32 [[TMP10]]1098; ORIGIN-NEXT:    [[COND:%.*]] = select i1 [[C]], i32 [[A]], i32 [[B]]1099; ORIGIN-NEXT:    store i32 [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81100; ORIGIN-NEXT:    store i32 [[TMP11]], ptr @__msan_retval_origin_tls, align 41101; ORIGIN-NEXT:    ret i32 [[COND]]1102;1103; CALLS-LABEL: define i32 @Select(1104; CALLS-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i1 [[C:%.*]]) #[[ATTR0]] {1105; CALLS-NEXT:  [[ENTRY:.*:]]1106; CALLS-NEXT:    [[TMP0:%.*]] = load i1, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 81107; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 16), align 41108; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_tls, align 81109; CALLS-NEXT:    [[TMP3:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41110; CALLS-NEXT:    [[TMP4:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 81111; CALLS-NEXT:    [[TMP5:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 41112; CALLS-NEXT:    call void @llvm.donothing()1113; CALLS-NEXT:    [[TMP6:%.*]] = select i1 [[C]], i32 [[TMP2]], i32 [[TMP4]]1114; CALLS-NEXT:    [[TMP7:%.*]] = xor i32 [[A]], [[B]]1115; CALLS-NEXT:    [[TMP8:%.*]] = or i32 [[TMP7]], [[TMP2]]1116; CALLS-NEXT:    [[TMP9:%.*]] = or i32 [[TMP8]], [[TMP4]]1117; CALLS-NEXT:    [[_MSPROP_SELECT:%.*]] = select i1 [[TMP0]], i32 [[TMP9]], i32 [[TMP6]]1118; CALLS-NEXT:    [[TMP10:%.*]] = select i1 [[C]], i32 [[TMP3]], i32 [[TMP5]]1119; CALLS-NEXT:    [[TMP11:%.*]] = select i1 [[TMP0]], i32 [[TMP1]], i32 [[TMP10]]1120; CALLS-NEXT:    [[COND:%.*]] = select i1 [[C]], i32 [[A]], i32 [[B]]1121; CALLS-NEXT:    store i32 [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81122; CALLS-NEXT:    store i32 [[TMP11]], ptr @__msan_retval_origin_tls, align 41123; CALLS-NEXT:    ret i32 [[COND]]1124;1125entry:1126  %cond = select i1 %c, i32 %a, i32 %b1127  ret i32 %cond1128}1129 1130; Check that we propagate origin for "select" with vector condition.1131; Select condition is flattened to i1, which is then used to select one of the1132; argument origins.1133 1134define <8 x i16> @SelectVector(<8 x i16> %a, <8 x i16> %b, <8 x i1> %c) nounwind uwtable readnone sanitize_memory {1135; CHECK-LABEL: define <8 x i16> @SelectVector(1136; CHECK-SAME: <8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i1> [[C:%.*]]) #[[ATTR0]] {1137; CHECK-NEXT:  [[ENTRY:.*:]]1138; CHECK-NEXT:    [[TMP0:%.*]] = load <8 x i1>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 81139; CHECK-NEXT:    [[TMP1:%.*]] = load <8 x i16>, ptr @__msan_param_tls, align 81140; CHECK-NEXT:    [[TMP2:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 81141; CHECK-NEXT:    call void @llvm.donothing()1142; CHECK-NEXT:    [[TMP3:%.*]] = select <8 x i1> [[C]], <8 x i16> [[TMP1]], <8 x i16> [[TMP2]]1143; CHECK-NEXT:    [[TMP4:%.*]] = xor <8 x i16> [[A]], [[B]]1144; CHECK-NEXT:    [[TMP5:%.*]] = or <8 x i16> [[TMP4]], [[TMP1]]1145; CHECK-NEXT:    [[TMP6:%.*]] = or <8 x i16> [[TMP5]], [[TMP2]]1146; CHECK-NEXT:    [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP0]], <8 x i16> [[TMP6]], <8 x i16> [[TMP3]]1147; CHECK-NEXT:    [[COND:%.*]] = select <8 x i1> [[C]], <8 x i16> [[A]], <8 x i16> [[B]]1148; CHECK-NEXT:    store <8 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81149; CHECK-NEXT:    ret <8 x i16> [[COND]]1150;1151; ORIGIN-LABEL: define <8 x i16> @SelectVector(1152; ORIGIN-SAME: <8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i1> [[C:%.*]]) #[[ATTR0]] {1153; ORIGIN-NEXT:  [[ENTRY:.*:]]1154; ORIGIN-NEXT:    [[TMP0:%.*]] = load <8 x i1>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 81155; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 32), align 41156; ORIGIN-NEXT:    [[TMP2:%.*]] = load <8 x i16>, ptr @__msan_param_tls, align 81157; ORIGIN-NEXT:    [[TMP3:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41158; ORIGIN-NEXT:    [[TMP4:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 81159; ORIGIN-NEXT:    [[TMP5:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 16), align 41160; ORIGIN-NEXT:    call void @llvm.donothing()1161; ORIGIN-NEXT:    [[TMP6:%.*]] = select <8 x i1> [[C]], <8 x i16> [[TMP2]], <8 x i16> [[TMP4]]1162; ORIGIN-NEXT:    [[TMP7:%.*]] = xor <8 x i16> [[A]], [[B]]1163; ORIGIN-NEXT:    [[TMP8:%.*]] = or <8 x i16> [[TMP7]], [[TMP2]]1164; ORIGIN-NEXT:    [[TMP9:%.*]] = or <8 x i16> [[TMP8]], [[TMP4]]1165; ORIGIN-NEXT:    [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP0]], <8 x i16> [[TMP9]], <8 x i16> [[TMP6]]1166; ORIGIN-NEXT:    [[TMP10:%.*]] = bitcast <8 x i1> [[C]] to i81167; ORIGIN-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP10]], 01168; ORIGIN-NEXT:    [[TMP12:%.*]] = bitcast <8 x i1> [[TMP0]] to i81169; ORIGIN-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP12]], 01170; ORIGIN-NEXT:    [[TMP14:%.*]] = select i1 [[TMP11]], i32 [[TMP3]], i32 [[TMP5]]1171; ORIGIN-NEXT:    [[TMP15:%.*]] = select i1 [[TMP13]], i32 [[TMP1]], i32 [[TMP14]]1172; ORIGIN-NEXT:    [[COND:%.*]] = select <8 x i1> [[C]], <8 x i16> [[A]], <8 x i16> [[B]]1173; ORIGIN-NEXT:    store <8 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81174; ORIGIN-NEXT:    store i32 [[TMP15]], ptr @__msan_retval_origin_tls, align 41175; ORIGIN-NEXT:    ret <8 x i16> [[COND]]1176;1177; CALLS-LABEL: define <8 x i16> @SelectVector(1178; CALLS-SAME: <8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i1> [[C:%.*]]) #[[ATTR0]] {1179; CALLS-NEXT:  [[ENTRY:.*:]]1180; CALLS-NEXT:    [[TMP0:%.*]] = load <8 x i1>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 81181; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 32), align 41182; CALLS-NEXT:    [[TMP2:%.*]] = load <8 x i16>, ptr @__msan_param_tls, align 81183; CALLS-NEXT:    [[TMP3:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41184; CALLS-NEXT:    [[TMP4:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 81185; CALLS-NEXT:    [[TMP5:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 16), align 41186; CALLS-NEXT:    call void @llvm.donothing()1187; CALLS-NEXT:    [[TMP6:%.*]] = select <8 x i1> [[C]], <8 x i16> [[TMP2]], <8 x i16> [[TMP4]]1188; CALLS-NEXT:    [[TMP7:%.*]] = xor <8 x i16> [[A]], [[B]]1189; CALLS-NEXT:    [[TMP8:%.*]] = or <8 x i16> [[TMP7]], [[TMP2]]1190; CALLS-NEXT:    [[TMP9:%.*]] = or <8 x i16> [[TMP8]], [[TMP4]]1191; CALLS-NEXT:    [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP0]], <8 x i16> [[TMP9]], <8 x i16> [[TMP6]]1192; CALLS-NEXT:    [[TMP10:%.*]] = bitcast <8 x i1> [[C]] to i81193; CALLS-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP10]], 01194; CALLS-NEXT:    [[TMP12:%.*]] = bitcast <8 x i1> [[TMP0]] to i81195; CALLS-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP12]], 01196; CALLS-NEXT:    [[TMP14:%.*]] = select i1 [[TMP11]], i32 [[TMP3]], i32 [[TMP5]]1197; CALLS-NEXT:    [[TMP15:%.*]] = select i1 [[TMP13]], i32 [[TMP1]], i32 [[TMP14]]1198; CALLS-NEXT:    [[COND:%.*]] = select <8 x i1> [[C]], <8 x i16> [[A]], <8 x i16> [[B]]1199; CALLS-NEXT:    store <8 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81200; CALLS-NEXT:    store i32 [[TMP15]], ptr @__msan_retval_origin_tls, align 41201; CALLS-NEXT:    ret <8 x i16> [[COND]]1202;1203entry:1204  %cond = select <8 x i1> %c, <8 x i16> %a, <8 x i16> %b1205  ret <8 x i16> %cond1206}1207 1208; Check that we propagate origin for "select" with scalar condition and vector1209; arguments. Select condition shadow is sign-extended to the vector type and1210; mixed into the result shadow.1211 1212define <8 x i16> @SelectVector2(<8 x i16> %a, <8 x i16> %b, i1 %c) nounwind uwtable readnone sanitize_memory {1213; CHECK-LABEL: define <8 x i16> @SelectVector2(1214; CHECK-SAME: <8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i1 [[C:%.*]]) #[[ATTR0]] {1215; CHECK-NEXT:  [[ENTRY:.*:]]1216; CHECK-NEXT:    [[TMP0:%.*]] = load i1, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 81217; CHECK-NEXT:    [[TMP1:%.*]] = load <8 x i16>, ptr @__msan_param_tls, align 81218; CHECK-NEXT:    [[TMP2:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 81219; CHECK-NEXT:    call void @llvm.donothing()1220; CHECK-NEXT:    [[TMP3:%.*]] = select i1 [[C]], <8 x i16> [[TMP1]], <8 x i16> [[TMP2]]1221; CHECK-NEXT:    [[TMP4:%.*]] = xor <8 x i16> [[A]], [[B]]1222; CHECK-NEXT:    [[TMP5:%.*]] = or <8 x i16> [[TMP4]], [[TMP1]]1223; CHECK-NEXT:    [[TMP6:%.*]] = or <8 x i16> [[TMP5]], [[TMP2]]1224; CHECK-NEXT:    [[_MSPROP_SELECT:%.*]] = select i1 [[TMP0]], <8 x i16> [[TMP6]], <8 x i16> [[TMP3]]1225; CHECK-NEXT:    [[COND:%.*]] = select i1 [[C]], <8 x i16> [[A]], <8 x i16> [[B]]1226; CHECK-NEXT:    store <8 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81227; CHECK-NEXT:    ret <8 x i16> [[COND]]1228;1229; ORIGIN-LABEL: define <8 x i16> @SelectVector2(1230; ORIGIN-SAME: <8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i1 [[C:%.*]]) #[[ATTR0]] {1231; ORIGIN-NEXT:  [[ENTRY:.*:]]1232; ORIGIN-NEXT:    [[TMP0:%.*]] = load i1, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 81233; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 32), align 41234; ORIGIN-NEXT:    [[TMP2:%.*]] = load <8 x i16>, ptr @__msan_param_tls, align 81235; ORIGIN-NEXT:    [[TMP3:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41236; ORIGIN-NEXT:    [[TMP4:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 81237; ORIGIN-NEXT:    [[TMP5:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 16), align 41238; ORIGIN-NEXT:    call void @llvm.donothing()1239; ORIGIN-NEXT:    [[TMP6:%.*]] = select i1 [[C]], <8 x i16> [[TMP2]], <8 x i16> [[TMP4]]1240; ORIGIN-NEXT:    [[TMP7:%.*]] = xor <8 x i16> [[A]], [[B]]1241; ORIGIN-NEXT:    [[TMP8:%.*]] = or <8 x i16> [[TMP7]], [[TMP2]]1242; ORIGIN-NEXT:    [[TMP9:%.*]] = or <8 x i16> [[TMP8]], [[TMP4]]1243; ORIGIN-NEXT:    [[_MSPROP_SELECT:%.*]] = select i1 [[TMP0]], <8 x i16> [[TMP9]], <8 x i16> [[TMP6]]1244; ORIGIN-NEXT:    [[TMP10:%.*]] = select i1 [[C]], i32 [[TMP3]], i32 [[TMP5]]1245; ORIGIN-NEXT:    [[TMP11:%.*]] = select i1 [[TMP0]], i32 [[TMP1]], i32 [[TMP10]]1246; ORIGIN-NEXT:    [[COND:%.*]] = select i1 [[C]], <8 x i16> [[A]], <8 x i16> [[B]]1247; ORIGIN-NEXT:    store <8 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81248; ORIGIN-NEXT:    store i32 [[TMP11]], ptr @__msan_retval_origin_tls, align 41249; ORIGIN-NEXT:    ret <8 x i16> [[COND]]1250;1251; CALLS-LABEL: define <8 x i16> @SelectVector2(1252; CALLS-SAME: <8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i1 [[C:%.*]]) #[[ATTR0]] {1253; CALLS-NEXT:  [[ENTRY:.*:]]1254; CALLS-NEXT:    [[TMP0:%.*]] = load i1, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 81255; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 32), align 41256; CALLS-NEXT:    [[TMP2:%.*]] = load <8 x i16>, ptr @__msan_param_tls, align 81257; CALLS-NEXT:    [[TMP3:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41258; CALLS-NEXT:    [[TMP4:%.*]] = load <8 x i16>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 81259; CALLS-NEXT:    [[TMP5:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 16), align 41260; CALLS-NEXT:    call void @llvm.donothing()1261; CALLS-NEXT:    [[TMP6:%.*]] = select i1 [[C]], <8 x i16> [[TMP2]], <8 x i16> [[TMP4]]1262; CALLS-NEXT:    [[TMP7:%.*]] = xor <8 x i16> [[A]], [[B]]1263; CALLS-NEXT:    [[TMP8:%.*]] = or <8 x i16> [[TMP7]], [[TMP2]]1264; CALLS-NEXT:    [[TMP9:%.*]] = or <8 x i16> [[TMP8]], [[TMP4]]1265; CALLS-NEXT:    [[_MSPROP_SELECT:%.*]] = select i1 [[TMP0]], <8 x i16> [[TMP9]], <8 x i16> [[TMP6]]1266; CALLS-NEXT:    [[TMP10:%.*]] = select i1 [[C]], i32 [[TMP3]], i32 [[TMP5]]1267; CALLS-NEXT:    [[TMP11:%.*]] = select i1 [[TMP0]], i32 [[TMP1]], i32 [[TMP10]]1268; CALLS-NEXT:    [[COND:%.*]] = select i1 [[C]], <8 x i16> [[A]], <8 x i16> [[B]]1269; CALLS-NEXT:    store <8 x i16> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81270; CALLS-NEXT:    store i32 [[TMP11]], ptr @__msan_retval_origin_tls, align 41271; CALLS-NEXT:    ret <8 x i16> [[COND]]1272;1273entry:1274  %cond = select i1 %c, <8 x i16> %a, <8 x i16> %b1275  ret <8 x i16> %cond1276}1277 1278define { i64, i64 } @SelectStruct(i1 zeroext %x, { i64, i64 } %a, { i64, i64 } %b) readnone sanitize_memory {1279; CHECK-LABEL: define { i64, i64 } @SelectStruct(1280; CHECK-SAME: i1 zeroext [[X:%.*]], { i64, i64 } [[A:%.*]], { i64, i64 } [[B:%.*]]) #[[ATTR6:[0-9]+]] {1281; CHECK-NEXT:  [[ENTRY:.*:]]1282; CHECK-NEXT:    [[TMP0:%.*]] = load i1, ptr @__msan_param_tls, align 81283; CHECK-NEXT:    [[TMP1:%.*]] = load { i64, i64 }, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 81284; CHECK-NEXT:    [[TMP2:%.*]] = load { i64, i64 }, ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 81285; CHECK-NEXT:    call void @llvm.donothing()1286; CHECK-NEXT:    [[TMP3:%.*]] = select i1 [[X]], { i64, i64 } [[TMP1]], { i64, i64 } [[TMP2]]1287; CHECK-NEXT:    [[_MSPROP_SELECT:%.*]] = select i1 [[TMP0]], { i64, i64 } { i64 -1, i64 -1 }, { i64, i64 } [[TMP3]]1288; CHECK-NEXT:    [[C:%.*]] = select i1 [[X]], { i64, i64 } [[A]], { i64, i64 } [[B]]1289; CHECK-NEXT:    store { i64, i64 } [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81290; CHECK-NEXT:    ret { i64, i64 } [[C]]1291;1292; ORIGIN-LABEL: define { i64, i64 } @SelectStruct(1293; ORIGIN-SAME: i1 zeroext [[X:%.*]], { i64, i64 } [[A:%.*]], { i64, i64 } [[B:%.*]]) #[[ATTR6:[0-9]+]] {1294; ORIGIN-NEXT:  [[ENTRY:.*:]]1295; ORIGIN-NEXT:    [[TMP0:%.*]] = load i1, ptr @__msan_param_tls, align 81296; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41297; ORIGIN-NEXT:    [[TMP2:%.*]] = load { i64, i64 }, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 81298; ORIGIN-NEXT:    [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 41299; ORIGIN-NEXT:    [[TMP4:%.*]] = load { i64, i64 }, ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 81300; ORIGIN-NEXT:    [[TMP5:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 24), align 41301; ORIGIN-NEXT:    call void @llvm.donothing()1302; ORIGIN-NEXT:    [[TMP6:%.*]] = select i1 [[X]], { i64, i64 } [[TMP2]], { i64, i64 } [[TMP4]]1303; ORIGIN-NEXT:    [[_MSPROP_SELECT:%.*]] = select i1 [[TMP0]], { i64, i64 } { i64 -1, i64 -1 }, { i64, i64 } [[TMP6]]1304; ORIGIN-NEXT:    [[TMP7:%.*]] = select i1 [[X]], i32 [[TMP3]], i32 [[TMP5]]1305; ORIGIN-NEXT:    [[TMP8:%.*]] = select i1 [[TMP0]], i32 [[TMP1]], i32 [[TMP7]]1306; ORIGIN-NEXT:    [[C:%.*]] = select i1 [[X]], { i64, i64 } [[A]], { i64, i64 } [[B]]1307; ORIGIN-NEXT:    store { i64, i64 } [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81308; ORIGIN-NEXT:    store i32 [[TMP8]], ptr @__msan_retval_origin_tls, align 41309; ORIGIN-NEXT:    ret { i64, i64 } [[C]]1310;1311; CALLS-LABEL: define { i64, i64 } @SelectStruct(1312; CALLS-SAME: i1 zeroext [[X:%.*]], { i64, i64 } [[A:%.*]], { i64, i64 } [[B:%.*]]) #[[ATTR6:[0-9]+]] {1313; CALLS-NEXT:  [[ENTRY:.*:]]1314; CALLS-NEXT:    [[TMP0:%.*]] = load i1, ptr @__msan_param_tls, align 81315; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41316; CALLS-NEXT:    [[TMP2:%.*]] = load { i64, i64 }, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 81317; CALLS-NEXT:    [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 41318; CALLS-NEXT:    [[TMP4:%.*]] = load { i64, i64 }, ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 81319; CALLS-NEXT:    [[TMP5:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 24), align 41320; CALLS-NEXT:    call void @llvm.donothing()1321; CALLS-NEXT:    [[TMP6:%.*]] = select i1 [[X]], { i64, i64 } [[TMP2]], { i64, i64 } [[TMP4]]1322; CALLS-NEXT:    [[_MSPROP_SELECT:%.*]] = select i1 [[TMP0]], { i64, i64 } { i64 -1, i64 -1 }, { i64, i64 } [[TMP6]]1323; CALLS-NEXT:    [[TMP7:%.*]] = select i1 [[X]], i32 [[TMP3]], i32 [[TMP5]]1324; CALLS-NEXT:    [[TMP8:%.*]] = select i1 [[TMP0]], i32 [[TMP1]], i32 [[TMP7]]1325; CALLS-NEXT:    [[C:%.*]] = select i1 [[X]], { i64, i64 } [[A]], { i64, i64 } [[B]]1326; CALLS-NEXT:    store { i64, i64 } [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81327; CALLS-NEXT:    store i32 [[TMP8]], ptr @__msan_retval_origin_tls, align 41328; CALLS-NEXT:    ret { i64, i64 } [[C]]1329;1330entry:1331  %c = select i1 %x, { i64, i64 } %a, { i64, i64 } %b1332  ret { i64, i64 } %c1333}1334 1335define { ptr, double } @SelectStruct2(i1 zeroext %x, { ptr, double } %a, { ptr, double } %b) readnone sanitize_memory {1336; CHECK-LABEL: define { ptr, double } @SelectStruct2(1337; CHECK-SAME: i1 zeroext [[X:%.*]], { ptr, double } [[A:%.*]], { ptr, double } [[B:%.*]]) #[[ATTR6]] {1338; CHECK-NEXT:  [[ENTRY:.*:]]1339; CHECK-NEXT:    [[TMP0:%.*]] = load i1, ptr @__msan_param_tls, align 81340; CHECK-NEXT:    [[TMP1:%.*]] = load { i64, i64 }, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 81341; CHECK-NEXT:    [[TMP2:%.*]] = load { i64, i64 }, ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 81342; CHECK-NEXT:    call void @llvm.donothing()1343; CHECK-NEXT:    [[TMP3:%.*]] = select i1 [[X]], { i64, i64 } [[TMP1]], { i64, i64 } [[TMP2]]1344; CHECK-NEXT:    [[_MSPROP_SELECT:%.*]] = select i1 [[TMP0]], { i64, i64 } { i64 -1, i64 -1 }, { i64, i64 } [[TMP3]]1345; CHECK-NEXT:    [[C:%.*]] = select i1 [[X]], { ptr, double } [[A]], { ptr, double } [[B]]1346; CHECK-NEXT:    store { i64, i64 } [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81347; CHECK-NEXT:    ret { ptr, double } [[C]]1348;1349; ORIGIN-LABEL: define { ptr, double } @SelectStruct2(1350; ORIGIN-SAME: i1 zeroext [[X:%.*]], { ptr, double } [[A:%.*]], { ptr, double } [[B:%.*]]) #[[ATTR6]] {1351; ORIGIN-NEXT:  [[ENTRY:.*:]]1352; ORIGIN-NEXT:    [[TMP0:%.*]] = load i1, ptr @__msan_param_tls, align 81353; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41354; ORIGIN-NEXT:    [[TMP2:%.*]] = load { i64, i64 }, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 81355; ORIGIN-NEXT:    [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 41356; ORIGIN-NEXT:    [[TMP4:%.*]] = load { i64, i64 }, ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 81357; ORIGIN-NEXT:    [[TMP5:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 24), align 41358; ORIGIN-NEXT:    call void @llvm.donothing()1359; ORIGIN-NEXT:    [[TMP6:%.*]] = select i1 [[X]], { i64, i64 } [[TMP2]], { i64, i64 } [[TMP4]]1360; ORIGIN-NEXT:    [[_MSPROP_SELECT:%.*]] = select i1 [[TMP0]], { i64, i64 } { i64 -1, i64 -1 }, { i64, i64 } [[TMP6]]1361; ORIGIN-NEXT:    [[TMP7:%.*]] = select i1 [[X]], i32 [[TMP3]], i32 [[TMP5]]1362; ORIGIN-NEXT:    [[TMP8:%.*]] = select i1 [[TMP0]], i32 [[TMP1]], i32 [[TMP7]]1363; ORIGIN-NEXT:    [[C:%.*]] = select i1 [[X]], { ptr, double } [[A]], { ptr, double } [[B]]1364; ORIGIN-NEXT:    store { i64, i64 } [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81365; ORIGIN-NEXT:    store i32 [[TMP8]], ptr @__msan_retval_origin_tls, align 41366; ORIGIN-NEXT:    ret { ptr, double } [[C]]1367;1368; CALLS-LABEL: define { ptr, double } @SelectStruct2(1369; CALLS-SAME: i1 zeroext [[X:%.*]], { ptr, double } [[A:%.*]], { ptr, double } [[B:%.*]]) #[[ATTR6]] {1370; CALLS-NEXT:  [[ENTRY:.*:]]1371; CALLS-NEXT:    [[TMP0:%.*]] = load i1, ptr @__msan_param_tls, align 81372; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41373; CALLS-NEXT:    [[TMP2:%.*]] = load { i64, i64 }, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 81374; CALLS-NEXT:    [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 41375; CALLS-NEXT:    [[TMP4:%.*]] = load { i64, i64 }, ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 81376; CALLS-NEXT:    [[TMP5:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 24), align 41377; CALLS-NEXT:    call void @llvm.donothing()1378; CALLS-NEXT:    [[TMP6:%.*]] = select i1 [[X]], { i64, i64 } [[TMP2]], { i64, i64 } [[TMP4]]1379; CALLS-NEXT:    [[_MSPROP_SELECT:%.*]] = select i1 [[TMP0]], { i64, i64 } { i64 -1, i64 -1 }, { i64, i64 } [[TMP6]]1380; CALLS-NEXT:    [[TMP7:%.*]] = select i1 [[X]], i32 [[TMP3]], i32 [[TMP5]]1381; CALLS-NEXT:    [[TMP8:%.*]] = select i1 [[TMP0]], i32 [[TMP1]], i32 [[TMP7]]1382; CALLS-NEXT:    [[C:%.*]] = select i1 [[X]], { ptr, double } [[A]], { ptr, double } [[B]]1383; CALLS-NEXT:    store { i64, i64 } [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 81384; CALLS-NEXT:    store i32 [[TMP8]], ptr @__msan_retval_origin_tls, align 41385; CALLS-NEXT:    ret { ptr, double } [[C]]1386;1387entry:1388  %c = select i1 %x, { ptr, double } %a, { ptr, double } %b1389  ret { ptr, double } %c1390}1391 1392define ptr @IntToPtr(i64 %x) nounwind uwtable readnone sanitize_memory {1393; CHECK-LABEL: define ptr @IntToPtr(1394; CHECK-SAME: i64 [[X:%.*]]) #[[ATTR0]] {1395; CHECK-NEXT:  [[ENTRY:.*:]]1396; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 81397; CHECK-NEXT:    call void @llvm.donothing()1398; CHECK-NEXT:    [[TMP1:%.*]] = inttoptr i64 [[X]] to ptr1399; CHECK-NEXT:    store i64 [[TMP0]], ptr @__msan_retval_tls, align 81400; CHECK-NEXT:    ret ptr [[TMP1]]1401;1402; ORIGIN-LABEL: define ptr @IntToPtr(1403; ORIGIN-SAME: i64 [[X:%.*]]) #[[ATTR0]] {1404; ORIGIN-NEXT:  [[ENTRY:.*:]]1405; ORIGIN-NEXT:    [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 81406; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41407; ORIGIN-NEXT:    call void @llvm.donothing()1408; ORIGIN-NEXT:    [[TMP2:%.*]] = inttoptr i64 [[X]] to ptr1409; ORIGIN-NEXT:    store i64 [[TMP0]], ptr @__msan_retval_tls, align 81410; ORIGIN-NEXT:    store i32 [[TMP1]], ptr @__msan_retval_origin_tls, align 41411; ORIGIN-NEXT:    ret ptr [[TMP2]]1412;1413; CALLS-LABEL: define ptr @IntToPtr(1414; CALLS-SAME: i64 [[X:%.*]]) #[[ATTR0]] {1415; CALLS-NEXT:  [[ENTRY:.*:]]1416; CALLS-NEXT:    [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 81417; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41418; CALLS-NEXT:    call void @llvm.donothing()1419; CALLS-NEXT:    [[TMP2:%.*]] = inttoptr i64 [[X]] to ptr1420; CALLS-NEXT:    store i64 [[TMP0]], ptr @__msan_retval_tls, align 81421; CALLS-NEXT:    store i32 [[TMP1]], ptr @__msan_retval_origin_tls, align 41422; CALLS-NEXT:    ret ptr [[TMP2]]1423;1424entry:1425  %0 = inttoptr i64 %x to ptr1426  ret ptr %01427}1428 1429define ptr @IntToPtr_ZExt(i16 %x) nounwind uwtable readnone sanitize_memory {1430; CHECK-LABEL: define ptr @IntToPtr_ZExt(1431; CHECK-SAME: i16 [[X:%.*]]) #[[ATTR0]] {1432; CHECK-NEXT:  [[ENTRY:.*:]]1433; CHECK-NEXT:    [[TMP0:%.*]] = load i16, ptr @__msan_param_tls, align 81434; CHECK-NEXT:    call void @llvm.donothing()1435; CHECK-NEXT:    [[_MSPROP_INTTOPTR:%.*]] = zext i16 [[TMP0]] to i641436; CHECK-NEXT:    [[TMP1:%.*]] = inttoptr i16 [[X]] to ptr1437; CHECK-NEXT:    store i64 [[_MSPROP_INTTOPTR]], ptr @__msan_retval_tls, align 81438; CHECK-NEXT:    ret ptr [[TMP1]]1439;1440; ORIGIN-LABEL: define ptr @IntToPtr_ZExt(1441; ORIGIN-SAME: i16 [[X:%.*]]) #[[ATTR0]] {1442; ORIGIN-NEXT:  [[ENTRY:.*:]]1443; ORIGIN-NEXT:    [[TMP0:%.*]] = load i16, ptr @__msan_param_tls, align 81444; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41445; ORIGIN-NEXT:    call void @llvm.donothing()1446; ORIGIN-NEXT:    [[_MSPROP_INTTOPTR:%.*]] = zext i16 [[TMP0]] to i641447; ORIGIN-NEXT:    [[TMP2:%.*]] = inttoptr i16 [[X]] to ptr1448; ORIGIN-NEXT:    store i64 [[_MSPROP_INTTOPTR]], ptr @__msan_retval_tls, align 81449; ORIGIN-NEXT:    store i32 [[TMP1]], ptr @__msan_retval_origin_tls, align 41450; ORIGIN-NEXT:    ret ptr [[TMP2]]1451;1452; CALLS-LABEL: define ptr @IntToPtr_ZExt(1453; CALLS-SAME: i16 [[X:%.*]]) #[[ATTR0]] {1454; CALLS-NEXT:  [[ENTRY:.*:]]1455; CALLS-NEXT:    [[TMP0:%.*]] = load i16, ptr @__msan_param_tls, align 81456; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41457; CALLS-NEXT:    call void @llvm.donothing()1458; CALLS-NEXT:    [[_MSPROP_INTTOPTR:%.*]] = zext i16 [[TMP0]] to i641459; CALLS-NEXT:    [[TMP2:%.*]] = inttoptr i16 [[X]] to ptr1460; CALLS-NEXT:    store i64 [[_MSPROP_INTTOPTR]], ptr @__msan_retval_tls, align 81461; CALLS-NEXT:    store i32 [[TMP1]], ptr @__msan_retval_origin_tls, align 41462; CALLS-NEXT:    ret ptr [[TMP2]]1463;1464entry:1465  %0 = inttoptr i16 %x to ptr1466  ret ptr %01467}1468 1469 1470 1471; Check that we insert exactly one check on udiv1472; (2nd arg shadow is checked, 1st arg shadow is propagated)1473 1474define i32 @Div(i32 %a, i32 %b) nounwind uwtable readnone sanitize_memory {1475; CHECK-LABEL: define i32 @Div(1476; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {1477; CHECK-NEXT:  [[ENTRY:.*:]]1478; CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 81479; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 81480; CHECK-NEXT:    call void @llvm.donothing()1481; CHECK-NEXT:    [[_MSCMP:%.*]] = icmp ne i32 [[TMP0]], 01482; CHECK-NEXT:    br i1 [[_MSCMP]], label %[[BB2:.*]], label %[[BB3:.*]], !prof [[PROF1]]1483; CHECK:       [[BB2]]:1484; CHECK-NEXT:    call void @__msan_warning_noreturn() #[[ATTR12]]1485; CHECK-NEXT:    unreachable1486; CHECK:       [[BB3]]:1487; CHECK-NEXT:    [[DIV:%.*]] = udiv i32 [[A]], [[B]]1488; CHECK-NEXT:    store i32 [[TMP1]], ptr @__msan_retval_tls, align 81489; CHECK-NEXT:    ret i32 [[DIV]]1490;1491; ORIGIN-LABEL: define i32 @Div(1492; ORIGIN-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {1493; ORIGIN-NEXT:  [[ENTRY:.*:]]1494; ORIGIN-NEXT:    [[TMP0:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 81495; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 41496; ORIGIN-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_tls, align 81497; ORIGIN-NEXT:    [[TMP3:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41498; ORIGIN-NEXT:    call void @llvm.donothing()1499; ORIGIN-NEXT:    [[_MSCMP:%.*]] = icmp ne i32 [[TMP0]], 01500; ORIGIN-NEXT:    br i1 [[_MSCMP]], label %[[BB4:.*]], label %[[BB5:.*]], !prof [[PROF1]]1501; ORIGIN:       [[BB4]]:1502; ORIGIN-NEXT:    call void @__msan_warning_with_origin_noreturn(i32 [[TMP1]]) #[[ATTR12]]1503; ORIGIN-NEXT:    unreachable1504; ORIGIN:       [[BB5]]:1505; ORIGIN-NEXT:    [[DIV:%.*]] = udiv i32 [[A]], [[B]]1506; ORIGIN-NEXT:    store i32 [[TMP2]], ptr @__msan_retval_tls, align 81507; ORIGIN-NEXT:    store i32 [[TMP3]], ptr @__msan_retval_origin_tls, align 41508; ORIGIN-NEXT:    ret i32 [[DIV]]1509;1510; CALLS-LABEL: define i32 @Div(1511; CALLS-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {1512; CALLS-NEXT:  [[ENTRY:.*:]]1513; CALLS-NEXT:    [[TMP0:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 81514; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 41515; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_tls, align 81516; CALLS-NEXT:    [[TMP3:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41517; CALLS-NEXT:    call void @llvm.donothing()1518; CALLS-NEXT:    call void @__msan_maybe_warning_4(i32 zeroext [[TMP0]], i32 zeroext [[TMP1]])1519; CALLS-NEXT:    [[DIV:%.*]] = udiv i32 [[A]], [[B]]1520; CALLS-NEXT:    store i32 [[TMP2]], ptr @__msan_retval_tls, align 81521; CALLS-NEXT:    store i32 [[TMP3]], ptr @__msan_retval_origin_tls, align 41522; CALLS-NEXT:    ret i32 [[DIV]]1523;1524entry:1525  %div = udiv i32 %a, %b1526  ret i32 %div1527}1528 1529; Check that fdiv, unlike udiv, simply propagates shadow.1530 1531define float @FDiv(float %a, float %b) nounwind uwtable readnone sanitize_memory {1532; CHECK-LABEL: define float @FDiv(1533; CHECK-SAME: float [[A:%.*]], float [[B:%.*]]) #[[ATTR0]] {1534; CHECK-NEXT:  [[ENTRY:.*:]]1535; CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr @__msan_param_tls, align 81536; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 81537; CHECK-NEXT:    call void @llvm.donothing()1538; CHECK-NEXT:    [[_MSPROP:%.*]] = or i32 [[TMP0]], [[TMP1]]1539; CHECK-NEXT:    [[C:%.*]] = fdiv float [[A]], [[B]]1540; CHECK-NEXT:    store i32 [[_MSPROP]], ptr @__msan_retval_tls, align 81541; CHECK-NEXT:    ret float [[C]]1542;1543; ORIGIN-LABEL: define float @FDiv(1544; ORIGIN-SAME: float [[A:%.*]], float [[B:%.*]]) #[[ATTR0]] {1545; ORIGIN-NEXT:  [[ENTRY:.*:]]1546; ORIGIN-NEXT:    [[TMP0:%.*]] = load i32, ptr @__msan_param_tls, align 81547; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41548; ORIGIN-NEXT:    [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 81549; ORIGIN-NEXT:    [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 41550; ORIGIN-NEXT:    call void @llvm.donothing()1551; ORIGIN-NEXT:    [[_MSPROP:%.*]] = or i32 [[TMP0]], [[TMP2]]1552; ORIGIN-NEXT:    [[TMP4:%.*]] = icmp ne i32 [[TMP2]], 01553; ORIGIN-NEXT:    [[TMP5:%.*]] = select i1 [[TMP4]], i32 [[TMP3]], i32 [[TMP1]]1554; ORIGIN-NEXT:    [[C:%.*]] = fdiv float [[A]], [[B]]1555; ORIGIN-NEXT:    store i32 [[_MSPROP]], ptr @__msan_retval_tls, align 81556; ORIGIN-NEXT:    store i32 [[TMP5]], ptr @__msan_retval_origin_tls, align 41557; ORIGIN-NEXT:    ret float [[C]]1558;1559; CALLS-LABEL: define float @FDiv(1560; CALLS-SAME: float [[A:%.*]], float [[B:%.*]]) #[[ATTR0]] {1561; CALLS-NEXT:  [[ENTRY:.*:]]1562; CALLS-NEXT:    [[TMP0:%.*]] = load i32, ptr @__msan_param_tls, align 81563; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41564; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 81565; CALLS-NEXT:    [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 41566; CALLS-NEXT:    call void @llvm.donothing()1567; CALLS-NEXT:    [[_MSPROP:%.*]] = or i32 [[TMP0]], [[TMP2]]1568; CALLS-NEXT:    [[TMP4:%.*]] = icmp ne i32 [[TMP2]], 01569; CALLS-NEXT:    [[TMP5:%.*]] = select i1 [[TMP4]], i32 [[TMP3]], i32 [[TMP1]]1570; CALLS-NEXT:    [[C:%.*]] = fdiv float [[A]], [[B]]1571; CALLS-NEXT:    store i32 [[_MSPROP]], ptr @__msan_retval_tls, align 81572; CALLS-NEXT:    store i32 [[TMP5]], ptr @__msan_retval_origin_tls, align 41573; CALLS-NEXT:    ret float [[C]]1574;1575entry:1576  %c = fdiv float %a, %b1577  ret float %c1578}1579 1580 1581; Check that fneg simply propagates shadow.1582 1583define float @FNeg(float %a) nounwind uwtable readnone sanitize_memory {1584; CHECK-LABEL: define float @FNeg(1585; CHECK-SAME: float [[A:%.*]]) #[[ATTR0]] {1586; CHECK-NEXT:  [[ENTRY:.*:]]1587; CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr @__msan_param_tls, align 81588; CHECK-NEXT:    call void @llvm.donothing()1589; CHECK-NEXT:    [[C:%.*]] = fneg float [[A]]1590; CHECK-NEXT:    store i32 [[TMP0]], ptr @__msan_retval_tls, align 81591; CHECK-NEXT:    ret float [[C]]1592;1593; ORIGIN-LABEL: define float @FNeg(1594; ORIGIN-SAME: float [[A:%.*]]) #[[ATTR0]] {1595; ORIGIN-NEXT:  [[ENTRY:.*:]]1596; ORIGIN-NEXT:    [[TMP0:%.*]] = load i32, ptr @__msan_param_tls, align 81597; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41598; ORIGIN-NEXT:    call void @llvm.donothing()1599; ORIGIN-NEXT:    [[C:%.*]] = fneg float [[A]]1600; ORIGIN-NEXT:    store i32 [[TMP0]], ptr @__msan_retval_tls, align 81601; ORIGIN-NEXT:    store i32 [[TMP1]], ptr @__msan_retval_origin_tls, align 41602; ORIGIN-NEXT:    ret float [[C]]1603;1604; CALLS-LABEL: define float @FNeg(1605; CALLS-SAME: float [[A:%.*]]) #[[ATTR0]] {1606; CALLS-NEXT:  [[ENTRY:.*:]]1607; CALLS-NEXT:    [[TMP0:%.*]] = load i32, ptr @__msan_param_tls, align 81608; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41609; CALLS-NEXT:    call void @llvm.donothing()1610; CALLS-NEXT:    [[C:%.*]] = fneg float [[A]]1611; CALLS-NEXT:    store i32 [[TMP0]], ptr @__msan_retval_tls, align 81612; CALLS-NEXT:    store i32 [[TMP1]], ptr @__msan_retval_origin_tls, align 41613; CALLS-NEXT:    ret float [[C]]1614;1615entry:1616  %c = fneg float %a1617  ret float %c1618}1619 1620define zeroext i1 @ICmpSLTZero(i32 %x) nounwind uwtable readnone sanitize_memory {1621; CHECK-LABEL: define zeroext i1 @ICmpSLTZero(1622; CHECK-SAME: i32 [[X:%.*]]) #[[ATTR0]] {1623; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 81624; CHECK-NEXT:    call void @llvm.donothing()1625; CHECK-NEXT:    [[TMP2:%.*]] = xor i32 [[X]], -21474836481626; CHECK-NEXT:    [[TMP3:%.*]] = xor i32 [[TMP1]], -11627; CHECK-NEXT:    [[TMP4:%.*]] = and i32 [[TMP2]], [[TMP3]]1628; CHECK-NEXT:    [[TMP5:%.*]] = or i32 [[TMP2]], [[TMP1]]1629; CHECK-NEXT:    [[TMP8:%.*]] = icmp ult i32 [[TMP4]], -21474836481630; CHECK-NEXT:    [[TMP15:%.*]] = icmp ult i32 [[TMP5]], -21474836481631; CHECK-NEXT:    [[TMP16:%.*]] = xor i1 [[TMP8]], [[TMP15]]1632; CHECK-NEXT:    [[TMP17:%.*]] = icmp slt i32 [[X]], 01633; CHECK-NEXT:    store i1 [[TMP16]], ptr @__msan_retval_tls, align 81634; CHECK-NEXT:    ret i1 [[TMP17]]1635;1636; ORIGIN-LABEL: define zeroext i1 @ICmpSLTZero(1637; ORIGIN-SAME: i32 [[X:%.*]]) #[[ATTR0]] {1638; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 81639; ORIGIN-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41640; ORIGIN-NEXT:    call void @llvm.donothing()1641; ORIGIN-NEXT:    [[TMP3:%.*]] = xor i32 [[X]], -21474836481642; ORIGIN-NEXT:    [[TMP4:%.*]] = xor i32 [[TMP1]], -11643; ORIGIN-NEXT:    [[TMP5:%.*]] = and i32 [[TMP3]], [[TMP4]]1644; ORIGIN-NEXT:    [[TMP6:%.*]] = or i32 [[TMP3]], [[TMP1]]1645; ORIGIN-NEXT:    [[TMP9:%.*]] = icmp ult i32 [[TMP5]], -21474836481646; ORIGIN-NEXT:    [[TMP16:%.*]] = icmp ult i32 [[TMP6]], -21474836481647; ORIGIN-NEXT:    [[TMP17:%.*]] = xor i1 [[TMP9]], [[TMP16]]1648; ORIGIN-NEXT:    [[TMP18:%.*]] = icmp slt i32 [[X]], 01649; ORIGIN-NEXT:    store i1 [[TMP17]], ptr @__msan_retval_tls, align 81650; ORIGIN-NEXT:    store i32 [[TMP2]], ptr @__msan_retval_origin_tls, align 41651; ORIGIN-NEXT:    ret i1 [[TMP18]]1652;1653; CALLS-LABEL: define zeroext i1 @ICmpSLTZero(1654; CALLS-SAME: i32 [[X:%.*]]) #[[ATTR0]] {1655; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 81656; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41657; CALLS-NEXT:    call void @llvm.donothing()1658; CALLS-NEXT:    [[TMP3:%.*]] = xor i32 [[X]], -21474836481659; CALLS-NEXT:    [[TMP4:%.*]] = xor i32 [[TMP1]], -11660; CALLS-NEXT:    [[TMP5:%.*]] = and i32 [[TMP3]], [[TMP4]]1661; CALLS-NEXT:    [[TMP6:%.*]] = or i32 [[TMP3]], [[TMP1]]1662; CALLS-NEXT:    [[TMP9:%.*]] = icmp ult i32 [[TMP5]], -21474836481663; CALLS-NEXT:    [[TMP16:%.*]] = icmp ult i32 [[TMP6]], -21474836481664; CALLS-NEXT:    [[TMP17:%.*]] = xor i1 [[TMP9]], [[TMP16]]1665; CALLS-NEXT:    [[TMP18:%.*]] = icmp slt i32 [[X]], 01666; CALLS-NEXT:    store i1 [[TMP17]], ptr @__msan_retval_tls, align 81667; CALLS-NEXT:    store i32 [[TMP2]], ptr @__msan_retval_origin_tls, align 41668; CALLS-NEXT:    ret i1 [[TMP18]]1669;1670  %1 = icmp slt i32 %x, 01671  ret i1 %11672}1673 1674 1675define zeroext i1 @ICmpSGEZero(i32 %x) nounwind uwtable readnone sanitize_memory {1676; CHECK-LABEL: define zeroext i1 @ICmpSGEZero(1677; CHECK-SAME: i32 [[X:%.*]]) #[[ATTR0]] {1678; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 81679; CHECK-NEXT:    call void @llvm.donothing()1680; CHECK-NEXT:    [[TMP2:%.*]] = xor i32 [[X]], -21474836481681; CHECK-NEXT:    [[TMP3:%.*]] = xor i32 [[TMP1]], -11682; CHECK-NEXT:    [[TMP4:%.*]] = and i32 [[TMP2]], [[TMP3]]1683; CHECK-NEXT:    [[TMP5:%.*]] = or i32 [[TMP2]], [[TMP1]]1684; CHECK-NEXT:    [[TMP8:%.*]] = icmp uge i32 [[TMP4]], -21474836481685; CHECK-NEXT:    [[TMP15:%.*]] = icmp uge i32 [[TMP5]], -21474836481686; CHECK-NEXT:    [[TMP16:%.*]] = xor i1 [[TMP8]], [[TMP15]]1687; CHECK-NEXT:    [[TMP17:%.*]] = icmp sge i32 [[X]], 01688; CHECK-NEXT:    store i1 [[TMP16]], ptr @__msan_retval_tls, align 81689; CHECK-NEXT:    ret i1 [[TMP17]]1690;1691; ORIGIN-LABEL: define zeroext i1 @ICmpSGEZero(1692; ORIGIN-SAME: i32 [[X:%.*]]) #[[ATTR0]] {1693; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 81694; ORIGIN-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41695; ORIGIN-NEXT:    call void @llvm.donothing()1696; ORIGIN-NEXT:    [[TMP3:%.*]] = xor i32 [[X]], -21474836481697; ORIGIN-NEXT:    [[TMP4:%.*]] = xor i32 [[TMP1]], -11698; ORIGIN-NEXT:    [[TMP5:%.*]] = and i32 [[TMP3]], [[TMP4]]1699; ORIGIN-NEXT:    [[TMP6:%.*]] = or i32 [[TMP3]], [[TMP1]]1700; ORIGIN-NEXT:    [[TMP9:%.*]] = icmp uge i32 [[TMP5]], -21474836481701; ORIGIN-NEXT:    [[TMP16:%.*]] = icmp uge i32 [[TMP6]], -21474836481702; ORIGIN-NEXT:    [[TMP17:%.*]] = xor i1 [[TMP9]], [[TMP16]]1703; ORIGIN-NEXT:    [[TMP18:%.*]] = icmp sge i32 [[X]], 01704; ORIGIN-NEXT:    store i1 [[TMP17]], ptr @__msan_retval_tls, align 81705; ORIGIN-NEXT:    store i32 [[TMP2]], ptr @__msan_retval_origin_tls, align 41706; ORIGIN-NEXT:    ret i1 [[TMP18]]1707;1708; CALLS-LABEL: define zeroext i1 @ICmpSGEZero(1709; CALLS-SAME: i32 [[X:%.*]]) #[[ATTR0]] {1710; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 81711; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41712; CALLS-NEXT:    call void @llvm.donothing()1713; CALLS-NEXT:    [[TMP3:%.*]] = xor i32 [[X]], -21474836481714; CALLS-NEXT:    [[TMP4:%.*]] = xor i32 [[TMP1]], -11715; CALLS-NEXT:    [[TMP5:%.*]] = and i32 [[TMP3]], [[TMP4]]1716; CALLS-NEXT:    [[TMP6:%.*]] = or i32 [[TMP3]], [[TMP1]]1717; CALLS-NEXT:    [[TMP9:%.*]] = icmp uge i32 [[TMP5]], -21474836481718; CALLS-NEXT:    [[TMP16:%.*]] = icmp uge i32 [[TMP6]], -21474836481719; CALLS-NEXT:    [[TMP17:%.*]] = xor i1 [[TMP9]], [[TMP16]]1720; CALLS-NEXT:    [[TMP18:%.*]] = icmp sge i32 [[X]], 01721; CALLS-NEXT:    store i1 [[TMP17]], ptr @__msan_retval_tls, align 81722; CALLS-NEXT:    store i32 [[TMP2]], ptr @__msan_retval_origin_tls, align 41723; CALLS-NEXT:    ret i1 [[TMP18]]1724;1725  %1 = icmp sge i32 %x, 01726  ret i1 %11727}1728 1729 1730define zeroext i1 @ICmpSGTZero(i32 %x) nounwind uwtable readnone sanitize_memory {1731; CHECK-LABEL: define zeroext i1 @ICmpSGTZero(1732; CHECK-SAME: i32 [[X:%.*]]) #[[ATTR0]] {1733; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 81734; CHECK-NEXT:    call void @llvm.donothing()1735; CHECK-NEXT:    [[TMP2:%.*]] = xor i32 [[X]], -21474836481736; CHECK-NEXT:    [[TMP3:%.*]] = xor i32 [[TMP1]], -11737; CHECK-NEXT:    [[TMP4:%.*]] = and i32 [[TMP2]], [[TMP3]]1738; CHECK-NEXT:    [[TMP5:%.*]] = or i32 [[TMP2]], [[TMP1]]1739; CHECK-NEXT:    [[TMP8:%.*]] = icmp ugt i32 -2147483648, [[TMP5]]1740; CHECK-NEXT:    [[TMP15:%.*]] = icmp ugt i32 -2147483648, [[TMP4]]1741; CHECK-NEXT:    [[TMP16:%.*]] = xor i1 [[TMP8]], [[TMP15]]1742; CHECK-NEXT:    [[TMP17:%.*]] = icmp sgt i32 0, [[X]]1743; CHECK-NEXT:    store i1 [[TMP16]], ptr @__msan_retval_tls, align 81744; CHECK-NEXT:    ret i1 [[TMP17]]1745;1746; ORIGIN-LABEL: define zeroext i1 @ICmpSGTZero(1747; ORIGIN-SAME: i32 [[X:%.*]]) #[[ATTR0]] {1748; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 81749; ORIGIN-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41750; ORIGIN-NEXT:    call void @llvm.donothing()1751; ORIGIN-NEXT:    [[TMP3:%.*]] = xor i32 [[X]], -21474836481752; ORIGIN-NEXT:    [[TMP4:%.*]] = xor i32 [[TMP1]], -11753; ORIGIN-NEXT:    [[TMP5:%.*]] = and i32 [[TMP3]], [[TMP4]]1754; ORIGIN-NEXT:    [[TMP6:%.*]] = or i32 [[TMP3]], [[TMP1]]1755; ORIGIN-NEXT:    [[TMP9:%.*]] = icmp ugt i32 -2147483648, [[TMP6]]1756; ORIGIN-NEXT:    [[TMP16:%.*]] = icmp ugt i32 -2147483648, [[TMP5]]1757; ORIGIN-NEXT:    [[TMP17:%.*]] = xor i1 [[TMP9]], [[TMP16]]1758; ORIGIN-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP1]], 01759; ORIGIN-NEXT:    [[TMP19:%.*]] = select i1 [[TMP18]], i32 [[TMP2]], i32 01760; ORIGIN-NEXT:    [[TMP20:%.*]] = icmp sgt i32 0, [[X]]1761; ORIGIN-NEXT:    store i1 [[TMP17]], ptr @__msan_retval_tls, align 81762; ORIGIN-NEXT:    store i32 [[TMP19]], ptr @__msan_retval_origin_tls, align 41763; ORIGIN-NEXT:    ret i1 [[TMP20]]1764;1765; CALLS-LABEL: define zeroext i1 @ICmpSGTZero(1766; CALLS-SAME: i32 [[X:%.*]]) #[[ATTR0]] {1767; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 81768; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41769; CALLS-NEXT:    call void @llvm.donothing()1770; CALLS-NEXT:    [[TMP3:%.*]] = xor i32 [[X]], -21474836481771; CALLS-NEXT:    [[TMP4:%.*]] = xor i32 [[TMP1]], -11772; CALLS-NEXT:    [[TMP5:%.*]] = and i32 [[TMP3]], [[TMP4]]1773; CALLS-NEXT:    [[TMP6:%.*]] = or i32 [[TMP3]], [[TMP1]]1774; CALLS-NEXT:    [[TMP9:%.*]] = icmp ugt i32 -2147483648, [[TMP6]]1775; CALLS-NEXT:    [[TMP16:%.*]] = icmp ugt i32 -2147483648, [[TMP5]]1776; CALLS-NEXT:    [[TMP17:%.*]] = xor i1 [[TMP9]], [[TMP16]]1777; CALLS-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP1]], 01778; CALLS-NEXT:    [[TMP19:%.*]] = select i1 [[TMP18]], i32 [[TMP2]], i32 01779; CALLS-NEXT:    [[TMP20:%.*]] = icmp sgt i32 0, [[X]]1780; CALLS-NEXT:    store i1 [[TMP17]], ptr @__msan_retval_tls, align 81781; CALLS-NEXT:    store i32 [[TMP19]], ptr @__msan_retval_origin_tls, align 41782; CALLS-NEXT:    ret i1 [[TMP20]]1783;1784  %1 = icmp sgt i32 0, %x1785  ret i1 %11786}1787 1788 1789define zeroext i1 @ICmpSLEZero(i32 %x) nounwind uwtable readnone sanitize_memory {1790; CHECK-LABEL: define zeroext i1 @ICmpSLEZero(1791; CHECK-SAME: i32 [[X:%.*]]) #[[ATTR0]] {1792; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 81793; CHECK-NEXT:    call void @llvm.donothing()1794; CHECK-NEXT:    [[TMP2:%.*]] = xor i32 [[X]], -21474836481795; CHECK-NEXT:    [[TMP3:%.*]] = xor i32 [[TMP1]], -11796; CHECK-NEXT:    [[TMP4:%.*]] = and i32 [[TMP2]], [[TMP3]]1797; CHECK-NEXT:    [[TMP5:%.*]] = or i32 [[TMP2]], [[TMP1]]1798; CHECK-NEXT:    [[TMP8:%.*]] = icmp ule i32 -2147483648, [[TMP5]]1799; CHECK-NEXT:    [[TMP15:%.*]] = icmp ule i32 -2147483648, [[TMP4]]1800; CHECK-NEXT:    [[TMP16:%.*]] = xor i1 [[TMP8]], [[TMP15]]1801; CHECK-NEXT:    [[TMP17:%.*]] = icmp sle i32 0, [[X]]1802; CHECK-NEXT:    store i1 [[TMP16]], ptr @__msan_retval_tls, align 81803; CHECK-NEXT:    ret i1 [[TMP17]]1804;1805; ORIGIN-LABEL: define zeroext i1 @ICmpSLEZero(1806; ORIGIN-SAME: i32 [[X:%.*]]) #[[ATTR0]] {1807; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 81808; ORIGIN-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41809; ORIGIN-NEXT:    call void @llvm.donothing()1810; ORIGIN-NEXT:    [[TMP3:%.*]] = xor i32 [[X]], -21474836481811; ORIGIN-NEXT:    [[TMP4:%.*]] = xor i32 [[TMP1]], -11812; ORIGIN-NEXT:    [[TMP5:%.*]] = and i32 [[TMP3]], [[TMP4]]1813; ORIGIN-NEXT:    [[TMP6:%.*]] = or i32 [[TMP3]], [[TMP1]]1814; ORIGIN-NEXT:    [[TMP9:%.*]] = icmp ule i32 -2147483648, [[TMP6]]1815; ORIGIN-NEXT:    [[TMP16:%.*]] = icmp ule i32 -2147483648, [[TMP5]]1816; ORIGIN-NEXT:    [[TMP17:%.*]] = xor i1 [[TMP9]], [[TMP16]]1817; ORIGIN-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP1]], 01818; ORIGIN-NEXT:    [[TMP19:%.*]] = select i1 [[TMP18]], i32 [[TMP2]], i32 01819; ORIGIN-NEXT:    [[TMP20:%.*]] = icmp sle i32 0, [[X]]1820; ORIGIN-NEXT:    store i1 [[TMP17]], ptr @__msan_retval_tls, align 81821; ORIGIN-NEXT:    store i32 [[TMP19]], ptr @__msan_retval_origin_tls, align 41822; ORIGIN-NEXT:    ret i1 [[TMP20]]1823;1824; CALLS-LABEL: define zeroext i1 @ICmpSLEZero(1825; CALLS-SAME: i32 [[X:%.*]]) #[[ATTR0]] {1826; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 81827; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41828; CALLS-NEXT:    call void @llvm.donothing()1829; CALLS-NEXT:    [[TMP3:%.*]] = xor i32 [[X]], -21474836481830; CALLS-NEXT:    [[TMP4:%.*]] = xor i32 [[TMP1]], -11831; CALLS-NEXT:    [[TMP5:%.*]] = and i32 [[TMP3]], [[TMP4]]1832; CALLS-NEXT:    [[TMP6:%.*]] = or i32 [[TMP3]], [[TMP1]]1833; CALLS-NEXT:    [[TMP9:%.*]] = icmp ule i32 -2147483648, [[TMP6]]1834; CALLS-NEXT:    [[TMP16:%.*]] = icmp ule i32 -2147483648, [[TMP5]]1835; CALLS-NEXT:    [[TMP17:%.*]] = xor i1 [[TMP9]], [[TMP16]]1836; CALLS-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP1]], 01837; CALLS-NEXT:    [[TMP19:%.*]] = select i1 [[TMP18]], i32 [[TMP2]], i32 01838; CALLS-NEXT:    [[TMP20:%.*]] = icmp sle i32 0, [[X]]1839; CALLS-NEXT:    store i1 [[TMP17]], ptr @__msan_retval_tls, align 81840; CALLS-NEXT:    store i32 [[TMP19]], ptr @__msan_retval_origin_tls, align 41841; CALLS-NEXT:    ret i1 [[TMP20]]1842;1843  %1 = icmp sle i32 0, %x1844  ret i1 %11845}1846 1847 1848 1849; Check that we propagate shadow for x<=-1, x>-1, etc (i.e. sign bit tests)1850 1851define zeroext i1 @ICmpSLTAllOnes(i32 %x) nounwind uwtable readnone sanitize_memory {1852; CHECK-LABEL: define zeroext i1 @ICmpSLTAllOnes(1853; CHECK-SAME: i32 [[X:%.*]]) #[[ATTR0]] {1854; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 81855; CHECK-NEXT:    call void @llvm.donothing()1856; CHECK-NEXT:    [[TMP2:%.*]] = xor i32 [[X]], -21474836481857; CHECK-NEXT:    [[TMP3:%.*]] = xor i32 [[TMP1]], -11858; CHECK-NEXT:    [[TMP4:%.*]] = and i32 [[TMP2]], [[TMP3]]1859; CHECK-NEXT:    [[TMP5:%.*]] = or i32 [[TMP2]], [[TMP1]]1860; CHECK-NEXT:    [[TMP8:%.*]] = icmp ult i32 2147483647, [[TMP5]]1861; CHECK-NEXT:    [[TMP15:%.*]] = icmp ult i32 2147483647, [[TMP4]]1862; CHECK-NEXT:    [[TMP16:%.*]] = xor i1 [[TMP8]], [[TMP15]]1863; CHECK-NEXT:    [[TMP17:%.*]] = icmp slt i32 -1, [[X]]1864; CHECK-NEXT:    store i1 [[TMP16]], ptr @__msan_retval_tls, align 81865; CHECK-NEXT:    ret i1 [[TMP17]]1866;1867; ORIGIN-LABEL: define zeroext i1 @ICmpSLTAllOnes(1868; ORIGIN-SAME: i32 [[X:%.*]]) #[[ATTR0]] {1869; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 81870; ORIGIN-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41871; ORIGIN-NEXT:    call void @llvm.donothing()1872; ORIGIN-NEXT:    [[TMP3:%.*]] = xor i32 [[X]], -21474836481873; ORIGIN-NEXT:    [[TMP4:%.*]] = xor i32 [[TMP1]], -11874; ORIGIN-NEXT:    [[TMP5:%.*]] = and i32 [[TMP3]], [[TMP4]]1875; ORIGIN-NEXT:    [[TMP6:%.*]] = or i32 [[TMP3]], [[TMP1]]1876; ORIGIN-NEXT:    [[TMP9:%.*]] = icmp ult i32 2147483647, [[TMP6]]1877; ORIGIN-NEXT:    [[TMP16:%.*]] = icmp ult i32 2147483647, [[TMP5]]1878; ORIGIN-NEXT:    [[TMP17:%.*]] = xor i1 [[TMP9]], [[TMP16]]1879; ORIGIN-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP1]], 01880; ORIGIN-NEXT:    [[TMP19:%.*]] = select i1 [[TMP18]], i32 [[TMP2]], i32 01881; ORIGIN-NEXT:    [[TMP20:%.*]] = icmp slt i32 -1, [[X]]1882; ORIGIN-NEXT:    store i1 [[TMP17]], ptr @__msan_retval_tls, align 81883; ORIGIN-NEXT:    store i32 [[TMP19]], ptr @__msan_retval_origin_tls, align 41884; ORIGIN-NEXT:    ret i1 [[TMP20]]1885;1886; CALLS-LABEL: define zeroext i1 @ICmpSLTAllOnes(1887; CALLS-SAME: i32 [[X:%.*]]) #[[ATTR0]] {1888; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 81889; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41890; CALLS-NEXT:    call void @llvm.donothing()1891; CALLS-NEXT:    [[TMP3:%.*]] = xor i32 [[X]], -21474836481892; CALLS-NEXT:    [[TMP4:%.*]] = xor i32 [[TMP1]], -11893; CALLS-NEXT:    [[TMP5:%.*]] = and i32 [[TMP3]], [[TMP4]]1894; CALLS-NEXT:    [[TMP6:%.*]] = or i32 [[TMP3]], [[TMP1]]1895; CALLS-NEXT:    [[TMP9:%.*]] = icmp ult i32 2147483647, [[TMP6]]1896; CALLS-NEXT:    [[TMP16:%.*]] = icmp ult i32 2147483647, [[TMP5]]1897; CALLS-NEXT:    [[TMP17:%.*]] = xor i1 [[TMP9]], [[TMP16]]1898; CALLS-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP1]], 01899; CALLS-NEXT:    [[TMP19:%.*]] = select i1 [[TMP18]], i32 [[TMP2]], i32 01900; CALLS-NEXT:    [[TMP20:%.*]] = icmp slt i32 -1, [[X]]1901; CALLS-NEXT:    store i1 [[TMP17]], ptr @__msan_retval_tls, align 81902; CALLS-NEXT:    store i32 [[TMP19]], ptr @__msan_retval_origin_tls, align 41903; CALLS-NEXT:    ret i1 [[TMP20]]1904;1905  %1 = icmp slt i32 -1, %x1906  ret i1 %11907}1908 1909 1910define zeroext i1 @ICmpSGEAllOnes(i32 %x) nounwind uwtable readnone sanitize_memory {1911; CHECK-LABEL: define zeroext i1 @ICmpSGEAllOnes(1912; CHECK-SAME: i32 [[X:%.*]]) #[[ATTR0]] {1913; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 81914; CHECK-NEXT:    call void @llvm.donothing()1915; CHECK-NEXT:    [[TMP2:%.*]] = xor i32 [[X]], -21474836481916; CHECK-NEXT:    [[TMP3:%.*]] = xor i32 [[TMP1]], -11917; CHECK-NEXT:    [[TMP4:%.*]] = and i32 [[TMP2]], [[TMP3]]1918; CHECK-NEXT:    [[TMP5:%.*]] = or i32 [[TMP2]], [[TMP1]]1919; CHECK-NEXT:    [[TMP8:%.*]] = icmp uge i32 2147483647, [[TMP5]]1920; CHECK-NEXT:    [[TMP15:%.*]] = icmp uge i32 2147483647, [[TMP4]]1921; CHECK-NEXT:    [[TMP16:%.*]] = xor i1 [[TMP8]], [[TMP15]]1922; CHECK-NEXT:    [[TMP17:%.*]] = icmp sge i32 -1, [[X]]1923; CHECK-NEXT:    store i1 [[TMP16]], ptr @__msan_retval_tls, align 81924; CHECK-NEXT:    ret i1 [[TMP17]]1925;1926; ORIGIN-LABEL: define zeroext i1 @ICmpSGEAllOnes(1927; ORIGIN-SAME: i32 [[X:%.*]]) #[[ATTR0]] {1928; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 81929; ORIGIN-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41930; ORIGIN-NEXT:    call void @llvm.donothing()1931; ORIGIN-NEXT:    [[TMP3:%.*]] = xor i32 [[X]], -21474836481932; ORIGIN-NEXT:    [[TMP4:%.*]] = xor i32 [[TMP1]], -11933; ORIGIN-NEXT:    [[TMP5:%.*]] = and i32 [[TMP3]], [[TMP4]]1934; ORIGIN-NEXT:    [[TMP6:%.*]] = or i32 [[TMP3]], [[TMP1]]1935; ORIGIN-NEXT:    [[TMP9:%.*]] = icmp uge i32 2147483647, [[TMP6]]1936; ORIGIN-NEXT:    [[TMP16:%.*]] = icmp uge i32 2147483647, [[TMP5]]1937; ORIGIN-NEXT:    [[TMP17:%.*]] = xor i1 [[TMP9]], [[TMP16]]1938; ORIGIN-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP1]], 01939; ORIGIN-NEXT:    [[TMP19:%.*]] = select i1 [[TMP18]], i32 [[TMP2]], i32 01940; ORIGIN-NEXT:    [[TMP20:%.*]] = icmp sge i32 -1, [[X]]1941; ORIGIN-NEXT:    store i1 [[TMP17]], ptr @__msan_retval_tls, align 81942; ORIGIN-NEXT:    store i32 [[TMP19]], ptr @__msan_retval_origin_tls, align 41943; ORIGIN-NEXT:    ret i1 [[TMP20]]1944;1945; CALLS-LABEL: define zeroext i1 @ICmpSGEAllOnes(1946; CALLS-SAME: i32 [[X:%.*]]) #[[ATTR0]] {1947; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 81948; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41949; CALLS-NEXT:    call void @llvm.donothing()1950; CALLS-NEXT:    [[TMP3:%.*]] = xor i32 [[X]], -21474836481951; CALLS-NEXT:    [[TMP4:%.*]] = xor i32 [[TMP1]], -11952; CALLS-NEXT:    [[TMP5:%.*]] = and i32 [[TMP3]], [[TMP4]]1953; CALLS-NEXT:    [[TMP6:%.*]] = or i32 [[TMP3]], [[TMP1]]1954; CALLS-NEXT:    [[TMP9:%.*]] = icmp uge i32 2147483647, [[TMP6]]1955; CALLS-NEXT:    [[TMP16:%.*]] = icmp uge i32 2147483647, [[TMP5]]1956; CALLS-NEXT:    [[TMP17:%.*]] = xor i1 [[TMP9]], [[TMP16]]1957; CALLS-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP1]], 01958; CALLS-NEXT:    [[TMP19:%.*]] = select i1 [[TMP18]], i32 [[TMP2]], i32 01959; CALLS-NEXT:    [[TMP20:%.*]] = icmp sge i32 -1, [[X]]1960; CALLS-NEXT:    store i1 [[TMP17]], ptr @__msan_retval_tls, align 81961; CALLS-NEXT:    store i32 [[TMP19]], ptr @__msan_retval_origin_tls, align 41962; CALLS-NEXT:    ret i1 [[TMP20]]1963;1964  %1 = icmp sge i32 -1, %x1965  ret i1 %11966}1967 1968 1969define zeroext i1 @ICmpSGTAllOnes(i32 %x) nounwind uwtable readnone sanitize_memory {1970; CHECK-LABEL: define zeroext i1 @ICmpSGTAllOnes(1971; CHECK-SAME: i32 [[X:%.*]]) #[[ATTR0]] {1972; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 81973; CHECK-NEXT:    call void @llvm.donothing()1974; CHECK-NEXT:    [[TMP2:%.*]] = xor i32 [[X]], -21474836481975; CHECK-NEXT:    [[TMP3:%.*]] = xor i32 [[TMP1]], -11976; CHECK-NEXT:    [[TMP4:%.*]] = and i32 [[TMP2]], [[TMP3]]1977; CHECK-NEXT:    [[TMP5:%.*]] = or i32 [[TMP2]], [[TMP1]]1978; CHECK-NEXT:    [[TMP8:%.*]] = icmp ugt i32 [[TMP4]], 21474836471979; CHECK-NEXT:    [[TMP15:%.*]] = icmp ugt i32 [[TMP5]], 21474836471980; CHECK-NEXT:    [[TMP16:%.*]] = xor i1 [[TMP8]], [[TMP15]]1981; CHECK-NEXT:    [[TMP17:%.*]] = icmp sgt i32 [[X]], -11982; CHECK-NEXT:    store i1 [[TMP16]], ptr @__msan_retval_tls, align 81983; CHECK-NEXT:    ret i1 [[TMP17]]1984;1985; ORIGIN-LABEL: define zeroext i1 @ICmpSGTAllOnes(1986; ORIGIN-SAME: i32 [[X:%.*]]) #[[ATTR0]] {1987; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 81988; ORIGIN-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 41989; ORIGIN-NEXT:    call void @llvm.donothing()1990; ORIGIN-NEXT:    [[TMP3:%.*]] = xor i32 [[X]], -21474836481991; ORIGIN-NEXT:    [[TMP4:%.*]] = xor i32 [[TMP1]], -11992; ORIGIN-NEXT:    [[TMP5:%.*]] = and i32 [[TMP3]], [[TMP4]]1993; ORIGIN-NEXT:    [[TMP6:%.*]] = or i32 [[TMP3]], [[TMP1]]1994; ORIGIN-NEXT:    [[TMP9:%.*]] = icmp ugt i32 [[TMP5]], 21474836471995; ORIGIN-NEXT:    [[TMP16:%.*]] = icmp ugt i32 [[TMP6]], 21474836471996; ORIGIN-NEXT:    [[TMP17:%.*]] = xor i1 [[TMP9]], [[TMP16]]1997; ORIGIN-NEXT:    [[TMP18:%.*]] = icmp sgt i32 [[X]], -11998; ORIGIN-NEXT:    store i1 [[TMP17]], ptr @__msan_retval_tls, align 81999; ORIGIN-NEXT:    store i32 [[TMP2]], ptr @__msan_retval_origin_tls, align 42000; ORIGIN-NEXT:    ret i1 [[TMP18]]2001;2002; CALLS-LABEL: define zeroext i1 @ICmpSGTAllOnes(2003; CALLS-SAME: i32 [[X:%.*]]) #[[ATTR0]] {2004; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 82005; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 42006; CALLS-NEXT:    call void @llvm.donothing()2007; CALLS-NEXT:    [[TMP3:%.*]] = xor i32 [[X]], -21474836482008; CALLS-NEXT:    [[TMP4:%.*]] = xor i32 [[TMP1]], -12009; CALLS-NEXT:    [[TMP5:%.*]] = and i32 [[TMP3]], [[TMP4]]2010; CALLS-NEXT:    [[TMP6:%.*]] = or i32 [[TMP3]], [[TMP1]]2011; CALLS-NEXT:    [[TMP9:%.*]] = icmp ugt i32 [[TMP5]], 21474836472012; CALLS-NEXT:    [[TMP16:%.*]] = icmp ugt i32 [[TMP6]], 21474836472013; CALLS-NEXT:    [[TMP17:%.*]] = xor i1 [[TMP9]], [[TMP16]]2014; CALLS-NEXT:    [[TMP18:%.*]] = icmp sgt i32 [[X]], -12015; CALLS-NEXT:    store i1 [[TMP17]], ptr @__msan_retval_tls, align 82016; CALLS-NEXT:    store i32 [[TMP2]], ptr @__msan_retval_origin_tls, align 42017; CALLS-NEXT:    ret i1 [[TMP18]]2018;2019  %1 = icmp sgt i32 %x, -12020  ret i1 %12021}2022 2023 2024define zeroext i1 @ICmpSLEAllOnes(i32 %x) nounwind uwtable readnone sanitize_memory {2025; CHECK-LABEL: define zeroext i1 @ICmpSLEAllOnes(2026; CHECK-SAME: i32 [[X:%.*]]) #[[ATTR0]] {2027; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 82028; CHECK-NEXT:    call void @llvm.donothing()2029; CHECK-NEXT:    [[TMP2:%.*]] = xor i32 [[X]], -21474836482030; CHECK-NEXT:    [[TMP3:%.*]] = xor i32 [[TMP1]], -12031; CHECK-NEXT:    [[TMP4:%.*]] = and i32 [[TMP2]], [[TMP3]]2032; CHECK-NEXT:    [[TMP5:%.*]] = or i32 [[TMP2]], [[TMP1]]2033; CHECK-NEXT:    [[TMP8:%.*]] = icmp ule i32 [[TMP4]], 21474836472034; CHECK-NEXT:    [[TMP15:%.*]] = icmp ule i32 [[TMP5]], 21474836472035; CHECK-NEXT:    [[TMP16:%.*]] = xor i1 [[TMP8]], [[TMP15]]2036; CHECK-NEXT:    [[TMP17:%.*]] = icmp sle i32 [[X]], -12037; CHECK-NEXT:    store i1 [[TMP16]], ptr @__msan_retval_tls, align 82038; CHECK-NEXT:    ret i1 [[TMP17]]2039;2040; ORIGIN-LABEL: define zeroext i1 @ICmpSLEAllOnes(2041; ORIGIN-SAME: i32 [[X:%.*]]) #[[ATTR0]] {2042; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 82043; ORIGIN-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 42044; ORIGIN-NEXT:    call void @llvm.donothing()2045; ORIGIN-NEXT:    [[TMP3:%.*]] = xor i32 [[X]], -21474836482046; ORIGIN-NEXT:    [[TMP4:%.*]] = xor i32 [[TMP1]], -12047; ORIGIN-NEXT:    [[TMP5:%.*]] = and i32 [[TMP3]], [[TMP4]]2048; ORIGIN-NEXT:    [[TMP6:%.*]] = or i32 [[TMP3]], [[TMP1]]2049; ORIGIN-NEXT:    [[TMP9:%.*]] = icmp ule i32 [[TMP5]], 21474836472050; ORIGIN-NEXT:    [[TMP16:%.*]] = icmp ule i32 [[TMP6]], 21474836472051; ORIGIN-NEXT:    [[TMP17:%.*]] = xor i1 [[TMP9]], [[TMP16]]2052; ORIGIN-NEXT:    [[TMP18:%.*]] = icmp sle i32 [[X]], -12053; ORIGIN-NEXT:    store i1 [[TMP17]], ptr @__msan_retval_tls, align 82054; ORIGIN-NEXT:    store i32 [[TMP2]], ptr @__msan_retval_origin_tls, align 42055; ORIGIN-NEXT:    ret i1 [[TMP18]]2056;2057; CALLS-LABEL: define zeroext i1 @ICmpSLEAllOnes(2058; CALLS-SAME: i32 [[X:%.*]]) #[[ATTR0]] {2059; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 82060; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 42061; CALLS-NEXT:    call void @llvm.donothing()2062; CALLS-NEXT:    [[TMP3:%.*]] = xor i32 [[X]], -21474836482063; CALLS-NEXT:    [[TMP4:%.*]] = xor i32 [[TMP1]], -12064; CALLS-NEXT:    [[TMP5:%.*]] = and i32 [[TMP3]], [[TMP4]]2065; CALLS-NEXT:    [[TMP6:%.*]] = or i32 [[TMP3]], [[TMP1]]2066; CALLS-NEXT:    [[TMP9:%.*]] = icmp ule i32 [[TMP5]], 21474836472067; CALLS-NEXT:    [[TMP16:%.*]] = icmp ule i32 [[TMP6]], 21474836472068; CALLS-NEXT:    [[TMP17:%.*]] = xor i1 [[TMP9]], [[TMP16]]2069; CALLS-NEXT:    [[TMP18:%.*]] = icmp sle i32 [[X]], -12070; CALLS-NEXT:    store i1 [[TMP17]], ptr @__msan_retval_tls, align 82071; CALLS-NEXT:    store i32 [[TMP2]], ptr @__msan_retval_origin_tls, align 42072; CALLS-NEXT:    ret i1 [[TMP18]]2073;2074  %1 = icmp sle i32 %x, -12075  ret i1 %12076}2077 2078 2079 2080; Check that we propagate shadow for x<0, x>=0, etc (i.e. sign bit tests)2081; of the vector arguments.2082 2083define <2 x i1> @ICmpSLT_vector_Zero(<2 x ptr> %x) nounwind uwtable readnone sanitize_memory {2084; CHECK-LABEL: define <2 x i1> @ICmpSLT_vector_Zero(2085; CHECK-SAME: <2 x ptr> [[X:%.*]]) #[[ATTR0]] {2086; CHECK-NEXT:    [[TMP1:%.*]] = load <2 x i64>, ptr @__msan_param_tls, align 82087; CHECK-NEXT:    call void @llvm.donothing()2088; CHECK-NEXT:    [[TMP2:%.*]] = ptrtoint <2 x ptr> [[X]] to <2 x i64>2089; CHECK-NEXT:    [[TMP3:%.*]] = xor <2 x i64> [[TMP2]], splat (i64 -9223372036854775808)2090; CHECK-NEXT:    [[TMP4:%.*]] = xor <2 x i64> [[TMP1]], splat (i64 -1)2091; CHECK-NEXT:    [[TMP5:%.*]] = and <2 x i64> [[TMP3]], [[TMP4]]2092; CHECK-NEXT:    [[TMP6:%.*]] = or <2 x i64> [[TMP3]], [[TMP1]]2093; CHECK-NEXT:    [[TMP9:%.*]] = icmp ult <2 x i64> [[TMP5]], splat (i64 -9223372036854775808)2094; CHECK-NEXT:    [[TMP16:%.*]] = icmp ult <2 x i64> [[TMP6]], splat (i64 -9223372036854775808)2095; CHECK-NEXT:    [[TMP17:%.*]] = xor <2 x i1> [[TMP9]], [[TMP16]]2096; CHECK-NEXT:    [[TMP18:%.*]] = icmp slt <2 x ptr> [[X]], zeroinitializer2097; CHECK-NEXT:    store <2 x i1> [[TMP17]], ptr @__msan_retval_tls, align 82098; CHECK-NEXT:    ret <2 x i1> [[TMP18]]2099;2100; ORIGIN-LABEL: define <2 x i1> @ICmpSLT_vector_Zero(2101; ORIGIN-SAME: <2 x ptr> [[X:%.*]]) #[[ATTR0]] {2102; ORIGIN-NEXT:    [[TMP1:%.*]] = load <2 x i64>, ptr @__msan_param_tls, align 82103; ORIGIN-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 42104; ORIGIN-NEXT:    call void @llvm.donothing()2105; ORIGIN-NEXT:    [[TMP3:%.*]] = ptrtoint <2 x ptr> [[X]] to <2 x i64>2106; ORIGIN-NEXT:    [[TMP4:%.*]] = xor <2 x i64> [[TMP3]], splat (i64 -9223372036854775808)2107; ORIGIN-NEXT:    [[TMP5:%.*]] = xor <2 x i64> [[TMP1]], splat (i64 -1)2108; ORIGIN-NEXT:    [[TMP6:%.*]] = and <2 x i64> [[TMP4]], [[TMP5]]2109; ORIGIN-NEXT:    [[TMP7:%.*]] = or <2 x i64> [[TMP4]], [[TMP1]]2110; ORIGIN-NEXT:    [[TMP10:%.*]] = icmp ult <2 x i64> [[TMP6]], splat (i64 -9223372036854775808)2111; ORIGIN-NEXT:    [[TMP17:%.*]] = icmp ult <2 x i64> [[TMP7]], splat (i64 -9223372036854775808)2112; ORIGIN-NEXT:    [[TMP18:%.*]] = xor <2 x i1> [[TMP10]], [[TMP17]]2113; ORIGIN-NEXT:    [[TMP19:%.*]] = icmp slt <2 x ptr> [[X]], zeroinitializer2114; ORIGIN-NEXT:    store <2 x i1> [[TMP18]], ptr @__msan_retval_tls, align 82115; ORIGIN-NEXT:    store i32 [[TMP2]], ptr @__msan_retval_origin_tls, align 42116; ORIGIN-NEXT:    ret <2 x i1> [[TMP19]]2117;2118; CALLS-LABEL: define <2 x i1> @ICmpSLT_vector_Zero(2119; CALLS-SAME: <2 x ptr> [[X:%.*]]) #[[ATTR0]] {2120; CALLS-NEXT:    [[TMP1:%.*]] = load <2 x i64>, ptr @__msan_param_tls, align 82121; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 42122; CALLS-NEXT:    call void @llvm.donothing()2123; CALLS-NEXT:    [[TMP3:%.*]] = ptrtoint <2 x ptr> [[X]] to <2 x i64>2124; CALLS-NEXT:    [[TMP4:%.*]] = xor <2 x i64> [[TMP3]], splat (i64 -9223372036854775808)2125; CALLS-NEXT:    [[TMP5:%.*]] = xor <2 x i64> [[TMP1]], splat (i64 -1)2126; CALLS-NEXT:    [[TMP6:%.*]] = and <2 x i64> [[TMP4]], [[TMP5]]2127; CALLS-NEXT:    [[TMP7:%.*]] = or <2 x i64> [[TMP4]], [[TMP1]]2128; CALLS-NEXT:    [[TMP10:%.*]] = icmp ult <2 x i64> [[TMP6]], splat (i64 -9223372036854775808)2129; CALLS-NEXT:    [[TMP17:%.*]] = icmp ult <2 x i64> [[TMP7]], splat (i64 -9223372036854775808)2130; CALLS-NEXT:    [[TMP18:%.*]] = xor <2 x i1> [[TMP10]], [[TMP17]]2131; CALLS-NEXT:    [[TMP19:%.*]] = icmp slt <2 x ptr> [[X]], zeroinitializer2132; CALLS-NEXT:    store <2 x i1> [[TMP18]], ptr @__msan_retval_tls, align 82133; CALLS-NEXT:    store i32 [[TMP2]], ptr @__msan_retval_origin_tls, align 42134; CALLS-NEXT:    ret <2 x i1> [[TMP19]]2135;2136  %1 = icmp slt <2 x ptr> %x, zeroinitializer2137  ret <2 x i1> %12138}2139 2140 2141; Check that we propagate shadow for x<=-1, x>0, etc (i.e. sign bit tests)2142; of the vector arguments.2143 2144define <2 x i1> @ICmpSLT_vector_AllOnes(<2 x i32> %x) nounwind uwtable readnone sanitize_memory {2145; CHECK-LABEL: define <2 x i1> @ICmpSLT_vector_AllOnes(2146; CHECK-SAME: <2 x i32> [[X:%.*]]) #[[ATTR0]] {2147; CHECK-NEXT:    [[TMP1:%.*]] = load <2 x i32>, ptr @__msan_param_tls, align 82148; CHECK-NEXT:    call void @llvm.donothing()2149; CHECK-NEXT:    [[TMP2:%.*]] = xor <2 x i32> [[X]], splat (i32 -2147483648)2150; CHECK-NEXT:    [[TMP3:%.*]] = xor <2 x i32> [[TMP1]], splat (i32 -1)2151; CHECK-NEXT:    [[TMP4:%.*]] = and <2 x i32> [[TMP2]], [[TMP3]]2152; CHECK-NEXT:    [[TMP5:%.*]] = or <2 x i32> [[TMP2]], [[TMP1]]2153; CHECK-NEXT:    [[TMP8:%.*]] = icmp ult <2 x i32> splat (i32 2147483647), [[TMP5]]2154; CHECK-NEXT:    [[TMP15:%.*]] = icmp ult <2 x i32> splat (i32 2147483647), [[TMP4]]2155; CHECK-NEXT:    [[TMP16:%.*]] = xor <2 x i1> [[TMP8]], [[TMP15]]2156; CHECK-NEXT:    [[TMP17:%.*]] = icmp slt <2 x i32> splat (i32 -1), [[X]]2157; CHECK-NEXT:    store <2 x i1> [[TMP16]], ptr @__msan_retval_tls, align 82158; CHECK-NEXT:    ret <2 x i1> [[TMP17]]2159;2160; ORIGIN-LABEL: define <2 x i1> @ICmpSLT_vector_AllOnes(2161; ORIGIN-SAME: <2 x i32> [[X:%.*]]) #[[ATTR0]] {2162; ORIGIN-NEXT:    [[TMP1:%.*]] = load <2 x i32>, ptr @__msan_param_tls, align 82163; ORIGIN-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 42164; ORIGIN-NEXT:    call void @llvm.donothing()2165; ORIGIN-NEXT:    [[TMP3:%.*]] = xor <2 x i32> [[X]], splat (i32 -2147483648)2166; ORIGIN-NEXT:    [[TMP4:%.*]] = xor <2 x i32> [[TMP1]], splat (i32 -1)2167; ORIGIN-NEXT:    [[TMP5:%.*]] = and <2 x i32> [[TMP3]], [[TMP4]]2168; ORIGIN-NEXT:    [[TMP6:%.*]] = or <2 x i32> [[TMP3]], [[TMP1]]2169; ORIGIN-NEXT:    [[TMP9:%.*]] = icmp ult <2 x i32> splat (i32 2147483647), [[TMP6]]2170; ORIGIN-NEXT:    [[TMP16:%.*]] = icmp ult <2 x i32> splat (i32 2147483647), [[TMP5]]2171; ORIGIN-NEXT:    [[TMP17:%.*]] = xor <2 x i1> [[TMP9]], [[TMP16]]2172; ORIGIN-NEXT:    [[TMP18:%.*]] = bitcast <2 x i32> [[TMP1]] to i642173; ORIGIN-NEXT:    [[TMP19:%.*]] = icmp ne i64 [[TMP18]], 02174; ORIGIN-NEXT:    [[TMP20:%.*]] = select i1 [[TMP19]], i32 [[TMP2]], i32 02175; ORIGIN-NEXT:    [[TMP21:%.*]] = icmp slt <2 x i32> splat (i32 -1), [[X]]2176; ORIGIN-NEXT:    store <2 x i1> [[TMP17]], ptr @__msan_retval_tls, align 82177; ORIGIN-NEXT:    store i32 [[TMP20]], ptr @__msan_retval_origin_tls, align 42178; ORIGIN-NEXT:    ret <2 x i1> [[TMP21]]2179;2180; CALLS-LABEL: define <2 x i1> @ICmpSLT_vector_AllOnes(2181; CALLS-SAME: <2 x i32> [[X:%.*]]) #[[ATTR0]] {2182; CALLS-NEXT:    [[TMP1:%.*]] = load <2 x i32>, ptr @__msan_param_tls, align 82183; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 42184; CALLS-NEXT:    call void @llvm.donothing()2185; CALLS-NEXT:    [[TMP3:%.*]] = xor <2 x i32> [[X]], splat (i32 -2147483648)2186; CALLS-NEXT:    [[TMP4:%.*]] = xor <2 x i32> [[TMP1]], splat (i32 -1)2187; CALLS-NEXT:    [[TMP5:%.*]] = and <2 x i32> [[TMP3]], [[TMP4]]2188; CALLS-NEXT:    [[TMP6:%.*]] = or <2 x i32> [[TMP3]], [[TMP1]]2189; CALLS-NEXT:    [[TMP9:%.*]] = icmp ult <2 x i32> splat (i32 2147483647), [[TMP6]]2190; CALLS-NEXT:    [[TMP16:%.*]] = icmp ult <2 x i32> splat (i32 2147483647), [[TMP5]]2191; CALLS-NEXT:    [[TMP17:%.*]] = xor <2 x i1> [[TMP9]], [[TMP16]]2192; CALLS-NEXT:    [[TMP18:%.*]] = bitcast <2 x i32> [[TMP1]] to i642193; CALLS-NEXT:    [[TMP19:%.*]] = icmp ne i64 [[TMP18]], 02194; CALLS-NEXT:    [[TMP20:%.*]] = select i1 [[TMP19]], i32 [[TMP2]], i32 02195; CALLS-NEXT:    [[TMP21:%.*]] = icmp slt <2 x i32> splat (i32 -1), [[X]]2196; CALLS-NEXT:    store <2 x i1> [[TMP17]], ptr @__msan_retval_tls, align 82197; CALLS-NEXT:    store i32 [[TMP20]], ptr @__msan_retval_origin_tls, align 42198; CALLS-NEXT:    ret <2 x i1> [[TMP21]]2199;2200  %1 = icmp slt <2 x i32> <i32 -1, i32 -1>, %x2201  ret <2 x i1> %12202}2203 2204 2205 2206; Check that we propagate shadow for unsigned relational comparisons with2207; constants2208 2209define zeroext i1 @ICmpUGTConst(i32 %x) nounwind uwtable readnone sanitize_memory {2210; CHECK-LABEL: define zeroext i1 @ICmpUGTConst(2211; CHECK-SAME: i32 [[X:%.*]]) #[[ATTR0]] {2212; CHECK-NEXT:  [[ENTRY:.*:]]2213; CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr @__msan_param_tls, align 82214; CHECK-NEXT:    call void @llvm.donothing()2215; CHECK-NEXT:    [[TMP1:%.*]] = xor i32 [[TMP0]], -12216; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[X]], [[TMP1]]2217; CHECK-NEXT:    [[TMP4:%.*]] = or i32 [[X]], [[TMP0]]2218; CHECK-NEXT:    [[TMP3:%.*]] = icmp ugt i32 [[TMP2]], 72219; CHECK-NEXT:    [[TMP5:%.*]] = icmp ugt i32 [[TMP4]], 72220; CHECK-NEXT:    [[TMP6:%.*]] = xor i1 [[TMP3]], [[TMP5]]2221; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[X]], 72222; CHECK-NEXT:    store i1 [[TMP6]], ptr @__msan_retval_tls, align 82223; CHECK-NEXT:    ret i1 [[CMP]]2224;2225; ORIGIN-LABEL: define zeroext i1 @ICmpUGTConst(2226; ORIGIN-SAME: i32 [[X:%.*]]) #[[ATTR0]] {2227; ORIGIN-NEXT:  [[ENTRY:.*:]]2228; ORIGIN-NEXT:    [[TMP0:%.*]] = load i32, ptr @__msan_param_tls, align 82229; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 42230; ORIGIN-NEXT:    call void @llvm.donothing()2231; ORIGIN-NEXT:    [[TMP2:%.*]] = xor i32 [[TMP0]], -12232; ORIGIN-NEXT:    [[TMP3:%.*]] = and i32 [[X]], [[TMP2]]2233; ORIGIN-NEXT:    [[TMP5:%.*]] = or i32 [[X]], [[TMP0]]2234; ORIGIN-NEXT:    [[TMP4:%.*]] = icmp ugt i32 [[TMP3]], 72235; ORIGIN-NEXT:    [[TMP6:%.*]] = icmp ugt i32 [[TMP5]], 72236; ORIGIN-NEXT:    [[TMP7:%.*]] = xor i1 [[TMP4]], [[TMP6]]2237; ORIGIN-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[X]], 72238; ORIGIN-NEXT:    store i1 [[TMP7]], ptr @__msan_retval_tls, align 82239; ORIGIN-NEXT:    store i32 [[TMP1]], ptr @__msan_retval_origin_tls, align 42240; ORIGIN-NEXT:    ret i1 [[CMP]]2241;2242; CALLS-LABEL: define zeroext i1 @ICmpUGTConst(2243; CALLS-SAME: i32 [[X:%.*]]) #[[ATTR0]] {2244; CALLS-NEXT:  [[ENTRY:.*:]]2245; CALLS-NEXT:    [[TMP0:%.*]] = load i32, ptr @__msan_param_tls, align 82246; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 42247; CALLS-NEXT:    call void @llvm.donothing()2248; CALLS-NEXT:    [[TMP2:%.*]] = xor i32 [[TMP0]], -12249; CALLS-NEXT:    [[TMP3:%.*]] = and i32 [[X]], [[TMP2]]2250; CALLS-NEXT:    [[TMP5:%.*]] = or i32 [[X]], [[TMP0]]2251; CALLS-NEXT:    [[TMP4:%.*]] = icmp ugt i32 [[TMP3]], 72252; CALLS-NEXT:    [[TMP6:%.*]] = icmp ugt i32 [[TMP5]], 72253; CALLS-NEXT:    [[TMP7:%.*]] = xor i1 [[TMP4]], [[TMP6]]2254; CALLS-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[X]], 72255; CALLS-NEXT:    store i1 [[TMP7]], ptr @__msan_retval_tls, align 82256; CALLS-NEXT:    store i32 [[TMP1]], ptr @__msan_retval_origin_tls, align 42257; CALLS-NEXT:    ret i1 [[CMP]]2258;2259entry:2260  %cmp = icmp ugt i32 %x, 72261  ret i1 %cmp2262}2263 2264 2265 2266; Check that loads of shadow have the same alignment as the original loads.2267; Check that loads of origin have the alignment of max(4, original alignment).2268 2269define i32 @ShadowLoadAlignmentLarge() nounwind uwtable sanitize_memory {2270; CHECK-LABEL: define i32 @ShadowLoadAlignmentLarge(2271; CHECK-SAME: ) #[[ATTR0]] {2272; CHECK-NEXT:    call void @llvm.donothing()2273; CHECK-NEXT:    [[Y:%.*]] = alloca i32, align 642274; CHECK-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[Y]] to i642275; CHECK-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 879609302220802276; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr2277; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 64 [[TMP3]], i8 -1, i64 4, i1 false)2278; CHECK-NEXT:    [[TMP4:%.*]] = load volatile i32, ptr [[Y]], align 642279; CHECK-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[Y]] to i642280; CHECK-NEXT:    [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220802281; CHECK-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr2282; CHECK-NEXT:    [[_MSLD:%.*]] = load i32, ptr [[TMP7]], align 642283; CHECK-NEXT:    store i32 [[_MSLD]], ptr @__msan_retval_tls, align 82284; CHECK-NEXT:    ret i32 [[TMP4]]2285;2286; ORIGIN-LABEL: define i32 @ShadowLoadAlignmentLarge(2287; ORIGIN-SAME: ) #[[ATTR0]] {2288; ORIGIN-NEXT:    call void @llvm.donothing()2289; ORIGIN-NEXT:    [[Y:%.*]] = alloca i32, align 642290; ORIGIN-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[Y]] to i642291; ORIGIN-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 879609302220802292; ORIGIN-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr2293; ORIGIN-NEXT:    [[TMP4:%.*]] = add i64 [[TMP2]], 175921860444162294; ORIGIN-NEXT:    [[TMP5:%.*]] = and i64 [[TMP4]], -42295; ORIGIN-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr2296; ORIGIN-NEXT:    call void @llvm.memset.p0.i64(ptr align 64 [[TMP3]], i8 -1, i64 4, i1 false)2297; ORIGIN-NEXT:    call void @__msan_set_alloca_origin_with_descr(ptr [[Y]], i64 4, ptr @[[GLOB0:[0-9]+]], ptr @[[GLOB1:[0-9]+]])2298; ORIGIN-NEXT:    [[TMP7:%.*]] = load volatile i32, ptr [[Y]], align 642299; ORIGIN-NEXT:    [[TMP8:%.*]] = ptrtoint ptr [[Y]] to i642300; ORIGIN-NEXT:    [[TMP9:%.*]] = xor i64 [[TMP8]], 879609302220802301; ORIGIN-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr2302; ORIGIN-NEXT:    [[TMP11:%.*]] = add i64 [[TMP9]], 175921860444162303; ORIGIN-NEXT:    [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr2304; ORIGIN-NEXT:    [[_MSLD:%.*]] = load i32, ptr [[TMP10]], align 642305; ORIGIN-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 642306; ORIGIN-NEXT:    store i32 [[_MSLD]], ptr @__msan_retval_tls, align 82307; ORIGIN-NEXT:    store i32 [[TMP13]], ptr @__msan_retval_origin_tls, align 42308; ORIGIN-NEXT:    ret i32 [[TMP7]]2309;2310; CALLS-LABEL: define i32 @ShadowLoadAlignmentLarge(2311; CALLS-SAME: ) #[[ATTR0]] {2312; CALLS-NEXT:    call void @llvm.donothing()2313; CALLS-NEXT:    [[Y:%.*]] = alloca i32, align 642314; CALLS-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[Y]] to i642315; CALLS-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 879609302220802316; CALLS-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr2317; CALLS-NEXT:    [[TMP4:%.*]] = add i64 [[TMP2]], 175921860444162318; CALLS-NEXT:    [[TMP5:%.*]] = and i64 [[TMP4]], -42319; CALLS-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr2320; CALLS-NEXT:    call void @llvm.memset.p0.i64(ptr align 64 [[TMP3]], i8 -1, i64 4, i1 false)2321; CALLS-NEXT:    call void @__msan_set_alloca_origin_with_descr(ptr [[Y]], i64 4, ptr @[[GLOB0:[0-9]+]], ptr @[[GLOB1:[0-9]+]])2322; CALLS-NEXT:    [[TMP7:%.*]] = load volatile i32, ptr [[Y]], align 642323; CALLS-NEXT:    [[TMP8:%.*]] = ptrtoint ptr [[Y]] to i642324; CALLS-NEXT:    [[TMP9:%.*]] = xor i64 [[TMP8]], 879609302220802325; CALLS-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr2326; CALLS-NEXT:    [[TMP11:%.*]] = add i64 [[TMP9]], 175921860444162327; CALLS-NEXT:    [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr2328; CALLS-NEXT:    [[_MSLD:%.*]] = load i32, ptr [[TMP10]], align 642329; CALLS-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 642330; CALLS-NEXT:    store i32 [[_MSLD]], ptr @__msan_retval_tls, align 82331; CALLS-NEXT:    store i32 [[TMP13]], ptr @__msan_retval_origin_tls, align 42332; CALLS-NEXT:    ret i32 [[TMP7]]2333;2334  %y = alloca i32, align 642335  %1 = load volatile i32, ptr %y, align 642336  ret i32 %12337}2338 2339 2340define i32 @ShadowLoadAlignmentSmall() nounwind uwtable sanitize_memory {2341; CHECK-LABEL: define i32 @ShadowLoadAlignmentSmall(2342; CHECK-SAME: ) #[[ATTR0]] {2343; CHECK-NEXT:    call void @llvm.donothing()2344; CHECK-NEXT:    [[Y:%.*]] = alloca i32, align 22345; CHECK-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[Y]] to i642346; CHECK-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 879609302220802347; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr2348; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 2 [[TMP3]], i8 -1, i64 4, i1 false)2349; CHECK-NEXT:    [[TMP4:%.*]] = load volatile i32, ptr [[Y]], align 22350; CHECK-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[Y]] to i642351; CHECK-NEXT:    [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220802352; CHECK-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr2353; CHECK-NEXT:    [[_MSLD:%.*]] = load i32, ptr [[TMP7]], align 22354; CHECK-NEXT:    store i32 [[_MSLD]], ptr @__msan_retval_tls, align 82355; CHECK-NEXT:    ret i32 [[TMP4]]2356;2357; ORIGIN-LABEL: define i32 @ShadowLoadAlignmentSmall(2358; ORIGIN-SAME: ) #[[ATTR0]] {2359; ORIGIN-NEXT:    call void @llvm.donothing()2360; ORIGIN-NEXT:    [[Y:%.*]] = alloca i32, align 22361; ORIGIN-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[Y]] to i642362; ORIGIN-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 879609302220802363; ORIGIN-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr2364; ORIGIN-NEXT:    [[TMP4:%.*]] = add i64 [[TMP2]], 175921860444162365; ORIGIN-NEXT:    [[TMP5:%.*]] = and i64 [[TMP4]], -42366; ORIGIN-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr2367; ORIGIN-NEXT:    call void @llvm.memset.p0.i64(ptr align 2 [[TMP3]], i8 -1, i64 4, i1 false)2368; ORIGIN-NEXT:    call void @__msan_set_alloca_origin_with_descr(ptr [[Y]], i64 4, ptr @[[GLOB2:[0-9]+]], ptr @[[GLOB3:[0-9]+]])2369; ORIGIN-NEXT:    [[TMP7:%.*]] = load volatile i32, ptr [[Y]], align 22370; ORIGIN-NEXT:    [[TMP8:%.*]] = ptrtoint ptr [[Y]] to i642371; ORIGIN-NEXT:    [[TMP9:%.*]] = xor i64 [[TMP8]], 879609302220802372; ORIGIN-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr2373; ORIGIN-NEXT:    [[TMP11:%.*]] = add i64 [[TMP9]], 175921860444162374; ORIGIN-NEXT:    [[TMP12:%.*]] = and i64 [[TMP11]], -42375; ORIGIN-NEXT:    [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr2376; ORIGIN-NEXT:    [[_MSLD:%.*]] = load i32, ptr [[TMP10]], align 22377; ORIGIN-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 42378; ORIGIN-NEXT:    store i32 [[_MSLD]], ptr @__msan_retval_tls, align 82379; ORIGIN-NEXT:    store i32 [[TMP14]], ptr @__msan_retval_origin_tls, align 42380; ORIGIN-NEXT:    ret i32 [[TMP7]]2381;2382; CALLS-LABEL: define i32 @ShadowLoadAlignmentSmall(2383; CALLS-SAME: ) #[[ATTR0]] {2384; CALLS-NEXT:    call void @llvm.donothing()2385; CALLS-NEXT:    [[Y:%.*]] = alloca i32, align 22386; CALLS-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[Y]] to i642387; CALLS-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 879609302220802388; CALLS-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr2389; CALLS-NEXT:    [[TMP4:%.*]] = add i64 [[TMP2]], 175921860444162390; CALLS-NEXT:    [[TMP5:%.*]] = and i64 [[TMP4]], -42391; CALLS-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr2392; CALLS-NEXT:    call void @llvm.memset.p0.i64(ptr align 2 [[TMP3]], i8 -1, i64 4, i1 false)2393; CALLS-NEXT:    call void @__msan_set_alloca_origin_with_descr(ptr [[Y]], i64 4, ptr @[[GLOB2:[0-9]+]], ptr @[[GLOB3:[0-9]+]])2394; CALLS-NEXT:    [[TMP7:%.*]] = load volatile i32, ptr [[Y]], align 22395; CALLS-NEXT:    [[TMP8:%.*]] = ptrtoint ptr [[Y]] to i642396; CALLS-NEXT:    [[TMP9:%.*]] = xor i64 [[TMP8]], 879609302220802397; CALLS-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr2398; CALLS-NEXT:    [[TMP11:%.*]] = add i64 [[TMP9]], 175921860444162399; CALLS-NEXT:    [[TMP12:%.*]] = and i64 [[TMP11]], -42400; CALLS-NEXT:    [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr2401; CALLS-NEXT:    [[_MSLD:%.*]] = load i32, ptr [[TMP10]], align 22402; CALLS-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 42403; CALLS-NEXT:    store i32 [[_MSLD]], ptr @__msan_retval_tls, align 82404; CALLS-NEXT:    store i32 [[TMP14]], ptr @__msan_retval_origin_tls, align 42405; CALLS-NEXT:    ret i32 [[TMP7]]2406;2407  %y = alloca i32, align 22408  %1 = load volatile i32, ptr %y, align 22409  ret i32 %12410}2411 2412; Test vector manipulation instructions.2413; Check that the same bit manipulation is applied to the shadow values.2414; Check that there is a zero test of the shadow of %idx argument, where present.2415 2416define i32 @ExtractElement(<4 x i32> %vec, i32 %idx) sanitize_memory {2417; CHECK-LABEL: define i32 @ExtractElement(2418; CHECK-SAME: <4 x i32> [[VEC:%.*]], i32 [[IDX:%.*]]) #[[ATTR6]] {2419; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 82420; CHECK-NEXT:    [[TMP2:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 82421; CHECK-NEXT:    call void @llvm.donothing()2422; CHECK-NEXT:    [[_MSPROP:%.*]] = extractelement <4 x i32> [[TMP2]], i32 [[IDX]]2423; CHECK-NEXT:    [[_MSCMP:%.*]] = icmp ne i32 [[TMP1]], 02424; CHECK-NEXT:    br i1 [[_MSCMP]], label %[[BB3:.*]], label %[[BB4:.*]], !prof [[PROF1]]2425; CHECK:       [[BB3]]:2426; CHECK-NEXT:    call void @__msan_warning_noreturn() #[[ATTR12]]2427; CHECK-NEXT:    unreachable2428; CHECK:       [[BB4]]:2429; CHECK-NEXT:    [[X:%.*]] = extractelement <4 x i32> [[VEC]], i32 [[IDX]]2430; CHECK-NEXT:    store i32 [[_MSPROP]], ptr @__msan_retval_tls, align 82431; CHECK-NEXT:    ret i32 [[X]]2432;2433; ORIGIN-LABEL: define i32 @ExtractElement(2434; ORIGIN-SAME: <4 x i32> [[VEC:%.*]], i32 [[IDX:%.*]]) #[[ATTR6]] {2435; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 82436; ORIGIN-NEXT:    [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 16), align 42437; ORIGIN-NEXT:    [[TMP3:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 82438; ORIGIN-NEXT:    [[TMP4:%.*]] = load i32, ptr @__msan_param_origin_tls, align 42439; ORIGIN-NEXT:    call void @llvm.donothing()2440; ORIGIN-NEXT:    [[_MSPROP:%.*]] = extractelement <4 x i32> [[TMP3]], i32 [[IDX]]2441; ORIGIN-NEXT:    [[_MSCMP:%.*]] = icmp ne i32 [[TMP1]], 02442; ORIGIN-NEXT:    br i1 [[_MSCMP]], label %[[BB5:.*]], label %[[BB6:.*]], !prof [[PROF1]]2443; ORIGIN:       [[BB5]]:2444; ORIGIN-NEXT:    call void @__msan_warning_with_origin_noreturn(i32 [[TMP2]]) #[[ATTR12]]2445; ORIGIN-NEXT:    unreachable2446; ORIGIN:       [[BB6]]:2447; ORIGIN-NEXT:    [[X:%.*]] = extractelement <4 x i32> [[VEC]], i32 [[IDX]]2448; ORIGIN-NEXT:    store i32 [[_MSPROP]], ptr @__msan_retval_tls, align 82449; ORIGIN-NEXT:    store i32 [[TMP4]], ptr @__msan_retval_origin_tls, align 42450; ORIGIN-NEXT:    ret i32 [[X]]2451;2452; CALLS-LABEL: define i32 @ExtractElement(2453; CALLS-SAME: <4 x i32> [[VEC:%.*]], i32 [[IDX:%.*]]) #[[ATTR6]] {2454; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 82455; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 16), align 42456; CALLS-NEXT:    [[TMP3:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 82457; CALLS-NEXT:    [[TMP4:%.*]] = load i32, ptr @__msan_param_origin_tls, align 42458; CALLS-NEXT:    call void @llvm.donothing()2459; CALLS-NEXT:    [[_MSPROP:%.*]] = extractelement <4 x i32> [[TMP3]], i32 [[IDX]]2460; CALLS-NEXT:    call void @__msan_maybe_warning_4(i32 zeroext [[TMP1]], i32 zeroext [[TMP2]])2461; CALLS-NEXT:    [[X:%.*]] = extractelement <4 x i32> [[VEC]], i32 [[IDX]]2462; CALLS-NEXT:    store i32 [[_MSPROP]], ptr @__msan_retval_tls, align 82463; CALLS-NEXT:    store i32 [[TMP4]], ptr @__msan_retval_origin_tls, align 42464; CALLS-NEXT:    ret i32 [[X]]2465;2466  %x = extractelement <4 x i32> %vec, i32 %idx2467  ret i32 %x2468}2469 2470define <4 x i32> @InsertElement(<4 x i32> %vec, i32 %idx, i32 %x) sanitize_memory {2471; CHECK-LABEL: define <4 x i32> @InsertElement(2472; CHECK-SAME: <4 x i32> [[VEC:%.*]], i32 [[IDX:%.*]], i32 [[X:%.*]]) #[[ATTR6]] {2473; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 82474; CHECK-NEXT:    [[TMP2:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 82475; CHECK-NEXT:    [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 82476; CHECK-NEXT:    call void @llvm.donothing()2477; CHECK-NEXT:    [[_MSPROP:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[TMP3]], i32 [[IDX]]2478; CHECK-NEXT:    [[_MSCMP:%.*]] = icmp ne i32 [[TMP1]], 02479; CHECK-NEXT:    br i1 [[_MSCMP]], label %[[BB4:.*]], label %[[BB5:.*]], !prof [[PROF1]]2480; CHECK:       [[BB4]]:2481; CHECK-NEXT:    call void @__msan_warning_noreturn() #[[ATTR12]]2482; CHECK-NEXT:    unreachable2483; CHECK:       [[BB5]]:2484; CHECK-NEXT:    [[VEC1:%.*]] = insertelement <4 x i32> [[VEC]], i32 [[X]], i32 [[IDX]]2485; CHECK-NEXT:    store <4 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 82486; CHECK-NEXT:    ret <4 x i32> [[VEC1]]2487;2488; ORIGIN-LABEL: define <4 x i32> @InsertElement(2489; ORIGIN-SAME: <4 x i32> [[VEC:%.*]], i32 [[IDX:%.*]], i32 [[X:%.*]]) #[[ATTR6]] {2490; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 82491; ORIGIN-NEXT:    [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 16), align 42492; ORIGIN-NEXT:    [[TMP3:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 82493; ORIGIN-NEXT:    [[TMP4:%.*]] = load i32, ptr @__msan_param_origin_tls, align 42494; ORIGIN-NEXT:    [[TMP5:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 82495; ORIGIN-NEXT:    [[TMP6:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 24), align 42496; ORIGIN-NEXT:    call void @llvm.donothing()2497; ORIGIN-NEXT:    [[_MSPROP:%.*]] = insertelement <4 x i32> [[TMP3]], i32 [[TMP5]], i32 [[IDX]]2498; ORIGIN-NEXT:    [[TMP7:%.*]] = icmp ne i32 [[TMP5]], 02499; ORIGIN-NEXT:    [[TMP8:%.*]] = select i1 [[TMP7]], i32 [[TMP6]], i32 [[TMP4]]2500; ORIGIN-NEXT:    [[TMP9:%.*]] = icmp ne i32 [[TMP1]], 02501; ORIGIN-NEXT:    [[TMP10:%.*]] = select i1 [[TMP9]], i32 [[TMP2]], i32 [[TMP8]]2502; ORIGIN-NEXT:    [[_MSCMP:%.*]] = icmp ne i32 [[TMP1]], 02503; ORIGIN-NEXT:    br i1 [[_MSCMP]], label %[[BB11:.*]], label %[[BB12:.*]], !prof [[PROF1]]2504; ORIGIN:       [[BB11]]:2505; ORIGIN-NEXT:    call void @__msan_warning_with_origin_noreturn(i32 [[TMP2]]) #[[ATTR12]]2506; ORIGIN-NEXT:    unreachable2507; ORIGIN:       [[BB12]]:2508; ORIGIN-NEXT:    [[VEC1:%.*]] = insertelement <4 x i32> [[VEC]], i32 [[X]], i32 [[IDX]]2509; ORIGIN-NEXT:    store <4 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 82510; ORIGIN-NEXT:    store i32 [[TMP10]], ptr @__msan_retval_origin_tls, align 42511; ORIGIN-NEXT:    ret <4 x i32> [[VEC1]]2512;2513; CALLS-LABEL: define <4 x i32> @InsertElement(2514; CALLS-SAME: <4 x i32> [[VEC:%.*]], i32 [[IDX:%.*]], i32 [[X:%.*]]) #[[ATTR6]] {2515; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 82516; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 16), align 42517; CALLS-NEXT:    [[TMP3:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 82518; CALLS-NEXT:    [[TMP4:%.*]] = load i32, ptr @__msan_param_origin_tls, align 42519; CALLS-NEXT:    [[TMP5:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 82520; CALLS-NEXT:    [[TMP6:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 24), align 42521; CALLS-NEXT:    call void @llvm.donothing()2522; CALLS-NEXT:    [[_MSPROP:%.*]] = insertelement <4 x i32> [[TMP3]], i32 [[TMP5]], i32 [[IDX]]2523; CALLS-NEXT:    [[TMP7:%.*]] = icmp ne i32 [[TMP5]], 02524; CALLS-NEXT:    [[TMP8:%.*]] = select i1 [[TMP7]], i32 [[TMP6]], i32 [[TMP4]]2525; CALLS-NEXT:    [[TMP9:%.*]] = icmp ne i32 [[TMP1]], 02526; CALLS-NEXT:    [[TMP10:%.*]] = select i1 [[TMP9]], i32 [[TMP2]], i32 [[TMP8]]2527; CALLS-NEXT:    call void @__msan_maybe_warning_4(i32 zeroext [[TMP1]], i32 zeroext [[TMP2]])2528; CALLS-NEXT:    [[VEC1:%.*]] = insertelement <4 x i32> [[VEC]], i32 [[X]], i32 [[IDX]]2529; CALLS-NEXT:    store <4 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 82530; CALLS-NEXT:    store i32 [[TMP10]], ptr @__msan_retval_origin_tls, align 42531; CALLS-NEXT:    ret <4 x i32> [[VEC1]]2532;2533  %vec1 = insertelement <4 x i32> %vec, i32 %x, i32 %idx2534  ret <4 x i32> %vec12535}2536 2537define <4 x i32> @ShuffleVector(<4 x i32> %vec, <4 x i32> %vec1) sanitize_memory {2538; CHECK-LABEL: define <4 x i32> @ShuffleVector(2539; CHECK-SAME: <4 x i32> [[VEC:%.*]], <4 x i32> [[VEC1:%.*]]) #[[ATTR6]] {2540; CHECK-NEXT:    [[TMP1:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 82541; CHECK-NEXT:    [[TMP2:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 82542; CHECK-NEXT:    call void @llvm.donothing()2543; CHECK-NEXT:    [[_MSPROP:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> [[TMP2]], <4 x i32> <i32 0, i32 4, i32 1, i32 5>2544; CHECK-NEXT:    [[VEC2:%.*]] = shufflevector <4 x i32> [[VEC]], <4 x i32> [[VEC1]], <4 x i32> <i32 0, i32 4, i32 1, i32 5>2545; CHECK-NEXT:    store <4 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 82546; CHECK-NEXT:    ret <4 x i32> [[VEC2]]2547;2548; ORIGIN-LABEL: define <4 x i32> @ShuffleVector(2549; ORIGIN-SAME: <4 x i32> [[VEC:%.*]], <4 x i32> [[VEC1:%.*]]) #[[ATTR6]] {2550; ORIGIN-NEXT:    [[TMP1:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 82551; ORIGIN-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 42552; ORIGIN-NEXT:    [[TMP3:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 82553; ORIGIN-NEXT:    [[TMP4:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 16), align 42554; ORIGIN-NEXT:    call void @llvm.donothing()2555; ORIGIN-NEXT:    [[_MSPROP:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> [[TMP3]], <4 x i32> <i32 0, i32 4, i32 1, i32 5>2556; ORIGIN-NEXT:    [[TMP5:%.*]] = bitcast <4 x i32> [[TMP3]] to i1282557; ORIGIN-NEXT:    [[TMP6:%.*]] = icmp ne i128 [[TMP5]], 02558; ORIGIN-NEXT:    [[TMP7:%.*]] = select i1 [[TMP6]], i32 [[TMP4]], i32 [[TMP2]]2559; ORIGIN-NEXT:    [[VEC2:%.*]] = shufflevector <4 x i32> [[VEC]], <4 x i32> [[VEC1]], <4 x i32> <i32 0, i32 4, i32 1, i32 5>2560; ORIGIN-NEXT:    store <4 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 82561; ORIGIN-NEXT:    store i32 [[TMP7]], ptr @__msan_retval_origin_tls, align 42562; ORIGIN-NEXT:    ret <4 x i32> [[VEC2]]2563;2564; CALLS-LABEL: define <4 x i32> @ShuffleVector(2565; CALLS-SAME: <4 x i32> [[VEC:%.*]], <4 x i32> [[VEC1:%.*]]) #[[ATTR6]] {2566; CALLS-NEXT:    [[TMP1:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 82567; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 42568; CALLS-NEXT:    [[TMP3:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 82569; CALLS-NEXT:    [[TMP4:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 16), align 42570; CALLS-NEXT:    call void @llvm.donothing()2571; CALLS-NEXT:    [[_MSPROP:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> [[TMP3]], <4 x i32> <i32 0, i32 4, i32 1, i32 5>2572; CALLS-NEXT:    [[TMP5:%.*]] = bitcast <4 x i32> [[TMP3]] to i1282573; CALLS-NEXT:    [[TMP6:%.*]] = icmp ne i128 [[TMP5]], 02574; CALLS-NEXT:    [[TMP7:%.*]] = select i1 [[TMP6]], i32 [[TMP4]], i32 [[TMP2]]2575; CALLS-NEXT:    [[VEC2:%.*]] = shufflevector <4 x i32> [[VEC]], <4 x i32> [[VEC1]], <4 x i32> <i32 0, i32 4, i32 1, i32 5>2576; CALLS-NEXT:    store <4 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 82577; CALLS-NEXT:    store i32 [[TMP7]], ptr @__msan_retval_origin_tls, align 42578; CALLS-NEXT:    ret <4 x i32> [[VEC2]]2579;2580  %vec2 = shufflevector <4 x i32> %vec, <4 x i32> %vec1,2581  <4 x i32> <i32 0, i32 4, i32 1, i32 5>2582  ret <4 x i32> %vec22583}2584 2585 2586 2587; Test bswap intrinsic instrumentation2588define i32 @BSwap(i32 %x) nounwind uwtable readnone sanitize_memory {2589; CHECK-LABEL: define i32 @BSwap(2590; CHECK-SAME: i32 [[X:%.*]]) #[[ATTR0]] {2591; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 82592; CHECK-NEXT:    call void @llvm.donothing()2593; CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP1]])2594; CHECK-NEXT:    [[Y:%.*]] = tail call i32 @llvm.bswap.i32(i32 [[X]])2595; CHECK-NEXT:    store i32 [[TMP2]], ptr @__msan_retval_tls, align 82596; CHECK-NEXT:    ret i32 [[Y]]2597;2598; ORIGIN-LABEL: define i32 @BSwap(2599; ORIGIN-SAME: i32 [[X:%.*]]) #[[ATTR0]] {2600; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 82601; ORIGIN-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 42602; ORIGIN-NEXT:    call void @llvm.donothing()2603; ORIGIN-NEXT:    [[TMP3:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP1]])2604; ORIGIN-NEXT:    [[Y:%.*]] = tail call i32 @llvm.bswap.i32(i32 [[X]])2605; ORIGIN-NEXT:    store i32 [[TMP3]], ptr @__msan_retval_tls, align 82606; ORIGIN-NEXT:    store i32 [[TMP2]], ptr @__msan_retval_origin_tls, align 42607; ORIGIN-NEXT:    ret i32 [[Y]]2608;2609; CALLS-LABEL: define i32 @BSwap(2610; CALLS-SAME: i32 [[X:%.*]]) #[[ATTR0]] {2611; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 82612; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 42613; CALLS-NEXT:    call void @llvm.donothing()2614; CALLS-NEXT:    [[TMP3:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP1]])2615; CALLS-NEXT:    [[Y:%.*]] = tail call i32 @llvm.bswap.i32(i32 [[X]])2616; CALLS-NEXT:    store i32 [[TMP3]], ptr @__msan_retval_tls, align 82617; CALLS-NEXT:    store i32 [[TMP2]], ptr @__msan_retval_origin_tls, align 42618; CALLS-NEXT:    ret i32 [[Y]]2619;2620  %y = tail call i32 @llvm.bswap.i32(i32 %x)2621  ret i32 %y2622}2623 2624declare i32 @llvm.bswap.i32(i32) nounwind readnone2625 2626 2627; Test handling of vectors of pointers.2628; Check that shadow of such vector is a vector of integers.2629 2630define <8 x ptr> @VectorOfPointers(ptr %p) nounwind uwtable sanitize_memory {2631; CHECK-LABEL: define <8 x ptr> @VectorOfPointers(2632; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR0]] {2633; CHECK-NEXT:    call void @llvm.donothing()2634; CHECK-NEXT:    [[X:%.*]] = load <8 x ptr>, ptr [[P]], align 642635; CHECK-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[P]] to i642636; CHECK-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 879609302220802637; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr2638; CHECK-NEXT:    [[_MSLD:%.*]] = load <8 x i64>, ptr [[TMP3]], align 642639; CHECK-NEXT:    store <8 x i64> [[_MSLD]], ptr @__msan_retval_tls, align 82640; CHECK-NEXT:    ret <8 x ptr> [[X]]2641;2642; ORIGIN-LABEL: define <8 x ptr> @VectorOfPointers(2643; ORIGIN-SAME: ptr [[P:%.*]]) #[[ATTR0]] {2644; ORIGIN-NEXT:    call void @llvm.donothing()2645; ORIGIN-NEXT:    [[X:%.*]] = load <8 x ptr>, ptr [[P]], align 642646; ORIGIN-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[P]] to i642647; ORIGIN-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 879609302220802648; ORIGIN-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr2649; ORIGIN-NEXT:    [[TMP4:%.*]] = add i64 [[TMP2]], 175921860444162650; ORIGIN-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr2651; ORIGIN-NEXT:    [[_MSLD:%.*]] = load <8 x i64>, ptr [[TMP3]], align 642652; ORIGIN-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 642653; ORIGIN-NEXT:    store <8 x i64> [[_MSLD]], ptr @__msan_retval_tls, align 82654; ORIGIN-NEXT:    store i32 [[TMP6]], ptr @__msan_retval_origin_tls, align 42655; ORIGIN-NEXT:    ret <8 x ptr> [[X]]2656;2657; CALLS-LABEL: define <8 x ptr> @VectorOfPointers(2658; CALLS-SAME: ptr [[P:%.*]]) #[[ATTR0]] {2659; CALLS-NEXT:    [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 82660; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 42661; CALLS-NEXT:    call void @llvm.donothing()2662; CALLS-NEXT:    call void @__msan_maybe_warning_8(i64 zeroext [[TMP1]], i32 zeroext [[TMP2]])2663; CALLS-NEXT:    [[X:%.*]] = load <8 x ptr>, ptr [[P]], align 642664; CALLS-NEXT:    [[TMP3:%.*]] = ptrtoint ptr [[P]] to i642665; CALLS-NEXT:    [[TMP4:%.*]] = xor i64 [[TMP3]], 879609302220802666; CALLS-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr2667; CALLS-NEXT:    [[TMP6:%.*]] = add i64 [[TMP4]], 175921860444162668; CALLS-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr2669; CALLS-NEXT:    [[_MSLD:%.*]] = load <8 x i64>, ptr [[TMP5]], align 642670; CALLS-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 642671; CALLS-NEXT:    store <8 x i64> [[_MSLD]], ptr @__msan_retval_tls, align 82672; CALLS-NEXT:    store i32 [[TMP8]], ptr @__msan_retval_origin_tls, align 42673; CALLS-NEXT:    ret <8 x ptr> [[X]]2674;2675  %x = load <8 x ptr>, ptr %p2676  ret <8 x ptr> %x2677}2678 2679 2680; Test handling of va_copy.2681 2682declare void @llvm.va_copy(ptr, ptr) nounwind2683 2684define void @VACopy(ptr %p1, ptr %p2) nounwind uwtable sanitize_memory {2685; CHECK-LABEL: define void @VACopy(2686; CHECK-SAME: ptr [[P1:%.*]], ptr [[P2:%.*]]) #[[ATTR0]] {2687; CHECK-NEXT:    call void @llvm.donothing()2688; CHECK-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[P1]] to i642689; CHECK-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 879609302220802690; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr2691; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 8 [[TMP3]], i8 0, i64 24, i1 false)2692; CHECK-NEXT:    call void @llvm.va_copy.p0(ptr [[P1]], ptr [[P2]]) #[[ATTR5]]2693; CHECK-NEXT:    ret void2694;2695; ORIGIN-LABEL: define void @VACopy(2696; ORIGIN-SAME: ptr [[P1:%.*]], ptr [[P2:%.*]]) #[[ATTR0]] {2697; ORIGIN-NEXT:    call void @llvm.donothing()2698; ORIGIN-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[P1]] to i642699; ORIGIN-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 879609302220802700; ORIGIN-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr2701; ORIGIN-NEXT:    [[TMP4:%.*]] = add i64 [[TMP2]], 175921860444162702; ORIGIN-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr2703; ORIGIN-NEXT:    call void @llvm.memset.p0.i64(ptr align 8 [[TMP3]], i8 0, i64 24, i1 false)2704; ORIGIN-NEXT:    call void @llvm.va_copy.p0(ptr [[P1]], ptr [[P2]]) #[[ATTR5]]2705; ORIGIN-NEXT:    ret void2706;2707; CALLS-LABEL: define void @VACopy(2708; CALLS-SAME: ptr [[P1:%.*]], ptr [[P2:%.*]]) #[[ATTR0]] {2709; CALLS-NEXT:    call void @llvm.donothing()2710; CALLS-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[P1]] to i642711; CALLS-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 879609302220802712; CALLS-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr2713; CALLS-NEXT:    [[TMP4:%.*]] = add i64 [[TMP2]], 175921860444162714; CALLS-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr2715; CALLS-NEXT:    call void @llvm.memset.p0.i64(ptr align 8 [[TMP3]], i8 0, i64 24, i1 false)2716; CALLS-NEXT:    call void @llvm.va_copy.p0(ptr [[P1]], ptr [[P2]]) #[[ATTR5]]2717; CALLS-NEXT:    ret void2718;2719  call void @llvm.va_copy(ptr %p1, ptr %p2) nounwind2720  ret void2721}2722 2723 2724 2725; Test that va_start instrumentation does not use va_arg_tls*.2726; It should work with a local stack copy instead.2727 2728%struct.__va_list_tag = type { i32, i32, ptr, ptr }2729declare void @llvm.va_start(ptr) nounwind2730 2731; Function Attrs: nounwind uwtable2732define void @VAStart(i32 %x, ...) sanitize_memory {2733; CHECK-LABEL: define void @VAStart(2734; CHECK-SAME: i32 [[X:%.*]], ...) #[[ATTR6]] {2735; CHECK-NEXT:  [[ENTRY:.*:]]2736; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 82737; CHECK-NEXT:    [[TMP1:%.*]] = add i64 176, [[TMP0]]2738; CHECK-NEXT:    [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 82739; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)2740; CHECK-NEXT:    [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)2741; CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)2742; CHECK-NEXT:    [[TMP4:%.*]] = load i32, ptr @__msan_param_tls, align 82743; CHECK-NEXT:    call void @llvm.donothing()2744; CHECK-NEXT:    [[X_ADDR:%.*]] = alloca i32, align 42745; CHECK-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[X_ADDR]] to i642746; CHECK-NEXT:    [[TMP6:%.*]] = xor i64 [[TMP5]], 879609302220802747; CHECK-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr2748; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 4 [[TMP7]], i8 -1, i64 4, i1 false)2749; CHECK-NEXT:    [[VA:%.*]] = alloca [1 x %struct.__va_list_tag], align 162750; CHECK-NEXT:    [[TMP8:%.*]] = ptrtoint ptr [[VA]] to i642751; CHECK-NEXT:    [[TMP9:%.*]] = xor i64 [[TMP8]], 879609302220802752; CHECK-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr2753; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 16 [[TMP10]], i8 -1, i64 24, i1 false)2754; CHECK-NEXT:    [[TMP11:%.*]] = ptrtoint ptr [[X_ADDR]] to i642755; CHECK-NEXT:    [[TMP12:%.*]] = xor i64 [[TMP11]], 879609302220802756; CHECK-NEXT:    [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr2757; CHECK-NEXT:    store i32 [[TMP4]], ptr [[TMP13]], align 42758; CHECK-NEXT:    store i32 [[X]], ptr [[X_ADDR]], align 42759; CHECK-NEXT:    [[TMP14:%.*]] = ptrtoint ptr [[VA]] to i642760; CHECK-NEXT:    [[TMP15:%.*]] = xor i64 [[TMP14]], 879609302220802761; CHECK-NEXT:    [[TMP16:%.*]] = inttoptr i64 [[TMP15]] to ptr2762; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 8 [[TMP16]], i8 0, i64 24, i1 false)2763; CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[VA]])2764; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr i8, ptr [[VA]], i64 162765; CHECK-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[TMP19]], align 82766; CHECK-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i642767; CHECK-NEXT:    [[TMP22:%.*]] = xor i64 [[TMP21]], 879609302220802768; CHECK-NEXT:    [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr2769; CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP23]], ptr align 16 [[TMP2]], i64 176, i1 false)2770; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr i8, ptr [[VA]], i64 82771; CHECK-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[TMP26]], align 82772; CHECK-NEXT:    [[TMP28:%.*]] = ptrtoint ptr [[TMP27]] to i642773; CHECK-NEXT:    [[TMP29:%.*]] = xor i64 [[TMP28]], 879609302220802774; CHECK-NEXT:    [[TMP30:%.*]] = inttoptr i64 [[TMP29]] to ptr2775; CHECK-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP2]], i32 1762776; CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP30]], ptr align 16 [[TMP31]], i64 [[TMP0]], i1 false)2777; CHECK-NEXT:    ret void2778;2779; ORIGIN-LABEL: define void @VAStart(2780; ORIGIN-SAME: i32 [[X:%.*]], ...) #[[ATTR6]] {2781; ORIGIN-NEXT:  [[ENTRY:.*:]]2782; ORIGIN-NEXT:    [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 82783; ORIGIN-NEXT:    [[TMP1:%.*]] = add i64 176, [[TMP0]]2784; ORIGIN-NEXT:    [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 82785; ORIGIN-NEXT:    call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)2786; ORIGIN-NEXT:    [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)2787; ORIGIN-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)2788; ORIGIN-NEXT:    [[TMP4:%.*]] = alloca i8, i64 [[TMP1]], align 82789; ORIGIN-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP4]], ptr align 8 @__msan_va_arg_origin_tls, i64 [[TMP3]], i1 false)2790; ORIGIN-NEXT:    [[TMP5:%.*]] = load i32, ptr @__msan_param_tls, align 82791; ORIGIN-NEXT:    [[TMP6:%.*]] = load i32, ptr @__msan_param_origin_tls, align 42792; ORIGIN-NEXT:    call void @llvm.donothing()2793; ORIGIN-NEXT:    [[X_ADDR:%.*]] = alloca i32, align 42794; ORIGIN-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[X_ADDR]] to i642795; ORIGIN-NEXT:    [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220802796; ORIGIN-NEXT:    [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr2797; ORIGIN-NEXT:    [[TMP10:%.*]] = add i64 [[TMP8]], 175921860444162798; ORIGIN-NEXT:    [[TMP11:%.*]] = and i64 [[TMP10]], -42799; ORIGIN-NEXT:    [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr2800; ORIGIN-NEXT:    call void @llvm.memset.p0.i64(ptr align 4 [[TMP9]], i8 -1, i64 4, i1 false)2801; ORIGIN-NEXT:    call void @__msan_set_alloca_origin_with_descr(ptr [[X_ADDR]], i64 4, ptr @[[GLOB4:[0-9]+]], ptr @[[GLOB5:[0-9]+]])2802; ORIGIN-NEXT:    [[VA:%.*]] = alloca [1 x %struct.__va_list_tag], align 162803; ORIGIN-NEXT:    [[TMP13:%.*]] = ptrtoint ptr [[VA]] to i642804; ORIGIN-NEXT:    [[TMP14:%.*]] = xor i64 [[TMP13]], 879609302220802805; ORIGIN-NEXT:    [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr2806; ORIGIN-NEXT:    [[TMP16:%.*]] = add i64 [[TMP14]], 175921860444162807; ORIGIN-NEXT:    [[TMP17:%.*]] = and i64 [[TMP16]], -42808; ORIGIN-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr2809; ORIGIN-NEXT:    call void @llvm.memset.p0.i64(ptr align 16 [[TMP15]], i8 -1, i64 24, i1 false)2810; ORIGIN-NEXT:    call void @__msan_set_alloca_origin_with_descr(ptr [[VA]], i64 24, ptr @[[GLOB6:[0-9]+]], ptr @[[GLOB7:[0-9]+]])2811; ORIGIN-NEXT:    [[TMP19:%.*]] = ptrtoint ptr [[X_ADDR]] to i642812; ORIGIN-NEXT:    [[TMP20:%.*]] = xor i64 [[TMP19]], 879609302220802813; ORIGIN-NEXT:    [[TMP21:%.*]] = inttoptr i64 [[TMP20]] to ptr2814; ORIGIN-NEXT:    [[TMP22:%.*]] = add i64 [[TMP20]], 175921860444162815; ORIGIN-NEXT:    [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr2816; ORIGIN-NEXT:    store i32 [[TMP5]], ptr [[TMP21]], align 42817; ORIGIN-NEXT:    [[_MSCMP:%.*]] = icmp ne i32 [[TMP5]], 02818; ORIGIN-NEXT:    br i1 [[_MSCMP]], label %[[BB24:.*]], label %[[BB25:.*]], !prof [[PROF1]]2819; ORIGIN:       [[BB24]]:2820; ORIGIN-NEXT:    store i32 [[TMP6]], ptr [[TMP23]], align 42821; ORIGIN-NEXT:    br label %[[BB25]]2822; ORIGIN:       [[BB25]]:2823; ORIGIN-NEXT:    store i32 [[X]], ptr [[X_ADDR]], align 42824; ORIGIN-NEXT:    [[TMP26:%.*]] = ptrtoint ptr [[VA]] to i642825; ORIGIN-NEXT:    [[TMP27:%.*]] = xor i64 [[TMP26]], 879609302220802826; ORIGIN-NEXT:    [[TMP28:%.*]] = inttoptr i64 [[TMP27]] to ptr2827; ORIGIN-NEXT:    [[TMP29:%.*]] = add i64 [[TMP27]], 175921860444162828; ORIGIN-NEXT:    [[TMP30:%.*]] = inttoptr i64 [[TMP29]] to ptr2829; ORIGIN-NEXT:    call void @llvm.memset.p0.i64(ptr align 8 [[TMP28]], i8 0, i64 24, i1 false)2830; ORIGIN-NEXT:    call void @llvm.va_start.p0(ptr [[VA]])2831; ORIGIN-NEXT:    [[TMP33:%.*]] = getelementptr i8, ptr [[VA]], i64 162832; ORIGIN-NEXT:    [[TMP34:%.*]] = load ptr, ptr [[TMP33]], align 82833; ORIGIN-NEXT:    [[TMP35:%.*]] = ptrtoint ptr [[TMP34]] to i642834; ORIGIN-NEXT:    [[TMP36:%.*]] = xor i64 [[TMP35]], 879609302220802835; ORIGIN-NEXT:    [[TMP37:%.*]] = inttoptr i64 [[TMP36]] to ptr2836; ORIGIN-NEXT:    [[TMP38:%.*]] = add i64 [[TMP36]], 175921860444162837; ORIGIN-NEXT:    [[TMP39:%.*]] = inttoptr i64 [[TMP38]] to ptr2838; ORIGIN-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP37]], ptr align 16 [[TMP2]], i64 176, i1 false)2839; ORIGIN-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP39]], ptr align 16 [[TMP4]], i64 176, i1 false)2840; ORIGIN-NEXT:    [[TMP42:%.*]] = getelementptr i8, ptr [[VA]], i64 82841; ORIGIN-NEXT:    [[TMP43:%.*]] = load ptr, ptr [[TMP42]], align 82842; ORIGIN-NEXT:    [[TMP44:%.*]] = ptrtoint ptr [[TMP43]] to i642843; ORIGIN-NEXT:    [[TMP45:%.*]] = xor i64 [[TMP44]], 879609302220802844; ORIGIN-NEXT:    [[TMP46:%.*]] = inttoptr i64 [[TMP45]] to ptr2845; ORIGIN-NEXT:    [[TMP47:%.*]] = add i64 [[TMP45]], 175921860444162846; ORIGIN-NEXT:    [[TMP48:%.*]] = inttoptr i64 [[TMP47]] to ptr2847; ORIGIN-NEXT:    [[TMP49:%.*]] = getelementptr i8, ptr [[TMP2]], i32 1762848; ORIGIN-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP46]], ptr align 16 [[TMP49]], i64 [[TMP0]], i1 false)2849; ORIGIN-NEXT:    [[TMP50:%.*]] = getelementptr i8, ptr [[TMP4]], i32 1762850; ORIGIN-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP48]], ptr align 16 [[TMP50]], i64 [[TMP0]], i1 false)2851; ORIGIN-NEXT:    ret void2852;2853; CALLS-LABEL: define void @VAStart(2854; CALLS-SAME: i32 [[X:%.*]], ...) #[[ATTR6]] {2855; CALLS-NEXT:  [[ENTRY:.*:]]2856; CALLS-NEXT:    [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 82857; CALLS-NEXT:    [[TMP1:%.*]] = add i64 176, [[TMP0]]2858; CALLS-NEXT:    [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 82859; CALLS-NEXT:    call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)2860; CALLS-NEXT:    [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)2861; CALLS-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)2862; CALLS-NEXT:    [[TMP4:%.*]] = alloca i8, i64 [[TMP1]], align 82863; CALLS-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP4]], ptr align 8 @__msan_va_arg_origin_tls, i64 [[TMP3]], i1 false)2864; CALLS-NEXT:    [[TMP5:%.*]] = load i32, ptr @__msan_param_tls, align 82865; CALLS-NEXT:    [[TMP6:%.*]] = load i32, ptr @__msan_param_origin_tls, align 42866; CALLS-NEXT:    call void @llvm.donothing()2867; CALLS-NEXT:    [[X_ADDR:%.*]] = alloca i32, align 42868; CALLS-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[X_ADDR]] to i642869; CALLS-NEXT:    [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220802870; CALLS-NEXT:    [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr2871; CALLS-NEXT:    [[TMP10:%.*]] = add i64 [[TMP8]], 175921860444162872; CALLS-NEXT:    [[TMP11:%.*]] = and i64 [[TMP10]], -42873; CALLS-NEXT:    [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr2874; CALLS-NEXT:    call void @llvm.memset.p0.i64(ptr align 4 [[TMP9]], i8 -1, i64 4, i1 false)2875; CALLS-NEXT:    call void @__msan_set_alloca_origin_with_descr(ptr [[X_ADDR]], i64 4, ptr @[[GLOB4:[0-9]+]], ptr @[[GLOB5:[0-9]+]])2876; CALLS-NEXT:    [[VA:%.*]] = alloca [1 x %struct.__va_list_tag], align 162877; CALLS-NEXT:    [[TMP13:%.*]] = ptrtoint ptr [[VA]] to i642878; CALLS-NEXT:    [[TMP14:%.*]] = xor i64 [[TMP13]], 879609302220802879; CALLS-NEXT:    [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr2880; CALLS-NEXT:    [[TMP16:%.*]] = add i64 [[TMP14]], 175921860444162881; CALLS-NEXT:    [[TMP17:%.*]] = and i64 [[TMP16]], -42882; CALLS-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr2883; CALLS-NEXT:    call void @llvm.memset.p0.i64(ptr align 16 [[TMP15]], i8 -1, i64 24, i1 false)2884; CALLS-NEXT:    call void @__msan_set_alloca_origin_with_descr(ptr [[VA]], i64 24, ptr @[[GLOB6:[0-9]+]], ptr @[[GLOB7:[0-9]+]])2885; CALLS-NEXT:    [[TMP19:%.*]] = ptrtoint ptr [[X_ADDR]] to i642886; CALLS-NEXT:    [[TMP20:%.*]] = xor i64 [[TMP19]], 879609302220802887; CALLS-NEXT:    [[TMP21:%.*]] = inttoptr i64 [[TMP20]] to ptr2888; CALLS-NEXT:    [[TMP22:%.*]] = add i64 [[TMP20]], 175921860444162889; CALLS-NEXT:    [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr2890; CALLS-NEXT:    store i32 [[TMP5]], ptr [[TMP21]], align 42891; CALLS-NEXT:    call void @__msan_maybe_store_origin_4(i32 zeroext [[TMP5]], ptr [[X_ADDR]], i32 zeroext [[TMP6]])2892; CALLS-NEXT:    store i32 [[X]], ptr [[X_ADDR]], align 42893; CALLS-NEXT:    [[TMP24:%.*]] = ptrtoint ptr [[VA]] to i642894; CALLS-NEXT:    [[TMP25:%.*]] = xor i64 [[TMP24]], 879609302220802895; CALLS-NEXT:    [[TMP26:%.*]] = inttoptr i64 [[TMP25]] to ptr2896; CALLS-NEXT:    [[TMP27:%.*]] = add i64 [[TMP25]], 175921860444162897; CALLS-NEXT:    [[TMP28:%.*]] = inttoptr i64 [[TMP27]] to ptr2898; CALLS-NEXT:    call void @llvm.memset.p0.i64(ptr align 8 [[TMP26]], i8 0, i64 24, i1 false)2899; CALLS-NEXT:    call void @llvm.va_start.p0(ptr [[VA]])2900; CALLS-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[VA]], i64 162901; CALLS-NEXT:    [[TMP32:%.*]] = load ptr, ptr [[TMP31]], align 82902; CALLS-NEXT:    [[TMP33:%.*]] = ptrtoint ptr [[TMP32]] to i642903; CALLS-NEXT:    [[TMP34:%.*]] = xor i64 [[TMP33]], 879609302220802904; CALLS-NEXT:    [[TMP35:%.*]] = inttoptr i64 [[TMP34]] to ptr2905; CALLS-NEXT:    [[TMP36:%.*]] = add i64 [[TMP34]], 175921860444162906; CALLS-NEXT:    [[TMP37:%.*]] = inttoptr i64 [[TMP36]] to ptr2907; CALLS-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP35]], ptr align 16 [[TMP2]], i64 176, i1 false)2908; CALLS-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP37]], ptr align 16 [[TMP4]], i64 176, i1 false)2909; CALLS-NEXT:    [[TMP40:%.*]] = getelementptr i8, ptr [[VA]], i64 82910; CALLS-NEXT:    [[TMP41:%.*]] = load ptr, ptr [[TMP40]], align 82911; CALLS-NEXT:    [[TMP42:%.*]] = ptrtoint ptr [[TMP41]] to i642912; CALLS-NEXT:    [[TMP43:%.*]] = xor i64 [[TMP42]], 879609302220802913; CALLS-NEXT:    [[TMP44:%.*]] = inttoptr i64 [[TMP43]] to ptr2914; CALLS-NEXT:    [[TMP45:%.*]] = add i64 [[TMP43]], 175921860444162915; CALLS-NEXT:    [[TMP46:%.*]] = inttoptr i64 [[TMP45]] to ptr2916; CALLS-NEXT:    [[TMP47:%.*]] = getelementptr i8, ptr [[TMP2]], i32 1762917; CALLS-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP44]], ptr align 16 [[TMP47]], i64 [[TMP0]], i1 false)2918; CALLS-NEXT:    [[TMP48:%.*]] = getelementptr i8, ptr [[TMP4]], i32 1762919; CALLS-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP46]], ptr align 16 [[TMP48]], i64 [[TMP0]], i1 false)2920; CALLS-NEXT:    ret void2921;2922entry:2923  %x.addr = alloca i32, align 42924  %va = alloca [1 x %struct.__va_list_tag], align 162925  store i32 %x, ptr %x.addr, align 42926  call void @llvm.va_start(ptr %va)2927  ret void2928}2929 2930 2931 2932; Test handling of volatile stores.2933; Check that MemorySanitizer does not add a check of the value being stored.2934 2935define void @VolatileStore(ptr nocapture %p, i32 %x) nounwind uwtable sanitize_memory {2936; CHECK-LABEL: define void @VolatileStore(2937; CHECK-SAME: ptr captures(none) [[P:%.*]], i32 [[X:%.*]]) #[[ATTR0]] {2938; CHECK-NEXT:  [[ENTRY:.*:]]2939; CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 82940; CHECK-NEXT:    call void @llvm.donothing()2941; CHECK-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[P]] to i642942; CHECK-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 879609302220802943; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr2944; CHECK-NEXT:    store i32 [[TMP0]], ptr [[TMP3]], align 42945; CHECK-NEXT:    store volatile i32 [[X]], ptr [[P]], align 42946; CHECK-NEXT:    ret void2947;2948; ORIGIN-LABEL: define void @VolatileStore(2949; ORIGIN-SAME: ptr captures(none) [[P:%.*]], i32 [[X:%.*]]) #[[ATTR0]] {2950; ORIGIN-NEXT:  [[ENTRY:.*:]]2951; ORIGIN-NEXT:    [[TMP0:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 82952; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 42953; ORIGIN-NEXT:    call void @llvm.donothing()2954; ORIGIN-NEXT:    [[TMP2:%.*]] = ptrtoint ptr [[P]] to i642955; ORIGIN-NEXT:    [[TMP3:%.*]] = xor i64 [[TMP2]], 879609302220802956; ORIGIN-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr2957; ORIGIN-NEXT:    [[TMP5:%.*]] = add i64 [[TMP3]], 175921860444162958; ORIGIN-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr2959; ORIGIN-NEXT:    store i32 [[TMP0]], ptr [[TMP4]], align 42960; ORIGIN-NEXT:    [[_MSCMP:%.*]] = icmp ne i32 [[TMP0]], 02961; ORIGIN-NEXT:    br i1 [[_MSCMP]], label %[[BB7:.*]], label %[[BB8:.*]], !prof [[PROF1]]2962; ORIGIN:       [[BB7]]:2963; ORIGIN-NEXT:    store i32 [[TMP1]], ptr [[TMP6]], align 42964; ORIGIN-NEXT:    br label %[[BB8]]2965; ORIGIN:       [[BB8]]:2966; ORIGIN-NEXT:    store volatile i32 [[X]], ptr [[P]], align 42967; ORIGIN-NEXT:    ret void2968;2969; CALLS-LABEL: define void @VolatileStore(2970; CALLS-SAME: ptr captures(none) [[P:%.*]], i32 [[X:%.*]]) #[[ATTR0]] {2971; CALLS-NEXT:  [[ENTRY:.*:]]2972; CALLS-NEXT:    [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 82973; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 42974; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 82975; CALLS-NEXT:    [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 42976; CALLS-NEXT:    call void @llvm.donothing()2977; CALLS-NEXT:    call void @__msan_maybe_warning_8(i64 zeroext [[TMP0]], i32 zeroext [[TMP1]])2978; CALLS-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[P]] to i642979; CALLS-NEXT:    [[TMP5:%.*]] = xor i64 [[TMP4]], 879609302220802980; CALLS-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr2981; CALLS-NEXT:    [[TMP7:%.*]] = add i64 [[TMP5]], 175921860444162982; CALLS-NEXT:    [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr2983; CALLS-NEXT:    store i32 [[TMP2]], ptr [[TMP6]], align 42984; CALLS-NEXT:    call void @__msan_maybe_store_origin_4(i32 zeroext [[TMP2]], ptr [[P]], i32 zeroext [[TMP3]])2985; CALLS-NEXT:    store volatile i32 [[X]], ptr [[P]], align 42986; CALLS-NEXT:    ret void2987;2988entry:2989  store volatile i32 %x, ptr %p, align 42990  ret void2991}2992 2993 2994 2995; Test that checks are omitted and returned value is always initialized if2996; sanitize_memory attribute is missing.2997 2998define i32 @NoSanitizeMemory(i32 %x) uwtable {2999; CHECK-LABEL: define i32 @NoSanitizeMemory(3000; CHECK-SAME: i32 [[X:%.*]]) #[[ATTR8:[0-9]+]] {3001; CHECK-NEXT:  [[ENTRY:.*:]]3002; CHECK-NEXT:    call void @llvm.donothing()3003; CHECK-NEXT:    [[TMP0:%.*]] = xor i32 [[X]], 03004; CHECK-NEXT:    [[TMP1:%.*]] = and i32 -1, [[TMP0]]3005; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 03006; CHECK-NEXT:    [[_MSPROP_ICMP:%.*]] = and i1 false, [[TMP2]]3007; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp eq i32 [[X]], 03008; CHECK-NEXT:    br i1 [[TOBOOL]], label %[[IF_END:.*]], label %[[IF_THEN:.*]]3009; CHECK:       [[IF_THEN]]:3010; CHECK-NEXT:    tail call void @bar()3011; CHECK-NEXT:    br label %[[IF_END]]3012; CHECK:       [[IF_END]]:3013; CHECK-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83014; CHECK-NEXT:    ret i32 [[X]]3015;3016; ORIGIN-LABEL: define i32 @NoSanitizeMemory(3017; ORIGIN-SAME: i32 [[X:%.*]]) #[[ATTR8:[0-9]+]] {3018; ORIGIN-NEXT:  [[ENTRY:.*:]]3019; ORIGIN-NEXT:    call void @llvm.donothing()3020; ORIGIN-NEXT:    [[TMP0:%.*]] = xor i32 [[X]], 03021; ORIGIN-NEXT:    [[TMP1:%.*]] = and i32 -1, [[TMP0]]3022; ORIGIN-NEXT:    [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 03023; ORIGIN-NEXT:    [[_MSPROP_ICMP:%.*]] = and i1 false, [[TMP2]]3024; ORIGIN-NEXT:    [[TOBOOL:%.*]] = icmp eq i32 [[X]], 03025; ORIGIN-NEXT:    br i1 [[TOBOOL]], label %[[IF_END:.*]], label %[[IF_THEN:.*]]3026; ORIGIN:       [[IF_THEN]]:3027; ORIGIN-NEXT:    tail call void @bar()3028; ORIGIN-NEXT:    br label %[[IF_END]]3029; ORIGIN:       [[IF_END]]:3030; ORIGIN-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83031; ORIGIN-NEXT:    store i32 0, ptr @__msan_retval_origin_tls, align 43032; ORIGIN-NEXT:    ret i32 [[X]]3033;3034; CALLS-LABEL: define i32 @NoSanitizeMemory(3035; CALLS-SAME: i32 [[X:%.*]]) #[[ATTR8:[0-9]+]] {3036; CALLS-NEXT:  [[ENTRY:.*:]]3037; CALLS-NEXT:    call void @llvm.donothing()3038; CALLS-NEXT:    [[TMP0:%.*]] = xor i32 [[X]], 03039; CALLS-NEXT:    [[TMP1:%.*]] = and i32 -1, [[TMP0]]3040; CALLS-NEXT:    [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 03041; CALLS-NEXT:    [[_MSPROP_ICMP:%.*]] = and i1 false, [[TMP2]]3042; CALLS-NEXT:    [[TOBOOL:%.*]] = icmp eq i32 [[X]], 03043; CALLS-NEXT:    br i1 [[TOBOOL]], label %[[IF_END:.*]], label %[[IF_THEN:.*]]3044; CALLS:       [[IF_THEN]]:3045; CALLS-NEXT:    tail call void @bar()3046; CALLS-NEXT:    br label %[[IF_END]]3047; CALLS:       [[IF_END]]:3048; CALLS-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83049; CALLS-NEXT:    store i32 0, ptr @__msan_retval_origin_tls, align 43050; CALLS-NEXT:    ret i32 [[X]]3051;3052entry:3053  %tobool = icmp eq i32 %x, 03054  br i1 %tobool, label %if.end, label %if.then3055 3056if.then:                                          ; preds = %entry3057  tail call void @bar()3058  br label %if.end3059 3060if.end:                                           ; preds = %entry, %if.then3061  ret i32 %x3062}3063 3064declare void @bar()3065 3066 3067 3068; Test that stack allocations are unpoisoned in functions missing3069; sanitize_memory attribute3070 3071define i32 @NoSanitizeMemoryAlloca() {3072; CHECK-LABEL: define i32 @NoSanitizeMemoryAlloca() {3073; CHECK-NEXT:  [[ENTRY:.*:]]3074; CHECK-NEXT:    call void @llvm.donothing()3075; CHECK-NEXT:    [[P:%.*]] = alloca i32, align 43076; CHECK-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[P]] to i643077; CHECK-NEXT:    [[TMP1:%.*]] = xor i64 [[TMP0]], 879609302220803078; CHECK-NEXT:    [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to ptr3079; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 4 [[TMP2]], i8 0, i64 4, i1 false)3080; CHECK-NEXT:    store i64 0, ptr @__msan_param_tls, align 83081; CHECK-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83082; CHECK-NEXT:    [[X:%.*]] = call i32 @NoSanitizeMemoryAllocaHelper(ptr [[P]])3083; CHECK-NEXT:    [[_MSRET:%.*]] = load i32, ptr @__msan_retval_tls, align 83084; CHECK-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83085; CHECK-NEXT:    ret i32 [[X]]3086;3087; ORIGIN-LABEL: define i32 @NoSanitizeMemoryAlloca() {3088; ORIGIN-NEXT:  [[ENTRY:.*:]]3089; ORIGIN-NEXT:    call void @llvm.donothing()3090; ORIGIN-NEXT:    [[P:%.*]] = alloca i32, align 43091; ORIGIN-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[P]] to i643092; ORIGIN-NEXT:    [[TMP1:%.*]] = xor i64 [[TMP0]], 879609302220803093; ORIGIN-NEXT:    [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to ptr3094; ORIGIN-NEXT:    [[TMP3:%.*]] = add i64 [[TMP1]], 175921860444163095; ORIGIN-NEXT:    [[TMP4:%.*]] = and i64 [[TMP3]], -43096; ORIGIN-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr3097; ORIGIN-NEXT:    call void @llvm.memset.p0.i64(ptr align 4 [[TMP2]], i8 0, i64 4, i1 false)3098; ORIGIN-NEXT:    store i64 0, ptr @__msan_param_tls, align 83099; ORIGIN-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83100; ORIGIN-NEXT:    [[X:%.*]] = call i32 @NoSanitizeMemoryAllocaHelper(ptr [[P]])3101; ORIGIN-NEXT:    [[_MSRET:%.*]] = load i32, ptr @__msan_retval_tls, align 83102; ORIGIN-NEXT:    [[TMP6:%.*]] = load i32, ptr @__msan_retval_origin_tls, align 43103; ORIGIN-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83104; ORIGIN-NEXT:    store i32 0, ptr @__msan_retval_origin_tls, align 43105; ORIGIN-NEXT:    ret i32 [[X]]3106;3107; CALLS-LABEL: define i32 @NoSanitizeMemoryAlloca() {3108; CALLS-NEXT:  [[ENTRY:.*:]]3109; CALLS-NEXT:    call void @llvm.donothing()3110; CALLS-NEXT:    [[P:%.*]] = alloca i32, align 43111; CALLS-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[P]] to i643112; CALLS-NEXT:    [[TMP1:%.*]] = xor i64 [[TMP0]], 879609302220803113; CALLS-NEXT:    [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to ptr3114; CALLS-NEXT:    [[TMP3:%.*]] = add i64 [[TMP1]], 175921860444163115; CALLS-NEXT:    [[TMP4:%.*]] = and i64 [[TMP3]], -43116; CALLS-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr3117; CALLS-NEXT:    call void @llvm.memset.p0.i64(ptr align 4 [[TMP2]], i8 0, i64 4, i1 false)3118; CALLS-NEXT:    store i64 0, ptr @__msan_param_tls, align 83119; CALLS-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83120; CALLS-NEXT:    [[X:%.*]] = call i32 @NoSanitizeMemoryAllocaHelper(ptr [[P]])3121; CALLS-NEXT:    [[_MSRET:%.*]] = load i32, ptr @__msan_retval_tls, align 83122; CALLS-NEXT:    [[TMP6:%.*]] = load i32, ptr @__msan_retval_origin_tls, align 43123; CALLS-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83124; CALLS-NEXT:    store i32 0, ptr @__msan_retval_origin_tls, align 43125; CALLS-NEXT:    ret i32 [[X]]3126;3127entry:3128  %p = alloca i32, align 43129  %x = call i32 @NoSanitizeMemoryAllocaHelper(ptr %p)3130  ret i32 %x3131}3132 3133declare i32 @NoSanitizeMemoryAllocaHelper(ptr %p)3134 3135 3136 3137; Test that undef is unpoisoned in functions missing3138; sanitize_memory attribute3139 3140define i32 @NoSanitizeMemoryUndef() {3141; CHECK-LABEL: define i32 @NoSanitizeMemoryUndef() {3142; CHECK-NEXT:  [[ENTRY:.*:]]3143; CHECK-NEXT:    call void @llvm.donothing()3144; CHECK-NEXT:    store i32 0, ptr @__msan_param_tls, align 83145; CHECK-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83146; CHECK-NEXT:    [[X:%.*]] = call i32 @NoSanitizeMemoryUndefHelper(i32 undef)3147; CHECK-NEXT:    [[_MSRET:%.*]] = load i32, ptr @__msan_retval_tls, align 83148; CHECK-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83149; CHECK-NEXT:    ret i32 [[X]]3150;3151; ORIGIN-LABEL: define i32 @NoSanitizeMemoryUndef() {3152; ORIGIN-NEXT:  [[ENTRY:.*:]]3153; ORIGIN-NEXT:    call void @llvm.donothing()3154; ORIGIN-NEXT:    store i32 0, ptr @__msan_param_tls, align 83155; ORIGIN-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83156; ORIGIN-NEXT:    [[X:%.*]] = call i32 @NoSanitizeMemoryUndefHelper(i32 undef)3157; ORIGIN-NEXT:    [[_MSRET:%.*]] = load i32, ptr @__msan_retval_tls, align 83158; ORIGIN-NEXT:    [[TMP0:%.*]] = load i32, ptr @__msan_retval_origin_tls, align 43159; ORIGIN-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83160; ORIGIN-NEXT:    store i32 0, ptr @__msan_retval_origin_tls, align 43161; ORIGIN-NEXT:    ret i32 [[X]]3162;3163; CALLS-LABEL: define i32 @NoSanitizeMemoryUndef() {3164; CALLS-NEXT:  [[ENTRY:.*:]]3165; CALLS-NEXT:    call void @llvm.donothing()3166; CALLS-NEXT:    store i32 0, ptr @__msan_param_tls, align 83167; CALLS-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83168; CALLS-NEXT:    [[X:%.*]] = call i32 @NoSanitizeMemoryUndefHelper(i32 undef)3169; CALLS-NEXT:    [[_MSRET:%.*]] = load i32, ptr @__msan_retval_tls, align 83170; CALLS-NEXT:    [[TMP0:%.*]] = load i32, ptr @__msan_retval_origin_tls, align 43171; CALLS-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83172; CALLS-NEXT:    store i32 0, ptr @__msan_retval_origin_tls, align 43173; CALLS-NEXT:    ret i32 [[X]]3174;3175entry:3176  %x = call i32 @NoSanitizeMemoryUndefHelper(i32 undef)3177  ret i32 %x3178}3179 3180declare i32 @NoSanitizeMemoryUndefHelper(i32 %x)3181 3182 3183 3184; Test PHINode instrumentation in ignorelisted functions3185 3186define i32 @NoSanitizeMemoryPHI(i32 %x) {3187; CHECK-LABEL: define i32 @NoSanitizeMemoryPHI(3188; CHECK-SAME: i32 [[X:%.*]]) {3189; CHECK-NEXT:  [[ENTRY:.*:]]3190; CHECK-NEXT:    call void @llvm.donothing()3191; CHECK-NEXT:    [[TMP0:%.*]] = xor i32 [[X]], 03192; CHECK-NEXT:    [[TMP1:%.*]] = and i32 -1, [[TMP0]]3193; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 03194; CHECK-NEXT:    [[_MSPROP_ICMP:%.*]] = and i1 false, [[TMP2]]3195; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[X]], 03196; CHECK-NEXT:    br i1 [[TOBOOL]], label %[[COND_TRUE:.*]], label %[[COND_FALSE:.*]]3197; CHECK:       [[COND_TRUE]]:3198; CHECK-NEXT:    br label %[[COND_END:.*]]3199; CHECK:       [[COND_FALSE]]:3200; CHECK-NEXT:    br label %[[COND_END]]3201; CHECK:       [[COND_END]]:3202; CHECK-NEXT:    [[COND:%.*]] = phi i32 [ undef, %[[COND_TRUE]] ], [ undef, %[[COND_FALSE]] ]3203; CHECK-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83204; CHECK-NEXT:    ret i32 [[COND]]3205;3206; ORIGIN-LABEL: define i32 @NoSanitizeMemoryPHI(3207; ORIGIN-SAME: i32 [[X:%.*]]) {3208; ORIGIN-NEXT:  [[ENTRY:.*:]]3209; ORIGIN-NEXT:    call void @llvm.donothing()3210; ORIGIN-NEXT:    [[TMP0:%.*]] = xor i32 [[X]], 03211; ORIGIN-NEXT:    [[TMP1:%.*]] = and i32 -1, [[TMP0]]3212; ORIGIN-NEXT:    [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 03213; ORIGIN-NEXT:    [[_MSPROP_ICMP:%.*]] = and i1 false, [[TMP2]]3214; ORIGIN-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[X]], 03215; ORIGIN-NEXT:    br i1 [[TOBOOL]], label %[[COND_TRUE:.*]], label %[[COND_FALSE:.*]]3216; ORIGIN:       [[COND_TRUE]]:3217; ORIGIN-NEXT:    br label %[[COND_END:.*]]3218; ORIGIN:       [[COND_FALSE]]:3219; ORIGIN-NEXT:    br label %[[COND_END]]3220; ORIGIN:       [[COND_END]]:3221; ORIGIN-NEXT:    [[COND:%.*]] = phi i32 [ undef, %[[COND_TRUE]] ], [ undef, %[[COND_FALSE]] ]3222; ORIGIN-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83223; ORIGIN-NEXT:    store i32 0, ptr @__msan_retval_origin_tls, align 43224; ORIGIN-NEXT:    ret i32 [[COND]]3225;3226; CALLS-LABEL: define i32 @NoSanitizeMemoryPHI(3227; CALLS-SAME: i32 [[X:%.*]]) {3228; CALLS-NEXT:  [[ENTRY:.*:]]3229; CALLS-NEXT:    call void @llvm.donothing()3230; CALLS-NEXT:    [[TMP0:%.*]] = xor i32 [[X]], 03231; CALLS-NEXT:    [[TMP1:%.*]] = and i32 -1, [[TMP0]]3232; CALLS-NEXT:    [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 03233; CALLS-NEXT:    [[_MSPROP_ICMP:%.*]] = and i1 false, [[TMP2]]3234; CALLS-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[X]], 03235; CALLS-NEXT:    br i1 [[TOBOOL]], label %[[COND_TRUE:.*]], label %[[COND_FALSE:.*]]3236; CALLS:       [[COND_TRUE]]:3237; CALLS-NEXT:    br label %[[COND_END:.*]]3238; CALLS:       [[COND_FALSE]]:3239; CALLS-NEXT:    br label %[[COND_END]]3240; CALLS:       [[COND_END]]:3241; CALLS-NEXT:    [[COND:%.*]] = phi i32 [ undef, %[[COND_TRUE]] ], [ undef, %[[COND_FALSE]] ]3242; CALLS-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83243; CALLS-NEXT:    store i32 0, ptr @__msan_retval_origin_tls, align 43244; CALLS-NEXT:    ret i32 [[COND]]3245;3246entry:3247  %tobool = icmp ne i32 %x, 03248  br i1 %tobool, label %cond.true, label %cond.false3249 3250cond.true:                                        ; preds = %entry3251  br label %cond.end3252 3253cond.false:                                       ; preds = %entry3254  br label %cond.end3255 3256cond.end:                                         ; preds = %cond.false, %cond.true3257  %cond = phi i32 [ undef, %cond.true ], [ undef, %cond.false ]3258  ret i32 %cond3259}3260 3261 3262 3263; Test that there are no __msan_param_origin_tls stores when3264; argument shadow is a compile-time zero constant (which is always the case3265; in functions missing sanitize_memory attribute).3266 3267define i32 @NoSanitizeMemoryParamTLS(ptr nocapture readonly %x) {3268; CHECK-LABEL: define i32 @NoSanitizeMemoryParamTLS(3269; CHECK-SAME: ptr readonly captures(none) [[X:%.*]]) {3270; CHECK-NEXT:  [[ENTRY:.*:]]3271; CHECK-NEXT:    call void @llvm.donothing()3272; CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr [[X]], align 43273; CHECK-NEXT:    store i32 0, ptr @__msan_param_tls, align 83274; CHECK-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83275; CHECK-NEXT:    [[CALL:%.*]] = tail call i32 @NoSanitizeMemoryParamTLSHelper(i32 [[TMP0]])3276; CHECK-NEXT:    [[_MSRET:%.*]] = load i32, ptr @__msan_retval_tls, align 83277; CHECK-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83278; CHECK-NEXT:    ret i32 [[CALL]]3279;3280; ORIGIN-LABEL: define i32 @NoSanitizeMemoryParamTLS(3281; ORIGIN-SAME: ptr readonly captures(none) [[X:%.*]]) {3282; ORIGIN-NEXT:  [[ENTRY:.*:]]3283; ORIGIN-NEXT:    call void @llvm.donothing()3284; ORIGIN-NEXT:    [[TMP0:%.*]] = load i32, ptr [[X]], align 43285; ORIGIN-NEXT:    store i32 0, ptr @__msan_param_tls, align 83286; ORIGIN-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83287; ORIGIN-NEXT:    [[CALL:%.*]] = tail call i32 @NoSanitizeMemoryParamTLSHelper(i32 [[TMP0]])3288; ORIGIN-NEXT:    [[_MSRET:%.*]] = load i32, ptr @__msan_retval_tls, align 83289; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_retval_origin_tls, align 43290; ORIGIN-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83291; ORIGIN-NEXT:    store i32 0, ptr @__msan_retval_origin_tls, align 43292; ORIGIN-NEXT:    ret i32 [[CALL]]3293;3294; CALLS-LABEL: define i32 @NoSanitizeMemoryParamTLS(3295; CALLS-SAME: ptr readonly captures(none) [[X:%.*]]) {3296; CALLS-NEXT:  [[ENTRY:.*:]]3297; CALLS-NEXT:    call void @llvm.donothing()3298; CALLS-NEXT:    [[TMP0:%.*]] = load i32, ptr [[X]], align 43299; CALLS-NEXT:    store i32 0, ptr @__msan_param_tls, align 83300; CALLS-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83301; CALLS-NEXT:    [[CALL:%.*]] = tail call i32 @NoSanitizeMemoryParamTLSHelper(i32 [[TMP0]])3302; CALLS-NEXT:    [[_MSRET:%.*]] = load i32, ptr @__msan_retval_tls, align 83303; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_retval_origin_tls, align 43304; CALLS-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83305; CALLS-NEXT:    store i32 0, ptr @__msan_retval_origin_tls, align 43306; CALLS-NEXT:    ret i32 [[CALL]]3307;3308entry:3309  %0 = load i32, ptr %x, align 43310  %call = tail call i32 @NoSanitizeMemoryParamTLSHelper(i32 %0)3311  ret i32 %call3312}3313 3314declare i32 @NoSanitizeMemoryParamTLSHelper(i32 %x)3315 3316 3317 3318; Test argument shadow alignment3319 3320define <2 x i64> @ArgumentShadowAlignment(i64 %a, <2 x i64> %b) sanitize_memory {3321; CHECK-LABEL: define <2 x i64> @ArgumentShadowAlignment(3322; CHECK-SAME: i64 [[A:%.*]], <2 x i64> [[B:%.*]]) #[[ATTR6]] {3323; CHECK-NEXT:  [[ENTRY:.*:]]3324; CHECK-NEXT:    [[TMP0:%.*]] = load <2 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 83325; CHECK-NEXT:    call void @llvm.donothing()3326; CHECK-NEXT:    store <2 x i64> [[TMP0]], ptr @__msan_retval_tls, align 83327; CHECK-NEXT:    ret <2 x i64> [[B]]3328;3329; ORIGIN-LABEL: define <2 x i64> @ArgumentShadowAlignment(3330; ORIGIN-SAME: i64 [[A:%.*]], <2 x i64> [[B:%.*]]) #[[ATTR6]] {3331; ORIGIN-NEXT:  [[ENTRY:.*:]]3332; ORIGIN-NEXT:    [[TMP0:%.*]] = load <2 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 83333; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 43334; ORIGIN-NEXT:    call void @llvm.donothing()3335; ORIGIN-NEXT:    store <2 x i64> [[TMP0]], ptr @__msan_retval_tls, align 83336; ORIGIN-NEXT:    store i32 [[TMP1]], ptr @__msan_retval_origin_tls, align 43337; ORIGIN-NEXT:    ret <2 x i64> [[B]]3338;3339; CALLS-LABEL: define <2 x i64> @ArgumentShadowAlignment(3340; CALLS-SAME: i64 [[A:%.*]], <2 x i64> [[B:%.*]]) #[[ATTR6]] {3341; CALLS-NEXT:  [[ENTRY:.*:]]3342; CALLS-NEXT:    [[TMP0:%.*]] = load <2 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 83343; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 43344; CALLS-NEXT:    call void @llvm.donothing()3345; CALLS-NEXT:    store <2 x i64> [[TMP0]], ptr @__msan_retval_tls, align 83346; CALLS-NEXT:    store i32 [[TMP1]], ptr @__msan_retval_origin_tls, align 43347; CALLS-NEXT:    ret <2 x i64> [[B]]3348;3349entry:3350  ret <2 x i64> %b3351}3352 3353 3354 3355; Test origin propagation for insertvalue3356 3357define { i64, i32 } @make_pair_64_32(i64 %x, i32 %y) sanitize_memory {3358; CHECK-LABEL: define { i64, i32 } @make_pair_64_32(3359; CHECK-SAME: i64 [[X:%.*]], i32 [[Y:%.*]]) #[[ATTR6]] {3360; CHECK-NEXT:  [[ENTRY:.*:]]3361; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 83362; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 83363; CHECK-NEXT:    call void @llvm.donothing()3364; CHECK-NEXT:    [[TMP2:%.*]] = insertvalue { i64, i32 } { i64 -1, i32 -1 }, i64 [[TMP0]], 03365; CHECK-NEXT:    [[A:%.*]] = insertvalue { i64, i32 } undef, i64 [[X]], 03366; CHECK-NEXT:    [[TMP3:%.*]] = insertvalue { i64, i32 } [[TMP2]], i32 [[TMP1]], 13367; CHECK-NEXT:    [[B:%.*]] = insertvalue { i64, i32 } [[A]], i32 [[Y]], 13368; CHECK-NEXT:    store { i64, i32 } [[TMP3]], ptr @__msan_retval_tls, align 83369; CHECK-NEXT:    ret { i64, i32 } [[B]]3370;3371; ORIGIN-LABEL: define { i64, i32 } @make_pair_64_32(3372; ORIGIN-SAME: i64 [[X:%.*]], i32 [[Y:%.*]]) #[[ATTR6]] {3373; ORIGIN-NEXT:  [[ENTRY:.*:]]3374; ORIGIN-NEXT:    [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 83375; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 43376; ORIGIN-NEXT:    [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 83377; ORIGIN-NEXT:    [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 43378; ORIGIN-NEXT:    call void @llvm.donothing()3379; ORIGIN-NEXT:    [[TMP4:%.*]] = insertvalue { i64, i32 } { i64 -1, i32 -1 }, i64 [[TMP0]], 03380; ORIGIN-NEXT:    [[TMP5:%.*]] = icmp ne i64 [[TMP0]], 03381; ORIGIN-NEXT:    [[TMP6:%.*]] = select i1 [[TMP5]], i32 [[TMP1]], i32 03382; ORIGIN-NEXT:    [[A:%.*]] = insertvalue { i64, i32 } undef, i64 [[X]], 03383; ORIGIN-NEXT:    [[TMP7:%.*]] = insertvalue { i64, i32 } [[TMP4]], i32 [[TMP2]], 13384; ORIGIN-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP2]], 03385; ORIGIN-NEXT:    [[TMP9:%.*]] = select i1 [[TMP8]], i32 [[TMP3]], i32 [[TMP6]]3386; ORIGIN-NEXT:    [[B:%.*]] = insertvalue { i64, i32 } [[A]], i32 [[Y]], 13387; ORIGIN-NEXT:    store { i64, i32 } [[TMP7]], ptr @__msan_retval_tls, align 83388; ORIGIN-NEXT:    store i32 [[TMP9]], ptr @__msan_retval_origin_tls, align 43389; ORIGIN-NEXT:    ret { i64, i32 } [[B]]3390;3391; CALLS-LABEL: define { i64, i32 } @make_pair_64_32(3392; CALLS-SAME: i64 [[X:%.*]], i32 [[Y:%.*]]) #[[ATTR6]] {3393; CALLS-NEXT:  [[ENTRY:.*:]]3394; CALLS-NEXT:    [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 83395; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 43396; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 83397; CALLS-NEXT:    [[TMP3:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 43398; CALLS-NEXT:    call void @llvm.donothing()3399; CALLS-NEXT:    [[TMP4:%.*]] = insertvalue { i64, i32 } { i64 -1, i32 -1 }, i64 [[TMP0]], 03400; CALLS-NEXT:    [[TMP5:%.*]] = icmp ne i64 [[TMP0]], 03401; CALLS-NEXT:    [[TMP6:%.*]] = select i1 [[TMP5]], i32 [[TMP1]], i32 03402; CALLS-NEXT:    [[A:%.*]] = insertvalue { i64, i32 } undef, i64 [[X]], 03403; CALLS-NEXT:    [[TMP7:%.*]] = insertvalue { i64, i32 } [[TMP4]], i32 [[TMP2]], 13404; CALLS-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP2]], 03405; CALLS-NEXT:    [[TMP9:%.*]] = select i1 [[TMP8]], i32 [[TMP3]], i32 [[TMP6]]3406; CALLS-NEXT:    [[B:%.*]] = insertvalue { i64, i32 } [[A]], i32 [[Y]], 13407; CALLS-NEXT:    store { i64, i32 } [[TMP7]], ptr @__msan_retval_tls, align 83408; CALLS-NEXT:    store i32 [[TMP9]], ptr @__msan_retval_origin_tls, align 43409; CALLS-NEXT:    ret { i64, i32 } [[B]]3410;3411entry:3412  %a = insertvalue { i64, i32 } undef, i64 %x, 03413  %b = insertvalue { i64, i32 } %a, i32 %y, 13414  ret { i64, i32 } %b3415}3416 3417; Test shadow propagation for aggregates passed through ellipsis.3418 3419%struct.StructByVal = type { i32, i32, i32, i32 }3420 3421declare void @VAArgStructFn(i32 %guard, ...)3422 3423define void @VAArgStruct(ptr nocapture %s) sanitize_memory {3424; CHECK-LABEL: define void @VAArgStruct(3425; CHECK-SAME: ptr captures(none) [[S:%.*]]) #[[ATTR6]] {3426; CHECK-NEXT:  [[ENTRY:.*:]]3427; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 83428; CHECK-NEXT:    call void @llvm.donothing()3429; CHECK-NEXT:    [[AGG_TMP2:%.*]] = alloca [[STRUCT_STRUCTBYVAL:%.*]], align 83430; CHECK-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[AGG_TMP2]] to i643431; CHECK-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 879609302220803432; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr3433; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 8 [[TMP3]], i8 -1, i64 16, i1 false)3434; CHECK-NEXT:    [[AGG_TMP_SROA_0_0_COPYLOAD:%.*]] = load i64, ptr [[S]], align 43435; CHECK-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[S]] to i643436; CHECK-NEXT:    [[TMP5:%.*]] = xor i64 [[TMP4]], 879609302220803437; CHECK-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr3438; CHECK-NEXT:    [[_MSLD:%.*]] = load i64, ptr [[TMP6]], align 43439; CHECK-NEXT:    [[_MSPROP:%.*]] = or i64 [[TMP0]], 03440; CHECK-NEXT:    [[_MSPROP1:%.*]] = or i64 [[_MSPROP]], 03441; CHECK-NEXT:    [[AGG_TMP_SROA_2_0__SROA_IDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCTBYVAL]], ptr [[S]], i64 0, i32 23442; CHECK-NEXT:    [[AGG_TMP_SROA_2_0_COPYLOAD:%.*]] = load i64, ptr [[AGG_TMP_SROA_2_0__SROA_IDX]], align 43443; CHECK-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[AGG_TMP_SROA_2_0__SROA_IDX]] to i643444; CHECK-NEXT:    [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220803445; CHECK-NEXT:    [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr3446; CHECK-NEXT:    [[_MSLD2:%.*]] = load i64, ptr [[TMP9]], align 43447; CHECK-NEXT:    [[TMP10:%.*]] = call ptr @__msan_memcpy(ptr [[AGG_TMP2]], ptr [[S]], i64 16)3448; CHECK-NEXT:    store i32 -1, ptr @__msan_param_tls, align 83449; CHECK-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 83450; CHECK-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 83451; CHECK-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 83452; CHECK-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 83453; CHECK-NEXT:    [[TMP11:%.*]] = ptrtoint ptr [[AGG_TMP2]] to i643454; CHECK-NEXT:    [[TMP12:%.*]] = xor i64 [[TMP11]], 879609302220803455; CHECK-NEXT:    [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr3456; CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 40), ptr align 8 [[TMP13]], i64 16, i1 false)3457; CHECK-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 8), align 83458; CHECK-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 16), align 83459; CHECK-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 24), align 83460; CHECK-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 32), align 83461; CHECK-NEXT:    [[TMP14:%.*]] = ptrtoint ptr [[AGG_TMP2]] to i643462; CHECK-NEXT:    [[TMP15:%.*]] = xor i64 [[TMP14]], 879609302220803463; CHECK-NEXT:    [[TMP16:%.*]] = inttoptr i64 [[TMP15]] to ptr3464; CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 176), ptr align 8 [[TMP16]], i64 16, i1 false)3465; CHECK-NEXT:    store i64 16, ptr @__msan_va_arg_overflow_size_tls, align 83466; CHECK-NEXT:    call void (i32, ...) @VAArgStructFn(i32 undef, i64 [[AGG_TMP_SROA_0_0_COPYLOAD]], i64 [[AGG_TMP_SROA_2_0_COPYLOAD]], i64 [[AGG_TMP_SROA_0_0_COPYLOAD]], i64 [[AGG_TMP_SROA_2_0_COPYLOAD]], ptr byval([[STRUCT_STRUCTBYVAL]]) align 8 [[AGG_TMP2]])3467; CHECK-NEXT:    ret void3468;3469; ORIGIN-LABEL: define void @VAArgStruct(3470; ORIGIN-SAME: ptr captures(none) [[S:%.*]]) #[[ATTR6]] {3471; ORIGIN-NEXT:  [[ENTRY:.*:]]3472; ORIGIN-NEXT:    [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 83473; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 43474; ORIGIN-NEXT:    call void @llvm.donothing()3475; ORIGIN-NEXT:    [[AGG_TMP2:%.*]] = alloca [[STRUCT_STRUCTBYVAL:%.*]], align 83476; ORIGIN-NEXT:    [[TMP2:%.*]] = ptrtoint ptr [[AGG_TMP2]] to i643477; ORIGIN-NEXT:    [[TMP3:%.*]] = xor i64 [[TMP2]], 879609302220803478; ORIGIN-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr3479; ORIGIN-NEXT:    [[TMP5:%.*]] = add i64 [[TMP3]], 175921860444163480; ORIGIN-NEXT:    [[TMP6:%.*]] = and i64 [[TMP5]], -43481; ORIGIN-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr3482; ORIGIN-NEXT:    call void @llvm.memset.p0.i64(ptr align 8 [[TMP4]], i8 -1, i64 16, i1 false)3483; ORIGIN-NEXT:    call void @__msan_set_alloca_origin_with_descr(ptr [[AGG_TMP2]], i64 16, ptr @[[GLOB8:[0-9]+]], ptr @[[GLOB9:[0-9]+]])3484; ORIGIN-NEXT:    [[AGG_TMP_SROA_0_0_COPYLOAD:%.*]] = load i64, ptr [[S]], align 43485; ORIGIN-NEXT:    [[TMP8:%.*]] = ptrtoint ptr [[S]] to i643486; ORIGIN-NEXT:    [[TMP9:%.*]] = xor i64 [[TMP8]], 879609302220803487; ORIGIN-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr3488; ORIGIN-NEXT:    [[TMP11:%.*]] = add i64 [[TMP9]], 175921860444163489; ORIGIN-NEXT:    [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr3490; ORIGIN-NEXT:    [[_MSLD:%.*]] = load i64, ptr [[TMP10]], align 43491; ORIGIN-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 43492; ORIGIN-NEXT:    [[_MSPROP:%.*]] = or i64 [[TMP0]], 03493; ORIGIN-NEXT:    [[_MSPROP1:%.*]] = or i64 [[_MSPROP]], 03494; ORIGIN-NEXT:    [[AGG_TMP_SROA_2_0__SROA_IDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCTBYVAL]], ptr [[S]], i64 0, i32 23495; ORIGIN-NEXT:    [[AGG_TMP_SROA_2_0_COPYLOAD:%.*]] = load i64, ptr [[AGG_TMP_SROA_2_0__SROA_IDX]], align 43496; ORIGIN-NEXT:    [[TMP14:%.*]] = ptrtoint ptr [[AGG_TMP_SROA_2_0__SROA_IDX]] to i643497; ORIGIN-NEXT:    [[TMP15:%.*]] = xor i64 [[TMP14]], 879609302220803498; ORIGIN-NEXT:    [[TMP16:%.*]] = inttoptr i64 [[TMP15]] to ptr3499; ORIGIN-NEXT:    [[TMP17:%.*]] = add i64 [[TMP15]], 175921860444163500; ORIGIN-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr3501; ORIGIN-NEXT:    [[_MSLD2:%.*]] = load i64, ptr [[TMP16]], align 43502; ORIGIN-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 43503; ORIGIN-NEXT:    [[TMP20:%.*]] = call ptr @__msan_memcpy(ptr [[AGG_TMP2]], ptr [[S]], i64 16)3504; ORIGIN-NEXT:    store i32 -1, ptr @__msan_param_tls, align 83505; ORIGIN-NEXT:    store i32 0, ptr @__msan_param_origin_tls, align 43506; ORIGIN-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 83507; ORIGIN-NEXT:    store i32 [[TMP13]], ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 43508; ORIGIN-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 83509; ORIGIN-NEXT:    store i32 [[TMP19]], ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 16), align 43510; ORIGIN-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 83511; ORIGIN-NEXT:    store i32 [[TMP13]], ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 24), align 43512; ORIGIN-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 83513; ORIGIN-NEXT:    store i32 [[TMP19]], ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 32), align 43514; ORIGIN-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[AGG_TMP2]] to i643515; ORIGIN-NEXT:    [[TMP22:%.*]] = xor i64 [[TMP21]], 879609302220803516; ORIGIN-NEXT:    [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr3517; ORIGIN-NEXT:    [[TMP24:%.*]] = add i64 [[TMP22]], 175921860444163518; ORIGIN-NEXT:    [[TMP25:%.*]] = inttoptr i64 [[TMP24]] to ptr3519; ORIGIN-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 40), ptr align 8 [[TMP23]], i64 16, i1 false)3520; ORIGIN-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 getelementptr (i8, ptr @__msan_param_origin_tls, i64 40), ptr align 4 [[TMP25]], i64 16, i1 false)3521; ORIGIN-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 8), align 83522; ORIGIN-NEXT:    [[TMP26:%.*]] = zext i32 [[TMP13]] to i643523; ORIGIN-NEXT:    [[TMP27:%.*]] = shl i64 [[TMP26]], 323524; ORIGIN-NEXT:    [[TMP28:%.*]] = or i64 [[TMP26]], [[TMP27]]3525; ORIGIN-NEXT:    store i64 [[TMP28]], ptr getelementptr (i8, ptr @__msan_va_arg_origin_tls, i64 8), align 83526; ORIGIN-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 16), align 83527; ORIGIN-NEXT:    [[TMP29:%.*]] = zext i32 [[TMP19]] to i643528; ORIGIN-NEXT:    [[TMP30:%.*]] = shl i64 [[TMP29]], 323529; ORIGIN-NEXT:    [[TMP31:%.*]] = or i64 [[TMP29]], [[TMP30]]3530; ORIGIN-NEXT:    store i64 [[TMP31]], ptr getelementptr (i8, ptr @__msan_va_arg_origin_tls, i64 16), align 83531; ORIGIN-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 24), align 83532; ORIGIN-NEXT:    [[TMP32:%.*]] = zext i32 [[TMP13]] to i643533; ORIGIN-NEXT:    [[TMP33:%.*]] = shl i64 [[TMP32]], 323534; ORIGIN-NEXT:    [[TMP34:%.*]] = or i64 [[TMP32]], [[TMP33]]3535; ORIGIN-NEXT:    store i64 [[TMP34]], ptr getelementptr (i8, ptr @__msan_va_arg_origin_tls, i64 24), align 83536; ORIGIN-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 32), align 83537; ORIGIN-NEXT:    [[TMP35:%.*]] = zext i32 [[TMP19]] to i643538; ORIGIN-NEXT:    [[TMP36:%.*]] = shl i64 [[TMP35]], 323539; ORIGIN-NEXT:    [[TMP37:%.*]] = or i64 [[TMP35]], [[TMP36]]3540; ORIGIN-NEXT:    store i64 [[TMP37]], ptr getelementptr (i8, ptr @__msan_va_arg_origin_tls, i64 32), align 83541; ORIGIN-NEXT:    [[TMP38:%.*]] = ptrtoint ptr [[AGG_TMP2]] to i643542; ORIGIN-NEXT:    [[TMP39:%.*]] = xor i64 [[TMP38]], 879609302220803543; ORIGIN-NEXT:    [[TMP40:%.*]] = inttoptr i64 [[TMP39]] to ptr3544; ORIGIN-NEXT:    [[TMP41:%.*]] = add i64 [[TMP39]], 175921860444163545; ORIGIN-NEXT:    [[TMP42:%.*]] = inttoptr i64 [[TMP41]] to ptr3546; ORIGIN-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 176), ptr align 8 [[TMP40]], i64 16, i1 false)3547; ORIGIN-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_origin_tls, i64 176), ptr align 8 [[TMP42]], i64 16, i1 false)3548; ORIGIN-NEXT:    store i64 16, ptr @__msan_va_arg_overflow_size_tls, align 83549; ORIGIN-NEXT:    call void (i32, ...) @VAArgStructFn(i32 undef, i64 [[AGG_TMP_SROA_0_0_COPYLOAD]], i64 [[AGG_TMP_SROA_2_0_COPYLOAD]], i64 [[AGG_TMP_SROA_0_0_COPYLOAD]], i64 [[AGG_TMP_SROA_2_0_COPYLOAD]], ptr byval([[STRUCT_STRUCTBYVAL]]) align 8 [[AGG_TMP2]])3550; ORIGIN-NEXT:    ret void3551;3552; CALLS-LABEL: define void @VAArgStruct(3553; CALLS-SAME: ptr captures(none) [[S:%.*]]) #[[ATTR6]] {3554; CALLS-NEXT:  [[ENTRY:.*:]]3555; CALLS-NEXT:    [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 83556; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 43557; CALLS-NEXT:    call void @llvm.donothing()3558; CALLS-NEXT:    [[AGG_TMP2:%.*]] = alloca [[STRUCT_STRUCTBYVAL:%.*]], align 83559; CALLS-NEXT:    [[TMP2:%.*]] = ptrtoint ptr [[AGG_TMP2]] to i643560; CALLS-NEXT:    [[TMP3:%.*]] = xor i64 [[TMP2]], 879609302220803561; CALLS-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr3562; CALLS-NEXT:    [[TMP5:%.*]] = add i64 [[TMP3]], 175921860444163563; CALLS-NEXT:    [[TMP6:%.*]] = and i64 [[TMP5]], -43564; CALLS-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr3565; CALLS-NEXT:    call void @llvm.memset.p0.i64(ptr align 8 [[TMP4]], i8 -1, i64 16, i1 false)3566; CALLS-NEXT:    call void @__msan_set_alloca_origin_with_descr(ptr [[AGG_TMP2]], i64 16, ptr @[[GLOB8:[0-9]+]], ptr @[[GLOB9:[0-9]+]])3567; CALLS-NEXT:    call void @__msan_maybe_warning_8(i64 zeroext [[TMP0]], i32 zeroext [[TMP1]])3568; CALLS-NEXT:    [[AGG_TMP_SROA_0_0_COPYLOAD:%.*]] = load i64, ptr [[S]], align 43569; CALLS-NEXT:    [[TMP8:%.*]] = ptrtoint ptr [[S]] to i643570; CALLS-NEXT:    [[TMP9:%.*]] = xor i64 [[TMP8]], 879609302220803571; CALLS-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr3572; CALLS-NEXT:    [[TMP11:%.*]] = add i64 [[TMP9]], 175921860444163573; CALLS-NEXT:    [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr3574; CALLS-NEXT:    [[_MSLD:%.*]] = load i64, ptr [[TMP10]], align 43575; CALLS-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 43576; CALLS-NEXT:    [[_MSPROP:%.*]] = or i64 [[TMP0]], 03577; CALLS-NEXT:    [[_MSPROP1:%.*]] = or i64 [[_MSPROP]], 03578; CALLS-NEXT:    [[AGG_TMP_SROA_2_0__SROA_IDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCTBYVAL]], ptr [[S]], i64 0, i32 23579; CALLS-NEXT:    call void @__msan_maybe_warning_8(i64 zeroext [[_MSPROP1]], i32 zeroext [[TMP1]])3580; CALLS-NEXT:    [[AGG_TMP_SROA_2_0_COPYLOAD:%.*]] = load i64, ptr [[AGG_TMP_SROA_2_0__SROA_IDX]], align 43581; CALLS-NEXT:    [[TMP14:%.*]] = ptrtoint ptr [[AGG_TMP_SROA_2_0__SROA_IDX]] to i643582; CALLS-NEXT:    [[TMP15:%.*]] = xor i64 [[TMP14]], 879609302220803583; CALLS-NEXT:    [[TMP16:%.*]] = inttoptr i64 [[TMP15]] to ptr3584; CALLS-NEXT:    [[TMP17:%.*]] = add i64 [[TMP15]], 175921860444163585; CALLS-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr3586; CALLS-NEXT:    [[_MSLD2:%.*]] = load i64, ptr [[TMP16]], align 43587; CALLS-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 43588; CALLS-NEXT:    [[TMP20:%.*]] = call ptr @__msan_memcpy(ptr [[AGG_TMP2]], ptr [[S]], i64 16)3589; CALLS-NEXT:    store i32 -1, ptr @__msan_param_tls, align 83590; CALLS-NEXT:    store i32 0, ptr @__msan_param_origin_tls, align 43591; CALLS-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 83592; CALLS-NEXT:    store i32 [[TMP13]], ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 43593; CALLS-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 83594; CALLS-NEXT:    store i32 [[TMP19]], ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 16), align 43595; CALLS-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 83596; CALLS-NEXT:    store i32 [[TMP13]], ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 24), align 43597; CALLS-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 83598; CALLS-NEXT:    store i32 [[TMP19]], ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 32), align 43599; CALLS-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[AGG_TMP2]] to i643600; CALLS-NEXT:    [[TMP22:%.*]] = xor i64 [[TMP21]], 879609302220803601; CALLS-NEXT:    [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr3602; CALLS-NEXT:    [[TMP24:%.*]] = add i64 [[TMP22]], 175921860444163603; CALLS-NEXT:    [[TMP25:%.*]] = inttoptr i64 [[TMP24]] to ptr3604; CALLS-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 40), ptr align 8 [[TMP23]], i64 16, i1 false)3605; CALLS-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 getelementptr (i8, ptr @__msan_param_origin_tls, i64 40), ptr align 4 [[TMP25]], i64 16, i1 false)3606; CALLS-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 8), align 83607; CALLS-NEXT:    [[TMP26:%.*]] = zext i32 [[TMP13]] to i643608; CALLS-NEXT:    [[TMP27:%.*]] = shl i64 [[TMP26]], 323609; CALLS-NEXT:    [[TMP28:%.*]] = or i64 [[TMP26]], [[TMP27]]3610; CALLS-NEXT:    store i64 [[TMP28]], ptr getelementptr (i8, ptr @__msan_va_arg_origin_tls, i64 8), align 83611; CALLS-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 16), align 83612; CALLS-NEXT:    [[TMP29:%.*]] = zext i32 [[TMP19]] to i643613; CALLS-NEXT:    [[TMP30:%.*]] = shl i64 [[TMP29]], 323614; CALLS-NEXT:    [[TMP31:%.*]] = or i64 [[TMP29]], [[TMP30]]3615; CALLS-NEXT:    store i64 [[TMP31]], ptr getelementptr (i8, ptr @__msan_va_arg_origin_tls, i64 16), align 83616; CALLS-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 24), align 83617; CALLS-NEXT:    [[TMP32:%.*]] = zext i32 [[TMP13]] to i643618; CALLS-NEXT:    [[TMP33:%.*]] = shl i64 [[TMP32]], 323619; CALLS-NEXT:    [[TMP34:%.*]] = or i64 [[TMP32]], [[TMP33]]3620; CALLS-NEXT:    store i64 [[TMP34]], ptr getelementptr (i8, ptr @__msan_va_arg_origin_tls, i64 24), align 83621; CALLS-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 32), align 83622; CALLS-NEXT:    [[TMP35:%.*]] = zext i32 [[TMP19]] to i643623; CALLS-NEXT:    [[TMP36:%.*]] = shl i64 [[TMP35]], 323624; CALLS-NEXT:    [[TMP37:%.*]] = or i64 [[TMP35]], [[TMP36]]3625; CALLS-NEXT:    store i64 [[TMP37]], ptr getelementptr (i8, ptr @__msan_va_arg_origin_tls, i64 32), align 83626; CALLS-NEXT:    [[TMP38:%.*]] = ptrtoint ptr [[AGG_TMP2]] to i643627; CALLS-NEXT:    [[TMP39:%.*]] = xor i64 [[TMP38]], 879609302220803628; CALLS-NEXT:    [[TMP40:%.*]] = inttoptr i64 [[TMP39]] to ptr3629; CALLS-NEXT:    [[TMP41:%.*]] = add i64 [[TMP39]], 175921860444163630; CALLS-NEXT:    [[TMP42:%.*]] = inttoptr i64 [[TMP41]] to ptr3631; CALLS-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 176), ptr align 8 [[TMP40]], i64 16, i1 false)3632; CALLS-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_origin_tls, i64 176), ptr align 8 [[TMP42]], i64 16, i1 false)3633; CALLS-NEXT:    store i64 16, ptr @__msan_va_arg_overflow_size_tls, align 83634; CALLS-NEXT:    call void (i32, ...) @VAArgStructFn(i32 undef, i64 [[AGG_TMP_SROA_0_0_COPYLOAD]], i64 [[AGG_TMP_SROA_2_0_COPYLOAD]], i64 [[AGG_TMP_SROA_0_0_COPYLOAD]], i64 [[AGG_TMP_SROA_2_0_COPYLOAD]], ptr byval([[STRUCT_STRUCTBYVAL]]) align 8 [[AGG_TMP2]])3635; CALLS-NEXT:    ret void3636;3637entry:3638  %agg.tmp2 = alloca %struct.StructByVal, align 83639  %agg.tmp.sroa.0.0.copyload = load i64, ptr %s, align 43640  %agg.tmp.sroa.2.0..sroa_idx = getelementptr inbounds %struct.StructByVal, ptr %s, i64 0, i32 23641  %agg.tmp.sroa.2.0.copyload = load i64, ptr %agg.tmp.sroa.2.0..sroa_idx, align 43642  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %agg.tmp2, ptr align 4 %s, i64 16, i1 false)3643  call void (i32, ...) @VAArgStructFn(i32 undef, i64 %agg.tmp.sroa.0.0.copyload, i64 %agg.tmp.sroa.2.0.copyload, i64 %agg.tmp.sroa.0.0.copyload, i64 %agg.tmp.sroa.2.0.copyload, ptr byval(%struct.StructByVal) align 8 %agg.tmp2)3644  ret void3645}3646 3647 3648; Same code compiled without SSE (see attributes below).3649; The register save area is only 48 bytes instead of 176.3650define void @VAArgStructNoSSE(ptr nocapture %s) sanitize_memory #0 {3651; CHECK-LABEL: define void @VAArgStructNoSSE(3652; CHECK-SAME: ptr captures(none) [[S:%.*]]) #[[ATTR9:[0-9]+]] {3653; CHECK-NEXT:  [[ENTRY:.*:]]3654; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 83655; CHECK-NEXT:    call void @llvm.donothing()3656; CHECK-NEXT:    [[AGG_TMP2:%.*]] = alloca [[STRUCT_STRUCTBYVAL:%.*]], align 83657; CHECK-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[AGG_TMP2]] to i643658; CHECK-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], 879609302220803659; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr3660; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 8 [[TMP3]], i8 -1, i64 16, i1 false)3661; CHECK-NEXT:    [[AGG_TMP_SROA_0_0_COPYLOAD:%.*]] = load i64, ptr [[S]], align 43662; CHECK-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[S]] to i643663; CHECK-NEXT:    [[TMP5:%.*]] = xor i64 [[TMP4]], 879609302220803664; CHECK-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr3665; CHECK-NEXT:    [[_MSLD:%.*]] = load i64, ptr [[TMP6]], align 43666; CHECK-NEXT:    [[_MSPROP:%.*]] = or i64 [[TMP0]], 03667; CHECK-NEXT:    [[_MSPROP1:%.*]] = or i64 [[_MSPROP]], 03668; CHECK-NEXT:    [[AGG_TMP_SROA_2_0__SROA_IDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCTBYVAL]], ptr [[S]], i64 0, i32 23669; CHECK-NEXT:    [[AGG_TMP_SROA_2_0_COPYLOAD:%.*]] = load i64, ptr [[AGG_TMP_SROA_2_0__SROA_IDX]], align 43670; CHECK-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[AGG_TMP_SROA_2_0__SROA_IDX]] to i643671; CHECK-NEXT:    [[TMP8:%.*]] = xor i64 [[TMP7]], 879609302220803672; CHECK-NEXT:    [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr3673; CHECK-NEXT:    [[_MSLD2:%.*]] = load i64, ptr [[TMP9]], align 43674; CHECK-NEXT:    [[TMP10:%.*]] = call ptr @__msan_memcpy(ptr [[AGG_TMP2]], ptr [[S]], i64 16)3675; CHECK-NEXT:    store i32 -1, ptr @__msan_param_tls, align 83676; CHECK-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 83677; CHECK-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 83678; CHECK-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 83679; CHECK-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 83680; CHECK-NEXT:    [[TMP11:%.*]] = ptrtoint ptr [[AGG_TMP2]] to i643681; CHECK-NEXT:    [[TMP12:%.*]] = xor i64 [[TMP11]], 879609302220803682; CHECK-NEXT:    [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr3683; CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 40), ptr align 8 [[TMP13]], i64 16, i1 false)3684; CHECK-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 8), align 83685; CHECK-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 16), align 83686; CHECK-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 24), align 83687; CHECK-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 32), align 83688; CHECK-NEXT:    [[TMP14:%.*]] = ptrtoint ptr [[AGG_TMP2]] to i643689; CHECK-NEXT:    [[TMP15:%.*]] = xor i64 [[TMP14]], 879609302220803690; CHECK-NEXT:    [[TMP16:%.*]] = inttoptr i64 [[TMP15]] to ptr3691; CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 48), ptr align 8 [[TMP16]], i64 16, i1 false)3692; CHECK-NEXT:    store i64 16, ptr @__msan_va_arg_overflow_size_tls, align 83693; CHECK-NEXT:    call void (i32, ...) @VAArgStructFn(i32 undef, i64 [[AGG_TMP_SROA_0_0_COPYLOAD]], i64 [[AGG_TMP_SROA_2_0_COPYLOAD]], i64 [[AGG_TMP_SROA_0_0_COPYLOAD]], i64 [[AGG_TMP_SROA_2_0_COPYLOAD]], ptr byval([[STRUCT_STRUCTBYVAL]]) align 8 [[AGG_TMP2]])3694; CHECK-NEXT:    ret void3695;3696; ORIGIN-LABEL: define void @VAArgStructNoSSE(3697; ORIGIN-SAME: ptr captures(none) [[S:%.*]]) #[[ATTR9:[0-9]+]] {3698; ORIGIN-NEXT:  [[ENTRY:.*:]]3699; ORIGIN-NEXT:    [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 83700; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 43701; ORIGIN-NEXT:    call void @llvm.donothing()3702; ORIGIN-NEXT:    [[AGG_TMP2:%.*]] = alloca [[STRUCT_STRUCTBYVAL:%.*]], align 83703; ORIGIN-NEXT:    [[TMP2:%.*]] = ptrtoint ptr [[AGG_TMP2]] to i643704; ORIGIN-NEXT:    [[TMP3:%.*]] = xor i64 [[TMP2]], 879609302220803705; ORIGIN-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr3706; ORIGIN-NEXT:    [[TMP5:%.*]] = add i64 [[TMP3]], 175921860444163707; ORIGIN-NEXT:    [[TMP6:%.*]] = and i64 [[TMP5]], -43708; ORIGIN-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr3709; ORIGIN-NEXT:    call void @llvm.memset.p0.i64(ptr align 8 [[TMP4]], i8 -1, i64 16, i1 false)3710; ORIGIN-NEXT:    call void @__msan_set_alloca_origin_with_descr(ptr [[AGG_TMP2]], i64 16, ptr @[[GLOB10:[0-9]+]], ptr @[[GLOB11:[0-9]+]])3711; ORIGIN-NEXT:    [[AGG_TMP_SROA_0_0_COPYLOAD:%.*]] = load i64, ptr [[S]], align 43712; ORIGIN-NEXT:    [[TMP8:%.*]] = ptrtoint ptr [[S]] to i643713; ORIGIN-NEXT:    [[TMP9:%.*]] = xor i64 [[TMP8]], 879609302220803714; ORIGIN-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr3715; ORIGIN-NEXT:    [[TMP11:%.*]] = add i64 [[TMP9]], 175921860444163716; ORIGIN-NEXT:    [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr3717; ORIGIN-NEXT:    [[_MSLD:%.*]] = load i64, ptr [[TMP10]], align 43718; ORIGIN-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 43719; ORIGIN-NEXT:    [[_MSPROP:%.*]] = or i64 [[TMP0]], 03720; ORIGIN-NEXT:    [[_MSPROP1:%.*]] = or i64 [[_MSPROP]], 03721; ORIGIN-NEXT:    [[AGG_TMP_SROA_2_0__SROA_IDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCTBYVAL]], ptr [[S]], i64 0, i32 23722; ORIGIN-NEXT:    [[AGG_TMP_SROA_2_0_COPYLOAD:%.*]] = load i64, ptr [[AGG_TMP_SROA_2_0__SROA_IDX]], align 43723; ORIGIN-NEXT:    [[TMP14:%.*]] = ptrtoint ptr [[AGG_TMP_SROA_2_0__SROA_IDX]] to i643724; ORIGIN-NEXT:    [[TMP15:%.*]] = xor i64 [[TMP14]], 879609302220803725; ORIGIN-NEXT:    [[TMP16:%.*]] = inttoptr i64 [[TMP15]] to ptr3726; ORIGIN-NEXT:    [[TMP17:%.*]] = add i64 [[TMP15]], 175921860444163727; ORIGIN-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr3728; ORIGIN-NEXT:    [[_MSLD2:%.*]] = load i64, ptr [[TMP16]], align 43729; ORIGIN-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 43730; ORIGIN-NEXT:    [[TMP20:%.*]] = call ptr @__msan_memcpy(ptr [[AGG_TMP2]], ptr [[S]], i64 16)3731; ORIGIN-NEXT:    store i32 -1, ptr @__msan_param_tls, align 83732; ORIGIN-NEXT:    store i32 0, ptr @__msan_param_origin_tls, align 43733; ORIGIN-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 83734; ORIGIN-NEXT:    store i32 [[TMP13]], ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 43735; ORIGIN-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 83736; ORIGIN-NEXT:    store i32 [[TMP19]], ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 16), align 43737; ORIGIN-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 83738; ORIGIN-NEXT:    store i32 [[TMP13]], ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 24), align 43739; ORIGIN-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 83740; ORIGIN-NEXT:    store i32 [[TMP19]], ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 32), align 43741; ORIGIN-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[AGG_TMP2]] to i643742; ORIGIN-NEXT:    [[TMP22:%.*]] = xor i64 [[TMP21]], 879609302220803743; ORIGIN-NEXT:    [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr3744; ORIGIN-NEXT:    [[TMP24:%.*]] = add i64 [[TMP22]], 175921860444163745; ORIGIN-NEXT:    [[TMP25:%.*]] = inttoptr i64 [[TMP24]] to ptr3746; ORIGIN-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 40), ptr align 8 [[TMP23]], i64 16, i1 false)3747; ORIGIN-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 getelementptr (i8, ptr @__msan_param_origin_tls, i64 40), ptr align 4 [[TMP25]], i64 16, i1 false)3748; ORIGIN-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 8), align 83749; ORIGIN-NEXT:    [[TMP26:%.*]] = zext i32 [[TMP13]] to i643750; ORIGIN-NEXT:    [[TMP27:%.*]] = shl i64 [[TMP26]], 323751; ORIGIN-NEXT:    [[TMP28:%.*]] = or i64 [[TMP26]], [[TMP27]]3752; ORIGIN-NEXT:    store i64 [[TMP28]], ptr getelementptr (i8, ptr @__msan_va_arg_origin_tls, i64 8), align 83753; ORIGIN-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 16), align 83754; ORIGIN-NEXT:    [[TMP29:%.*]] = zext i32 [[TMP19]] to i643755; ORIGIN-NEXT:    [[TMP30:%.*]] = shl i64 [[TMP29]], 323756; ORIGIN-NEXT:    [[TMP31:%.*]] = or i64 [[TMP29]], [[TMP30]]3757; ORIGIN-NEXT:    store i64 [[TMP31]], ptr getelementptr (i8, ptr @__msan_va_arg_origin_tls, i64 16), align 83758; ORIGIN-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 24), align 83759; ORIGIN-NEXT:    [[TMP32:%.*]] = zext i32 [[TMP13]] to i643760; ORIGIN-NEXT:    [[TMP33:%.*]] = shl i64 [[TMP32]], 323761; ORIGIN-NEXT:    [[TMP34:%.*]] = or i64 [[TMP32]], [[TMP33]]3762; ORIGIN-NEXT:    store i64 [[TMP34]], ptr getelementptr (i8, ptr @__msan_va_arg_origin_tls, i64 24), align 83763; ORIGIN-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 32), align 83764; ORIGIN-NEXT:    [[TMP35:%.*]] = zext i32 [[TMP19]] to i643765; ORIGIN-NEXT:    [[TMP36:%.*]] = shl i64 [[TMP35]], 323766; ORIGIN-NEXT:    [[TMP37:%.*]] = or i64 [[TMP35]], [[TMP36]]3767; ORIGIN-NEXT:    store i64 [[TMP37]], ptr getelementptr (i8, ptr @__msan_va_arg_origin_tls, i64 32), align 83768; ORIGIN-NEXT:    [[TMP38:%.*]] = ptrtoint ptr [[AGG_TMP2]] to i643769; ORIGIN-NEXT:    [[TMP39:%.*]] = xor i64 [[TMP38]], 879609302220803770; ORIGIN-NEXT:    [[TMP40:%.*]] = inttoptr i64 [[TMP39]] to ptr3771; ORIGIN-NEXT:    [[TMP41:%.*]] = add i64 [[TMP39]], 175921860444163772; ORIGIN-NEXT:    [[TMP42:%.*]] = inttoptr i64 [[TMP41]] to ptr3773; ORIGIN-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 48), ptr align 8 [[TMP40]], i64 16, i1 false)3774; ORIGIN-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_origin_tls, i64 48), ptr align 8 [[TMP42]], i64 16, i1 false)3775; ORIGIN-NEXT:    store i64 16, ptr @__msan_va_arg_overflow_size_tls, align 83776; ORIGIN-NEXT:    call void (i32, ...) @VAArgStructFn(i32 undef, i64 [[AGG_TMP_SROA_0_0_COPYLOAD]], i64 [[AGG_TMP_SROA_2_0_COPYLOAD]], i64 [[AGG_TMP_SROA_0_0_COPYLOAD]], i64 [[AGG_TMP_SROA_2_0_COPYLOAD]], ptr byval([[STRUCT_STRUCTBYVAL]]) align 8 [[AGG_TMP2]])3777; ORIGIN-NEXT:    ret void3778;3779; CALLS-LABEL: define void @VAArgStructNoSSE(3780; CALLS-SAME: ptr captures(none) [[S:%.*]]) #[[ATTR9:[0-9]+]] {3781; CALLS-NEXT:  [[ENTRY:.*:]]3782; CALLS-NEXT:    [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 83783; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_origin_tls, align 43784; CALLS-NEXT:    call void @llvm.donothing()3785; CALLS-NEXT:    [[AGG_TMP2:%.*]] = alloca [[STRUCT_STRUCTBYVAL:%.*]], align 83786; CALLS-NEXT:    [[TMP2:%.*]] = ptrtoint ptr [[AGG_TMP2]] to i643787; CALLS-NEXT:    [[TMP3:%.*]] = xor i64 [[TMP2]], 879609302220803788; CALLS-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr3789; CALLS-NEXT:    [[TMP5:%.*]] = add i64 [[TMP3]], 175921860444163790; CALLS-NEXT:    [[TMP6:%.*]] = and i64 [[TMP5]], -43791; CALLS-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr3792; CALLS-NEXT:    call void @llvm.memset.p0.i64(ptr align 8 [[TMP4]], i8 -1, i64 16, i1 false)3793; CALLS-NEXT:    call void @__msan_set_alloca_origin_with_descr(ptr [[AGG_TMP2]], i64 16, ptr @[[GLOB10:[0-9]+]], ptr @[[GLOB11:[0-9]+]])3794; CALLS-NEXT:    call void @__msan_maybe_warning_8(i64 zeroext [[TMP0]], i32 zeroext [[TMP1]])3795; CALLS-NEXT:    [[AGG_TMP_SROA_0_0_COPYLOAD:%.*]] = load i64, ptr [[S]], align 43796; CALLS-NEXT:    [[TMP8:%.*]] = ptrtoint ptr [[S]] to i643797; CALLS-NEXT:    [[TMP9:%.*]] = xor i64 [[TMP8]], 879609302220803798; CALLS-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr3799; CALLS-NEXT:    [[TMP11:%.*]] = add i64 [[TMP9]], 175921860444163800; CALLS-NEXT:    [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr3801; CALLS-NEXT:    [[_MSLD:%.*]] = load i64, ptr [[TMP10]], align 43802; CALLS-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 43803; CALLS-NEXT:    [[_MSPROP:%.*]] = or i64 [[TMP0]], 03804; CALLS-NEXT:    [[_MSPROP1:%.*]] = or i64 [[_MSPROP]], 03805; CALLS-NEXT:    [[AGG_TMP_SROA_2_0__SROA_IDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCTBYVAL]], ptr [[S]], i64 0, i32 23806; CALLS-NEXT:    call void @__msan_maybe_warning_8(i64 zeroext [[_MSPROP1]], i32 zeroext [[TMP1]])3807; CALLS-NEXT:    [[AGG_TMP_SROA_2_0_COPYLOAD:%.*]] = load i64, ptr [[AGG_TMP_SROA_2_0__SROA_IDX]], align 43808; CALLS-NEXT:    [[TMP14:%.*]] = ptrtoint ptr [[AGG_TMP_SROA_2_0__SROA_IDX]] to i643809; CALLS-NEXT:    [[TMP15:%.*]] = xor i64 [[TMP14]], 879609302220803810; CALLS-NEXT:    [[TMP16:%.*]] = inttoptr i64 [[TMP15]] to ptr3811; CALLS-NEXT:    [[TMP17:%.*]] = add i64 [[TMP15]], 175921860444163812; CALLS-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr3813; CALLS-NEXT:    [[_MSLD2:%.*]] = load i64, ptr [[TMP16]], align 43814; CALLS-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 43815; CALLS-NEXT:    [[TMP20:%.*]] = call ptr @__msan_memcpy(ptr [[AGG_TMP2]], ptr [[S]], i64 16)3816; CALLS-NEXT:    store i32 -1, ptr @__msan_param_tls, align 83817; CALLS-NEXT:    store i32 0, ptr @__msan_param_origin_tls, align 43818; CALLS-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 83819; CALLS-NEXT:    store i32 [[TMP13]], ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 8), align 43820; CALLS-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 83821; CALLS-NEXT:    store i32 [[TMP19]], ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 16), align 43822; CALLS-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 24), align 83823; CALLS-NEXT:    store i32 [[TMP13]], ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 24), align 43824; CALLS-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 83825; CALLS-NEXT:    store i32 [[TMP19]], ptr getelementptr (i8, ptr @__msan_param_origin_tls, i64 32), align 43826; CALLS-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[AGG_TMP2]] to i643827; CALLS-NEXT:    [[TMP22:%.*]] = xor i64 [[TMP21]], 879609302220803828; CALLS-NEXT:    [[TMP23:%.*]] = inttoptr i64 [[TMP22]] to ptr3829; CALLS-NEXT:    [[TMP24:%.*]] = add i64 [[TMP22]], 175921860444163830; CALLS-NEXT:    [[TMP25:%.*]] = inttoptr i64 [[TMP24]] to ptr3831; CALLS-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_param_tls, i64 40), ptr align 8 [[TMP23]], i64 16, i1 false)3832; CALLS-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 getelementptr (i8, ptr @__msan_param_origin_tls, i64 40), ptr align 4 [[TMP25]], i64 16, i1 false)3833; CALLS-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 8), align 83834; CALLS-NEXT:    [[TMP26:%.*]] = zext i32 [[TMP13]] to i643835; CALLS-NEXT:    [[TMP27:%.*]] = shl i64 [[TMP26]], 323836; CALLS-NEXT:    [[TMP28:%.*]] = or i64 [[TMP26]], [[TMP27]]3837; CALLS-NEXT:    store i64 [[TMP28]], ptr getelementptr (i8, ptr @__msan_va_arg_origin_tls, i64 8), align 83838; CALLS-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 16), align 83839; CALLS-NEXT:    [[TMP29:%.*]] = zext i32 [[TMP19]] to i643840; CALLS-NEXT:    [[TMP30:%.*]] = shl i64 [[TMP29]], 323841; CALLS-NEXT:    [[TMP31:%.*]] = or i64 [[TMP29]], [[TMP30]]3842; CALLS-NEXT:    store i64 [[TMP31]], ptr getelementptr (i8, ptr @__msan_va_arg_origin_tls, i64 16), align 83843; CALLS-NEXT:    store i64 [[_MSLD]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 24), align 83844; CALLS-NEXT:    [[TMP32:%.*]] = zext i32 [[TMP13]] to i643845; CALLS-NEXT:    [[TMP33:%.*]] = shl i64 [[TMP32]], 323846; CALLS-NEXT:    [[TMP34:%.*]] = or i64 [[TMP32]], [[TMP33]]3847; CALLS-NEXT:    store i64 [[TMP34]], ptr getelementptr (i8, ptr @__msan_va_arg_origin_tls, i64 24), align 83848; CALLS-NEXT:    store i64 [[_MSLD2]], ptr getelementptr (i8, ptr @__msan_va_arg_tls, i64 32), align 83849; CALLS-NEXT:    [[TMP35:%.*]] = zext i32 [[TMP19]] to i643850; CALLS-NEXT:    [[TMP36:%.*]] = shl i64 [[TMP35]], 323851; CALLS-NEXT:    [[TMP37:%.*]] = or i64 [[TMP35]], [[TMP36]]3852; CALLS-NEXT:    store i64 [[TMP37]], ptr getelementptr (i8, ptr @__msan_va_arg_origin_tls, i64 32), align 83853; CALLS-NEXT:    [[TMP38:%.*]] = ptrtoint ptr [[AGG_TMP2]] to i643854; CALLS-NEXT:    [[TMP39:%.*]] = xor i64 [[TMP38]], 879609302220803855; CALLS-NEXT:    [[TMP40:%.*]] = inttoptr i64 [[TMP39]] to ptr3856; CALLS-NEXT:    [[TMP41:%.*]] = add i64 [[TMP39]], 175921860444163857; CALLS-NEXT:    [[TMP42:%.*]] = inttoptr i64 [[TMP41]] to ptr3858; CALLS-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_tls, i64 48), ptr align 8 [[TMP40]], i64 16, i1 false)3859; CALLS-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 getelementptr (i8, ptr @__msan_va_arg_origin_tls, i64 48), ptr align 8 [[TMP42]], i64 16, i1 false)3860; CALLS-NEXT:    store i64 16, ptr @__msan_va_arg_overflow_size_tls, align 83861; CALLS-NEXT:    call void (i32, ...) @VAArgStructFn(i32 undef, i64 [[AGG_TMP_SROA_0_0_COPYLOAD]], i64 [[AGG_TMP_SROA_2_0_COPYLOAD]], i64 [[AGG_TMP_SROA_0_0_COPYLOAD]], i64 [[AGG_TMP_SROA_2_0_COPYLOAD]], ptr byval([[STRUCT_STRUCTBYVAL]]) align 8 [[AGG_TMP2]])3862; CALLS-NEXT:    ret void3863;3864entry:3865  %agg.tmp2 = alloca %struct.StructByVal, align 83866  %agg.tmp.sroa.0.0.copyload = load i64, ptr %s, align 43867  %agg.tmp.sroa.2.0..sroa_idx = getelementptr inbounds %struct.StructByVal, ptr %s, i64 0, i32 23868  %agg.tmp.sroa.2.0.copyload = load i64, ptr %agg.tmp.sroa.2.0..sroa_idx, align 43869  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %agg.tmp2, ptr align 4 %s, i64 16, i1 false)3870  call void (i32, ...) @VAArgStructFn(i32 undef, i64 %agg.tmp.sroa.0.0.copyload, i64 %agg.tmp.sroa.2.0.copyload, i64 %agg.tmp.sroa.0.0.copyload, i64 %agg.tmp.sroa.2.0.copyload, ptr byval(%struct.StructByVal) align 8 %agg.tmp2)3871  ret void3872}3873 3874attributes #0 = { "target-features"="+fxsr,+x87,-sse" }3875 3876 3877declare i32 @InnerTailCall(i32 %a)3878 3879define void @MismatchedReturnTypeTailCall(i32 %a) sanitize_memory {3880; CHECK-LABEL: define void @MismatchedReturnTypeTailCall(3881; CHECK-SAME: i32 [[A:%.*]]) #[[ATTR6]] {3882; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 83883; CHECK-NEXT:    call void @llvm.donothing()3884; CHECK-NEXT:    store i32 [[TMP1]], ptr @__msan_param_tls, align 83885; CHECK-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83886; CHECK-NEXT:    [[B:%.*]] = tail call i32 @InnerTailCall(i32 [[A]])3887; CHECK-NEXT:    [[_MSRET:%.*]] = load i32, ptr @__msan_retval_tls, align 83888; CHECK-NEXT:    ret void3889;3890; ORIGIN-LABEL: define void @MismatchedReturnTypeTailCall(3891; ORIGIN-SAME: i32 [[A:%.*]]) #[[ATTR6]] {3892; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 83893; ORIGIN-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 43894; ORIGIN-NEXT:    call void @llvm.donothing()3895; ORIGIN-NEXT:    store i32 [[TMP1]], ptr @__msan_param_tls, align 83896; ORIGIN-NEXT:    store i32 [[TMP2]], ptr @__msan_param_origin_tls, align 43897; ORIGIN-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83898; ORIGIN-NEXT:    [[B:%.*]] = tail call i32 @InnerTailCall(i32 [[A]])3899; ORIGIN-NEXT:    [[_MSRET:%.*]] = load i32, ptr @__msan_retval_tls, align 83900; ORIGIN-NEXT:    [[TMP3:%.*]] = load i32, ptr @__msan_retval_origin_tls, align 43901; ORIGIN-NEXT:    ret void3902;3903; CALLS-LABEL: define void @MismatchedReturnTypeTailCall(3904; CALLS-SAME: i32 [[A:%.*]]) #[[ATTR6]] {3905; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 83906; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 43907; CALLS-NEXT:    call void @llvm.donothing()3908; CALLS-NEXT:    store i32 [[TMP1]], ptr @__msan_param_tls, align 83909; CALLS-NEXT:    store i32 [[TMP2]], ptr @__msan_param_origin_tls, align 43910; CALLS-NEXT:    store i32 0, ptr @__msan_retval_tls, align 83911; CALLS-NEXT:    [[B:%.*]] = tail call i32 @InnerTailCall(i32 [[A]])3912; CALLS-NEXT:    [[_MSRET:%.*]] = load i32, ptr @__msan_retval_tls, align 83913; CALLS-NEXT:    [[TMP3:%.*]] = load i32, ptr @__msan_retval_origin_tls, align 43914; CALLS-NEXT:    ret void3915;3916  %b = tail call i32 @InnerTailCall(i32 %a)3917  ret void3918}3919 3920; We used to strip off the 'tail' modifier, but now that we unpoison return slot3921; shadow before the call, we don't need to anymore.3922 3923 3924 3925declare i32 @MustTailCall(i32 %a)3926 3927define i32 @CallMustTailCall(i32 %a) sanitize_memory {3928; CHECK-LABEL: define i32 @CallMustTailCall(3929; CHECK-SAME: i32 [[A:%.*]]) #[[ATTR6]] {3930; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 83931; CHECK-NEXT:    call void @llvm.donothing()3932; CHECK-NEXT:    store i32 [[TMP1]], ptr @__msan_param_tls, align 83933; CHECK-NEXT:    [[B:%.*]] = musttail call i32 @MustTailCall(i32 [[A]])3934; CHECK-NEXT:    ret i32 [[B]]3935;3936; ORIGIN-LABEL: define i32 @CallMustTailCall(3937; ORIGIN-SAME: i32 [[A:%.*]]) #[[ATTR6]] {3938; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 83939; ORIGIN-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 43940; ORIGIN-NEXT:    call void @llvm.donothing()3941; ORIGIN-NEXT:    store i32 [[TMP1]], ptr @__msan_param_tls, align 83942; ORIGIN-NEXT:    store i32 [[TMP2]], ptr @__msan_param_origin_tls, align 43943; ORIGIN-NEXT:    [[B:%.*]] = musttail call i32 @MustTailCall(i32 [[A]])3944; ORIGIN-NEXT:    ret i32 [[B]]3945;3946; CALLS-LABEL: define i32 @CallMustTailCall(3947; CALLS-SAME: i32 [[A:%.*]]) #[[ATTR6]] {3948; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 83949; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 43950; CALLS-NEXT:    call void @llvm.donothing()3951; CALLS-NEXT:    store i32 [[TMP1]], ptr @__msan_param_tls, align 83952; CALLS-NEXT:    store i32 [[TMP2]], ptr @__msan_param_origin_tls, align 43953; CALLS-NEXT:    [[B:%.*]] = musttail call i32 @MustTailCall(i32 [[A]])3954; CALLS-NEXT:    ret i32 [[B]]3955;3956  %b = musttail call i32 @MustTailCall(i32 %a)3957  ret i32 %b3958}3959 3960; For "musttail" calls we can not insert any shadow manipulating code between3961; call and the return instruction. And we don't need to, because everything is3962; taken care of in the callee.3963 3964declare ptr @MismatchingMustTailCall(i32 %a)3965 3966define ptr @MismatchingCallMustTailCall(i32 %a) sanitize_memory {3967; CHECK-LABEL: define ptr @MismatchingCallMustTailCall(3968; CHECK-SAME: i32 [[A:%.*]]) #[[ATTR6]] {3969; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 83970; CHECK-NEXT:    call void @llvm.donothing()3971; CHECK-NEXT:    store i32 [[TMP1]], ptr @__msan_param_tls, align 83972; CHECK-NEXT:    [[B:%.*]] = musttail call ptr @MismatchingMustTailCall(i32 [[A]])3973; CHECK-NEXT:    ret ptr [[B]]3974;3975; ORIGIN-LABEL: define ptr @MismatchingCallMustTailCall(3976; ORIGIN-SAME: i32 [[A:%.*]]) #[[ATTR6]] {3977; ORIGIN-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 83978; ORIGIN-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 43979; ORIGIN-NEXT:    call void @llvm.donothing()3980; ORIGIN-NEXT:    store i32 [[TMP1]], ptr @__msan_param_tls, align 83981; ORIGIN-NEXT:    store i32 [[TMP2]], ptr @__msan_param_origin_tls, align 43982; ORIGIN-NEXT:    [[B:%.*]] = musttail call ptr @MismatchingMustTailCall(i32 [[A]])3983; ORIGIN-NEXT:    ret ptr [[B]]3984;3985; CALLS-LABEL: define ptr @MismatchingCallMustTailCall(3986; CALLS-SAME: i32 [[A:%.*]]) #[[ATTR6]] {3987; CALLS-NEXT:    [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 83988; CALLS-NEXT:    [[TMP2:%.*]] = load i32, ptr @__msan_param_origin_tls, align 43989; CALLS-NEXT:    call void @llvm.donothing()3990; CALLS-NEXT:    store i32 [[TMP1]], ptr @__msan_param_tls, align 83991; CALLS-NEXT:    store i32 [[TMP2]], ptr @__msan_param_origin_tls, align 43992; CALLS-NEXT:    [[B:%.*]] = musttail call ptr @MismatchingMustTailCall(i32 [[A]])3993; CALLS-NEXT:    ret ptr [[B]]3994;3995  %b = musttail call ptr @MismatchingMustTailCall(i32 %a)3996  ret ptr %b3997}3998 3999; For "musttail" calls we can not insert any shadow manipulating code between4000; call and the return instruction. And we don't need to, because everything is4001; taken care of in the callee.4002 4003 4004 4005 4006; CHECK-CALLS: declare void @__msan_maybe_warning_1(i8, i32)4007; CHECK-CALLS: declare void @__msan_maybe_store_origin_1(i8, ptr, i32)4008; CHECK-CALLS: declare void @__msan_maybe_warning_2(i16, i32)4009; CHECK-CALLS: declare void @__msan_maybe_store_origin_2(i16, ptr, i32)4010; CHECK-CALLS: declare void @__msan_maybe_warning_4(i32, i32)4011; CHECK-CALLS: declare void @__msan_maybe_store_origin_4(i32, ptr, i32)4012; CHECK-CALLS: declare void @__msan_maybe_warning_8(i64, i32)4013; CHECK-CALLS: declare void @__msan_maybe_store_origin_8(i64, ptr, i32)4014;.4015; CHECK: [[PROF1]] = !{!"branch_weights", i32 1, i32 1048575}4016;.4017; ORIGIN: [[PROF1]] = !{!"branch_weights", i32 1, i32 1048575}4018;.4019