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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt %s -S -passes=msan 2>&1 | FileCheck %s3 4target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"5target triple = "x86_64-unknown-linux-gnu"6 7define {i64, i1} @test_sadd_with_overflow(i64 %a, i64 %b) #0 {8; CHECK-LABEL: define { i64, i1 } @test_sadd_with_overflow(9; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0:[0-9]+]] {10; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 811; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 812; CHECK-NEXT: call void @llvm.donothing()13; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[TMP1]], [[TMP2]]14; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i64 [[TMP3]], 015; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { i64, i1 } poison, i64 [[TMP3]], 016; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i64, i1 } [[TMP5]], i1 [[TMP4]], 117; CHECK-NEXT: [[RES:%.*]] = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 [[A]], i64 [[B]])18; CHECK-NEXT: store { i64, i1 } [[TMP6]], ptr @__msan_retval_tls, align 819; CHECK-NEXT: ret { i64, i1 } [[RES]]20;21 %res = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %a, i64 %b)22 ret { i64, i1 } %res23}24 25define {i64, i1} @test_uadd_with_overflow(i64 %a, i64 %b) #0 {26; CHECK-LABEL: define { i64, i1 } @test_uadd_with_overflow(27; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {28; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 829; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 830; CHECK-NEXT: call void @llvm.donothing()31; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[TMP1]], [[TMP2]]32; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i64 [[TMP3]], 033; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { i64, i1 } poison, i64 [[TMP3]], 034; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i64, i1 } [[TMP5]], i1 [[TMP4]], 135; CHECK-NEXT: [[RES:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[A]], i64 [[B]])36; CHECK-NEXT: store { i64, i1 } [[TMP6]], ptr @__msan_retval_tls, align 837; CHECK-NEXT: ret { i64, i1 } [[RES]]38;39 %res = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %a, i64 %b)40 ret { i64, i1 } %res41}42 43define {i64, i1} @test_smul_with_overflow(i64 %a, i64 %b) #0 {44; CHECK-LABEL: define { i64, i1 } @test_smul_with_overflow(45; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {46; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 847; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 848; CHECK-NEXT: call void @llvm.donothing()49; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[TMP1]], [[TMP2]]50; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i64 [[TMP3]], 051; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { i64, i1 } poison, i64 [[TMP3]], 052; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i64, i1 } [[TMP5]], i1 [[TMP4]], 153; CHECK-NEXT: [[RES:%.*]] = call { i64, i1 } @llvm.smul.with.overflow.i64(i64 [[A]], i64 [[B]])54; CHECK-NEXT: store { i64, i1 } [[TMP6]], ptr @__msan_retval_tls, align 855; CHECK-NEXT: ret { i64, i1 } [[RES]]56;57 %res = call { i64, i1 } @llvm.smul.with.overflow.i64(i64 %a, i64 %b)58 ret { i64, i1 } %res59}60define {i64, i1} @test_umul_with_overflow(i64 %a, i64 %b) #0 {61; CHECK-LABEL: define { i64, i1 } @test_umul_with_overflow(62; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {63; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 864; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 865; CHECK-NEXT: call void @llvm.donothing()66; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[TMP1]], [[TMP2]]67; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i64 [[TMP3]], 068; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { i64, i1 } poison, i64 [[TMP3]], 069; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i64, i1 } [[TMP5]], i1 [[TMP4]], 170; CHECK-NEXT: [[RES:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[A]], i64 [[B]])71; CHECK-NEXT: store { i64, i1 } [[TMP6]], ptr @__msan_retval_tls, align 872; CHECK-NEXT: ret { i64, i1 } [[RES]]73;74 %res = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %a, i64 %b)75 ret { i64, i1 } %res76}77define {i64, i1} @test_ssub_with_overflow(i64 %a, i64 %b) #0 {78; CHECK-LABEL: define { i64, i1 } @test_ssub_with_overflow(79; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {80; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 881; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 882; CHECK-NEXT: call void @llvm.donothing()83; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[TMP1]], [[TMP2]]84; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i64 [[TMP3]], 085; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { i64, i1 } poison, i64 [[TMP3]], 086; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i64, i1 } [[TMP5]], i1 [[TMP4]], 187; CHECK-NEXT: [[RES:%.*]] = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 [[A]], i64 [[B]])88; CHECK-NEXT: store { i64, i1 } [[TMP6]], ptr @__msan_retval_tls, align 889; CHECK-NEXT: ret { i64, i1 } [[RES]]90;91 %res = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %a, i64 %b)92 ret { i64, i1 } %res93}94define {i64, i1} @test_usub_with_overflow(i64 %a, i64 %b) #0 {95; CHECK-LABEL: define { i64, i1 } @test_usub_with_overflow(96; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {97; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 898; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 899; CHECK-NEXT: call void @llvm.donothing()100; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[TMP1]], [[TMP2]]101; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i64 [[TMP3]], 0102; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { i64, i1 } poison, i64 [[TMP3]], 0103; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i64, i1 } [[TMP5]], i1 [[TMP4]], 1104; CHECK-NEXT: [[RES:%.*]] = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 [[A]], i64 [[B]])105; CHECK-NEXT: store { i64, i1 } [[TMP6]], ptr @__msan_retval_tls, align 8106; CHECK-NEXT: ret { i64, i1 } [[RES]]107;108 %res = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %a, i64 %b)109 ret { i64, i1 } %res110}111 112define {<4 x i32>, <4 x i1>} @test_sadd_with_overflow_vec(<4 x i32> %a, <4 x i32> %b) #0 {113; CHECK-LABEL: define { <4 x i32>, <4 x i1> } @test_sadd_with_overflow_vec(114; CHECK-SAME: <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]) #[[ATTR0]] {115; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 8116; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8117; CHECK-NEXT: call void @llvm.donothing()118; CHECK-NEXT: [[TMP3:%.*]] = or <4 x i32> [[TMP1]], [[TMP2]]119; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <4 x i32> [[TMP3]], zeroinitializer120; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { <4 x i32>, <4 x i1> } poison, <4 x i32> [[TMP3]], 0121; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { <4 x i32>, <4 x i1> } [[TMP5]], <4 x i1> [[TMP4]], 1122; CHECK-NEXT: [[RES:%.*]] = call { <4 x i32>, <4 x i1> } @llvm.sadd.with.overflow.v4i32(<4 x i32> [[A]], <4 x i32> [[B]])123; CHECK-NEXT: store { <4 x i32>, <4 x i1> } [[TMP6]], ptr @__msan_retval_tls, align 8124; CHECK-NEXT: ret { <4 x i32>, <4 x i1> } [[RES]]125;126 %res = call { <4 x i32>, <4 x i1> } @llvm.sadd.with.overflow.v4i32(<4 x i32> %a, <4 x i32> %b)127 ret { <4 x i32>, <4 x i1> } %res128}129 130attributes #0 = { sanitize_memory }131