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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt %s -S -passes=msan 2>&1 | FileCheck %s3 4target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"5target triple = "x86_64-unknown-linux-gnu"6 7define i64 @test_sadd_sat(i64 %a, i64 %b) #0 {8; CHECK-LABEL: define i64 @test_sadd_sat(9; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0:[0-9]+]] {10; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 811; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 812; CHECK-NEXT: call void @llvm.donothing()13; CHECK-NEXT: [[_MSPROP:%.*]] = or i64 [[TMP1]], [[TMP2]]14; CHECK-NEXT: [[RES:%.*]] = call i64 @llvm.sadd.sat.i64(i64 [[A]], i64 [[B]])15; CHECK-NEXT: store i64 [[_MSPROP]], ptr @__msan_retval_tls, align 816; CHECK-NEXT: ret i64 [[RES]]17;18 %res = call i64 @llvm.sadd.sat(i64 %a, i64 %b)19 ret i64 %res20}21 22define i64 @test_uadd_sat(i64 %a, i64 %b) #0 {23; CHECK-LABEL: define i64 @test_uadd_sat(24; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {25; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 826; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 827; CHECK-NEXT: call void @llvm.donothing()28; CHECK-NEXT: [[_MSPROP:%.*]] = or i64 [[TMP1]], [[TMP2]]29; CHECK-NEXT: [[RES:%.*]] = call i64 @llvm.uadd.sat.i64(i64 [[A]], i64 [[B]])30; CHECK-NEXT: store i64 [[_MSPROP]], ptr @__msan_retval_tls, align 831; CHECK-NEXT: ret i64 [[RES]]32;33 %res = call i64 @llvm.uadd.sat(i64 %a, i64 %b)34 ret i64 %res35}36 37define i64 @test_ssub_sat(i64 %a, i64 %b) #0 {38; CHECK-LABEL: define i64 @test_ssub_sat(39; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {40; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 841; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 842; CHECK-NEXT: call void @llvm.donothing()43; CHECK-NEXT: [[_MSPROP:%.*]] = or i64 [[TMP1]], [[TMP2]]44; CHECK-NEXT: [[RES:%.*]] = call i64 @llvm.ssub.sat.i64(i64 [[A]], i64 [[B]])45; CHECK-NEXT: store i64 [[_MSPROP]], ptr @__msan_retval_tls, align 846; CHECK-NEXT: ret i64 [[RES]]47;48 %res = call i64 @llvm.ssub.sat(i64 %a, i64 %b)49 ret i64 %res50}51 52define i64 @test_usub_sat(i64 %a, i64 %b) #0 {53; CHECK-LABEL: define i64 @test_usub_sat(54; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {55; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 856; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 857; CHECK-NEXT: call void @llvm.donothing()58; CHECK-NEXT: [[_MSPROP:%.*]] = or i64 [[TMP1]], [[TMP2]]59; CHECK-NEXT: [[RES:%.*]] = call i64 @llvm.usub.sat.i64(i64 [[A]], i64 [[B]])60; CHECK-NEXT: store i64 [[_MSPROP]], ptr @__msan_retval_tls, align 861; CHECK-NEXT: ret i64 [[RES]]62;63 %res = call i64 @llvm.usub.sat(i64 %a, i64 %b)64 ret i64 %res65}66 67define i64 @test_sshl_sat(i64 %a, i64 %b) #0 {68; CHECK-LABEL: define i64 @test_sshl_sat(69; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {70; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 871; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 872; CHECK-NEXT: call void @llvm.donothing()73; CHECK-NEXT: [[_MSPROP:%.*]] = or i64 [[TMP1]], [[TMP2]]74; CHECK-NEXT: [[RES:%.*]] = call i64 @llvm.sshl.sat.i64(i64 [[A]], i64 [[B]])75; CHECK-NEXT: store i64 [[_MSPROP]], ptr @__msan_retval_tls, align 876; CHECK-NEXT: ret i64 [[RES]]77;78 %res = call i64 @llvm.sshl.sat(i64 %a, i64 %b)79 ret i64 %res80}81 82define i64 @test_ushl_sat(i64 %a, i64 %b) #0 {83; CHECK-LABEL: define i64 @test_ushl_sat(84; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {85; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 886; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 887; CHECK-NEXT: call void @llvm.donothing()88; CHECK-NEXT: [[_MSPROP:%.*]] = or i64 [[TMP1]], [[TMP2]]89; CHECK-NEXT: [[RES:%.*]] = call i64 @llvm.ushl.sat.i64(i64 [[A]], i64 [[B]])90; CHECK-NEXT: store i64 [[_MSPROP]], ptr @__msan_retval_tls, align 891; CHECK-NEXT: ret i64 [[RES]]92;93 %res = call i64 @llvm.ushl.sat(i64 %a, i64 %b)94 ret i64 %res95}96 97define <4 x i32> @test_sadd_sat_vec(<4 x i32> %a, <4 x i32> %b) #0 {98; CHECK-LABEL: define <4 x i32> @test_sadd_sat_vec(99; CHECK-SAME: <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]) #[[ATTR0]] {100; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 8101; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8102; CHECK-NEXT: call void @llvm.donothing()103; CHECK-NEXT: [[_MSPROP:%.*]] = or <4 x i32> [[TMP1]], [[TMP2]]104; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32> [[A]], <4 x i32> [[B]])105; CHECK-NEXT: store <4 x i32> [[_MSPROP]], ptr @__msan_retval_tls, align 8106; CHECK-NEXT: ret <4 x i32> [[RES]]107;108 %res = call <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32> %a, <4 x i32> %b)109 ret <4 x i32> %res110}111 112 113attributes #0 = { sanitize_memory }114