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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt < %s -passes=msan -S | FileCheck %s3;4; Forked from llvm/test/CodeGen/X86/scmp.ll5 6target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"7target triple = "x86_64-unknown-linux-gnu"8 9define i8 @scmp.8.8(i8 %x, i8 %y) nounwind #0 {10; CHECK-LABEL: define i8 @scmp.8.8(11; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) #[[ATTR0:[0-9]+]] {12; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @__msan_param_tls, align 813; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 814; CHECK-NEXT: call void @llvm.donothing()15; CHECK-NEXT: [[_MSPROP:%.*]] = or i8 [[TMP1]], [[TMP2]]16; CHECK-NEXT: [[_MSPROP1:%.*]] = or i8 [[_MSPROP]], 017; CHECK-NEXT: [[TMP3:%.*]] = call i8 @llvm.scmp.i8.i8(i8 [[X]], i8 [[Y]])18; CHECK-NEXT: store i8 [[_MSPROP1]], ptr @__msan_retval_tls, align 819; CHECK-NEXT: ret i8 [[TMP3]]20;21 %1 = call i8 @llvm.scmp(i8 %x, i8 %y)22 ret i8 %123}24 25define i8 @scmp.8.16(i16 %x, i16 %y) nounwind #0 {26; CHECK-LABEL: define i8 @scmp.8.16(27; CHECK-SAME: i16 [[X:%.*]], i16 [[Y:%.*]]) #[[ATTR0]] {28; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 829; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 830; CHECK-NEXT: call void @llvm.donothing()31; CHECK-NEXT: [[_MSPROP:%.*]] = or i16 [[TMP1]], [[TMP2]]32; CHECK-NEXT: [[_MSPROP1:%.*]] = or i16 [[_MSPROP]], 033; CHECK-NEXT: [[TMP3:%.*]] = trunc i16 [[_MSPROP1]] to i834; CHECK-NEXT: [[TMP5:%.*]] = call i8 @llvm.scmp.i8.i16(i16 [[X]], i16 [[Y]])35; CHECK-NEXT: store i8 [[TMP3]], ptr @__msan_retval_tls, align 836; CHECK-NEXT: ret i8 [[TMP5]]37;38 %1 = call i8 @llvm.scmp(i16 %x, i16 %y)39 ret i8 %140}41 42define i8 @scmp.8.32(i32 %x, i32 %y) nounwind #0 {43; CHECK-LABEL: define i8 @scmp.8.32(44; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) #[[ATTR0]] {45; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 846; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 847; CHECK-NEXT: call void @llvm.donothing()48; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], [[TMP2]]49; CHECK-NEXT: [[_MSPROP1:%.*]] = or i32 [[_MSPROP]], 050; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[_MSPROP1]] to i851; CHECK-NEXT: [[TMP5:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[X]], i32 [[Y]])52; CHECK-NEXT: store i8 [[TMP3]], ptr @__msan_retval_tls, align 853; CHECK-NEXT: ret i8 [[TMP5]]54;55 %1 = call i8 @llvm.scmp(i32 %x, i32 %y)56 ret i8 %157}58 59define i8 @scmp.8.64(i64 %x, i64 %y) nounwind #0 {60; CHECK-LABEL: define i8 @scmp.8.64(61; CHECK-SAME: i64 [[X:%.*]], i64 [[Y:%.*]]) #[[ATTR0]] {62; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 863; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 864; CHECK-NEXT: call void @llvm.donothing()65; CHECK-NEXT: [[_MSPROP:%.*]] = or i64 [[TMP1]], [[TMP2]]66; CHECK-NEXT: [[_MSPROP1:%.*]] = or i64 [[_MSPROP]], 067; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[_MSPROP1]] to i868; CHECK-NEXT: [[TMP5:%.*]] = call i8 @llvm.scmp.i8.i64(i64 [[X]], i64 [[Y]])69; CHECK-NEXT: store i8 [[TMP3]], ptr @__msan_retval_tls, align 870; CHECK-NEXT: ret i8 [[TMP5]]71;72 %1 = call i8 @llvm.scmp(i64 %x, i64 %y)73 ret i8 %174}75 76define i8 @scmp.8.128(i128 %x, i128 %y) nounwind #0 {77; CHECK-LABEL: define i8 @scmp.8.128(78; CHECK-SAME: i128 [[X:%.*]], i128 [[Y:%.*]]) #[[ATTR0]] {79; CHECK-NEXT: [[TMP1:%.*]] = load i128, ptr @__msan_param_tls, align 880; CHECK-NEXT: [[TMP2:%.*]] = load i128, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 881; CHECK-NEXT: call void @llvm.donothing()82; CHECK-NEXT: [[_MSPROP:%.*]] = or i128 [[TMP1]], [[TMP2]]83; CHECK-NEXT: [[_MSPROP1:%.*]] = or i128 [[_MSPROP]], 084; CHECK-NEXT: [[TMP3:%.*]] = trunc i128 [[_MSPROP1]] to i885; CHECK-NEXT: [[TMP5:%.*]] = call i8 @llvm.scmp.i8.i128(i128 [[X]], i128 [[Y]])86; CHECK-NEXT: store i8 [[TMP3]], ptr @__msan_retval_tls, align 887; CHECK-NEXT: ret i8 [[TMP5]]88;89 %1 = call i8 @llvm.scmp(i128 %x, i128 %y)90 ret i8 %191}92 93define i32 @scmp.32.32(i32 %x, i32 %y) nounwind #0 {94; CHECK-LABEL: define i32 @scmp.32.32(95; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) #[[ATTR0]] {96; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 897; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 898; CHECK-NEXT: call void @llvm.donothing()99; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], [[TMP2]]100; CHECK-NEXT: [[_MSPROP1:%.*]] = or i32 [[_MSPROP]], 0101; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[X]], i32 [[Y]])102; CHECK-NEXT: store i32 [[_MSPROP1]], ptr @__msan_retval_tls, align 8103; CHECK-NEXT: ret i32 [[TMP3]]104;105 %1 = call i32 @llvm.scmp(i32 %x, i32 %y)106 ret i32 %1107}108 109define i32 @scmp.32.64(i64 %x, i64 %y) nounwind #0 {110; CHECK-LABEL: define i32 @scmp.32.64(111; CHECK-SAME: i64 [[X:%.*]], i64 [[Y:%.*]]) #[[ATTR0]] {112; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8113; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8114; CHECK-NEXT: call void @llvm.donothing()115; CHECK-NEXT: [[_MSPROP:%.*]] = or i64 [[TMP1]], [[TMP2]]116; CHECK-NEXT: [[_MSPROP1:%.*]] = or i64 [[_MSPROP]], 0117; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[_MSPROP1]] to i32118; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.scmp.i32.i64(i64 [[X]], i64 [[Y]])119; CHECK-NEXT: store i32 [[TMP3]], ptr @__msan_retval_tls, align 8120; CHECK-NEXT: ret i32 [[TMP5]]121;122 %1 = call i32 @llvm.scmp(i64 %x, i64 %y)123 ret i32 %1124}125 126define i64 @scmp.64.64(i64 %x, i64 %y) nounwind #0 {127; CHECK-LABEL: define i64 @scmp.64.64(128; CHECK-SAME: i64 [[X:%.*]], i64 [[Y:%.*]]) #[[ATTR0]] {129; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8130; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8131; CHECK-NEXT: call void @llvm.donothing()132; CHECK-NEXT: [[_MSPROP:%.*]] = or i64 [[TMP1]], [[TMP2]]133; CHECK-NEXT: [[_MSPROP1:%.*]] = or i64 [[_MSPROP]], 0134; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.scmp.i64.i64(i64 [[X]], i64 [[Y]])135; CHECK-NEXT: store i64 [[_MSPROP1]], ptr @__msan_retval_tls, align 8136; CHECK-NEXT: ret i64 [[TMP3]]137;138 %1 = call i64 @llvm.scmp(i64 %x, i64 %y)139 ret i64 %1140}141 142define i4 @scmp_narrow_result(i32 %x, i32 %y) nounwind #0 {143; CHECK-LABEL: define i4 @scmp_narrow_result(144; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) #[[ATTR0]] {145; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8146; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8147; CHECK-NEXT: call void @llvm.donothing()148; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], [[TMP2]]149; CHECK-NEXT: [[_MSPROP1:%.*]] = or i32 [[_MSPROP]], 0150; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[_MSPROP1]] to i4151; CHECK-NEXT: [[TMP5:%.*]] = call i4 @llvm.scmp.i4.i32(i32 [[X]], i32 [[Y]])152; CHECK-NEXT: store i4 [[TMP3]], ptr @__msan_retval_tls, align 8153; CHECK-NEXT: ret i4 [[TMP5]]154;155 %1 = call i4 @llvm.scmp(i32 %x, i32 %y)156 ret i4 %1157}158 159define i8 @scmp_narrow_op(i62 %x, i62 %y) nounwind #0 {160; CHECK-LABEL: define i8 @scmp_narrow_op(161; CHECK-SAME: i62 [[X:%.*]], i62 [[Y:%.*]]) #[[ATTR0]] {162; CHECK-NEXT: [[TMP1:%.*]] = load i62, ptr @__msan_param_tls, align 8163; CHECK-NEXT: [[TMP2:%.*]] = load i62, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8164; CHECK-NEXT: call void @llvm.donothing()165; CHECK-NEXT: [[_MSPROP:%.*]] = or i62 [[TMP1]], [[TMP2]]166; CHECK-NEXT: [[_MSPROP1:%.*]] = or i62 [[_MSPROP]], 0167; CHECK-NEXT: [[TMP3:%.*]] = trunc i62 [[_MSPROP1]] to i8168; CHECK-NEXT: [[TMP5:%.*]] = call i8 @llvm.scmp.i8.i62(i62 [[X]], i62 [[Y]])169; CHECK-NEXT: store i8 [[TMP3]], ptr @__msan_retval_tls, align 8170; CHECK-NEXT: ret i8 [[TMP5]]171;172 %1 = call i8 @llvm.scmp(i62 %x, i62 %y)173 ret i8 %1174}175 176define i141 @scmp_wide_result(i32 %x, i32 %y) nounwind #0 {177; CHECK-LABEL: define i141 @scmp_wide_result(178; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) #[[ATTR0]] {179; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8180; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8181; CHECK-NEXT: call void @llvm.donothing()182; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], [[TMP2]]183; CHECK-NEXT: [[_MSPROP1:%.*]] = or i32 [[_MSPROP]], 0184; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[_MSPROP1]] to i141185; CHECK-NEXT: [[TMP5:%.*]] = call i141 @llvm.scmp.i141.i32(i32 [[X]], i32 [[Y]])186; CHECK-NEXT: store i141 [[TMP3]], ptr @__msan_retval_tls, align 8187; CHECK-NEXT: ret i141 [[TMP5]]188;189 %1 = call i141 @llvm.scmp(i32 %x, i32 %y)190 ret i141 %1191}192 193define i8 @scmp_wide_op(i109 %x, i109 %y) nounwind #0 {194; CHECK-LABEL: define i8 @scmp_wide_op(195; CHECK-SAME: i109 [[X:%.*]], i109 [[Y:%.*]]) #[[ATTR0]] {196; CHECK-NEXT: [[TMP1:%.*]] = load i109, ptr @__msan_param_tls, align 8197; CHECK-NEXT: [[TMP2:%.*]] = load i109, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8198; CHECK-NEXT: call void @llvm.donothing()199; CHECK-NEXT: [[_MSPROP:%.*]] = or i109 [[TMP1]], [[TMP2]]200; CHECK-NEXT: [[_MSPROP1:%.*]] = or i109 [[_MSPROP]], 0201; CHECK-NEXT: [[TMP3:%.*]] = trunc i109 [[_MSPROP1]] to i8202; CHECK-NEXT: [[TMP5:%.*]] = call i8 @llvm.scmp.i8.i109(i109 [[X]], i109 [[Y]])203; CHECK-NEXT: store i8 [[TMP3]], ptr @__msan_retval_tls, align 8204; CHECK-NEXT: ret i8 [[TMP5]]205;206 %1 = call i8 @llvm.scmp(i109 %x, i109 %y)207 ret i8 %1208}209 210define i41 @scmp_uncommon_types(i7 %x, i7 %y) nounwind #0 {211; CHECK-LABEL: define i41 @scmp_uncommon_types(212; CHECK-SAME: i7 [[X:%.*]], i7 [[Y:%.*]]) #[[ATTR0]] {213; CHECK-NEXT: [[TMP1:%.*]] = load i7, ptr @__msan_param_tls, align 8214; CHECK-NEXT: [[TMP2:%.*]] = load i7, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8215; CHECK-NEXT: call void @llvm.donothing()216; CHECK-NEXT: [[_MSPROP:%.*]] = or i7 [[TMP1]], [[TMP2]]217; CHECK-NEXT: [[_MSPROP1:%.*]] = or i7 [[_MSPROP]], 0218; CHECK-NEXT: [[TMP3:%.*]] = zext i7 [[_MSPROP1]] to i41219; CHECK-NEXT: [[TMP5:%.*]] = call i41 @llvm.scmp.i41.i7(i7 [[X]], i7 [[Y]])220; CHECK-NEXT: store i41 [[TMP3]], ptr @__msan_retval_tls, align 8221; CHECK-NEXT: ret i41 [[TMP5]]222;223 %1 = call i41 @llvm.scmp(i7 %x, i7 %y)224 ret i41 %1225}226 227define <4 x i32> @scmp_normal_vectors(<4 x i32> %x, <4 x i32> %y) nounwind #0 {228; CHECK-LABEL: define <4 x i32> @scmp_normal_vectors(229; CHECK-SAME: <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]]) #[[ATTR0]] {230; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 8231; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8232; CHECK-NEXT: call void @llvm.donothing()233; CHECK-NEXT: [[_MSPROP:%.*]] = or <4 x i32> [[TMP1]], [[TMP2]]234; CHECK-NEXT: [[_MSPROP1:%.*]] = or <4 x i32> [[_MSPROP]], zeroinitializer235; CHECK-NEXT: [[TMP3:%.*]] = call <4 x i32> @llvm.scmp.v4i32.v4i32(<4 x i32> [[X]], <4 x i32> [[Y]])236; CHECK-NEXT: store <4 x i32> [[_MSPROP1]], ptr @__msan_retval_tls, align 8237; CHECK-NEXT: ret <4 x i32> [[TMP3]]238;239 %1 = call <4 x i32> @llvm.scmp(<4 x i32> %x, <4 x i32> %y)240 ret <4 x i32> %1241}242 243define <4 x i8> @scmp_narrow_vec_result(<4 x i32> %x, <4 x i32> %y) nounwind #0 {244; CHECK-LABEL: define <4 x i8> @scmp_narrow_vec_result(245; CHECK-SAME: <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]]) #[[ATTR0]] {246; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 8247; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8248; CHECK-NEXT: call void @llvm.donothing()249; CHECK-NEXT: [[_MSPROP:%.*]] = or <4 x i32> [[TMP1]], [[TMP2]]250; CHECK-NEXT: [[_MSPROP1:%.*]] = or <4 x i32> [[_MSPROP]], zeroinitializer251; CHECK-NEXT: [[TMP3:%.*]] = trunc <4 x i32> [[_MSPROP1]] to <4 x i8>252; CHECK-NEXT: [[TMP7:%.*]] = call <4 x i8> @llvm.scmp.v4i8.v4i32(<4 x i32> [[X]], <4 x i32> [[Y]])253; CHECK-NEXT: store <4 x i8> [[TMP3]], ptr @__msan_retval_tls, align 8254; CHECK-NEXT: ret <4 x i8> [[TMP7]]255;256 %1 = call <4 x i8> @llvm.scmp(<4 x i32> %x, <4 x i32> %y)257 ret <4 x i8> %1258}259 260define <4 x i32> @scmp_narrow_vec_op(<4 x i8> %x, <4 x i8> %y) nounwind #0 {261; CHECK-LABEL: define <4 x i32> @scmp_narrow_vec_op(262; CHECK-SAME: <4 x i8> [[X:%.*]], <4 x i8> [[Y:%.*]]) #[[ATTR0]] {263; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i8>, ptr @__msan_param_tls, align 8264; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8265; CHECK-NEXT: call void @llvm.donothing()266; CHECK-NEXT: [[_MSPROP:%.*]] = or <4 x i8> [[TMP1]], [[TMP2]]267; CHECK-NEXT: [[_MSPROP1:%.*]] = or <4 x i8> [[_MSPROP]], zeroinitializer268; CHECK-NEXT: [[TMP3:%.*]] = zext <4 x i8> [[_MSPROP1]] to <4 x i32>269; CHECK-NEXT: [[TMP7:%.*]] = call <4 x i32> @llvm.scmp.v4i32.v4i8(<4 x i8> [[X]], <4 x i8> [[Y]])270; CHECK-NEXT: store <4 x i32> [[TMP3]], ptr @__msan_retval_tls, align 8271; CHECK-NEXT: ret <4 x i32> [[TMP7]]272;273 %1 = call <4 x i32> @llvm.scmp(<4 x i8> %x, <4 x i8> %y)274 ret <4 x i32> %1275}276 277define <16 x i32> @scmp_wide_vec_result(<16 x i8> %x, <16 x i8> %y) nounwind #0 {278; CHECK-LABEL: define <16 x i32> @scmp_wide_vec_result(279; CHECK-SAME: <16 x i8> [[X:%.*]], <16 x i8> [[Y:%.*]]) #[[ATTR0]] {280; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, ptr @__msan_param_tls, align 8281; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8282; CHECK-NEXT: call void @llvm.donothing()283; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i8> [[TMP1]], [[TMP2]]284; CHECK-NEXT: [[_MSPROP1:%.*]] = or <16 x i8> [[_MSPROP]], zeroinitializer285; CHECK-NEXT: [[TMP3:%.*]] = zext <16 x i8> [[_MSPROP1]] to <16 x i32>286; CHECK-NEXT: [[TMP7:%.*]] = call <16 x i32> @llvm.scmp.v16i32.v16i8(<16 x i8> [[X]], <16 x i8> [[Y]])287; CHECK-NEXT: store <16 x i32> [[TMP3]], ptr @__msan_retval_tls, align 8288; CHECK-NEXT: ret <16 x i32> [[TMP7]]289;290 %1 = call <16 x i32> @llvm.scmp(<16 x i8> %x, <16 x i8> %y)291 ret <16 x i32> %1292}293 294define <16 x i8> @scmp_wide_vec_op(<16 x i64> %x, <16 x i64> %y) nounwind #0 {295; CHECK-LABEL: define <16 x i8> @scmp_wide_vec_op(296; CHECK-SAME: <16 x i64> [[X:%.*]], <16 x i64> [[Y:%.*]]) #[[ATTR0]] {297; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i64>, ptr @__msan_param_tls, align 8298; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i64>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 128), align 8299; CHECK-NEXT: call void @llvm.donothing()300; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i64> [[TMP1]], [[TMP2]]301; CHECK-NEXT: [[_MSPROP1:%.*]] = or <16 x i64> [[_MSPROP]], zeroinitializer302; CHECK-NEXT: [[TMP3:%.*]] = trunc <16 x i64> [[_MSPROP1]] to <16 x i8>303; CHECK-NEXT: [[TMP7:%.*]] = call <16 x i8> @llvm.scmp.v16i8.v16i64(<16 x i64> [[X]], <16 x i64> [[Y]])304; CHECK-NEXT: store <16 x i8> [[TMP3]], ptr @__msan_retval_tls, align 8305; CHECK-NEXT: ret <16 x i8> [[TMP7]]306;307 %1 = call <16 x i8> @llvm.scmp(<16 x i64> %x, <16 x i64> %y)308 ret <16 x i8> %1309}310 311define <7 x i117> @scmp_uncommon_vectors(<7 x i7> %x, <7 x i7> %y) nounwind #0 {312; CHECK-LABEL: define <7 x i117> @scmp_uncommon_vectors(313; CHECK-SAME: <7 x i7> [[X:%.*]], <7 x i7> [[Y:%.*]]) #[[ATTR0]] {314; CHECK-NEXT: [[TMP1:%.*]] = load <7 x i7>, ptr @__msan_param_tls, align 8315; CHECK-NEXT: [[TMP2:%.*]] = load <7 x i7>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8316; CHECK-NEXT: call void @llvm.donothing()317; CHECK-NEXT: [[_MSPROP:%.*]] = or <7 x i7> [[TMP1]], [[TMP2]]318; CHECK-NEXT: [[_MSPROP1:%.*]] = or <7 x i7> [[_MSPROP]], zeroinitializer319; CHECK-NEXT: [[TMP3:%.*]] = zext <7 x i7> [[_MSPROP1]] to <7 x i117>320; CHECK-NEXT: [[TMP7:%.*]] = call <7 x i117> @llvm.scmp.v7i117.v7i7(<7 x i7> [[X]], <7 x i7> [[Y]])321; CHECK-NEXT: store <7 x i117> [[TMP3]], ptr @__msan_retval_tls, align 8322; CHECK-NEXT: ret <7 x i117> [[TMP7]]323;324 %1 = call <7 x i117> @llvm.scmp(<7 x i7> %x, <7 x i7> %y)325 ret <7 x i117> %1326}327 328define <1 x i3> @scmp_scalarize(<1 x i33> %x, <1 x i33> %y) nounwind #0 {329; CHECK-LABEL: define <1 x i3> @scmp_scalarize(330; CHECK-SAME: <1 x i33> [[X:%.*]], <1 x i33> [[Y:%.*]]) #[[ATTR0]] {331; CHECK-NEXT: [[TMP1:%.*]] = load <1 x i33>, ptr @__msan_param_tls, align 8332; CHECK-NEXT: [[TMP2:%.*]] = load <1 x i33>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8333; CHECK-NEXT: call void @llvm.donothing()334; CHECK-NEXT: [[_MSPROP:%.*]] = or <1 x i33> [[TMP1]], [[TMP2]]335; CHECK-NEXT: [[_MSPROP1:%.*]] = or <1 x i33> [[_MSPROP]], zeroinitializer336; CHECK-NEXT: [[TMP3:%.*]] = trunc <1 x i33> [[_MSPROP1]] to <1 x i3>337; CHECK-NEXT: [[TMP7:%.*]] = call <1 x i3> @llvm.scmp.v1i3.v1i33(<1 x i33> [[X]], <1 x i33> [[Y]])338; CHECK-NEXT: store <1 x i3> [[TMP3]], ptr @__msan_retval_tls, align 8339; CHECK-NEXT: ret <1 x i3> [[TMP7]]340;341 %1 = call <1 x i3> @llvm.scmp(<1 x i33> %x, <1 x i33> %y)342 ret <1 x i3> %1343}344 345define <2 x i8> @scmp_bool_operands(<2 x i1> %x, <2 x i1> %y) nounwind #0 {346; CHECK-LABEL: define <2 x i8> @scmp_bool_operands(347; CHECK-SAME: <2 x i1> [[X:%.*]], <2 x i1> [[Y:%.*]]) #[[ATTR0]] {348; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i1>, ptr @__msan_param_tls, align 8349; CHECK-NEXT: [[TMP2:%.*]] = load <2 x i1>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8350; CHECK-NEXT: call void @llvm.donothing()351; CHECK-NEXT: [[_MSPROP:%.*]] = or <2 x i1> [[TMP1]], [[TMP2]]352; CHECK-NEXT: [[_MSPROP1:%.*]] = or <2 x i1> [[_MSPROP]], zeroinitializer353; CHECK-NEXT: [[TMP3:%.*]] = zext <2 x i1> [[_MSPROP1]] to <2 x i8>354; CHECK-NEXT: [[TMP7:%.*]] = call <2 x i8> @llvm.scmp.v2i8.v2i1(<2 x i1> [[X]], <2 x i1> [[Y]])355; CHECK-NEXT: store <2 x i8> [[TMP3]], ptr @__msan_retval_tls, align 8356; CHECK-NEXT: ret <2 x i8> [[TMP7]]357;358 %1 = call <2 x i8> @llvm.scmp(<2 x i1> %x, <2 x i1> %y)359 ret <2 x i8> %1360}361 362define <2 x i16> @scmp_ret_wider_than_operands(<2 x i8> %x, <2 x i8> %y) nounwind #0 {363; CHECK-LABEL: define <2 x i16> @scmp_ret_wider_than_operands(364; CHECK-SAME: <2 x i8> [[X:%.*]], <2 x i8> [[Y:%.*]]) #[[ATTR0]] {365; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i8>, ptr @__msan_param_tls, align 8366; CHECK-NEXT: [[TMP2:%.*]] = load <2 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 8), align 8367; CHECK-NEXT: call void @llvm.donothing()368; CHECK-NEXT: [[_MSPROP:%.*]] = or <2 x i8> [[TMP1]], [[TMP2]]369; CHECK-NEXT: [[_MSPROP1:%.*]] = or <2 x i8> [[_MSPROP]], zeroinitializer370; CHECK-NEXT: [[TMP3:%.*]] = zext <2 x i8> [[_MSPROP1]] to <2 x i16>371; CHECK-NEXT: [[TMP7:%.*]] = call <2 x i16> @llvm.scmp.v2i16.v2i8(<2 x i8> [[X]], <2 x i8> [[Y]])372; CHECK-NEXT: store <2 x i16> [[TMP3]], ptr @__msan_retval_tls, align 8373; CHECK-NEXT: ret <2 x i16> [[TMP7]]374;375 %1 = call <2 x i16> @llvm.scmp(<2 x i8> %x, <2 x i8> %y)376 ret <2 x i16> %1377}378 379attributes #0 = { sanitize_memory }380