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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --tool build/bin/opt --version 52; RUN: opt < %s -S -passes="msan<eager-checks;track-origins=2>" -msan-instrumentation-with-call-threshold=0 | FileCheck %s3;4; This test illustrates a bug in MemorySanitizer that will shortly be fixed5; (https://github.com/llvm/llvm-project/pull/96722).6;7; '-msan-instrumentation-with-call-threshold=0' makes it possible to detect the8; bug with a short test case.9;10; This is based on check-struct.ll.11 12target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"13target triple = "x86_64-unknown-linux-gnu"14 15define { i32, i8 } @main() sanitize_memory {16; CHECK-LABEL: define { i32, i8 } @main(17; CHECK-SAME: ) #[[ATTR0:[0-9]+]] {18; CHECK-NEXT: call void @llvm.donothing()19; CHECK-NEXT: [[P:%.*]] = inttoptr i64 0 to ptr20; CHECK-NEXT: [[O:%.*]] = load { i32, i8 }, ptr [[P]], align 421; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P]] to i6422; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 8796093022208023; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr24; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[TMP2]], 1759218604441625; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr26; CHECK-NEXT: [[_MSLD:%.*]] = load { i32, i8 }, ptr [[TMP3]], align 427; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 428; CHECK-NEXT: store { i32, i8 } zeroinitializer, ptr @__msan_retval_tls, align 829; CHECK-NEXT: [[TMP7:%.*]] = extractvalue { i32, i8 } [[_MSLD]], 030; CHECK-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 031; CHECK-NEXT: [[TMP9:%.*]] = extractvalue { i32, i8 } [[_MSLD]], 132; CHECK-NEXT: [[TMP10:%.*]] = icmp ne i8 [[TMP9]], 033; CHECK-NEXT: [[TMP11:%.*]] = or i1 [[TMP8]], [[TMP10]]34; CHECK-NEXT: [[TMP12:%.*]] = zext i1 [[TMP11]] to i6435; CHECK-NEXT: call void @__msan_maybe_warning_8(i64 zeroext [[TMP12]], i32 zeroext [[TMP6]])36; CHECK-NEXT: ret { i32, i8 } [[O]]37;38 %p = inttoptr i64 0 to ptr39 %o = load { i32, i8 }, ptr %p40 ret { i32, i8 } %o41}42