434 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=nsan -nsan-shadow-type-mapping=dqq -S %s | FileCheck %s3target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"4 5; Tests with memory manipulation (memcpy, llvm.memcpy, ...).6 7 8declare void @llvm.memcpy.p0i8.p0i8.i64(i8*, i8*, i64, i1)9 10define void @call_memcpy_intrinsics(i8* nonnull align 8 dereferenceable(16) %a, i8* nonnull align 8 dereferenceable(16) %b) sanitize_numerical_stability {11; CHECK-LABEL: @call_memcpy_intrinsics(12; CHECK-NEXT: entry:13; CHECK-NEXT: call void @__nsan_copy_4(ptr [[A:%.*]], ptr [[B:%.*]])14; CHECK-NEXT: tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 8 dereferenceable(16) [[A]], ptr nonnull align 8 dereferenceable(16) [[B]], i64 4, i1 false)15; CHECK-NEXT: call void @__nsan_copy_8(ptr [[A:%.*]], ptr [[B:%.*]])16; CHECK-NEXT: tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 8 dereferenceable(16) [[A]], ptr nonnull align 8 dereferenceable(16) [[B]], i64 8, i1 false)17; CHECK-NEXT: call void @__nsan_copy_16(ptr [[A:%.*]], ptr [[B:%.*]])18; CHECK-NEXT: tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 8 dereferenceable(16) [[A]], ptr nonnull align 8 dereferenceable(16) [[B]], i64 16, i1 false)19; CHECK-NEXT: call void @__nsan_copy_values(ptr [[A:%.*]], ptr [[B:%.*]], i64 15)20; CHECK-NEXT: tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 8 dereferenceable(16) [[A]], ptr nonnull align 8 dereferenceable(16) [[B]], i64 15, i1 false)21; CHECK-NEXT: ret void22;23entry:24 tail call void @llvm.memcpy.p0i8.p0i8.i64(ptr nonnull align 8 dereferenceable(16) %a, ptr nonnull align 8 dereferenceable(16) %b, i64 4, i1 false)25 tail call void @llvm.memcpy.p0i8.p0i8.i64(ptr nonnull align 8 dereferenceable(16) %a, ptr nonnull align 8 dereferenceable(16) %b, i64 8, i1 false)26 tail call void @llvm.memcpy.p0i8.p0i8.i64(ptr nonnull align 8 dereferenceable(16) %a, ptr nonnull align 8 dereferenceable(16) %b, i64 16, i1 false)27 tail call void @llvm.memcpy.p0i8.p0i8.i64(ptr nonnull align 8 dereferenceable(16) %a, ptr nonnull align 8 dereferenceable(16) %b, i64 15, i1 false)28 ret void29}30 31declare dso_local i8* @memcpy(i8*, i8*, i64) local_unnamed_addr32 33define void @call_memcpy(i8* nonnull align 8 dereferenceable(16) %a, i8* nonnull align 8 dereferenceable(16) %b) sanitize_numerical_stability {34; CHECK-LABEL: @call_memcpy(35; CHECK-NEXT: entry:36; CHECK-NEXT: [[TMP0:%.*]] = tail call ptr @memcpy(ptr nonnull align 8 dereferenceable(16) [[A:%.*]], ptr nonnull align 8 dereferenceable(16) [[B:%.*]], i64 16) #[[ATTR3:[0-9]+]]37; CHECK-NEXT: ret void38;39entry:40 tail call i8* @memcpy(ptr nonnull align 8 dereferenceable(16) %a, ptr nonnull align 8 dereferenceable(16) %b, i64 16)41 ret void42}43 44define void @call_memset_intrinsics(i8* nonnull align 8 dereferenceable(16) %a) sanitize_numerical_stability {45; CHECK-LABEL: @call_memset_intrinsics(46; CHECK-NEXT: entry:47; CHECK-NEXT: call void @__nsan_set_value_unknown_4(ptr [[A:%.*]])48; CHECK-NEXT: tail call void @llvm.memset.p0.i64(ptr nonnull align 8 dereferenceable(16) [[A]], i8 0, i64 4, i1 false)49; CHECK-NEXT: call void @__nsan_set_value_unknown_8(ptr [[A:%.*]])50; CHECK-NEXT: tail call void @llvm.memset.p0.i64(ptr nonnull align 8 dereferenceable(16) [[A]], i8 0, i64 8, i1 false)51; CHECK-NEXT: call void @__nsan_set_value_unknown_16(ptr [[A:%.*]])52; CHECK-NEXT: tail call void @llvm.memset.p0.i64(ptr nonnull align 8 dereferenceable(16) [[A]], i8 0, i64 16, i1 false)53; CHECK-NEXT: call void @__nsan_set_value_unknown(ptr [[A:%.*]], i64 15)54; CHECK-NEXT: tail call void @llvm.memset.p0.i64(ptr nonnull align 8 dereferenceable(16) [[A]], i8 0, i64 15, i1 false)55; CHECK-NEXT: ret void56;57entry:58 tail call void @llvm.memset.p0.i64(ptr nonnull align 8 dereferenceable(16) %a, i8 0, i64 4, i1 false)59 tail call void @llvm.memset.p0.i64(ptr nonnull align 8 dereferenceable(16) %a, i8 0, i64 8, i1 false)60 tail call void @llvm.memset.p0.i64(ptr nonnull align 8 dereferenceable(16) %a, i8 0, i64 16, i1 false)61 tail call void @llvm.memset.p0.i64(ptr nonnull align 8 dereferenceable(16) %a, i8 0, i64 15, i1 false)62 ret void63}64 65define void @transfer_float(float* %dst, float* %src) sanitize_numerical_stability {66; CHECK-LABEL: @transfer_float(67; CHECK-NEXT: entry:68; CHECK-NEXT: [[T:%.*]] = load float, ptr [[SRC:%.*]], align 469; CHECK-NEXT: [[TMP0:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_load(ptr [[SRC]], i64 1)70; CHECK-NEXT: [[TMP1:%.*]] = icmp eq ptr [[TMP0]], null71; CHECK-NEXT: br i1 [[TMP1]], label [[TMP4:%.*]], label [[TMP2:%.*]]72; CHECK: 2:73; CHECK-NEXT: [[TMP3:%.*]] = load double, ptr [[TMP0]], align 174; CHECK-NEXT: br label [[TMP6:%.*]]75; CHECK: 4:76; CHECK-NEXT: [[TMP5:%.*]] = fpext float [[T]] to double77; CHECK-NEXT: br label [[TMP6]]78; CHECK: 6:79; CHECK-NEXT: [[TMP7:%.*]] = phi double [ [[TMP3]], [[TMP2]] ], [ [[TMP5]], [[TMP4]] ]80; CHECK-NEXT: [[TMP8:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_store(ptr [[DST:%.*]], i64 1)81; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[DST]] to i6482; CHECK-NEXT: [[TMP10:%.*]] = call i32 @__nsan_internal_check_float_d(float [[T]], double [[TMP7]], i32 4, i64 [[TMP9]])83; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 184; CHECK-NEXT: [[TMP12:%.*]] = fpext float [[T]] to double85; CHECK-NEXT: [[TMP13:%.*]] = select i1 [[TMP11]], double [[TMP12]], double [[TMP7]]86; CHECK-NEXT: store double [[TMP13]], ptr [[TMP8]], align 187; CHECK-NEXT: store float [[T]], ptr [[DST]], align 188; CHECK-NEXT: ret void89;90entry:91 %t = load float, ptr %src92 store float %t, ptr %dst, align 193 ret void94}95 96define void @transfer_non_float(i32* %dst, i32* %src) sanitize_numerical_stability {97; CHECK-LABEL: @transfer_non_float(98; CHECK-NEXT: entry:99; CHECK-NEXT: [[T:%.*]] = load i32, ptr [[SRC:%.*]], align 4100; CHECK-NEXT: [[TMP0:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[SRC]])101; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 1102; CHECK-NEXT: [[TMP2:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[SRC]])103; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 1104; CHECK-NEXT: store i32 [[T]], ptr [[DST:%.*]], align 1105; CHECK-NEXT: [[TMP4:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[DST]])106; CHECK-NEXT: store i32 [[TMP1]], ptr [[TMP4]], align 1107; CHECK-NEXT: [[TMP5:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[DST]])108; CHECK-NEXT: store i64 [[TMP3]], ptr [[TMP5]], align 1109; CHECK-NEXT: ret void110;111entry:112 %t = load i32, ptr %src113 store i32 %t, ptr %dst, align 1114 ret void115}116 117define void @transfer_array([2 x float]* %a) sanitize_numerical_stability {118; CHECK-LABEL: @transfer_array(119; CHECK-NEXT: entry:120; CHECK-NEXT: [[B:%.*]] = load [2 x float], ptr [[A:%.*]], align 1121; CHECK-NEXT: [[TMP0:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[A]])122; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[TMP0]], align 1123; CHECK-NEXT: [[TMP2:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[A]])124; CHECK-NEXT: [[TMP3:%.*]] = load i128, ptr [[TMP2]], align 1125; CHECK-NEXT: store [2 x float] [[B]], ptr [[A]], align 1126; CHECK-NEXT: [[TMP4:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[A]])127; CHECK-NEXT: store i64 [[TMP1]], ptr [[TMP4]], align 1128; CHECK-NEXT: [[TMP5:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[A]])129; CHECK-NEXT: store i128 [[TMP3]], ptr [[TMP5]], align 1130; CHECK-NEXT: ret void131;132entry:133 %b = load [2 x float], ptr %a, align 1134 store [2 x float] %b, ptr %a, align 1135 ret void136}137 138define void @swap_untyped1(i64* nonnull align 8 %p, i64* nonnull align 8 %q) sanitize_numerical_stability {139; CHECK-LABEL: @swap_untyped1(140; CHECK-NEXT: [[QV:%.*]] = load i64, ptr [[Q:%.*]], align 8141; CHECK-NEXT: [[TMP1:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[Q]])142; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 1143; CHECK-NEXT: [[TMP3:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[Q]])144; CHECK-NEXT: [[TMP4:%.*]] = load i128, ptr [[TMP3]], align 1145; CHECK-NEXT: [[PV:%.*]] = load i64, ptr [[P:%.*]], align 8146; CHECK-NEXT: [[TMP5:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[P]])147; CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP5]], align 1148; CHECK-NEXT: [[TMP7:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[P]])149; CHECK-NEXT: [[TMP8:%.*]] = load i128, ptr [[TMP7]], align 1150; CHECK-NEXT: store i64 [[PV]], ptr [[Q]], align 8151; CHECK-NEXT: [[TMP9:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[Q]])152; CHECK-NEXT: store i64 [[TMP6]], ptr [[TMP9]], align 1153; CHECK-NEXT: [[TMP10:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[Q]])154; CHECK-NEXT: store i128 [[TMP8]], ptr [[TMP10]], align 1155; CHECK-NEXT: store i64 [[QV]], ptr [[P]], align 8156; CHECK-NEXT: [[TMP11:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[P]])157; CHECK-NEXT: store i64 [[TMP2]], ptr [[TMP11]], align 1158; CHECK-NEXT: [[TMP12:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[P]])159; CHECK-NEXT: store i128 [[TMP4]], ptr [[TMP12]], align 1160; CHECK-NEXT: ret void161;162 %qv = load i64, ptr %q163 %pv = load i64, ptr %p164 store i64 %pv, ptr %q, align 8165 store i64 %qv, ptr %p, align 8166 ret void167}168 169; Same as swap_untyped1, but the load/stores are in the opposite order.170define void @swap_untyped2(i64* nonnull align 8 %p, i64* nonnull align 8 %q) sanitize_numerical_stability {171; CHECK-LABEL: @swap_untyped2(172; CHECK-NEXT: [[PV:%.*]] = load i64, ptr [[P:%.*]], align 8173; CHECK-NEXT: [[TMP1:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[P]])174; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 1175; CHECK-NEXT: [[TMP3:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[P]])176; CHECK-NEXT: [[TMP4:%.*]] = load i128, ptr [[TMP3]], align 1177; CHECK-NEXT: [[QV:%.*]] = load i64, ptr [[Q:%.*]], align 8178; CHECK-NEXT: [[TMP5:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[Q]])179; CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP5]], align 1180; CHECK-NEXT: [[TMP7:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[Q]])181; CHECK-NEXT: [[TMP8:%.*]] = load i128, ptr [[TMP7]], align 1182; CHECK-NEXT: store i64 [[PV]], ptr [[Q]], align 8183; CHECK-NEXT: [[TMP9:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[Q]])184; CHECK-NEXT: store i64 [[TMP2]], ptr [[TMP9]], align 1185; CHECK-NEXT: [[TMP10:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[Q]])186; CHECK-NEXT: store i128 [[TMP4]], ptr [[TMP10]], align 1187; CHECK-NEXT: store i64 [[QV]], ptr [[P]], align 8188; CHECK-NEXT: [[TMP11:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[P]])189; CHECK-NEXT: store i64 [[TMP6]], ptr [[TMP11]], align 1190; CHECK-NEXT: [[TMP12:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[P]])191; CHECK-NEXT: store i128 [[TMP8]], ptr [[TMP12]], align 1192; CHECK-NEXT: ret void193;194 %pv = load i64, ptr %p195 %qv = load i64, ptr %q196 store i64 %pv, ptr %q, align 8197 store i64 %qv, ptr %p, align 8198 ret void199}200 201define void @swap_ft1(float* nonnull align 8 %p, float* nonnull align 8 %q) sanitize_numerical_stability {202; CHECK-LABEL: @swap_ft1(203; CHECK-NEXT: [[QV:%.*]] = load float, ptr [[Q:%.*]], align 4204; CHECK-NEXT: [[TMP1:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_load(ptr [[Q]], i64 1)205; CHECK-NEXT: [[TMP2:%.*]] = icmp eq ptr [[TMP1]], null206; CHECK-NEXT: br i1 [[TMP2]], label [[TMP5:%.*]], label [[TMP3:%.*]]207; CHECK: 3:208; CHECK-NEXT: [[TMP4:%.*]] = load double, ptr [[TMP1]], align 1209; CHECK-NEXT: br label [[TMP7:%.*]]210; CHECK: 5:211; CHECK-NEXT: [[TMP6:%.*]] = fpext float [[QV]] to double212; CHECK-NEXT: br label [[TMP7]]213; CHECK: 7:214; CHECK-NEXT: [[TMP8:%.*]] = phi double [ [[TMP4]], [[TMP3]] ], [ [[TMP6]], [[TMP5]] ]215; CHECK-NEXT: [[PV:%.*]] = load float, ptr [[P:%.*]], align 4216; CHECK-NEXT: [[TMP9:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_load(ptr [[P]], i64 1)217; CHECK-NEXT: [[TMP10:%.*]] = icmp eq ptr [[TMP9]], null218; CHECK-NEXT: br i1 [[TMP10]], label [[TMP13:%.*]], label [[TMP11:%.*]]219; CHECK: 11:220; CHECK-NEXT: [[TMP12:%.*]] = load double, ptr [[TMP9]], align 1221; CHECK-NEXT: br label [[TMP15:%.*]]222; CHECK: 13:223; CHECK-NEXT: [[TMP14:%.*]] = fpext float [[PV]] to double224; CHECK-NEXT: br label [[TMP15]]225; CHECK: 15:226; CHECK-NEXT: [[TMP16:%.*]] = phi double [ [[TMP12]], [[TMP11]] ], [ [[TMP14]], [[TMP13]] ]227; CHECK-NEXT: [[TMP17:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_store(ptr [[Q]], i64 1)228; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[Q]] to i64229; CHECK-NEXT: [[TMP19:%.*]] = call i32 @__nsan_internal_check_float_d(float [[PV]], double [[TMP16]], i32 4, i64 [[TMP18]])230; CHECK-NEXT: [[TMP20:%.*]] = icmp eq i32 [[TMP19]], 1231; CHECK-NEXT: [[TMP21:%.*]] = fpext float [[PV]] to double232; CHECK-NEXT: [[TMP22:%.*]] = select i1 [[TMP20]], double [[TMP21]], double [[TMP16]]233; CHECK-NEXT: store double [[TMP22]], ptr [[TMP17]], align 1234; CHECK-NEXT: store float [[PV]], ptr [[Q]], align 8235; CHECK-NEXT: [[TMP23:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_store(ptr [[P]], i64 1)236; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[P]] to i64237; CHECK-NEXT: [[TMP25:%.*]] = call i32 @__nsan_internal_check_float_d(float [[QV]], double [[TMP8]], i32 4, i64 [[TMP24]])238; CHECK-NEXT: [[TMP26:%.*]] = icmp eq i32 [[TMP25]], 1239; CHECK-NEXT: [[TMP27:%.*]] = fpext float [[QV]] to double240; CHECK-NEXT: [[TMP28:%.*]] = select i1 [[TMP26]], double [[TMP27]], double [[TMP8]]241; CHECK-NEXT: store double [[TMP28]], ptr [[TMP23]], align 1242; CHECK-NEXT: store float [[QV]], ptr [[P]], align 8243; CHECK-NEXT: ret void244;245 %qv = load float, ptr %q246 %pv = load float, ptr %p247 store float %pv, ptr %q, align 8248 store float %qv, ptr %p, align 8249 ret void250}251 252; Same as swap_ft1, but the load/stores are in the opposite order.253define void @swap_ft2(float* nonnull align 8 %p, float* nonnull align 8 %q) sanitize_numerical_stability {254; CHECK-LABEL: @swap_ft2(255; CHECK-NEXT: [[PV:%.*]] = load float, ptr [[P:%.*]], align 4256; CHECK-NEXT: [[TMP1:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_load(ptr [[P]], i64 1)257; CHECK-NEXT: [[TMP2:%.*]] = icmp eq ptr [[TMP1]], null258; CHECK-NEXT: br i1 [[TMP2]], label [[TMP5:%.*]], label [[TMP3:%.*]]259; CHECK: 3:260; CHECK-NEXT: [[TMP4:%.*]] = load double, ptr [[TMP1]], align 1261; CHECK-NEXT: br label [[TMP7:%.*]]262; CHECK: 5:263; CHECK-NEXT: [[TMP6:%.*]] = fpext float [[PV]] to double264; CHECK-NEXT: br label [[TMP7]]265; CHECK: 7:266; CHECK-NEXT: [[TMP8:%.*]] = phi double [ [[TMP4]], [[TMP3]] ], [ [[TMP6]], [[TMP5]] ]267; CHECK-NEXT: [[QV:%.*]] = load float, ptr [[Q:%.*]], align 4268; CHECK-NEXT: [[TMP9:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_load(ptr [[Q]], i64 1)269; CHECK-NEXT: [[TMP10:%.*]] = icmp eq ptr [[TMP9]], null270; CHECK-NEXT: br i1 [[TMP10]], label [[TMP13:%.*]], label [[TMP11:%.*]]271; CHECK: 11:272; CHECK-NEXT: [[TMP12:%.*]] = load double, ptr [[TMP9]], align 1273; CHECK-NEXT: br label [[TMP15:%.*]]274; CHECK: 13:275; CHECK-NEXT: [[TMP14:%.*]] = fpext float [[QV]] to double276; CHECK-NEXT: br label [[TMP15]]277; CHECK: 15:278; CHECK-NEXT: [[TMP16:%.*]] = phi double [ [[TMP12]], [[TMP11]] ], [ [[TMP14]], [[TMP13]] ]279; CHECK-NEXT: [[TMP17:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_store(ptr [[Q]], i64 1)280; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[Q]] to i64281; CHECK-NEXT: [[TMP19:%.*]] = call i32 @__nsan_internal_check_float_d(float [[PV]], double [[TMP8]], i32 4, i64 [[TMP18]])282; CHECK-NEXT: [[TMP20:%.*]] = icmp eq i32 [[TMP19]], 1283; CHECK-NEXT: [[TMP21:%.*]] = fpext float [[PV]] to double284; CHECK-NEXT: [[TMP22:%.*]] = select i1 [[TMP20]], double [[TMP21]], double [[TMP8]]285; CHECK-NEXT: store double [[TMP22]], ptr [[TMP17]], align 1286; CHECK-NEXT: store float [[PV]], ptr [[Q]], align 8287; CHECK-NEXT: [[TMP23:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_store(ptr [[P]], i64 1)288; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[P]] to i64289; CHECK-NEXT: [[TMP25:%.*]] = call i32 @__nsan_internal_check_float_d(float [[QV]], double [[TMP16]], i32 4, i64 [[TMP24]])290; CHECK-NEXT: [[TMP26:%.*]] = icmp eq i32 [[TMP25]], 1291; CHECK-NEXT: [[TMP27:%.*]] = fpext float [[QV]] to double292; CHECK-NEXT: [[TMP28:%.*]] = select i1 [[TMP26]], double [[TMP27]], double [[TMP16]]293; CHECK-NEXT: store double [[TMP28]], ptr [[TMP23]], align 1294; CHECK-NEXT: store float [[QV]], ptr [[P]], align 8295; CHECK-NEXT: ret void296;297 %pv = load float, ptr %p298 %qv = load float, ptr %q299 store float %pv, ptr %q, align 8300 store float %qv, ptr %p, align 8301 ret void302}303 304define void @swap_vectorft1(<2 x float>* nonnull align 16 %p, <2 x float>* nonnull align 16 %q) sanitize_numerical_stability {305; CHECK-LABEL: @swap_vectorft1(306; CHECK-NEXT: [[QV:%.*]] = load <2 x float>, ptr [[Q:%.*]], align 8307; CHECK-NEXT: [[TMP1:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_load(ptr [[Q]], i64 2)308; CHECK-NEXT: [[TMP2:%.*]] = icmp eq ptr [[TMP1]], null309; CHECK-NEXT: br i1 [[TMP2]], label [[TMP5:%.*]], label [[TMP3:%.*]]310; CHECK: 3:311; CHECK-NEXT: [[TMP4:%.*]] = load <2 x double>, ptr [[TMP1]], align 1312; CHECK-NEXT: br label [[TMP7:%.*]]313; CHECK: 5:314; CHECK-NEXT: [[TMP6:%.*]] = fpext <2 x float> [[QV]] to <2 x double>315; CHECK-NEXT: br label [[TMP7]]316; CHECK: 7:317; CHECK-NEXT: [[TMP8:%.*]] = phi <2 x double> [ [[TMP4]], [[TMP3]] ], [ [[TMP6]], [[TMP5]] ]318; CHECK-NEXT: [[PV:%.*]] = load <2 x float>, ptr [[P:%.*]], align 8319; CHECK-NEXT: [[TMP9:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_load(ptr [[P]], i64 2)320; CHECK-NEXT: [[TMP10:%.*]] = icmp eq ptr [[TMP9]], null321; CHECK-NEXT: br i1 [[TMP10]], label [[TMP13:%.*]], label [[TMP11:%.*]]322; CHECK: 11:323; CHECK-NEXT: [[TMP12:%.*]] = load <2 x double>, ptr [[TMP9]], align 1324; CHECK-NEXT: br label [[TMP15:%.*]]325; CHECK: 13:326; CHECK-NEXT: [[TMP14:%.*]] = fpext <2 x float> [[PV]] to <2 x double>327; CHECK-NEXT: br label [[TMP15]]328; CHECK: 15:329; CHECK-NEXT: [[TMP16:%.*]] = phi <2 x double> [ [[TMP12]], [[TMP11]] ], [ [[TMP14]], [[TMP13]] ]330; CHECK-NEXT: [[TMP17:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_store(ptr [[Q]], i64 2)331; CHECK-NEXT: [[TMP18:%.*]] = extractelement <2 x float> [[PV]], i64 0332; CHECK-NEXT: [[TMP19:%.*]] = extractelement <2 x double> [[TMP16]], i64 0333; CHECK-NEXT: [[TMP20:%.*]] = ptrtoint ptr [[Q]] to i64334; CHECK-NEXT: [[TMP21:%.*]] = call i32 @__nsan_internal_check_float_d(float [[TMP18]], double [[TMP19]], i32 4, i64 [[TMP20]])335; CHECK-NEXT: [[TMP22:%.*]] = extractelement <2 x float> [[PV]], i64 1336; CHECK-NEXT: [[TMP23:%.*]] = extractelement <2 x double> [[TMP16]], i64 1337; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[Q]] to i64338; CHECK-NEXT: [[TMP25:%.*]] = call i32 @__nsan_internal_check_float_d(float [[TMP22]], double [[TMP23]], i32 4, i64 [[TMP24]])339; CHECK-NEXT: [[TMP26:%.*]] = or i32 [[TMP21]], [[TMP25]]340; CHECK-NEXT: [[TMP27:%.*]] = icmp eq i32 [[TMP26]], 1341; CHECK-NEXT: [[TMP28:%.*]] = fpext <2 x float> [[PV]] to <2 x double>342; CHECK-NEXT: [[TMP29:%.*]] = select i1 [[TMP27]], <2 x double> [[TMP28]], <2 x double> [[TMP16]]343; CHECK-NEXT: store <2 x double> [[TMP29]], ptr [[TMP17]], align 1344; CHECK-NEXT: store <2 x float> [[PV]], ptr [[Q]], align 16345; CHECK-NEXT: [[TMP30:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_store(ptr [[P]], i64 2)346; CHECK-NEXT: [[TMP31:%.*]] = extractelement <2 x float> [[QV]], i64 0347; CHECK-NEXT: [[TMP32:%.*]] = extractelement <2 x double> [[TMP8]], i64 0348; CHECK-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[P]] to i64349; CHECK-NEXT: [[TMP34:%.*]] = call i32 @__nsan_internal_check_float_d(float [[TMP31]], double [[TMP32]], i32 4, i64 [[TMP33]])350; CHECK-NEXT: [[TMP35:%.*]] = extractelement <2 x float> [[QV]], i64 1351; CHECK-NEXT: [[TMP36:%.*]] = extractelement <2 x double> [[TMP8]], i64 1352; CHECK-NEXT: [[TMP37:%.*]] = ptrtoint ptr [[P]] to i64353; CHECK-NEXT: [[TMP38:%.*]] = call i32 @__nsan_internal_check_float_d(float [[TMP35]], double [[TMP36]], i32 4, i64 [[TMP37]])354; CHECK-NEXT: [[TMP39:%.*]] = or i32 [[TMP34]], [[TMP38]]355; CHECK-NEXT: [[TMP40:%.*]] = icmp eq i32 [[TMP39]], 1356; CHECK-NEXT: [[TMP41:%.*]] = fpext <2 x float> [[QV]] to <2 x double>357; CHECK-NEXT: [[TMP42:%.*]] = select i1 [[TMP40]], <2 x double> [[TMP41]], <2 x double> [[TMP8]]358; CHECK-NEXT: store <2 x double> [[TMP42]], ptr [[TMP30]], align 1359; CHECK-NEXT: store <2 x float> [[QV]], ptr [[P]], align 16360; CHECK-NEXT: ret void361;362 %qv = load <2 x float>, ptr %q363 %pv = load <2 x float>, ptr %p364 store <2 x float> %pv, ptr %q, align 16365 store <2 x float> %qv, ptr %p, align 16366 ret void367}368 369; Same as swap_vectorft1, but the load/stores are in the opposite order.370define void @swap_vectorft2(<2 x float>* nonnull align 16 %p, <2 x float>* nonnull align 16 %q) sanitize_numerical_stability {371; CHECK-LABEL: @swap_vectorft2(372; CHECK-NEXT: [[PV:%.*]] = load <2 x float>, ptr [[P:%.*]], align 8373; CHECK-NEXT: [[TMP1:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_load(ptr [[P]], i64 2)374; CHECK-NEXT: [[TMP2:%.*]] = icmp eq ptr [[TMP1]], null375; CHECK-NEXT: br i1 [[TMP2]], label [[TMP5:%.*]], label [[TMP3:%.*]]376; CHECK: 3:377; CHECK-NEXT: [[TMP4:%.*]] = load <2 x double>, ptr [[TMP1]], align 1378; CHECK-NEXT: br label [[TMP7:%.*]]379; CHECK: 5:380; CHECK-NEXT: [[TMP6:%.*]] = fpext <2 x float> [[PV]] to <2 x double>381; CHECK-NEXT: br label [[TMP7]]382; CHECK: 7:383; CHECK-NEXT: [[TMP8:%.*]] = phi <2 x double> [ [[TMP4]], [[TMP3]] ], [ [[TMP6]], [[TMP5]] ]384; CHECK-NEXT: [[QV:%.*]] = load <2 x float>, ptr [[Q:%.*]], align 8385; CHECK-NEXT: [[TMP9:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_load(ptr [[Q]], i64 2)386; CHECK-NEXT: [[TMP10:%.*]] = icmp eq ptr [[TMP9]], null387; CHECK-NEXT: br i1 [[TMP10]], label [[TMP13:%.*]], label [[TMP11:%.*]]388; CHECK: 11:389; CHECK-NEXT: [[TMP12:%.*]] = load <2 x double>, ptr [[TMP9]], align 1390; CHECK-NEXT: br label [[TMP15:%.*]]391; CHECK: 13:392; CHECK-NEXT: [[TMP14:%.*]] = fpext <2 x float> [[QV]] to <2 x double>393; CHECK-NEXT: br label [[TMP15]]394; CHECK: 15:395; CHECK-NEXT: [[TMP16:%.*]] = phi <2 x double> [ [[TMP12]], [[TMP11]] ], [ [[TMP14]], [[TMP13]] ]396; CHECK-NEXT: [[TMP17:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_store(ptr [[Q]], i64 2)397; CHECK-NEXT: [[TMP18:%.*]] = extractelement <2 x float> [[PV]], i64 0398; CHECK-NEXT: [[TMP19:%.*]] = extractelement <2 x double> [[TMP8]], i64 0399; CHECK-NEXT: [[TMP20:%.*]] = ptrtoint ptr [[Q]] to i64400; CHECK-NEXT: [[TMP21:%.*]] = call i32 @__nsan_internal_check_float_d(float [[TMP18]], double [[TMP19]], i32 4, i64 [[TMP20]])401; CHECK-NEXT: [[TMP22:%.*]] = extractelement <2 x float> [[PV]], i64 1402; CHECK-NEXT: [[TMP23:%.*]] = extractelement <2 x double> [[TMP8]], i64 1403; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[Q]] to i64404; CHECK-NEXT: [[TMP25:%.*]] = call i32 @__nsan_internal_check_float_d(float [[TMP22]], double [[TMP23]], i32 4, i64 [[TMP24]])405; CHECK-NEXT: [[TMP26:%.*]] = or i32 [[TMP21]], [[TMP25]]406; CHECK-NEXT: [[TMP27:%.*]] = icmp eq i32 [[TMP26]], 1407; CHECK-NEXT: [[TMP28:%.*]] = fpext <2 x float> [[PV]] to <2 x double>408; CHECK-NEXT: [[TMP29:%.*]] = select i1 [[TMP27]], <2 x double> [[TMP28]], <2 x double> [[TMP8]]409; CHECK-NEXT: store <2 x double> [[TMP29]], ptr [[TMP17]], align 1410; CHECK-NEXT: store <2 x float> [[PV]], ptr [[Q]], align 16411; CHECK-NEXT: [[TMP30:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_store(ptr [[P]], i64 2)412; CHECK-NEXT: [[TMP31:%.*]] = extractelement <2 x float> [[QV]], i64 0413; CHECK-NEXT: [[TMP32:%.*]] = extractelement <2 x double> [[TMP16]], i64 0414; CHECK-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[P]] to i64415; CHECK-NEXT: [[TMP34:%.*]] = call i32 @__nsan_internal_check_float_d(float [[TMP31]], double [[TMP32]], i32 4, i64 [[TMP33]])416; CHECK-NEXT: [[TMP35:%.*]] = extractelement <2 x float> [[QV]], i64 1417; CHECK-NEXT: [[TMP36:%.*]] = extractelement <2 x double> [[TMP16]], i64 1418; CHECK-NEXT: [[TMP37:%.*]] = ptrtoint ptr [[P]] to i64419; CHECK-NEXT: [[TMP38:%.*]] = call i32 @__nsan_internal_check_float_d(float [[TMP35]], double [[TMP36]], i32 4, i64 [[TMP37]])420; CHECK-NEXT: [[TMP39:%.*]] = or i32 [[TMP34]], [[TMP38]]421; CHECK-NEXT: [[TMP40:%.*]] = icmp eq i32 [[TMP39]], 1422; CHECK-NEXT: [[TMP41:%.*]] = fpext <2 x float> [[QV]] to <2 x double>423; CHECK-NEXT: [[TMP42:%.*]] = select i1 [[TMP40]], <2 x double> [[TMP41]], <2 x double> [[TMP16]]424; CHECK-NEXT: store <2 x double> [[TMP42]], ptr [[TMP30]], align 1425; CHECK-NEXT: store <2 x float> [[QV]], ptr [[P]], align 16426; CHECK-NEXT: ret void427;428 %pv = load <2 x float>, ptr %p429 %qv = load <2 x float>, ptr %q430 store <2 x float> %pv, ptr %q, align 16431 store <2 x float> %qv, ptr %p, align 16432 ret void433}434