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1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-lutv2 2>&1 < %s | FileCheck %s2 3// --------------------------------------------------------------------------//4// Invalid vector select register5 6luti4 {z0-z3}, zt0, {z0.b-z1.b}7// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction8// CHECK-NEXT: luti4 {z0-z3}, zt0, {z0.b-z1.b}9// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:10 11luti4 {z0.d, z4.d, z8.d, z12.d}, zt0, {z0-z1}12// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction13// CHECK-NEXT: luti4 {z0.d, z4.d, z8.d, z12.d}, zt0, {z0-z1}14// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:15 16// --------------------------------------------------------------------------//17// Invalid vector grouping18 19luti4 {z0.b-z1.b}, zt0, {z0-z4}20// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid number of vectors21// CHECK-NEXT: luti4 {z0.b-z1.b}, zt0, {z0-z4}22// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:23 24luti4 {z0.b - z12.b}, zt0, {z0-z1}25// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid number of vectors26// CHECK-NEXT: luti4 {z0.b - z12.b}, zt0, {z0-z1}27// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:28