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1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme,+sme-i16i64 2>&1 < %s| FileCheck %s2 3// ------------------------------------------------------------------------- //4// Invalid tile5 6addva za4.s, p0/m, p0/m, z0.s7// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction8// CHECK-NEXT: addva za4.s, p0/m, p0/m, z0.s9// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:10 11addva za8.d, p0/m, p0/m, z0.d12// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction13// CHECK-NEXT: addva za8.d, p0/m, p0/m, z0.d14// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:15 16// ------------------------------------------------------------------------- //17// Invalid predicate18 19addva za0.s, p8/m, p0/m, z0.s20// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)21// CHECK-NEXT: addva za0.s, p8/m, p0/m, z0.s22// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:23 24addva za0.s, p0/m, p8/m, z0.s25// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)26// CHECK-NEXT: addva za0.s, p0/m, p8/m, z0.s27// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:28 29addva za0.d, p8/m, p0/m, z0.d30// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)31// CHECK-NEXT: addva za0.d, p8/m, p0/m, z0.d32// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:33 34addva za0.d, p0/m, p8/m, z0.d35// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)36// CHECK-NEXT: addva za0.d, p0/m, p8/m, z0.d37// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:38