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1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme,+sme-f64f64 2>&1 < %s| FileCheck %s2 3// ------------------------------------------------------------------------- //4// Invalid tile5//6// expected: .s => za0-za3, .d => za0-za77 8// non-widening9 10fmopa za4.s, p0/m, p0/m, z0.s, z0.s11// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction12// CHECK-NEXT: fmopa za4.s, p0/m, p0/m, z0.s, z0.s13// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:14 15fmopa za8.d, p0/m, p0/m, z0.d, z0.d16// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction17// CHECK-NEXT: fmopa za8.d, p0/m, p0/m, z0.d, z0.d18// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:19 20// widening21 22fmopa za4.s, p0/m, p0/m, z0.h, z0.h23// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction24// CHECK-NEXT: fmopa za4.s, p0/m, p0/m, z0.h, z0.h25// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:26 27// ------------------------------------------------------------------------- //28// Invalid predicate (expected: p0-p7)29 30// non-widening31 32fmopa za0.s, p8/m, p0/m, z0.s, z0.s33// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)34// CHECK-NEXT: fmopa za0.s, p8/m, p0/m, z0.s, z0.s35// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:36 37fmopa za0.s, p0/m, p8/m, z0.s, z0.s38// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)39// CHECK-NEXT: fmopa za0.s, p0/m, p8/m, z0.s, z0.s40// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:41 42fmopa za0.d, p8/m, p0/m, z0.d, z0.d43// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)44// CHECK-NEXT: fmopa za0.d, p8/m, p0/m, z0.d, z0.d45// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:46 47fmopa za0.d, p0/m, p8/m, z0.d, z0.d48// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)49// CHECK-NEXT: fmopa za0.d, p0/m, p8/m, z0.d, z0.d50// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:51 52// widening53 54fmopa za0.s, p8/m, p0/m, z0.h, z0.h55// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)56// CHECK-NEXT: fmopa za0.s, p8/m, p0/m, z0.h, z0.h57// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:58 59fmopa za0.s, p0/m, p8/m, z0.h, z0.h60// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)61// CHECK-NEXT: fmopa za0.s, p0/m, p8/m, z0.h, z0.h62// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:63 64// ------------------------------------------------------------------------- //65// Invalid predicate qualifier (expected: /m)66 67// non-widening68 69fmopa za0.s, p0/z, p0/m, z0.s, z0.s70// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction71// CHECK-NEXT: fmopa za0.s, p0/z, p0/m, z0.s, z0.s72// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:73 74fmopa za0.s, p0/m, p0/z, z0.s, z0.s75// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction76// CHECK-NEXT: fmopa za0.s, p0/m, p0/z, z0.s, z0.s77// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:78 79fmopa za0.d, p0/z, p0/m, z0.d, z0.d80// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction81// CHECK-NEXT: fmopa za0.d, p0/z, p0/m, z0.d, z0.d82// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:83 84fmopa za0.d, p0/m, p0/z, z0.d, z0.d85// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction86// CHECK-NEXT: fmopa za0.d, p0/m, p0/z, z0.d, z0.d87// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:88 89// widening90 91fmopa za0.s, p0/z, p0/m, z0.h, z0.h92// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction93// CHECK-NEXT: fmopa za0.s, p0/z, p0/m, z0.h, z0.h94// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:95 96fmopa za0.s, p0/m, p0/z, z0.h, z0.h97// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction98// CHECK-NEXT: fmopa za0.s, p0/m, p0/z, z0.h, z0.h99// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:100 101// ------------------------------------------------------------------------- //102// Invalid ZPR type suffix103//104// expected: .s => .s (non-widening), .h (widening), .d => .d105 106// non-widening107 108fmopa za0.s, p0/m, p0/m, z0.b, z0.s109// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width110// CHECK-NEXT: fmopa za0.s, p0/m, p0/m, z0.b, z0.s111// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:112 113fmopa za0.s, p0/m, p0/m, z0.s, z0.h114// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width115// CHECK-NEXT: fmopa za0.s, p0/m, p0/m, z0.s, z0.h116// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:117 118fmopa za0.d, p0/m, p0/m, z0.b, z0.d119// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width120// CHECK-NEXT: fmopa za0.d, p0/m, p0/m, z0.b, z0.d121// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:122 123fmopa za0.d, p0/m, p0/m, z0.d, z0.h124// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width125// CHECK-NEXT: fmopa za0.d, p0/m, p0/m, z0.d, z0.h126// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:127 128// widening129 130fmopa za0.s, p0/m, p0/m, z0.b, z0.h131// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width132// CHECK-NEXT: fmopa za0.s, p0/m, p0/m, z0.b, z0.h133// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:134 135fmopa za0.s, p0/m, p0/m, z0.h, z0.d136// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width137// CHECK-NEXT: fmopa za0.s, p0/m, p0/m, z0.h, z0.d138// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:139