34 lines · plain
1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+sve-b16b16 2>&1 < %s | FileCheck %s2 3// --------------------------------------------------------------------------//4// Invalid vector list5 6bfclamp {z0.h-z2.h}, z0.h, z0.h7// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction8// CHECK-NEXT: bfclamp {z0.h-z2.h}, z0.h, z0.h9// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:10 11bfclamp {z23.h-z24.h}, z13.h, z8.h12// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types13// CHECK-NEXT: bfclamp {z23.h-z24.h}, z13.h, z8.h14// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:15 16bfclamp {z21.h-z24.h}, z10.h, z21.h17// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 4 consecutive SVE vectors, where the first vector is a multiple of 4 and with matching element types18// CHECK-NEXT: bfclamp {z21.h-z24.h}, z10.h, z21.h19// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:20 21 22// --------------------------------------------------------------------------//23// Invalid Register Suffix24 25bfclamp {z0.s-z1.s}, z0.h, z4.h26// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction27// CHECK-NEXT: bfclamp {z0.s-z1.s}, z0.h, z4.h28// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:29 30bfclamp {z0.h-z3.h}, z5.d, z6.d31// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width32// CHECK-NEXT: bfclamp {z0.h-z3.h}, z5.d, z6.d33// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:34