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1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+sve-b16b16 2>&1 < %s | FileCheck %s2 3// --------------------------------------------------------------------------//4// Invalid vector list5 6bfmin {z0.h-z1.h}, {z0.h-z2.h}, z0.h7// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction8// CHECK-NEXT: bfmin {z0.h-z1.h}, {z0.h-z2.h}, z0.h9// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:10 11bfmin {z1.h-z2.h}, {z0.h-z1.h}, z0.h12// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types13// CHECK-NEXT: bfmin {z1.h-z2.h}, {z0.h-z1.h}, z0.h14// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:15 16bfmin {z1.h-z4.h}, {z0.h-z3.h}, z0.h17// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 4 consecutive SVE vectors, where the first vector is a multiple of 4 and with matching element types18// CHECK-NEXT: bfmin {z1.h-z4.h}, {z0.h-z3.h}, z0.h19// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:20 21// --------------------------------------------------------------------------//22// Invalid single register23 24bfmin {z0.h-z1.h}, {z2.h-z3.h}, z31.h25// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected z0.h..z15.h26// CHECK-NEXT: bfmin {z0.h-z1.h}, {z2.h-z3.h}, z31.h27// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:28 29// --------------------------------------------------------------------------//30// Invalid Register Suffix31 32bfmin {z0.h-z1.h}, {z2.h-z3.h}, z14.d33// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected z0.h..z15.h34// CHECK-NEXT: bfmin {z0.h-z1.h}, {z2.h-z3.h}, z14.d35// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:36 37bfmin {z0.h-z1.h}, {z2.s-z3.s}, z14.h38// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction39// CHECK-NEXT: bfmin {z0.h-z1.h}, {z2.s-z3.s}, z14.h40// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:41 42bfmin {z0.h-z1.h}, {z2.h-z3.s}, z14.h43// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: mismatched register size suffix44// CHECK-NEXT: bfmin {z0.h-z1.h}, {z2.h-z3.s}, z14.h45// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:46