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1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+sve-bfscale 2>&1 < %s| FileCheck %s2 3// Multiple and single vector, 2 regs4 5bfscale  {z0.s-z1.s}, {z0.s-z1.s}, z0.h6// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction7 8bfscale  {z1.h-z2.h}, {z1.h-z2.h}, z0.h9// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types10 11bfscale  {z0.h-z2.h}, {z0.h-z2.h}, z0.h12// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction13 14bfscale  {z0.h-z1.h}, {z0.h-z1.h}, z0.s15// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected z0.h..z15.h16 17bfscale  {z0.h-z1.h}, {z0.h-z1.h}, z16.h18// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected z0.h..z15.h19 20bfscale  {z0.h-z1.h}, {z2.h-z3.h}, z8.h21// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register list22 23// Multiple and single vector, 4 regs24 25bfscale  {z0.s-z3.s}, {z0.s-z3.s}, z0.h26// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction27 28bfscale  {z1.h-z4.h}, {z1.h-z4.h}, z0.h29// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 4 consecutive SVE vectors, where the first vector is a multiple of 4 and with matching element types30 31bfscale  {z0.h-z4.h}, {z0.h-z4.h}, z0.h32// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid number of vectors33 34bfscale  {z0.h-z3.h}, {z0.h-z3.h}, z0.s35// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected z0.h..z15.h36 37bfscale  {z0.h-z3.h}, {z0.h-z3.h}, z16.h38// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected z0.h..z15.h39 40bfscale  {z0.h-z3.h}, {z4.h-z7.h}, z8.h41// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register list42 43// Multiple vectors, 2 regs44 45bfscale  {z0.s-z1.s}, {z0.s-z1.s}, {z2.h-z3.h}46// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction47 48bfscale  {z1.h-z2.h}, {z1.h-z2.h}, {z2.h-z3.h}49// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types50 51bfscale  {z0.h-z2.h}, {z0.h-z4.h}, {z2.h-z3.h}52// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid number of vectors53 54bfscale  {z0.h-z1.h}, {z0.h-z1.h}, {z2.s-z3.s}55// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction56 57bfscale  {z0.h-z1.h}, {z0.h-z1.h}, {z28.h-z30.h}58// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction59 60bfscale  {z0.h-z1.h}, {z0.h-z1.h}, {z29.h-z30.h}61// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types62 63bfscale  {z0.h-z1.h}, {z2.h-z3.h}, {z28.h-z29.h}64// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register list65 66// Multiple vectors, 4 regs67 68bfscale  {z0.s-z3.s}, {z0.s-z3.s}, {z4.h-z7.h}69// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction70 71bfscale  {z1.h-z4.h}, {z1.h-z4.h}, z0.h72// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 4 consecutive SVE vectors, where the first vector is a multiple of 4 and with matching element types73 74bfscale  {z0.h-z4.h}, {z0.h-z4.h}, {z4.h-z7.h}75// CHECK: [[@LINE-1]]:{{[0-9]+}}: error:  invalid number of vectors76 77bfscale  {z0.h-z3.h}, {z0.h-z3.h}, {z4.s-z7.s}78// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction79 80bfscale  {z0.h-z3.h}, {z0.h-z3.h}, {z4.h-z8.h}81// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid number of vectors82 83bfscale  {z0.h-z3.h}, {z0.h-z3.h}, {z5.h-z8.h}84// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 4 consecutive SVE vectors, where the first vector is a multiple of 4 and with matching element types85 86bfscale  {z0.h-z3.h}, {z4.h-z7.h}, {z8.h-z11.h}87// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register list