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1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+sme-f64f64 2>&1 < %s | FileCheck %s2 3// --------------------------------------------------------------------------//4// Out of range index offset5 6fsub za.d[w8, 8, vgx2], {z0.d, z1.d}7// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 7].8// CHECK-NEXT: fsub za.d[w8, 8, vgx2], {z0.d, z1.d}9// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:10 11fsub za.s[w8, -1, vgx4], {z0.s-z3.s}12// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 7].13// CHECK-NEXT: fsub za.s[w8, -1, vgx4], {z0.s-z3.s}14// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:15 16// --------------------------------------------------------------------------//17// Invalid vector select register18 19fsub za.d[w7, 7, vgx4], {z0.d-z3.d}20// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [w8, w11]21// CHECK-NEXT: fsub za.d[w7, 7, vgx4], {z0.d-z3.d}22// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:23 24fsub za.s[w12, 7, vgx2], {z0.s, z1.s}25// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [w8, w11]26// CHECK-NEXT: fsub za.s[w12, 7, vgx2], {z0.s, z1.s}27// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:28 29// --------------------------------------------------------------------------//30// Invalid vector list31 32fsub za.d[w8, 0, vgx4], {z0.d-z4.d}33// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid number of vectors34// CHECK-NEXT: fsub za.d[w8, 0, vgx4], {z0.d-z4.d}35// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:36 37fsub za.s[w8, 0, vgx2], {z1.s-z2.s}38// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types39// CHECK-NEXT: fsub za.s[w8, 0, vgx2], {z1.s-z2.s}40// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:41 42fsub za.s[w8, 0, vgx4], {z1.s-z4.s}43// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 4 consecutive SVE vectors, where the first vector is a multiple of 4 and with matching element types44// CHECK-NEXT: fsub za.s[w8, 0, vgx4], {z1.s-z4.s}45// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:46 47