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1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 2>&1 < %s | FileCheck %s2 3// --------------------------------------------------------------------------//4// Invalid vector list5 6sclamp {z0.b-z2.b}, z0.b, z0.b7// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction8// CHECK-NEXT: sclamp {z0.b-z2.b}, z0.b, z0.b9// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:10 11sclamp {z1.s-z2.s}, z0.s, z0.s12// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element type13// CHECK-NEXT: sclamp {z1.s-z2.s}, z0.s, z0.s14// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:15 16// --------------------------------------------------------------------------//17// Invalid Register Suffix18 19sclamp {z0.h-z1.h}, z0.h, z4.s20// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width21// CHECK-NEXT: sclamp {z0.h-z1.h}, z0.h, z4.s22// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:23