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1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 2>&1 < %s | FileCheck %s2 3// --------------------------------------------------------------------------//4// Invalid vector list5 6sqcvtn z0.h, {z0.d-z4.d}7// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid number of vectors8// CHECK-NEXT: sqcvtn z0.h, {z0.d-z4.d}9// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:10 11sqcvtn z0.b, {z1.s-z4.s}12// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 4 consecutive SVE vectors, where the first vector is a multiple of 4 and with matching element type13// CHECK-NEXT: sqcvtn z0.b, {z1.s-z4.s}14// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:15 16// --------------------------------------------------------------------------//17// Invalid Register Suffix18 19sqcvtn z0.h, {z0.s-z3.s}20// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction21// CHECK-NEXT: sqcvtn z0.h, {z0.s-z3.s}22// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:23