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1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s2 3// --------------------------------------------------------------------------//4// Immediate out of lower bound [-8, 7].5 6stnt1h z23.h, p0, [x13, #-9, MUL VL]7// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].8// CHECK-NEXT: stnt1h z23.h, p0, [x13, #-9, MUL VL]9// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:10 11stnt1h z29.h, p0, [x3, #8, MUL VL]12// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].13// CHECK-NEXT: stnt1h z29.h, p0, [x3, #8, MUL VL]14// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:15 16 17// --------------------------------------------------------------------------//18// Invalid source type.19 20stnt1h z0.b, p0, [x0]21// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width22// CHECK-NEXT: stnt1h z0.b, p0, [x0]23// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:24 25stnt1h z0.s, p0, [x0]26// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width27// CHECK-NEXT: stnt1h z0.s, p0, [x0]28// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:29 30stnt1h z0.d, p0, [x0]31// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width32// CHECK-NEXT: stnt1h z0.d, p0, [x0]33// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:34 35 36// --------------------------------------------------------------------------//37// Invalid predicate38 39stnt1h z27.h, p8, [x0]40// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)41// CHECK-NEXT: stnt1h z27.h, p8, [x0]42// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:43 44stnt1h z0.h, p0/z, [x0]45// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction46// CHECK-NEXT: stnt1h z0.h, p0/z, [x0]47// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:48 49stnt1h z0.h, p0/m, [x0]50// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction51// CHECK-NEXT: stnt1h z0.h, p0/m, [x0]52// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:53 54stnt1h z0.h, p7.b, [x0]55// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)56// CHECK-NEXT: stnt1h z0.h, p7.b, [x0]57// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:58 59stnt1h z0.h, p7.q, [x0]60// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)61// CHECK-NEXT: stnt1h z0.h, p7.q, [x0]62// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:63 64 65// --------------------------------------------------------------------------//66// Invalid vector list.67 68stnt1h { }, p0, [x1, #1, MUL VL]69// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector register expected70// CHECK-NEXT: stnt1h { }, p0, [x1, #1, MUL VL]71// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:72 73stnt1h { z1.h, z2.h }, p0, [x1, #1, MUL VL]74// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand75// CHECK-NEXT: stnt1h { z1.h, z2.h }, p0, [x1, #1, MUL VL]76// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:77 78stnt1h { v0.2d }, p0, [x1, #1, MUL VL]79// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand80// CHECK-NEXT: stnt1h { v0.2d }, p0, [x1, #1, MUL VL]81// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:82 83 84// --------------------------------------------------------------------------//85// Negative tests for instructions that are incompatible with movprfx86 87movprfx z0.h, p0/z, z7.h88stnt1h { z0.h }, p0, [x0, x0, lsl #1]89// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov90// CHECK-NEXT: stnt1h { z0.h }, p0, [x0, x0, lsl #1]91// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:92 93movprfx z0, z794stnt1h { z0.h }, p0, [x0, x0, lsl #1]95// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov96// CHECK-NEXT: stnt1h { z0.h }, p0, [x0, x0, lsl #1]97// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:98