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1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s2 3tbl z0.h, z0.h, z0.b4// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width5// CHECK-NEXT: tbl z0.h, z0.h, z0.b6// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:7 8tbl { z0.h }, z0.h, z0.h9// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector register expected10// CHECK-NEXT: tbl { z0.h }, z0.h, z0.h11// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:12 13 14// --------------------------------------------------------------------------//15// Negative tests for instructions that are incompatible with movprfx16 17movprfx z31.d, p0/z, z6.d18tbl z31.d, { z31.d }, z31.d19// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov20// CHECK-NEXT: tbl z31.d, { z31.d }, z31.d21// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:22 23movprfx z31, z624tbl z31.d, { z31.d }, z31.d25// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov26// CHECK-NEXT: tbl z31.d, { z31.d }, z31.d27// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:28