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1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s2 3// Invalid element kind.4trn1 z10.h, z22.h, z31.x5// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid vector kind qualifier6// CHECK-NEXT: trn1 z10.h, z22.h, z31.x7// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:8 9// Element size specifiers should match.10trn1 z10.h, z3.h, z15.b11// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width12// CHECK-NEXT: trn1 z10.h, z3.h, z15.b13// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:14 15// Too few operands16trn1 z1.h, z2.h17// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: too few operands for instruction18// CHECK-NEXT: trn1 z1.h, z2.h19// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:20 21// z32 is not a valid SVE data register22trn1 z1.s, z2.s, z32.s23// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction24// CHECK-NEXT: trn1 z1.s, z2.s, z32.s25// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:26 27// p16 is not a valid SVE predicate register28trn1 p1.s, p2.s, p16.s29// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction30// CHECK-NEXT: trn1 p1.s, p2.s, p16.s31// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:32 33// Combining data and predicate registers as operands34trn1 z1.s, z2.s, p3.s35// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction36// CHECK-NEXT: trn1 z1.s, z2.s, p3.s37// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:38 39// Combining predicate and data registers as operands40trn1 p1.s, p2.s, z3.s41// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction42// CHECK-NEXT: trn1 p1.s, p2.s, z3.s43// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:44 45 46// --------------------------------------------------------------------------//47// Negative tests for instructions that are incompatible with movprfx48 49movprfx z31.d, p0/z, z6.d50trn1 z31.d, z31.d, z31.d51// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov52// CHECK-NEXT: trn1 z31.d, z31.d, z31.d53// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:54 55movprfx z31, z656trn1 z31.d, z31.d, z31.d57// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov58// CHECK-NEXT: trn1 z31.d, z31.d, z31.d59// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:60