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1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s2 3 4// ------------------------------------------------------------------------- //5// Invalid element width6 7bsl2n z0.b, z0.b, z1.s, z2.b8// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width9// CHECK-NEXT: bsl2n z0.b, z0.b, z1.s, z2.b10// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:11 12bsl2n z0.h, z0.h, z1.h, z2.s13// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width14// CHECK-NEXT: bsl2n z0.h, z0.h, z1.h, z2.s15// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:16 17bsl2n z0.d, z0.d, z1.s, z2.s18// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width19// CHECK-NEXT: bsl2n z0.d, z0.d, z1.s, z2.s20// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:21 22 23// --------------------------------------------------------------------------//24// Source and Destination Registers must match25 26bsl2n z0.d, z1.d, z2.d, z3.d27// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register28// CHECK-NEXT: bsl2n z0.d, z1.d, z2.d, z3.d29// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:30 31 32// --------------------------------------------------------------------------//33// Negative tests for instructions that are incompatible with movprfx34 35movprfx z0.d, p0/z, z7.d36bsl2n z0.d, z0.d, z1.d, z2.d37// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx38// CHECK-NEXT: bsl2n z0.d, z0.d, z1.d, z2.d39// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:40